201035658 30321twf.doc/n 六、發明說明： 【發明所屬之技術領域】 本發明是有關於一種顯示面板，且特別是有關於一種 顯示面板的晝素結構設計。 【先前技術】 現今社會多媒體技術相當發達，多半受惠於半導體元 件與顯示裝置的進步。就顯示器而言，具有高晝質、空間 利用效率佳、低消耗功率、無輻射等優越特性之液晶顯示 面板已逐漸成為市場之主流。一般而言，液晶顯示面板 (LCD panel)主要是由一主動元件陣列基板、一彩色濾光基 板與位於兩基板之間的液晶層所構成。 —圖1為習知一種主動元件陣列的上視圖。如圖丨所 不，主動凡件陣列1〇〇包括多條掃描配線11〇、多條資料 配線120、橫跨資料配線12〇的共用配線13〇、多個主動元 件140以及夕個晝素電極15〇。掃描配線與資料配線 120相乂並疋義出多㈤晝素區19〇。主動元件與畫素電 極150分別位於所對應的畫素區19〇内，其中主動元件⑽ 分別連接騎對應的掃触線UG與資料配線i2G，且同 190内的主動元件14〇以及晝素電極15〇彼此電 連接° _ 1所1f示的架構可知，習知此種主動元件陣 列晝素結構重複排列’即’相鄰兩晝素區19〇内: 相同元件相距一個晝素寬度。 央美克服非預期的漏光問題’f知會在彩色濾 土足疋凡件陣列基板上製作黑矩陣，藉以遮蔽主 201035658 OSIUliyiiW 30321twf.doc/n 動元件陣列基板上可能會漏光的區域。 圖2為圖1之主動元件陣列基板沿A_A，線的剖面圖， 且圖2更同時繪示了與該主動元件陣列基板對應的黑矩 陣。如圖2所示’在製作液晶顯示面板的過程中，若黑矩 陣1與晝素結構之間產生對位偏移(misaiignment)，將使 得黑矩陣180與晝素結構之間產生位移s，而在每個畫素 區内造成對應於此位移S的開口率損失。 D 【發明内容】 本發明關於一種晝素結構，其可減少顯示面板製作過 程中因對位偏移造成的開口率損失，因而有助於提高製程 良率。 本發明另關於一種主動元件陣列基板，可有效避免在 顯示面板製作過程中因對位偏移造成的開口率損失，因而 有助於提南製程良率。 本發明更關於一種應用前述之主動元件陣列基板的 顯示面板’其可有效避免因製程對位偏移造成的開口率損 〇 失’因而具有較佳的製程良率。 本發明又關於一種應用前述之顯示面板的顯示裝置。 為具體描述本發明之内容，在此提出一種晝素結構， 其位於一顯示面板的一晝素區内。此晝素結構包括一掃描 配線、一第一資料配線、一第二資料配線、一共用配線、 一第一主動元件、一第二主動元件、一第一晝素電極以及 一第二晝素電極。第一資料配線以及第二資料配線分別位 於晝素區的相對兩側，且第一資料配線以及第二資料配線 5 201035658 0810159ITW 30321twf.doc/n 只貝上相互平行’並分別與知描配線相交。共用配線連接 到一共用電壓源，且此共用配線實質上平行於第一資料配 線以及第二資料配線，並位於第一資料配線與第二資料配 線之間，以將晝素區分為一第一次晝素區以及—第二^欠查 素區’其中第一次晝素區位於第一資料配線與共用配 間’而第二次畫素區位於第二資料配線與共用配線之間。 第-主動元件錄第-次畫素_，並且紐連接至掃描 配線以及第-資料配線。第二主動元件位於第二次晝素區 内’並且電性連接至掃描配線以及第二資料配線。第一書 素電極以及第二畫素電極分別位於第—次晝素區以及第二 次晝素區内，並分別·連接至[絲元件與第二主& 元件，其巾第—晝耗独及第二晝素電 線有部分重疊。 I、，、用配 一杜f本^之—實施财，第—主動元件以及第二主動 :兩:心、用配線為中心軸而呈鏡像配置於共用配線的相 在本發明之一實施例中，此 及第二資料配線位於同—膜層:、_帛1料配線以 ，本，明之-實關中’上述之晝素 以及第二次晝素區別:於第-次畫素區 第-分支配線以及第-分支配線。此外’ 及第二畫素電極的線麵行第-娜 線分別與第—畫素電極 2配_心二分支配 电秘乂及弟二畫素電極有部分重疊。 201035658 wiyjLjynW 3〇321twf.doc/n 在本發明之一實施例中， 为支配線以及第二分支 配線是以共祕線為巾心軸而呈鏡像配置於共用配線的相 對兩側。 在本發明之-實施例中，第-分支配線或第二分支配 線是由共用配線向外延伸所形成。 在本發明之-實施例中’第-主動元件或第二主動元 件為一薄膜電晶體。 〇 〇 在此另提出一種主動元件陣列基板，主要包括一基 板、^條掃描配線、多條成對的資料配線、多條共用配線土、 夕個第一主動凡件、多個第二主動元件、多個第一晝素電 極以及夕個第二晝素電極。掃描配線配置於基板上且實質 上相互平行。成對的資料配線配置於該基板上，其中每一 對^料配線包括實f上相互平行的—第—資料配線與一第 二Ϊ料配線’且第__資料配線以及第二資料配線分別與掃 私配線相父。基板上由每—對資料輯以及_鄰的掃描 -線戶斤圍成的區域被定義為—晝素區。共用配線配置於基 、，二連接至j共用電壓源，且共用配線實質上相互平行 ^應於成對的資料配線。每—共用配線位於所對應的第 j配線與第二資料配線之間，以將每—晝素區分為一 於ΐίΐ素^及—第二次晝素區，其中第—次晝素區位 二二育料配線與共用配線之間，而第二次晝素區位於第 了肓料配線與共用配線之間。第—主動元件配置於基板上 7別位於第―:欠晝素區内，且每―第—主動元件電性連 至所對應的掃描配線以及第一資料配線。第二主動元件 7 201035658 0810159ITW 30321twf.doc/n 配置於基板上並分別位於第二次晝素區内， 接至所對ί的掃描配線以及第二資料配：。 對應的第-主動元件，其中每電性連接鈽 »咕 弟一旦素電極與所對應的 /、用配線有縣重® n素電極分別位於第二次書辛 區：妄ί電性連接至所對應的第二主動元件，其中每二第 一旦素電極與所對應的共用配線有部分重最。 在本發明之一實施例中，每 件以及第二主動元件是以所對 =弟主動凡 鏡像配置於共用配線的相對兩側/'U中心轴而呈 在本發明之一實施例中，丘用 _ 及第二資料配線位於同-膜層Γ 、弟一貧料配線以 包括中，上述的主動元件 支配線以及多條第二分支配線。第一分支 ί的第Γΐϊ素區内，並且分別電性連接至所對 二素電分支配線繞行所對應的第一 ς晶，邊緣，且第—分支配線與第一晝素電極有部分 且分別電性連接至所對應的共用配線，其中每^内: 與第二晝素電極有部分重ί電極的邊緣，且弟二分支配線201035658 30321twf.doc/n VI. Description of the Invention: [Technical Field] The present invention relates to a display panel, and more particularly to a pixel structure design of a display panel. [Prior Art] Today's social multimedia technology is quite developed, and most of them benefit from the advancement of semiconductor components and display devices. In terms of displays, liquid crystal display panels with superior properties such as high quality, good space utilization efficiency, low power consumption, and no radiation have gradually become the mainstream in the market. In general, a liquid crystal display panel (LCD panel) is mainly composed of an active device array substrate, a color filter substrate, and a liquid crystal layer between the substrates. - Figure 1 is a top view of a conventional array of active components. As shown in the figure, the active device array 1 includes a plurality of scan lines 11A, a plurality of data lines 120, a common line 13A across the data lines 12A, a plurality of active elements 140, and a plurality of active elements. 15〇. The scanning wiring is inconsistent with the data wiring 120 and is more than (5) 昼素区19〇. The active component and the pixel electrode 150 are respectively located in the corresponding pixel area 19〇, wherein the active component (10) is respectively connected to the corresponding scanning wire UG and the data wiring i2G, and the active component 14〇 and the halogen electrode in the same 190. 15〇Electrical connection to each other ° _ 1 1f shows the structure, it is known that the active element array of the halogen structure repeats the 'ie' in the adjacent two halogen regions 19〇: the same elements are separated by a single pixel width. Yangmei overcomes the unexpected light leakage problem. It knows that a black matrix will be fabricated on the color filter substrate array substrate to shield the area on the active device array substrate that may leak light. 2 is a cross-sectional view of the active device array substrate of FIG. 1 taken along line A_A, and FIG. 2 further illustrates a black matrix corresponding to the active device array substrate. As shown in FIG. 2, in the process of fabricating the liquid crystal display panel, if a misaiignment is generated between the black matrix 1 and the pixel structure, a displacement s is generated between the black matrix 180 and the pixel structure. An aperture ratio loss corresponding to this displacement S is caused in each pixel region. D SUMMARY OF THE INVENTION The present invention relates to a halogen structure which can reduce the loss of aperture ratio due to the alignment offset during the manufacturing process of the display panel, thereby contributing to the improvement of the process yield. The invention further relates to an active device array substrate, which can effectively avoid the loss of aperture ratio caused by the alignment offset during the manufacturing process of the display panel, thereby contributing to the yield of the southern processing. More particularly, the present invention relates to a display panel which employs the aforementioned active device array substrate, which can effectively avoid aperture loss due to process alignment offset and thus has better process yield. The present invention is further directed to a display device to which the aforementioned display panel is applied. To specifically describe the contents of the present invention, a halogen structure is proposed herein that is located in a halogen region of a display panel. The pixel structure includes a scan line, a first data line, a second data line, a common line, a first active component, a second active component, a first halogen electrode, and a second halogen electrode. . The first data wiring and the second data wiring are respectively located on opposite sides of the halogen region, and the first data wiring and the second data wiring 5 201035658 0810159ITW 30321 twf.doc/n are parallel to each other and intersect with the known wiring respectively . The common wiring is connected to a common voltage source, and the common wiring is substantially parallel to the first data wiring and the second data wiring, and is located between the first data wiring and the second data wiring to distinguish the pixel into a first The secondary pixel region and the second secondary region (where the first pixel region is located in the first data wiring and the shared compartment) and the second pixel region is located between the second data wiring and the shared wiring. The first active element records the first-order pixel_, and the button is connected to the scan wiring and the first-data wiring. The second active component is located in the second pixel region and is electrically connected to the scan wiring and the second data wiring. The first pixel electrode and the second pixel electrode are respectively located in the first-order halogen region and the second halogen region, and are respectively connected to the [wire element and the second main & There is a partial overlap between the second and the second halogen wires. I,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, In this, the second data wiring is located in the same film layer, _帛1 material wiring, Ben, Mingzhi-Shiguanzhong 'the above-mentioned vegan and the second morpheme difference: in the first-time pixel area - Branch wiring and first-branch wiring. In addition, the line-line line of the '' and the second pixel electrode partially overlaps with the first-pixel element 2 and the two-component electrode and the second element. 201035658 wiyjLjynW 3 321 twf.doc/n In one embodiment of the present invention, the branch wiring and the second branch wiring are mirror-arranged on opposite sides of the common wiring with the common line as the towel mandrel. In the embodiment of the invention, the first branch wiring or the second branch wiring is formed by extending outward from the common wiring. In the embodiment of the invention, the 'first active element or the second active element is a thin film transistor. Further, an active device array substrate is further provided, which mainly comprises a substrate, a scanning wiring, a plurality of pairs of data wirings, a plurality of shared wiring soils, a first active component, and a plurality of second active components. a plurality of first halogen electrodes and a second halogen electrode. The scan wirings are disposed on the substrate and substantially parallel to each other. The pair of data wirings are disposed on the substrate, wherein each of the pair of wires includes parallel to each other on the real f--the first data wiring and the second data wiring, and the __data wiring and the second data wiring respectively The father of the sweeping wiring. The area on the substrate surrounded by each pair of data and the neighboring scan-line is defined as the halogen region. The common wiring is disposed at the base, the second is connected to the j common voltage source, and the common wiring is substantially parallel to each other. Each of the shared wirings is located between the corresponding jth wiring and the second data wiring, so as to distinguish each of the halogens into one ΐ ΐ ΐ 及 and the second 昼 区 区, where the first 昼 区 二 二 二The feed line is shared between the feed line and the common line, and the second element area is located between the first feed line and the common line. The first active element is disposed on the substrate. 7 The first active element is electrically connected to the corresponding scan line and the first data line. The second active component 7 201035658 0810159ITW 30321twf.doc/n is disposed on the substrate and respectively located in the second pixel region, connected to the scanning wiring of the pair and the second data: Corresponding first-active components, in which each electrical connection 咕»咕弟 Once the prime electrode and the corresponding /, with the wiring of the county weight n electrode are located in the second book Xin District: 妄 电 electrically connected to the Corresponding second active component, wherein each of the two primary electrodes and the corresponding common wiring have a partial weight. In an embodiment of the invention, each piece and the second active element are in the embodiment of the present invention in the embodiment of the present invention in which the opposite side is disposed on the opposite sides of the common wiring / the 'U center axis. The _ and the second data wiring are located in the same-film layer 弟, the dynasty-dyed wiring to include the above-mentioned active component branch wiring and a plurality of second branch wirings. a first branch region of the first branch ί, and electrically connected to the first twin, edge, and the first branch of the first and second halogen electrodes respectively Electrically connected to the corresponding common wiring, wherein each inner: and the second halogen electrode have a part of the edge of the electrode, and the second branch wiring
在本發明之一實施例中H =二分支配線是以所對應的_:= 鏡像配置於共用配線的相對兩側。 201035658 ueiuijynW 30321twf.doc/n 在本發明之一實施例中，每一第一分支配線或每一第 二分支配線是由所對應的共用配線向外延伸所形成。 在本發明之一實施例中，每一第一主動元件或每一第 二主動元件為一薄臈電晶體。 在此又^出一種顯不面板，主要包括前述之主動元件 陣列基板、一對向基板以及一顯示介質層，其中顯示介質 層配置於主動元件陣列基板與對向基板之間。 0 在本發明之一實施例中，對向基板為一彩色濾光基 板。 在本發明之一實施例中，顯示介質層為一液晶層。 ^在1^另提出一種顯示裝置，其採用前述之顯示面板並 搭配一背光模組而成。背光模組配置於顯示面板旁，以提 供一背光源至顯示面板。 ，基於^述，本發明所提出的晝素結構在相鄰兩次晝素 間形成與貧料配線平行的共用配線。此共用配線可與其兩 側相郴晝素的晝素電極分別形成儲存電容，且可作為遮光 0 f ’避免兩相鄰次晝素之_漏光。由於兩個次晝素共用 條共用配線’因此有助於增加晝素的開口率，同時也有 助於降低製程中發生對位偏移時所造成的開口率損失。此 外作為遮光層的共用配線因為具有穩定的共用電壓，因 此=降低饋通電壓(Feed_ThlOUgh VQltage)之變異，避免 旦素間的訊號干擾，從而減輕顯示面板的晝面閃爍 (flicker)問題。 為讓本發明之上述特徵和優點能更明顯易懂，下文特 201035658 umvijynyy 30321twf.doc/n 舉實施例’並配合所關式作詳細說明如下。 【實施方式】 圖3為依據本發明之一實施例的一種主動元件陣列基 =1 路佈局。本實施例的主動元件陣列基板可應用於各 ;一、、』不面板上’例域晶顯示面板或有機電激發光顯 示面板等’以驅動顯示介質，進而顯示晝面。如圖3所示 的主動兀件P㈣基板綱’本實闕係在—基板(未緣示） 上形成多條掃描配線310、多條成對的資料配線no、多條 共用配線330、多個第—主動元件342、多個第二主動元件 344、多個第-晝素電極352以及多個第二晝素電極扮。 此處的基板例如是-玻璃基板或是—石英紐。掃描配線 310相互平行，並且與成對的資料配線32〇相交，以定義 出多個晝素區390。此外，共用配線33〇連接到一共用電 壓源Vcom，且共用配線330實質上相互平行並對應於成 對的資料配線320。 更詳細而言，每一對資料配線32〇包括實質上相互平 行的一第一資料配線322與一第二資料配線324。並且， 共用配線330位於所對應的第一資料配線322與第二資料 配線324之間，以將每一畫素區390分為一第一次晝素區 392以及一第二次晝素區394,其中第一次晝素區392位於 第一資料配線322與共用配線330之間，而第二次晝素區 394位於第二資料配線324與共用配線330之間。 第一主動元件342與第二主動元件344分別位於第一 次晝素區392與第二次晝素區394内。在本實施例中，第 10 201035658 usiui^yii W 30321twf.doc/n 一主動TO件342與第二主動元件344例如分別是一薄膜電 晶體^第一主動元件342電性連接至所對應的掃描配線3 i 〇 以及第一資料配線322，而第二主動元件344電性連接至 所對應的掃描配線310以及第二資料配線324。此外，第 一晝素電極352分別位於第一次晝素區392内，並電性連 接至所對應的第一主動元件342，而第二畫素電極354分 別位於第二次晝素區394内，並電性連接至所對應的第二 〇 主動兀件344。另外，第一晝素電極352以及第二晝素電 極354會分別與所對應的共用配線330有部分重疊，以形 成儲存電容。 為更詳細說明本發明之特點，圖4進一步緣示圖3之 主動元件陣列基板中的晝素結構。如圖3與4所示，本實 施例是將晝素區390分別兩個次晝素區392與394，並在 該兩個次晝素區392與394内分別形成晝素結構。所述兩 個次晝素結構分別包括掃描配線31〇、資料配線320、主動 元件342、344以及晝素電極352、354 ’並且共用同一條 〇 共用配線330。共用配線330的材質可為不透光的金屬， 其可作為遮光層，以避免兩相鄰次畫素區392、394之間的 漏光。如此’將有助於增加晝素的開口率。 在本實施例中’共用配線330較佳是與第一資料配線 322以及第二資料配線324同時製作，即共用配線330、第 —資料配線322以及第二資料配線324可位於同一膜層， 例如是對同一個金屬層圖案化所形成者。 此外’共用配線330會與其兩側的晝素電極352與354 11 201035658 081Ul^yiiw 30321twf.doc/n 分別形成儲存電容。並且，由於共用配線33〇具有穩定的 共用電壓Vcom，因此可以有效降低饋通電壓之變異，避 免兩晝素間的訊號干擾，從而減輕顯示面板的晝面閃爍 題。 在本實施例中，位於第一次晝素區392以及第二次晝 素區394内的晝素結構是以共用配線33〇為中心轴而呈鏡 像配置。更s羊細而吕，第一主動元件以及第二主動元 件344、第-資料配線322以及第二資料配線324都是位 於共用配線330的相對兩側，並以共用配線33〇為中心軸 而呈鏡像配置。 相較於圖1所繪不的習知的晝素結構，本實施例的第 -人畫素區392以及第二次畫素區394係共用—條共用配 ' 330，备在製程中發生對位偏移時，將有助於降低此對 位偏移時所造成的開口率損失。更詳細而言，請參照圖5 :示的圖4之晝素結構沿b—b’線的剖面圖。在製作液晶顯 不面板的過程中，若黑矩陣38〇與畫素結構之間產生對位 偏移，，使得黑矩陣380與晝素結構之間產生位移s。然 而’值如i意的是，由於本實闕是將則目晝素結構整合 在起，共用同一條共用配線330做為遮光層，因此丘用 配線330上不需要形成黑矩陣。如此—來，對位偏移^合 ，每兩個賴㈣素結構造成-個位移S所對應的開口率 員失換。之’與1所繪*的晝素結構將比，本實施例 的晝素結構在面對相同的對位偏移時，所造成的開口率損 失僅是習知的晝素結構的一半。 、 12 3032 ltwf.doc/n 201035658 另一方面，請再參考圖4。為了增加每一次晝素區内 的，存電容’本實施例更在每一共用配線挪的兩側配置 第一分支配線332以及一第二分支配線334。第一分支 配線332與第一$支配線334分別位於第—次晝素區 ，第二次畫素區394内’並電性連接至共用配線33〇。 ft實施例中，第一分支配線332與第二分支配線334例 如疋由共用配線330向外延伸所形成。並且，第一分支配 Ο ^ =32以及第一分支配線334是以所對應的共用配線顶 為中心轴而呈鏡像配置於制配線33()的相對兩側。 妓田換Ϊ之，第一分支配線332、第二分支配線334以及 是位於同—膜層’例如是對同-個金屬層圖 案化所开》成者。此外，笫一公* -晝娜392的邊緣，且;所，的第 電極352有部分重疊，以形成儲二，332與第一晝素 繞行所_第二_=#^ 1 334盥筮-圭去希扛id 97瓊緣，且弟一分支配線 有部分重疊，以形成儲存電容。 _备然’本發明所揭露的晝素結構，其分支 ^件的細部結構並非限於前述實能^ 該些貫施例僅是舉例之用，並铜以限定本=化田然 圖6-8分別繪示依據本發 > 結構。圖6-8的晝素結構明顯:實，例的多種晝素 *、’、頁一削述只轭例的晝素結構具 13 201035658 w 30321twf.doc/n 有不⑽狀的刀支配線。針對類似的 元件標號，而其他朗且未似心將㈣相同的 加心五，止 的部份，可參照前述實施 '將不再，-步說明。在圖6_8中，第—分支配線说 以及弟-力支配線334分別是呈直線形、τ形或l型，並 分別呈鏡像配置在共用配線330的相對兩側。此外，隨著 =支配線形狀的改變’如圖8所示的第—主動元件342與 第二主動兀件344的位置也可以移至共用配線33〇旁。 圖9為本發明之一實施例的一麵示面板的示意圖。 请參照圖9，本貫施例的顯示面板9〇〇包括一主動元件陣 列基板910、一對向基板920以及配置於主動元件陣列基 板910以及對向基板920之間的顯示介質層930。此處的 主動元件陣列基板910可以是本發明前述多個實施例所繪 示的或是其他未繪示的主動元件陣列基板。對向基板92〇 例如是具有黑矩陣980的一彩色濾光基板。當然，在可能 的情況下，對向基板920也可以是僅具有共用電極的玻璃 基板或石英基板，其上可製作黑矩陣，而對應的主動元件 陣列基板910上則可能形成有彩色濾光層。在本實施例 中’顯示介質層930例如是一液晶層，而顯示面板900為 一液晶顯示面板。當然，在其他實施例中，顯示介質層930 也可能是電激發光(electroluminescent)材料，則顯示面板 900為電激發光顯示面板，其中電激發光材料例如是有機 材料、無機材料或其組合。 應用上述之顯示面板，圖10更繪示依據本發明之一 實施例的一種顯示裝置。以液晶顯示裝置為例，由於液晶 14 2〇1〇3565Aw 30321twf.doc/n 顯示面板1010無法自發光，因此液晶顯示面板1010旁會 配置一背光模組1020。背光模組1〇2〇可提供背光源JL至 液晶顯示面板1010，以使液晶顯示面板1010顯示晝面。 綜上所述’本發明藉由上述晝素結構的設計，可以藉 由共用配線來形成儲存電容並同時提供遮光層的效果。相 鄰兩次晝素之間係共用一條共用配線，可大幅增加晝素的 開口率，同時可降低製程中發生對位偏移時所造成的開口 0 率損失，提升製程良率。此外，共用配線上具有穩定的共 用電壓，可降低饋通電壓之變異，避免兩次晝素間的訊號 干擾，從而減輕顯示面板的晝面閃爍問題，以提供較佳的 顯示品質。 雖然本發明已以實施例揭露如上，然其並非用以限定 本發明，任何所屬技術領域中具有通常知識者，在不脫離 本發明之精神和範圍内，當可作些許之更動與潤飾，故本 發明之保護範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 ❹ 圖1為習知一種主動元件陣列的上視圖。 圖2為圖1之主動元件陣列基板沿A_A，線的剖面圖。 圖3為依據本發明之一實施例的一種主動元件陣列基 板的線路佈局。 ^ 圖4進一步繪示圖3之主動元件陣列基板中的晝素社 構。 口 圖5繪示圖4之晝素結構沿B-B，線的剖面圖。 圖6-8分別繪示依據本發明之不同實施例的多種晝素 15 201035658 0810159ITW 30321twf.doc/n 結構。 圖9為本發明之一實施例的一種顯示面板的示意圖。 圖10繪示依據本發明之一實施例的一種顯示裝置。 【主要元件符號說明】 100 主動元件陣列 110 掃描配線 120 資料配線 130 共用配線 140 主動元件 150 晝素電極 180 黑矩陣 190 晝素區 300 主動元件陣列基板 310 掃描配線 320 成對的資料配線 322 第一資料配線 324 第二資料配線 330 共用配線 332 第一分支配線 334 第二分支配線 342 第一主動元件 344 第二主動元件 352 第一晝素電極 354 第二晝素電極 16 201035658 .rw 30321twf.doc/n 380 :黑矩陣 390 :晝素區 392 :第一次晝素區 394 :第二次晝素區 900 ··顯示面板 910 :主動元件陣列基板 920 :對向基板 930 :顯示介質層 980 :黑矩陣 1010 .液晶顯不面板 1020 :背光模組 A-A’、B-B’ ：剖面線 L :背光源 S :位移In an embodiment of the invention, the H=two-branch wiring is disposed on opposite sides of the shared wiring with the corresponding _:= mirror image. 201035658 ueiuijynW 30321twf.doc/n In one embodiment of the invention, each of the first branch wirings or each of the second branch wirings is formed by extending outwardly from the corresponding common wiring. In one embodiment of the invention, each of the first active elements or each of the second active elements is a thin germanium transistor. Here, a display panel is further provided, which mainly comprises the active device array substrate, the pair of substrates and a display medium layer, wherein the display medium layer is disposed between the active device array substrate and the opposite substrate. In one embodiment of the invention, the counter substrate is a color filter substrate. In an embodiment of the invention, the display medium layer is a liquid crystal layer. ^ In addition, a display device is proposed which uses the aforementioned display panel and is combined with a backlight module. The backlight module is disposed beside the display panel to provide a backlight to the display panel. Based on the above description, the halogen structure proposed by the present invention forms a common wiring parallel to the lean wiring between adjacent two halogens. The shared wiring can form a storage capacitor respectively with the halogen electrodes on both sides thereof, and can be used as a light-shielding 0 f ' to avoid leakage of light between two adjacent sub-halogens. Since the two secondary halogen shared strips share the wiring', it helps to increase the aperture ratio of the halogen, and also helps to reduce the aperture loss caused by the occurrence of the alignment shift in the process. In addition, since the common wiring as the light shielding layer has a stable common voltage, the variation of the feedthrough voltage (Feed_ThlOUgh VQltage) is reduced, and signal interference between the deniers is avoided, thereby reducing the flicker problem of the display panel. In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following is a detailed description of the following embodiments in conjunction with the embodiment of the present invention. [Embodiment] FIG. 3 is an active element array base=1 layout according to an embodiment of the present invention. The active device array substrate of the present embodiment can be applied to each of the first and second panels, such as an exemplary field crystal display panel or an organic electroluminescence display panel, to drive the display medium to display the surface. The active element P (four) substrate as shown in FIG. 3 is formed on the substrate (not shown), and a plurality of scanning lines 310, a plurality of pairs of data lines no, a plurality of shared lines 330, and a plurality of The first active element 342, the plurality of second active elements 344, the plurality of first-metamorphic electrodes 352, and the plurality of second halogen electrodes. The substrate here is, for example, a -glass substrate or a quartz button. The scan wirings 310 are parallel to each other and intersect the paired data wirings 32A to define a plurality of halogen regions 390. Further, the common wiring 33 is connected to a common voltage source Vcom, and the common wirings 330 are substantially parallel to each other and correspond to the pair of data wirings 320. In more detail, each pair of data wirings 32A includes a first data wiring 322 and a second data wiring 324 that are substantially parallel to each other. Moreover, the common wiring 330 is located between the corresponding first data line 322 and the second data line 324 to divide each pixel area 390 into a first pixel region 392 and a second pixel region 394. The first pixel region 392 is located between the first data line 322 and the common line 330, and the second pixel region 394 is located between the second data line 324 and the common line 330. The first active component 342 and the second active component 344 are located in the first pixel region 392 and the second pixel region 394, respectively. In this embodiment, the 10th 201035658 usiui^yii W 30321twf.doc/n an active TO component 342 and the second active component 344 are respectively a thin film transistor ^ first active component 342 electrically connected to the corresponding scan The wiring 3 i 〇 and the first data wiring 322 , and the second active component 344 are electrically connected to the corresponding scanning wiring 310 and the second data wiring 324 . In addition, the first halogen electrodes 352 are respectively located in the first halogen region 392, and are electrically connected to the corresponding first active elements 342, and the second pixel electrodes 354 are respectively located in the second halogen region 394. And electrically connected to the corresponding second active member 344. In addition, the first halogen electrode 352 and the second halogen electrode 354 partially overlap the corresponding common wiring 330 to form a storage capacitor. To further illustrate the features of the present invention, FIG. 4 further illustrates the pixel structure in the active device array substrate of FIG. As shown in Figs. 3 and 4, in the present embodiment, the halogen region 390 has two secondary halogen regions 392 and 394, respectively, and a halogen structure is formed in the two secondary halogen regions 392 and 394, respectively. The two secondary halogen structures respectively include scan wiring 31, data wiring 320, active elements 342, 344, and halogen electrodes 352, 354' and share the same common wiring 330. The material of the common wiring 330 may be an opaque metal which can serve as a light shielding layer to avoid light leakage between the two adjacent sub-pixel regions 392, 394. Such 'will help to increase the aperture ratio of the alizarin. In the present embodiment, the common wiring 330 is preferably formed simultaneously with the first data wiring 322 and the second data wiring 324, that is, the common wiring 330, the first data wiring 322, and the second data wiring 324 may be located on the same film layer, for example, for example. It is formed by the patterning of the same metal layer. Further, the common wiring 330 forms a storage capacitor with the halogen electrodes 352 and 354 11 201035658 081Ul^yiiw 30321twf.doc/n on both sides. Moreover, since the shared wiring 33〇 has a stable common voltage Vcom, the variation of the feedthrough voltage can be effectively reduced, and signal interference between the two elements can be avoided, thereby reducing the flickering of the display panel. In the present embodiment, the pixel structure located in the first halogen region 392 and the second pixel region 394 is mirror-arranged with the common wiring 33〇 as a central axis. Further, the first active component and the second active component 344, the first data wiring 322, and the second data wiring 324 are located on opposite sides of the common wiring 330, and the common wiring 33〇 is the central axis. Mirrored configuration. Compared with the conventional halogen structure depicted in FIG. 1, the first-human pixel region 392 and the second pixel region 394 of the present embodiment share a common-type '330, which is prepared in the process. When the bit is offset, it will help to reduce the aperture loss caused by this alignment offset. More specifically, please refer to FIG. 5: a cross-sectional view of the halogen structure of FIG. 4 taken along line b-b'. In the process of fabricating the liquid crystal display panel, if the alignment shift occurs between the black matrix 38〇 and the pixel structure, a displacement s is generated between the black matrix 380 and the pixel structure. However, the value of i is that since the present embodiment integrates the target structure, the same shared wiring 330 is used as the light shielding layer, so that the black matrix does not need to be formed on the mound wiring 330. In this way, the alignment offset is combined, and each of the two (four) prime structures causes the aperture ratio corresponding to the displacement S to be lost. The pixel structure of the 'and 1' will be compared to the case where the pixel structure of the present embodiment is subjected to the same alignment offset, resulting in an aperture loss loss of only half that of the conventional halogen structure. , 12 3032 ltwf.doc/n 201035658 On the other hand, please refer to Figure 4. In order to increase the storage capacitance in each of the pixel regions, the first branch wiring 332 and the second branch wiring 334 are disposed on both sides of each of the common wirings. The first branch wiring 332 and the first $branch wiring 334 are respectively located in the first-order pixel region, the second pixel region 394, and are electrically connected to the common wiring 33A. In the ft embodiment, the first branch wiring 332 and the second branch wiring 334 are formed, for example, by extending outward from the common wiring 330. Further, the first branch distribution Ο ^ = 32 and the first branch wiring 334 are mirror-arranged on opposite sides of the wiring 33 () with the corresponding common wiring top as a central axis. In the case of Putian, the first branch wiring 332, the second branch wiring 334, and the same layer are formed, for example, by the same metal layer pattern. In addition, the edge of the 公 公 昼 昼 392 392, and the first electrode 352 has a partial overlap to form a second, 332 and the first enthalpy bypass _ second _ = # ^ 1 334 盥筮- Gui went to the Greek id 97, and the branch wiring of the brothers partially overlapped to form a storage capacitor. _Prepared by the present invention, the detailed structure of the branch structure is not limited to the above-mentioned practical energy. The above embodiments are only used as examples, and copper is used to define this = Huatian Ran Figure 6-8 The structure according to the present invention is shown separately. The unitary structure of Fig. 6-8 is obvious: real, various kinds of elements of the example *, ', page one of the 昼 结构 昼 昼 13 13 13 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 2010 For similar component numbers, and other parts that are not as intended to be the same as the center of the five, the reference to the above implementation will be no longer, step-by-step description. In Fig. 6-8, the first-branch wiring and the ji-branch wiring 334 are linear, τ-shaped or l-shaped, respectively, and are arranged in mirror images on opposite sides of the common wiring 330, respectively. Further, the position of the first active element 342 and the second active element 344 as shown in Fig. 8 may be moved to the side of the common wiring 33〇 as the shape of the wiring is changed. Figure 9 is a schematic illustration of an illustrative panel in accordance with one embodiment of the present invention. Referring to FIG. 9, the display panel 9A of the present embodiment includes an active device array substrate 910, a pair of substrates 920, and a display medium layer 930 disposed between the active device array substrate 910 and the opposite substrate 920. The active device array substrate 910 herein may be any of the foregoing embodiments of the present invention or other active device array substrates not shown. The opposite substrate 92 is, for example, a color filter substrate having a black matrix 980. Of course, the opposite substrate 920 may be a glass substrate or a quartz substrate having only a common electrode, and a black matrix may be formed thereon, and a color filter layer may be formed on the corresponding active device array substrate 910. . In the present embodiment, the display medium layer 930 is, for example, a liquid crystal layer, and the display panel 900 is a liquid crystal display panel. Of course, in other embodiments, the display medium layer 930 may also be an electroluminescent material, and the display panel 900 is an electroluminescent display panel, wherein the electroluminescent material is, for example, an organic material, an inorganic material, or a combination thereof. Applying the above display panel, FIG. 10 further illustrates a display device in accordance with an embodiment of the present invention. Taking the liquid crystal display device as an example, since the liquid crystal display panel 1010 cannot be self-illuminated, a backlight module 1020 is disposed next to the liquid crystal display panel 1010. The backlight module 1〇2〇 can provide a backlight JL to the liquid crystal display panel 1010 to cause the liquid crystal display panel 1010 to display a kneading surface. As described above, the present invention can realize the effect of forming a storage capacitor and simultaneously providing a light shielding layer by a common wiring by the design of the above-described halogen structure. A shared wiring is shared between two adjacent halogens, which can greatly increase the aperture ratio of the halogen, and at the same time reduce the loss of the opening 0 caused by the offset in the process and improve the process yield. In addition, the shared wiring has a stable common voltage, which can reduce the variation of the feedthrough voltage and avoid the signal interference between the two elements, thereby reducing the flickering problem of the display panel to provide better display quality. Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a top view of a conventional active device array. 2 is a cross-sectional view of the active device array substrate of FIG. 1 taken along line A_A. 3 is a circuit layout of an active device array substrate in accordance with an embodiment of the present invention. ^ Figure 4 further illustrates the pixel organization in the active device array substrate of Figure 3. Figure 5 is a cross-sectional view of the cell structure of Figure 4 taken along line B-B. 6-8 illustrate various morpheme 15 201035658 0810159ITW 30321 twf.doc/n structures, respectively, in accordance with various embodiments of the present invention. FIG. 9 is a schematic diagram of a display panel according to an embodiment of the present invention. FIG. 10 illustrates a display device in accordance with an embodiment of the present invention. [Main component symbol description] 100 Active device array 110 Scan wiring 120 Data wiring 130 Common wiring 140 Active device 150 Alizarin electrode 180 Black matrix 190 Alizarin region 300 Active device array substrate 310 Scan wiring 320 Paired data wiring 322 First Data wiring 324 Second data wiring 330 Common wiring 332 First branch wiring 334 Second branch wiring 342 First active element 344 Second active element 352 First halogen electrode 354 Second halogen electrode 16 201035658 .rw 30321twf.doc/ n 380 : Black matrix 390 : halogen region 392 : first halogen region 394 : second halogen region 900 · display panel 910 : active device array substrate 920 : opposite substrate 930 : display dielectric layer 980 : black Matrix 1010. Liquid crystal display panel 1020: backlight module A-A', B-B': section line L: backlight S: displacement
Vcom :共用電壓源Vcom: shared voltage source
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