201029527 六、發明說明： 【發明所屬之技術領域】 本發明係關於一種電路板及其製造方法，尤指一種埋 設有電子元件的電路板及其製造方法。 【先前技術】 由於電子產m»之製作有曰漸微小化的趨勢，故所有電 子元件的尺寸亦越做越小，再搭配多層電路板的應用且將 ©電子元件埋入多層電路板中’即可有效地縮小電子產品的 體積。 請參閱第四A圖至第四C圖以及第五圖所示，一種既 有多層電路板由上至下係包括—第一子層電路板（71)、一 第一子層電路板（72)及一第三子層電路板（73)等三個單層 電路板，其巾各子層電路板（71)(72)(73)之頂面與底面均設 有圖案化線路且該第二子層電路板（72) 上其中一表面的圖案化線路（721)係預先焊接有至少一電子 ®元件（8〇)。當組合成多層電路板時，該第一至第三子層電 路板（71)(72)(73)係以絕緣層（74)由上而下依序疊合後壓合 而成，並於壓合後再形成導電穿孔（75)以電連接各子層電 路板（71 )(72)(73)上的圖案化線路（711 )(721 )(731) » 然而上述多層電路板有以下缺點： 1·電子元件（80)焊接於第二子層電路板（72)時電子 元件（80)係先固定於於該第二子層電路板（72)上後，再經 過一道高溫迴焊程序完成焊接，而整個多層電路板完成 後，當多層電路板後續與外部電子元件再進行一次焊接程 3 201029527 序8^’又必須再經過一道高溫迴焊程序，因此該第二子層 電路板（72)在經過兩次的高溫衝擊後，往往會有脆化或是 毁損的情況發生，導致多層電路板的製造良率下降。 2_由於電子元件（80)係設於第二子層電路板（72)的表 面上，因此整個多層電路板的總厚度除了各子層電路板 (71)(72)(73)原有之厚度外，尚必須加上電子元件（8〇)的厚 度，如此將使多層電路板之總厚度增加，而有違電子產品 微小化的趨勢。 【發明内容】 為提咼多層電路板的製造良率及縮小厚度，本發明之 主要目的在提供一種埋設有電子元件的電路板及其製造方 法，其藉由將電子元件埋入電路板中，以減少電子元件所 佔的厚度及省卻-道高溫迴焊程序，如此當使用此電路板 作為多層電路板的其卜子層電路板或是增層式多層電路 板之核心電路板時’同樣令多層電路板的厚度大幅縮減。 為達成前述目的所採取之主要技術手段係令前述埋設 有電子元件的電路板包括： -電絕緣基板，係具有一上表面及一下表面，又該基 板上係形成有一貫穿基板上、下表面的貫孔； 一電子元件，係設於該貫孔内，並以絕緣填充材填入 貫孔内將電子元件包覆固定’又該電子元件係具有複數個 接點，該複數接點係露出該基板的上表面； 一上圖案化線路，係形成於該基板的上表面，並與基 板内該電子元件的外露接點接觸； 4 201029527 一下圖案化線路，係形成於該基板的下表面。 而製作前述電路板之製造方法則包括下列步驟： 準備一電絕緣基板，該基板之一第一表面上係形成有 一第一導電層，而該基板之一第二表面上形成有一第二導 電層； 於該基板上形成一貫孔，該貫孔係貫穿該第一導電 層、基板及第二導電層，而於該第一導電層上形成有一第 一開口，於該第二導電層上形成有一第二開口； 將該基板以第二導電層及第二開口設於-載板上； 將一電子元件自基板之第一開口置入貫孔中且該電 子元件之接點係暫時固定於該載板上； 自第一開口朝貫孔中填充絕緣填充材； 去除載板並將該基板倒置； 使電子元件的接點自絕緣填充材露出； ❹ 對基板全板電鑛，於該第一導電層上形成一第三導電 層’於該第_導電層上形成一第四導電層，使電子元件的 接點得透過第四導電層連接至第二導電層； 於該第$電層及第二導電層形成第一圖案化線路， 於該第二導電層及第四導電層形成第二圖案化線路。 利用上述技術手段，由於該電子元件係被埋設於該基 板中，因此當以本單層電路板作為多層電路板的子層電路 板或是增層式多層電路板之核心電路板時，即可省去電子 元件所佔的體積，以縮小多層電路板或增層式多層電路板201029527 VI. Description of the Invention: [Technical Field] The present invention relates to a circuit board and a method of manufacturing the same, and more particularly to a circuit board in which electronic components are embedded and a method of manufacturing the same. [Prior Art] As the production of electronic products has become more and more miniaturized, the size of all electronic components is getting smaller and smaller, and it is used in conjunction with multi-layer circuit boards and embedded electronic components into multilayer boards. It can effectively reduce the volume of electronic products. Referring to FIGS. 4A to 4C and FIG. 5, a multi-layer circuit board includes a first sub-layer circuit board (71) and a first sub-layer circuit board (72). And three single-layer circuit boards such as a third sub-layer circuit board (73), wherein the top and bottom surfaces of the sub-layer circuit boards (71) (72) (73) of the towel are provided with patterned lines and the The patterned trace (721) on one of the two sub-layer boards (72) is pre-welded with at least one electronic® component (8 turns). When combined into a multi-layer circuit board, the first to third sub-layer circuit boards (71) (72) (73) are formed by laminating the insulating layer (74) from top to bottom in sequence, and then After the pressing, a conductive via (75) is formed to electrically connect the patterned lines (711) (721) (731) on each of the sub-layer boards (71) (72) (73). However, the above-mentioned multilayer board has the following disadvantages. When the electronic component (80) is soldered to the second sub-layer circuit board (72), the electronic component (80) is first fixed on the second sub-layer circuit board (72), and then subjected to a high-temperature reflow process. After the completion of the soldering, and after the entire multilayer circuit board is completed, when the multilayer circuit board is subsequently subjected to a soldering process with the external electronic components, the second sub-layer circuit board (the second sub-layer circuit board must be subjected to another high-temperature reflow process). 72) After two high-temperature impacts, embrittlement or damage often occurs, resulting in a decrease in the manufacturing yield of the multilayer circuit board. 2_ Since the electronic component (80) is disposed on the surface of the second sub-layer circuit board (72), the total thickness of the entire multilayer circuit board is the same as that of the sub-layer circuit boards (71) (72) (73). In addition to the thickness, it is necessary to add the thickness of the electronic component (8 Å), which will increase the total thickness of the multilayer circuit board, which is contrary to the trend of miniaturization of electronic products. SUMMARY OF THE INVENTION In order to improve the manufacturing yield and thickness of a multilayer circuit board, the main object of the present invention is to provide a circuit board embedded with electronic components and a manufacturing method thereof, by embedding electronic components in a circuit board. In order to reduce the thickness of the electronic components and to eliminate the high-temperature reflow process, when using the circuit board as the sub-layer circuit board of the multi-layer circuit board or the core circuit board of the multi-layer multi-layer circuit board, The thickness of the multilayer circuit board is greatly reduced. The main technical means for achieving the foregoing objective is that the circuit board in which the electronic component is embedded includes: an electrically insulating substrate having an upper surface and a lower surface, and the substrate is formed with an upper surface and a lower surface of the substrate. a through hole; an electronic component is disposed in the through hole, and is filled with an insulating filler into the through hole to encapsulate the electronic component; and the electronic component has a plurality of contacts, the plurality of contacts exposing the An upper surface of the substrate; an upper patterned circuit formed on the upper surface of the substrate and in contact with the exposed contact of the electronic component in the substrate; 4 201029527 The patterned circuit is formed on the lower surface of the substrate. The manufacturing method of the foregoing circuit board comprises the following steps: preparing an electrically insulating substrate, a first conductive layer is formed on one of the first surfaces of the substrate, and a second conductive layer is formed on the second surface of the substrate. Forming a uniform hole on the substrate, the through hole penetrating the first conductive layer, the substrate and the second conductive layer, and forming a first opening on the first conductive layer, and forming a first opening on the second conductive layer a second opening; the substrate is disposed on the carrier plate with the second conductive layer and the second opening; an electronic component is inserted into the through hole from the first opening of the substrate, and the contact of the electronic component is temporarily fixed to the Loading the insulating filler from the first opening toward the through hole; removing the carrier and inverting the substrate; exposing the contacts of the electronic component from the insulating filler; 电 electroplating the entire board to the substrate Forming a third conductive layer on the conductive layer to form a fourth conductive layer on the first conductive layer, so that the contact of the electronic component is connected to the second conductive layer through the fourth conductive layer; Second conductive layer formation A circuit pattern, on the second conductive layer and the fourth conductive layer forming a second patterned circuit. According to the above technical means, since the electronic component is embedded in the substrate, when the single-layer circuit board is used as a sub-layer circuit board of a multi-layer circuit board or a core circuit board of a multi-layer multi-layer circuit board, Eliminate the volume of electronic components to reduce multilayer boards or build-up multilayer boards
的尺寸；此外，因電子元株後I 牛係由絕緣填充材固定於基板的 貫孔中，並透過電鍵第四導 罘導電層以連接至第二導電層，故 201029527 因此付維持基板之材質不致受 毋須經過高溫迴焊程序 損〇 - - 【實施方式】 關於本發明埋設有電子元件的電路板製造方法之第一 實施例，請參閱第一 A圖至第一 j圖所示，係包括下列步 驟：（a)準備一基板、(b)於基板上形成一貫孔、⑷將基板 6又於一載板上、（d)將一電子元件置入基板之貫孔中並設於 ©載板上、（e)於貫孔中填充絕緣填充材、⑴除去絕緣填充材 中的氣泡、（g)固化絕緣填充材、去除載板並將該基板 倒置、（I)於貫孔中填充絕緣填充材、⑴固化絕緣填充材、（k) 使電子元件的接點自絕緣填充材露出、⑴表面粗化、（m) 對基板全板電鍍及（η)形成圖案化線路。 關於上述（a)準備一基板步驟，請參閱第一 a圖所示， 係準備一具有一第一表面、一第二表面、一第一導電層（11) 及一第二導電層（12)的基板（10)，該基板（10)係由電絕緣材 ® 質構成’其中該基板（1〇)之第二表面係與第一表面相對， 該第一導電層（11)係形成於該基板（1〇)的第一表面上，而 該第二導電層（12)則形成於該基板（1〇)之第二表面上。 關於上述（b)於基板上形成一貫孔步驟，請參閱第一 B 圖所示，係於該基板（10)形成有一貫穿該第一導電層（11)、 基板（10)及第二導電層（12)的貫孔（13)，而於該第一導電層 (11)上形成有一第一開口（131)，於該第二導電層（12)上形 成有一第二開口（132);該貫孔（13)可由機械鑽孔或其它可 能之方式加工成形。 201029527 關於上述（c)將基板設於一載板上步驟，請參閱第一 ◦ 圖所示，係先準備一載板（20)，再將該基板（1〇.)設於該載 板（20)上’並令該載板（20)覆蓋該基板上的第二導電層 (12)及該第二開口（132);於本實施例中，係藉由於該載板 (20)上貼附一膠層（21)，以將該基板（1〇)黏貼於該載板（2〇) 上。 關於上述（d)將一電子元件置入基板之貫孔中並設於載 板上步驟，請參閱第一 D圖所示，係準備一電子元件（3〇)， © 該電子元件（30)之一表面上係形成有複數個接點（31)，並 將該電子元件（30)以形成有接點（31)之表面朝向載板（2〇)的 方向，自該第一開口（131)置入該貫孔（13)中，而設於該載 板（20)上；於本實施例中，該電子元件（3〇)係為一晶片型 電子元件，例如晶片電阻、晶片電容等，且該電子元件（3〇) 係黏貼於該載板（20)上的膠層（21);此外，由於該接點（31) 通常係部份覆蓋電子元件（30)之表面，因此該接點（31)與 電子元件（30)表面之間係構成一凹溝（32)，且該電子元件 © (30)係以其接點（31)黏貼於該膠層（21)上。 關於上述（e)於貫孔中填充絕緣填充材步驟，請參閱第 一 E圖所示，係自該第一開口（131)朝貫孔（13)中填充絕緣 填充材（40)，然而’該電子元件（30)之凹溝（32)中通常不容 易被絕緣填充材（40)填滿而留有些許空隙；此外，為精確 地於貫孔（13)中填充絕緣填充材（40)，可使用一遮罩（圖中 未示）覆蓋於該第一導電層（11)上，僅露出該第一開口 (131) ’後將絕緣填充材（40)置於遮罩上，以刮刀（圖中未 示）將絕緣填充材（40)推入該貫孔（13)中，惟如此仍會有些 201029527 許絕緣填充材（40)被塗佈在第—開口（131)周圍的第一導電 =1)上；再者，若非採用較昂貴的設備填充該絕緣填充 材（4〇) ’則可能會在有些許空氣滲入貫孔（13)中而於絕 緣填充材（40)中形成氣泡（41)。In addition, since the I-bull is fixed in the through hole of the substrate by the insulating filler material and is connected to the second conductive layer through the fourth conductive layer of the conductive key, the material of the substrate is maintained in 201029527. The first embodiment of the method for manufacturing a circuit board in which the electronic component is embedded in the present invention, as shown in the first to the first j diagrams, is included in the first embodiment. The following steps: (a) preparing a substrate, (b) forming a uniform hole on the substrate, (4) placing the substrate 6 on a carrier, (d) placing an electronic component into the through hole of the substrate and setting it on the substrate. On the board, (e) filling the through hole with an insulating filler, (1) removing air bubbles in the insulating filler, (g) curing the insulating filler, removing the carrier and inverting the substrate, and (I) filling the through hole with insulation The filler, (1) the cured insulating filler, (k) exposes the contacts of the electronic component from the insulating filler, (1) roughens the surface, (m) electroplates the entire substrate, and (η) forms a patterned wiring. With regard to the above (a) preparing a substrate step, as shown in FIG. 1 a, a first surface, a second surface, a first conductive layer (11) and a second conductive layer (12) are prepared. a substrate (10), the substrate (10) being composed of an electrically insulating material, wherein a second surface of the substrate is opposite to the first surface, and the first conductive layer (11) is formed thereon The first conductive surface of the substrate (1) is formed on the second surface of the substrate (1). Regarding the above (b) forming a uniform hole on the substrate, refer to the first B diagram, the substrate (10) is formed with a first conductive layer (11), a substrate (10) and a second conductive layer. a through hole (13) of the (12), a first opening (131) is formed on the first conductive layer (11), and a second opening (132) is formed on the second conductive layer (12); The through holes (13) can be formed by mechanical drilling or other possible means. 201029527 For the above (c) step of placing the substrate on a carrier board, refer to the first figure. First, prepare a carrier board (20), and then set the substrate (1〇.) on the carrier board ( 20) upper and aligning the carrier (20) with the second conductive layer (12) and the second opening (132) on the substrate; in this embodiment, by attaching the carrier (20) A glue layer (21) is attached to adhere the substrate (1〇) to the carrier (2〇). Regarding the above (d) placing an electronic component in the through hole of the substrate and providing it on the carrier, refer to the first D diagram to prepare an electronic component (3〇), © the electronic component (30) One of the surfaces is formed with a plurality of contacts (31), and the electronic component (30) is oriented in a direction in which the surface of the contact (31) is formed toward the carrier (2〇), from the first opening (131) Inserted into the through hole (13) and disposed on the carrier (20); in the embodiment, the electronic component (3) is a wafer type electronic component, such as a chip resistor, a chip capacitor, etc. And the electronic component (3〇) is a glue layer (21) adhered to the carrier (20); further, since the contact (31) generally partially covers the surface of the electronic component (30), A recess (32) is formed between the contact (31) and the surface of the electronic component (30), and the electronic component © (30) is adhered to the adhesive layer (21) with its contact (31). Regarding the above (e) step of filling the insulating filler in the through hole, as shown in FIG. E, the insulating filler (40) is filled into the through hole (13) from the first opening (131), however The recess (32) of the electronic component (30) is generally not easily filled by the insulating filler (40) leaving a slight gap; in addition, the insulating filler (40) is filled in the through hole (13) accurately. , a mask (not shown) may be used to cover the first conductive layer (11), and only the first opening (131) is exposed, and then the insulating filler (40) is placed on the mask to scrape the blade. (Indicated not shown), the insulating filler (40) is pushed into the through hole (13), but there will still be some first 201029527 insulating filler (40) coated around the first opening (131). Conductive = 1); in addition, if the insulating filler (4〇) is not filled with more expensive equipment, it may form bubbles in the insulating filler (40) in some air permeating through the through hole (13). (41).
關於上述（〇除去絕緣填充材中的氣泡步驟 為 在填充絕緣填充材（4G)過程中所產生的氣泡（41)導致絕緣 填充材(40)之間留有間隙:，以致無法完全填滿貫孔。3厂 故必須先將絕緣填充材（4〇)中的氣泡（41)去除。 關於上述（g)EH匕絕料充材步驟，係⑨絕料充材（4〇) 中的氣泡（41)去除後’可藉由烘烤的方式，使絕緣填充材_ 固化如此即可藉由固化的絕緣填充材（4〇)將電子元件（3〇) 更進一步地固定於貫孔（13)中。 關於上述（h)去除載板並將該基板倒置步驟，請參閱第 一 F圖所示，係將載板（2〇)及膠層（21)自基板（1〇)上移除， 接著再將該基板（10)倒置，令貫孔（13)内之電子元件（3〇)接 點（31)外露於第二開口（1 32)。 關於上述⑴於貫孔中填充絕緣填充材及⑴固化絕緣填 充材步驟，請參閲第一 G圖所示，係以與步驟（e)和（g)相 同的方式，自第二開口（1 32)朝貫孔（13)中填充絕緣填充材 (40) ’由於在於貫孔中填充絕緣填充材步驟時該電子 元件（30)之凹溝（32)不容易被絕緣填充材（4〇)填滿而留有些 許空隙，故本步驟可確保該電子元件（30)之凹溝（32)必由 絕緣填充材（40)填滿，由於絕緣填充材（40)與電鍍所形成 之銅層間的附著力，較電子元件（30)之表面的附著力佳， 因此令凹溝（32)中填滿絕緣填充材（40)，有利後續電鍍程 201029527 序可錄上平整且附著力較佳的導電層，惟些許絕緣填充材 (4Q)將成形在第二開口（132)周圍的第二導電層（12丨上。 然而’若於該（e)於貫孔中填充絕緣填充材步驟中，選 用流動！生較佳的絕緣填充材（4〇)，將可減少氣泡（41)的產 生，進而省去⑴除去絕緣填充材中的氣泡步驟，但該（g)固 化絕緣填充材步驟則不可少；此外，因絕緣填充材（4〇)具 有流動性，故於（e)於貫孔中填充絕緣填充材步驟中，絕緣 填充材（40)即可流入凹溝（32)與膠層（21>間的間隙而填滿凹 ❹溝（32)，如此一來，又可進一步省去⑴於貫孔中填充絕緣 填充材及⑴固化絕緣填充材步驟，惟若絕緣填充材（4〇)流 動性太大’會有絕緣填充材（4〇)從第二開口（1 32)流出的風 險’因此調整膠層（21)黏性以及絕緣填充材（4〇)之固化溫 度等各項參數是必須的；再者，若於（e)於貫孔中填充絕緣 填充材步驟中，係以真空塞孔機（圖中未示）直接朝貫孔（1 3) 中填充絕緣填充材（40)，如此縱然不使用流動性較佳的絕 緣填充材（40)，亦可達到減少氣泡產生及使絕緣填充材（4〇) ® 填滿凹溝（32)的效果’進而省去（f)除去絕緣填充材中的氣 泡、⑴於貫孔中填充絕緣填充材及⑴固化絕緣填充材步 驟。 關於上述（k)使電子元件的接點自絕緣填充材露出步 驟’請參閲第一 Η圖所示’係以機械研磨，例如刷磨的方 式，或是以蝕刻技術’例如去膠渣或電漿蝕刻（plasma etching) ’將第一開口（131)及第二開口（132)周圍之第一導 電層（11)和第二導電層（12)上的絕緣填充材（40)去除，惟因 該電子元件（30)先前係以其接點（31)黏貼於該膠層（21)上， 201029527 故該電子元件（30)之接點必然與第二開口（132)平齊，因此 清除第一導電層1)和第二導電層（12)表面上多餘的絕緣 填充材（40)後’將令該電子元件（3〇)的接點（31)露出，惟因 該電子元件（30)的表面係低於接點（31)高度，故該電子元 件（30)之凹溝（32)内仍填滿絕緣填充材（4〇)。 關於上述⑴表面粗化步驟，係利用一般用以去除膠渣 (desmear)的製程為之，原因在於：雖一般去除膠逢最主 要的用意’是用來去除鑽孔後產生的樹脂殘渣，然由於去 ❹除膠渣的製程亦具有使表面微粗化的效果。因此，本發明 之電路板製造方法在進行至該⑴表面粗化步驟前，並未產 生樹脂殘渣，故本發明之製造方法係利用除膠渣製程令絕 緣填充材（40)表面微粗化，藉此增加絕緣填充材（4〇)與後 續電鍍之銅層之間的附著力。 關於上述（m)對基板全板電鍍步驟，請參閱第一丨圖所 示’係將基板（10)進行全板電鍍，如此一來，即可於該第 一導電層（11)上形成一第三導電層（51)，於該第二導電層 ❹（12)上形成一第四導電層（52)，其中該第三導電層（51)並覆 蓋該第一開口（131)，該第四導電層（52)並覆蓋該第二開口 (132)，以令電子元件（3〇)的接點（31)得接觸該第四導電層 (52)，而藉此透過該第四導電層（52)連接至第二導電層 (12)，由於該電子元件（3〇)之凹溝（32)内仍填滿絕緣填充材 (40)，故所鍍上之第四導電層（52)有部分係附著於該凹溝 (32)内的絕緣填充材（40)上，由於絕緣填充材（4〇)與電鍍之 導電層（51)(52)間的附著力，較電子元件（3〇)之表面的附著 力佳，故得增加第四導電層（52)的附著力；於本實施例中， 201029527 該第三導電層(51)和第四導電層(52)係為電鍍銅層β 關；上述⑻形成圖案化線路步驟，請參閲第一」爵所 I ’係於該第—導電層⑴）及第三導電層（Μ)形成第一圖 案化線路（61)，於該第二導電層（12)及第四導電層（52)形成 第二圖案化線路（62)。 因此由上述製造方法所完成的電路板（9〇)係包括： 一電絕緣基板⑽，係具有一上表面（即第二表面）及 一下表面（即第一表面），又該基板（1〇)上係形成有一貫穿 ❹基板上、下表面的貫孔（13); 一電子元件（30)，係設於該貫孔（13)内，並以該絕緣 填充材（40)填入貫孔内冑電子元件包覆固定，又該電 子το件（30)係具有複數個接點（31)，該複數接點（3仞係露出 該基板（10)的上表面； 一上圖案化線路（即該第二圖案化線路（62))，係形成 於該基板（10)的上表面，並與該電子元件（30)之接點（31)接 觸； ® —下圖案化線路（即該第一圖案化線路（61))，係形成 於該基板（1 0)的下表面。 又關於本發明之第二實施例的電路板（90·)及其製造方 法’請參閱第三圖所示’其與第一實施例大致相同，不同 之處在於： 該基板（10)内係進一步具有複數個平行内線路層 (14)，該貫孔（13)係貫穿該第一導電層（11)、基板（1〇)、内 線路層（14)及該第二導電層（12); 於進行（m)對基板全板電鍍步驟前，係先於基板（10)上 11 201029527 形成有至少一貫穿第一導電層（11)、基板（12)、内線路層（14) 及該第二導電層（12)的穿孔，如此一來，在經過（m)對基板 全板電鍍步驟後’該穿孔之内壁亦會被電鍍，而與該第三 導電層（51)及第四導電層（52)電連接，故該穿孔即成為連 接該第三導電層（51)及第四導電層（52)的導電穿孔（15)。 而本發明第二實施例之製造方法所完成的電路板（9〇,) 則包括： 一電絕緣基板（10)，係具有一上表面及一下表面，其 ❹内並具有複數個内線路層（14)，又該基板（1〇)上係形成有 一貫穿基板上、下表面的貫孔（13)，該貫孔（13)内係填滿 絕緣填充材（40); 一電子元件（30)，係設於該貫孔（13)内，並由該絕緣 填充材（40)包覆固定，又該電子元件（3〇)係具有複數個接 點（31)，該複數接點（31)係露出該基板（10)的上表面； 一上圖案化線路（62)，係形成於該基板（1〇)的上表面， 並與該電子元件（30)之接點（31)接觸； ® 一下圖案化線路（61)，係形成於該基板（10)的下表面； 至少一導電穿孔（15)，係貫穿第一導電層（I”、基板 (1〇)、内線路層（14)及該第二導電層（12)，並與該下圖案化 線路（61)及上圖案化線路（62)電連接。 如第二圖與第三圖所示’利用本發明之製造方法所完 成的電路板（90)(9〇·)可用作增層式多層電路板之核心電路 板’或是多層電路板中的任一子層電路板。 由上述可知’本發明具有下列優點： 1.由於本發明之製造方法係將電子元件（3〇)埋設於基 12 201029527 板（10)中’並以直接接觸的方式與第二圖案化線路㈣電 連接，故毋須使用焊錫或導電膏筝昂.貴的耗材；此外，因 毋須使用焊錫，故本發明的電路板毋須經過高溫迴焊程 序，如此-來，可避免電路板受到高溫衝擊，故得維持電 路板的製造良率。 2.由於電子元件（30)係埋設於基板（1〇)中因此可有 效地減少電路板的厚度，當後續以本發明之電路板組成一 多層電路板或用於一增層式多層電路板時，該電子元件_ ©亦不致如習用般造成電路板變厚，故可有效縮小現有多層 電路板或增層式多層電路板的厚度。 惟本發明雖已於前述實施例中所揭露，但並不僅限於 前述實施例中所提及之内容，在不脫離本發明之精神和範 圍内所作之任何變化與修改，均屬於本發明之保護範圍。 综上所述，本發明已具備顯著功效增進，並符合發明 專利要件，爰依法提起申請。 β 【圖式簡單說明】 第Α至」圖：係本發明第一實施例之電路板側剖面 圖暨製造方法流程圖。 第一圖.係本發明第一實施例之電路板應用於增層式 多層電路板中的側剖面圖。 第二圖·係本發明第二實施例之電路板應用於增層式 多層電路板中的側剖面圖。 第四A至c圖：係既有多層電路板中各子層電路板的 側剖面圖。 13 201029527 第五圖：係既有多層電路板的側剖面圖 【主要元件符號說明】 (10) 基板 (11) 第一導電層 (12) 第二導電層 (13) 貫孔 (131)第一開口 Ο (132)第二開口 (14) 内線路層 (15) 導電穿孔 (20) 載板 (21) 膠層 (30) 電子元件 (31) 接點 (32) 凹溝 ® (40)絕緣填充材 (41)氣泡 (51) 第三導電層 (52) 第四導電層 (61) 第一圖案化線路 (62) 第二圖案化線路 (71) 第一子層電路板 (711)圖案化線路 (72) 第二子層電路板 201029527 (721)圖案化線路 (73) ·第三子層電路板 (731)圖案化線路 (74) 絕緣層 (75) 導電穿孔 (80)電子元件 (90)(90')電路板Regarding the above (the step of removing the bubbles in the insulating filler is that the bubbles (41) generated during the filling of the insulating filler (4G) cause a gap between the insulating fillers (40): so that the bubbles cannot be completely filled. In the case of the 3rd factory, the air bubbles (41) in the insulating filler (4〇) must be removed first. Regarding the above (g) EH匕 material filling step, the bubbles in the 9th material (4〇) are 41) After the removal, the insulating filler _ can be cured by baking, so that the electronic component (3 〇) can be further fixed to the through hole (13) by the cured insulating filler (4 〇) Regarding the above (h) removing the carrier and inverting the substrate, refer to the first F diagram, which removes the carrier (2〇) and the adhesive layer (21) from the substrate (1〇). Then, the substrate (10) is inverted, and the electronic component (3〇) contact (31) in the through hole (13) is exposed to the second opening (1 32). The above (1) is filled with an insulating filler in the through hole. And (1) the step of curing the insulating filler, as shown in the first G diagram, in the same manner as steps (e) and (g), from the second opening (1 32) Filling the through hole (13) with an insulating filler (40) 'The groove (32) of the electronic component (30) is not easily insulated by the filler material due to the step of filling the insulating filler in the through hole (4) 〇) Filling up and leaving some gaps, this step ensures that the recess (32) of the electronic component (30) must be filled with the insulating filler (40), due to the insulating filler (40) and the copper formed by electroplating The adhesion between the layers is better than the adhesion of the surface of the electronic component (30), so that the groove (32) is filled with the insulating filler (40), which is advantageous for the subsequent plating process 201029527, which can be recorded flat and has good adhesion. Conductive layer, except that some insulating filler (4Q) will be formed on the second conductive layer (12丨) around the second opening (132). However, if the (e) is filled with an insulating filler in the through hole Use the flow! Produce a better insulating filler (4〇), which will reduce the generation of bubbles (41), and then eliminate (1) the step of removing bubbles in the insulating filler, but the step of curing the insulating filler is Indispensable; in addition, because the insulating filler (4〇) has fluidity, it is (e) In the step of filling the insulating filler in the through hole, the insulating filler (40) can flow into the gap between the groove (32) and the glue layer (21> to fill the concave groove (32), so that further The steps of (1) filling the insulating filler in the through hole and (1) curing the insulating filler are omitted, but if the insulating filler (4〇) is too fluid, there will be an insulating filler (4〇) from the second opening (1 32). Risk of outflow 'Therefore, it is necessary to adjust the viscosity of the adhesive layer (21) and the curing temperature of the insulating filler (4〇); in addition, if (e) is filled with the insulating filler in the through hole The vacuum plugging device (not shown) directly fills the through hole (1 3) with the insulating filler (40), so that even if the insulating filler (40) with better fluidity is not used, the reduction can be achieved. Bubble generation and the effect of filling the insulating filler (4〇) ® to fill the groove (32), thereby eliminating (f) removing air bubbles from the insulating filler, (1) filling the insulating filler in the through hole, and (1) curing the insulating filler Steps. Regarding the above (k), the step of exposing the contacts of the electronic component from the insulating filler is as described in the first drawing, either by mechanical grinding, such as brushing, or by etching technique, such as desmear or Plasma etching removes the first conductive layer (11) and the first conductive layer (11) around the second opening (132) and the insulating filler (40) on the second conductive layer (12), Since the electronic component (30) was previously adhered to the adhesive layer (21) with its contact (31), the contact of the electronic component (30) must be flush with the second opening (132), thus clearing The excess conductive filler (40) on the surface of the first conductive layer 1) and the second conductive layer (12) will expose the contact (31) of the electronic component (3〇), because the electronic component (30) The surface is lower than the height of the contact (31), so that the recess (32) of the electronic component (30) is still filled with an insulating filler (4 〇). Regarding the above (1) surface roughening step, the process for removing desmear is generally used because the main purpose of removing the rubber is to remove the resin residue generated after drilling. The process of removing the slag also has the effect of slightly roughening the surface. Therefore, the method for manufacturing a circuit board of the present invention does not generate a resin residue until the (1) surface roughening step. Therefore, the manufacturing method of the present invention uses the desmear process to make the surface of the insulating filler (40) slightly coarsened. Thereby, the adhesion between the insulating filler (4〇) and the subsequently plated copper layer is increased. Regarding the above (m) step of plating the whole substrate of the substrate, please refer to the first drawing, which is to perform full-plate plating on the substrate (10), so that a first conductive layer (11) can be formed on the first conductive layer (11). a third conductive layer (51), forming a fourth conductive layer (52) on the second conductive layer 12 (12), wherein the third conductive layer (51) covers the first opening (131), the first a fourth conductive layer (52) covering the second opening (132) such that a contact (31) of the electronic component (3) contacts the fourth conductive layer (52), thereby transmitting the fourth conductive layer (52) connected to the second conductive layer (12), since the recess (32) of the electronic component (3) is still filled with the insulating filler (40), the fourth conductive layer (52) is plated A portion is attached to the insulating filler (40) in the recess (32), and the electronic component (3) is adhered due to the adhesion between the insulating filler (4) and the electroplated conductive layer (51) (52). The surface of the crucible has good adhesion, so the adhesion of the fourth conductive layer (52) is increased. In this embodiment, the third conductive layer (51) and the fourth conductive layer (52) are electroplated copper. Layer beta In the above (8) forming a patterned circuit step, please refer to the first "the first conductive layer (1)) and the third conductive layer (") to form a first patterned line (61), the second conductive layer The layer (12) and the fourth conductive layer (52) form a second patterned line (62). Therefore, the circuit board (9〇) completed by the above manufacturing method comprises: an electrically insulating substrate (10) having an upper surface (ie, a second surface) and a lower surface (ie, a first surface), and the substrate (1〇) The upper system is formed with a through hole (13) penetrating through the upper and lower surfaces of the substrate; an electronic component (30) is disposed in the through hole (13) and filled into the through hole with the insulating filler (40) The inner electronic component is covered and fixed, and the electronic component (30) has a plurality of contacts (31), the plurality of contacts (3仞 expose the upper surface of the substrate (10); an upper patterned circuit ( That is, the second patterned line (62) is formed on the upper surface of the substrate (10) and is in contact with the contact (31) of the electronic component (30); ® - the lower patterned circuit (ie, the first A patterned line (61)) is formed on the lower surface of the substrate (10). Further, the circuit board (90) of the second embodiment of the present invention and the method of manufacturing the same are shown in the third figure. 'It is substantially the same as the first embodiment, except that: the substrate (10) further has a plurality of parallel inner lines a via layer (14), the through hole (13) penetrating through the first conductive layer (11), the substrate (1), the inner wiring layer (14) and the second conductive layer (12); Before the substrate full plate plating step, at least one through the first conductive layer (11), the substrate (12), the inner circuit layer (14) and the second conductive layer (12) are formed on the substrate (10) 11 201029527. The perforation, as such, after the (m) pair of substrate full plate plating steps, the inner wall of the perforation is also plated, and electrically connected to the third conductive layer (51) and the fourth conductive layer (52) Therefore, the through hole becomes a conductive via (15) connecting the third conductive layer (51) and the fourth conductive layer (52). The circuit board (9〇,) completed by the manufacturing method of the second embodiment of the present invention The method includes: an electrically insulating substrate (10) having an upper surface and a lower surface, and having a plurality of inner wiring layers (14) in the crucible, and the substrate (1) is formed with a through substrate a through hole (13) of the surface, the through hole (13) is filled with an insulating filler (40); an electronic component (30) is disposed in the through hole (13), and The insulating filler (40) is coated and fixed, and the electronic component (3) has a plurality of contacts (31), the plurality of contacts (31) exposing the upper surface of the substrate (10); A line (62) is formed on an upper surface of the substrate (1) and is in contact with a contact (31) of the electronic component (30); a lower patterned line (61) is formed on the substrate (10) a lower surface; at least one conductive via (15) extending through the first conductive layer (I", the substrate (1), the inner wiring layer (14), and the second conductive layer (12), and the lower pattern The circuit (61) and the upper patterned circuit (62) are electrically connected. As shown in the second and third figures, the circuit board (90) (9 〇·) completed by the manufacturing method of the present invention can be used as a core circuit board of a build-up multilayer circuit board or in a multi-layer circuit board. Any sub-layer board. It can be seen from the above that the present invention has the following advantages: 1. Since the manufacturing method of the present invention embeds an electronic component (3〇) in the substrate 12 201029527 (10) and directly contacts the second patterned circuit (4) Electrical connection, so it is not necessary to use solder or conductive paste to meet expensive supplies; in addition, because solder is not required, the circuit board of the present invention does not have to undergo a high temperature reflow process, so that the board can be protected from high temperature impact, so It is necessary to maintain the manufacturing yield of the board. 2. Since the electronic component (30) is embedded in the substrate (1), the thickness of the circuit board can be effectively reduced, and when the circuit board of the present invention is subsequently formed into a multilayer circuit board or used for a build-up multilayer circuit In the case of the board, the electronic component _ is also not used as a conventional method to thicken the circuit board, so that the thickness of the existing multilayer circuit board or the build-up multilayer circuit board can be effectively reduced. However, the present invention has been disclosed in the foregoing embodiments, but is not limited to the contents mentioned in the foregoing embodiments, and any changes and modifications made without departing from the spirit and scope of the invention belong to the protection of the present invention. range. In summary, the present invention has been significantly improved in effectiveness and complies with the patent requirements of the invention, and is filed in accordance with the law. β [Simplified description of the drawings] Fig. 1 is a flow chart showing a side view of a circuit board and a manufacturing method according to a first embodiment of the present invention. Fig. 1 is a side sectional view showing a circuit board according to a first embodiment of the present invention applied to a build-up multilayer circuit board. Fig. 2 is a side sectional view showing a circuit board according to a second embodiment of the present invention applied to a build-up multilayer circuit board. Figures 4 through 4C are side cross-sectional views of various sub-layer boards in a multi-layer circuit board. 13 201029527 Figure 5: Side profile of existing multi-layer circuit board [Key component symbol description] (10) Substrate (11) First conductive layer (12) Second conductive layer (13) Through hole (131) first Opening Ο (132) Second opening (14) Inner wiring layer (15) Conductive perforation (20) Carrier plate (21) Adhesive layer (30) Electronic component (31) Contact (32) Groove® (40) Insulation filling Material (41) bubble (51) third conductive layer (52) fourth conductive layer (61) first patterned line (62) second patterned line (71) first sub-layer circuit board (711) patterned line (72) Second sub-layer circuit board 201029527 (721) Patterned line (73) • Third sub-layer circuit board (731) Patterned line (74) Insulation layer (75) Conductive perforation (80) Electronic components (90) (90') board