201029293 . 六、發明說明： 【發明所屬之技術領域】 本發明是有關於一種充電控制方法及裝置，特別是寺旨 一種交錯式控制（Interleaved Control)充電方法及裝置。 【先前技術】 目前可攜帶式電子產品多使用可二次充電的電池，如 鋰離子電池，相較於鎳鎘/鎳氫電池而言，鋰離子電池優點 包括無汙染且使用壽命長、單位重量能量密度大於鎳錦及 • 鎳氫電池、工作電壓範圍大能高壓使用、自放電率小、重 量輕、體積小、工作溫度範圍大、無記憶效應等。 大多數二次電池的充電控制電路係採用類比式設計， 然而’類比元件通常包含比較器及放大器，並透過電阻和 電容等被動類比零件來設定開關頻率和軟啟動時間等組態 參數，設計上不似數位控制具有彈性，且類比式設計為非 交錯式設计’輸入漣波大’具有使用壽命低且易造成線路 及元件的損失的缺點。 ❹ 【發明内容】 因此，本發明之目的’即在提供一種交錯式控制充電 方法及裝置。 於疋’本發明用於一具有一升壓模組及至少二降壓單 元的充電裝置’該方法包含下述步驟：（勾數位化該升壓模 組的升壓電壓、各該降壓單元的感應電流及感應電壓；（b) 依據數位化的該升壓電壓對該升壓模組進行切換控制；及 (c)依據數位化的各該降壓單元的感應電流及感應電壓對各 201029293 該降壓單元進行定電流及/或定電壓控制並交錯式切換控制 各該降壓單元以產生充電電力。 本發明交錯式充電裝置包含一升魔模組、一降壓模組 、一切換電路、一類比/數位轉換模組及一數位訊號處理器 ;該升壓模組對一輸入電壓升壓產生一升壓電壓；該降壓 模组具有至少二降壓單元，各降壓單元對該升壓電壓降壓 產生充電電力。 該切換電路耦接該升壓電壓及該降壓模組，受驅動切 換供電給該升壓模組升壓及該降壓模組產生該充電電力。 0 該類比/數位轉換模組耦接該升壓模組及該降壓模組， 用以數位化該升壓模組的升壓電壓、各該降壓單元的感應 電流及感應電壓。 該數位訊號處理器耦接該類比/數位轉換模組及切換電 路，用以依據數位化的該升壓電壓對該升壓模組進行切換 控制並依據數位化的各該降壓單元的感應電流及各該感應 電壓對各該降壓單元進行定電流及/或定電壓控制並交錯式 切換控制各該降壓單元以產生充電電力。 © 本發明交錯式控制充電方法及裝置相較於類比式控制 方式採用交錯式的數位化控制方式，設計上較有彈性且能 降低輸入漣波而延長使用壽命並減少線路及元件的損失。 【實施方式】 有關本發明之前述及其他技術内容、特點與功效，在 以下配合參考圖式之較佳實施例的詳細說明中，將可清楚 的呈現。 4 201029293 ι.電路架檯 如圖1所示，本發明交錯式充電裝置1〇〇的較佳實施 例包含一升壓模組11、一降壓模組12、一切換電路13、一 類比/數位轉換模組14及一數位訊號處理器15。 升Μ模組11對一輸入電壓乙升壓產生一升壓電壓 降壓模組12具有至少二降壓單元121、122，各降壓單元 121、122對升壓電壓^降壓產生充電電力。 切換電路13具有三組開關驅動器131、132、133，開 β 關驅動器131耦接升壓電壓11，開關驅動器132、133分別 耦接降壓單元121、122,受數位訊號處理器15的驅動令升 麼模組11產生升壓電壓^及降壓模組12的降壓單元ι21、 122分別產生充電電力。 類比/數位轉換模組丨4耦接升壓模組Γ1及降壓模組12 ，用以數位化升壓模組11的升壓電壓^、降壓單元121的 感應電流仏及感應電壓G，及降壓單元122的感應電流心及 感應電壓並將數位化結果傳送給數位訊號處理器15作 G 判斷處理。 本較佳實施例中，數位訊號處理器15是一可程式化邏 輯閘陣列（FPGA)，具有負責系統時序控制與開關控制時序 的主控制元件、處理回授補償並算出控制力再交由主控制 元件去執行比例積分微分元件（PID)，及用來將輸入的時脈 訊號倍頻的元件等，適於充電控制系統的數位化設計。 數位訊號處理器15耦接類比/數位轉換模組14及切換 電路13，用以依據數位化的升壓電壓&產生脈寬調變訊號 201029293 Μ,予開關驅動器131以對於升壓模組11進行切換控制。 另外，數位訊號處理器15並依據數位化的感應電流ii2 、心及感應電壓L、匕產生脈寬調變訊號沁、m3予開關驅 動器132、133,藉此以交錯式切換驅動對各降壓單元121 、122分別進行定電流及/或定電壓控制。 本較佳實施例之相關規格如表一所示： 表一 電池 充電電壓：4.2±0.05V 1 標準充電電流：540mA 快充電流：2700mA 升 壓 模 組 輸入電壓VS 3.3V 中間電壓V〇i 6V 輸入電容Cs 680 中間電容Q 1000 μ,Υ 電感Li 49.5^ Η 二極體A STPS30L60CT 功率開開Si IRK3205 降 壓 槙 組 中間電壓ν01 6V 輸出電壓V〇2 · V〇3 4.2V ' 中閉電容Ci 1000 μ F 輸出電容C2 · C3 470 電威L2 · L3 63juH 二極體1¾ * 1¾ SR260 功季開關s2*s3 IRE3205 切換頻率 100kHz 數位訊號處理器 Altera FPGA Cyclone Π 系列 UG EK2C20F484 201029293 升壓模組11的作用是將輸入電壓^=3.3V升至升壓電 壓^=6V，降壓模組12的作用將升壓電壓^=6v降至4.2V 以作為對電池21、22的充電電力，且為了降低升壓模組11 之輸出電壓漣波，數位訊號處理器15利用VHDL控制器程 式交錯式驅動兩個降壓單元121、122。 參閱圖1及圖2，本發明交錯式充電的控制方法的較佳 實施例中’數位訊號處理器15的控制原理說明如下：首先 判斷任一電池21、22是否已充飽（步驟301)?本較佳實施例 的電池21、22的充飽電壓為4.2V，若充飽則結束充電；若 未充飽，則判斷電池21、22的電壓是否大於預定電壓（步驟 3〇2) ?在此假設預定電壓為3·9ν，若已大於該預定電壓 3.9V，則改為「定電壓模式」充電（步驟3〇4);若未達該預 定電壓3.9V，則以「定電流模式」充電（步驟3〇3)，且於充 電過程中持續判斷電池21、22的電壓是否大於預定電壓（步 驟305) ?若已大於預定電壓3.9V，改為「定電壓模式」充 電（步驟304)，再於充電過程中判斷電池21、22是否已充飽 (步驟306)?若充飽則結束充電。 前述「定電流模式」為一開始控制降壓單元121、122 先用一定電流1A對電池21、22充電，當任一電池21、22 的電壓達到一預定電壓3.9V時，轉成「定電壓模式」以一 定電壓充電將電池21、22充至4.2V ;假設一開始兩電池21 、22均為3.6V，兩電池21、22均會處於「定電流模式」以 iA進行充電’但由於每顆電池21、22之内阻不同，導致充 電速度不同’所以假設有一電池21電壓達到3.9V時，於本 201029293 發明之控制方式將轉成「定電壓模式」以（Μ進行充電， 而另電/也22若未達3 9V時則繼續處於「定電流模式」 以1Α充電最後兩電池21、22都達3 π時，就會都處於 疋電壓模式」以42ν進行充電如此整個充電過程會持 續至電池電壓達到4.2V才會停止，管兩顆電池處於哪 種充電模式’其充電電流均會處於交錯式控制。 II.膏測結果 圖3及圖4為兩組降壓單元121、m均操作於「定電 流模式」的各元件波形時序圖。 圖3為升壓模組11的功率開關S1之驅動電壓Vgsl、輸 出電壓〜及電感電& iu，此時輸出電壓〜之直流值為 6.16V，電感電流…之直流值為3 44A。 圖4為降壓模組12之功率開關sjs3之驅動電壓Vgs2 及W波形及兩相輸出電感電流&及^，此時輸出電感電 流lL2之直流值4 U4A，輸出電感電流k之直流值為 1.04A且功率開關§2及心為交錯式驅動。 -圖5及圖6為兩組降壓單幻21、122操作於不同模式 各元件的波形時序圖。 圖5為升壓模組U的功率開關&之驅動電壓v叫、輸 出電壓ν01及電感電、流，此時輸出電壓ν〇ι之直流 6价輸入電感電流iL1之直流值為3 36A。 為 圖6為降壓模組12之功率開關&及&之驅動電壓V 2 及w皮形及兩相輸出電感電流iL2及iL3,此時第電池= 已到達我們所設定之模式切換電壓39V，而轉成「定電壓 201029293 模式」，其電感電流1L3之直流值為〇 976A ,另一電池21仍 在「定電流模式」，其電感電流iL2之直流值為i 06A。 圖7及圖8為兩組降壓單元121、122均操作於「定電 壓模式」各元件的波形時序圖。 圖7為升壓模組11的功率開關Si之驅動電壓、輸 出電壓V01及電感電流iL1，此時輸出電壓v⑴之直流值為 6.22V，電感電流iL1之直流值為319A。 圖8為降壓模組12之功率開關心及&之驅動電壓Vgs2 • 及Vgs3波形及兩相輸出電感電流及iL3，此時電感電流 iL2之直流值為0.973A，電感電流iL3之直流值為〇 946A。 由前述圖3、圖5及圖7可知，其升壓模組u之輸出 電壓V01介於6.16V至6.22V之間’故可知升壓模組u於 電壓回授控制下可得一穩定的輸出電壓。 由刖述圖4、圖6及圖8可知，兩組降壓單元121、 122為交錯式切換控制，且在「定電流模式」時，降壓單元 121、122皆可將充電電流控制於幾乎接近於ία。 ⑩ ΠΙ·有無交錤式控制之雪懕漣波比射 圖9為兩組降壓單元121、122於交錯式控制且降壓單 元121、122均操作於「定電流模式」時，輸入電流（或升壓 模組11之輸出電流）、降壓型轉換器之功率開關&之驅 動電壓及兩相電感電流匕2及匕3之波形。 交錯式切換控制之降壓單元121、122的輸入電流μ均 方根值計算： (1) (1)201029293201029293. VI. Description of the Invention: [Technical Field] The present invention relates to a charging control method and apparatus, and more particularly to an Interleaved Control charging method and apparatus. [Prior Art] Currently, portable electronic products use rechargeable batteries, such as lithium-ion batteries. Compared with nickel-cadmium/nickel-hydrogen batteries, lithium-ion batteries have advantages including non-polluting and long service life. The energy density is greater than that of nickel and nickel-hydrogen batteries, the working voltage range is high and high voltage, the self-discharge rate is small, the weight is light, the volume is small, the working temperature range is large, and there is no memory effect. Most secondary battery charging control circuits use an analog design. However, analog components usually include comparators and amplifiers, and configuration parameters such as switching frequency and soft-start time are set by passive analog components such as resistors and capacitors. The digital control is not elastic, and the analog design is non-interlaced. The 'input chopping big' has the disadvantage of low service life and easy loss of lines and components. SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide an interleaved control charging method and apparatus. The present invention is applied to a charging device having a boosting module and at least two step-down units. The method comprises the following steps: (ticking the boosting voltage of the boosting module, each of the step-down units Inductive current and induced voltage; (b) switching control of the boosting module according to the digitized boosting voltage; and (c) sensing current and induced voltage of each of the step-down units according to digitization for each 201029293 The step-down unit performs constant current and/or constant voltage control and alternately controls and controls each of the step-down units to generate charging power. The interleaved charging device of the present invention comprises a rising module, a step-down module and a switching circuit. a analog/digital conversion module and a digital signal processor; the boost module generates a boost voltage for boosting an input voltage; the buck module has at least two buck units, and each buck unit The step-up voltage is stepped down to generate charging power. The switching circuit is coupled to the step-up voltage and the step-down module, and is driven to switch power supply to the boosting module to boost and the step-down module to generate the charging power. Analog/digital conversion The step-up module is coupled to the step-up module and the step-down module for digitizing the boosting voltage of the boosting module, the induced current and the induced voltage of each of the step-down units. The digital signal processor is coupled to the analogy And a digital conversion module and a switching circuit, configured to perform switching control on the boosting module according to the digitized boosting voltage, and according to the induced current of each digitized step-down unit and each of the induced voltage pairs The voltage unit performs constant current and/or constant voltage control and alternately controls and controls each of the step-down units to generate charging power. The interleaved control charging method and device of the present invention adopts interleaved digital control compared with the analog control method. The method is more flexible in design and can reduce input chopping to prolong the service life and reduce the loss of lines and components. [Embodiment] The foregoing and other technical contents, features and effects of the present invention are in conjunction with the following reference drawings. In the detailed description of the preferred embodiment, it will be clearly shown. 4 201029293 ι. Circuit Rack As shown in FIG. 1, the interleaved charging device of the present invention is preferably implemented. The example includes a boost module 11, a buck module 12, a switching circuit 13, an analog/digital conversion module 14, and a digital signal processor 15. The boost module 11 boosts an input voltage A step-up voltage step-down module 12 has at least two step-down units 121 and 122, and each of the step-down units 121 and 122 generates a charging power for step-down voltage reduction. The switching circuit 13 has three sets of switch drivers 131, 132, and 133. The open beta driver 131 is coupled to the boost voltage 11. The switch drivers 132 and 133 are respectively coupled to the buck units 121 and 122. The digital signal processor 15 is driven to raise the boost voltage and the buck voltage. The step-down units ι 21 and 122 of the module 12 respectively generate charging power. The analog/digital conversion module 丨4 is coupled to the boosting module Γ1 and the step-down module 12 for digitizing the boosting voltage of the boosting module 11. The induced current 仏 and the induced voltage G of the buck unit 121 and the induced current and induced voltage of the buck unit 122 are transmitted to the digital signal processor 15 for G determination processing. In the preferred embodiment, the digital signal processor 15 is a programmable logic gate array (FPGA) having a main control component responsible for system timing control and switching control timing, processing feedback compensation, and calculating control power. The control component performs a proportional integral derivative component (PID) and a component for multiplying the input clock signal, and is suitable for the digital design of the charging control system. The digital signal processor 15 is coupled to the analog/digital conversion module 14 and the switching circuit 13 for generating a pulse width modulation signal 201029293 according to the digitized boost voltage & the switch driver 131 for the boost module 11 Perform switching control. In addition, the digital signal processor 15 generates a pulse width modulation signal 沁, m3 to the switch driver 132, 133 according to the digitized induced current ii2, the heart and the induced voltage L, ,, thereby driving the bucks in an interleaved manner. The cells 121 and 122 perform constant current and/or constant voltage control, respectively. The relevant specifications of the preferred embodiment are shown in Table 1: Table 1 Battery charging voltage: 4.2±0.05V 1 Standard charging current: 540mA Fast charging current: 2700mA Boost module input voltage VS 3.3V Intermediate voltage V〇i 6V Input Capacitor Cs 680 Intermediate Capacitor Q 1000 μ, 电感 Inductor Li 49.5^ Η Diode A STPS30L60CT Power On Si IRK3205 Buck 槙 Group Intermediate Voltage ν01 6V Output Voltage V〇2 · V〇3 4.2V ' Medium Closed Capacitance Ci 1000 μ F Output Capacitor C2 · C3 470 Power L2 · L3 63juH Diode 13⁄4 * 13⁄4 SR260 Power Switch s2*s3 IRE3205 Switching Frequency 100kHz Digital Signal Processor Altera FPGA Cyclone Π Series UG EK2C20F484 201029293 Boost Module 11 The function is to raise the input voltage ^=3.3V to the boost voltage ^=6V, and the function of the buck module 12 reduces the boost voltage ^=6v to 4.2V as the charging power for the batteries 21, 22, and in order to reduce The output voltage of the boosting module 11 is chopped, and the digital signal processor 15 uses the VHDL controller program to drive the two step-down units 121, 122 in an interleaved manner. Referring to FIG. 1 and FIG. 2, in the preferred embodiment of the method for controlling the interleaved charging of the present invention, the control principle of the digital signal processor 15 is as follows: First, it is determined whether any of the batteries 21, 22 are fully charged (step 301). The charging voltage of the batteries 21 and 22 of the preferred embodiment is 4.2V. If the battery 21, 22 is fully charged, the charging is terminated. If it is not full, it is determined whether the voltage of the batteries 21, 22 is greater than a predetermined voltage (step 3〇2). This assumes that the predetermined voltage is 3·9 ν, and if it is greater than the predetermined voltage of 3.9 V, it is changed to "constant voltage mode" charging (step 3 〇 4); if the predetermined voltage is not 3.9 V, the "constant current mode" is used. Charging (step 3〇3), and continuously determining whether the voltage of the batteries 21, 22 is greater than a predetermined voltage during the charging process (step 305). If the voltage is greater than the predetermined voltage of 3.9V, the charging is changed to "constant voltage mode" (step 304). Then, during the charging process, it is judged whether the batteries 21, 22 are fully charged (step 306), and if they are full, the charging is ended. The "constant current mode" is that the first control step-down units 121, 122 first charge the batteries 21, 22 with a constant current 1A, and when the voltage of any of the batteries 21, 22 reaches a predetermined voltage of 3.9V, it is converted into a constant voltage. Mode" charges the batteries 21, 22 to 4.2V with a certain voltage; assuming that both batteries 21, 22 are 3.6V at the beginning, both batteries 21, 22 will be in "constant current mode" to charge with iA' but due to each The internal resistance of the batteries 21 and 22 is different, resulting in different charging speeds. Therefore, if a battery 21 voltage reaches 3.9V, the control method of the invention of 201029293 will be converted into a "constant voltage mode" to charge (,, while charging / also 22 if it does not reach 3 9V, it will continue to be in "constant current mode". When 1 Α is charged, the last two batteries 21 and 22 will reach 3 π, they will all be in the 疋 voltage mode. The battery will be charged at 42 ν so that the entire charging process will continue. When the battery voltage reaches 4.2V, it will stop. In the charging mode of the two batteries, the charging current will be in the interleaved control. II. Paste measurement results Figure 3 and Figure 4 show the two sets of voltage reduction units 121 and m. Operating in "constant current mode Figure 3 is a waveform diagram of the waveforms of the components of the booster module 11. The driving voltage Vgsl of the power switch S1 of the boosting module 11, the output voltage ~ and the inductor power & iu, at this time the output voltage ~ DC value is 6.16V, the inductor current... The DC value is 3 44 A. Figure 4 is the driving voltage Vgs2 and W waveform of the power switch sjs3 of the buck module 12 and the two-phase output inductor current & and ^, the DC value of the output inductor current lL2 is 4 U4A, and the output is The DC current of the inductor current k is 1.04A and the power switch §2 and the heart are interleaved. - Figure 5 and Figure 6 are waveform timing diagrams of the two sets of bucking single phantoms 21 and 122 operating in different modes. The driving voltage v of the power switch & of the boosting module U is called the output voltage ν01 and the inductor current and current. At this time, the DC value of the DC 6-valent input inductor current iL1 of the output voltage ν〇ι is 3 36A. 6 is the power switch && drive voltage V 2 and w skin shape and two-phase output inductor currents iL2 and iL3 of the buck module 12, at this time, the battery = has reached the mode switching voltage 39V set by us. And converted to "constant voltage 201029293 mode", its DC current value of the inductor current 1L3 For 〇976A, the other battery 21 is still in "constant current mode", and the DC value of the inductor current iL2 is i 06A. Figures 7 and 8 show that the two sets of step-down units 121 and 122 operate in "constant voltage mode". The waveform timing diagram of the component. Figure 7 shows the driving voltage, output voltage V01 and inductor current iL1 of the power switch Si of the booster module 11. The DC value of the output voltage v(1) is 6.22V, and the DC value of the inductor current iL1 is 319A. . 8 is the power switch core of the buck module 12 and the driving voltage Vgs2 of the & Vgs2 and the two-phase output inductor current and iL3, and the DC value of the inductor current iL2 is 0.973A, and the DC value of the inductor current iL3. For 〇 946A. It can be seen from the foregoing FIG. 3, FIG. 5 and FIG. 7 that the output voltage V01 of the boosting module u is between 6.16V and 6.22V. Therefore, it can be known that the boosting module u can obtain a stable under the voltage feedback control. The output voltage. As can be seen from FIG. 4, FIG. 6 and FIG. 8, the two sets of step-down units 121 and 122 are interleaved switching control, and in the "constant current mode", the step-down units 121 and 122 can control the charging current to almost Close to ία. 10 ΠΙ·With or without the control of the snow 懕涟 wave ratio, Figure 9 shows the input currents when the two sets of buck units 121 and 122 are interleaved and the buck units 121 and 122 are operated in the “constant current mode”. Or the output current of the boost module 11), the driving voltage of the buck converter power switch & and the waveform of the two-phase inductor current 匕2 and 匕3. The input current μ rms value of the step-down units 121 and 122 of the interleaved switching control is calculated: (1) (1) 201029293
h，mts = yJ(^pkX V^)2 + ID(J =^[(2.04 -1.08) x «u622(A) 圖10為兩組降壓單幻21、122於同步（非交錯）式控制 且降壓單70 12卜122均操作於「定電流模式」時，輸入電 流（或升壓模、组11之輸出電流）Li、降>1型轉換器之功率開 關S2之驅動電壓及兩相電感電流心及之波形。 不具交錯式同步控制之組降壓單元121、122的輸入電 流Li均方根值計算： ^〇l,rms = ^pk x =2 x yjQ.62 «1.5748(A) (2) 由（1)式與（2)式可得知具有交錯式控制之降壓單元 、122的輸入電流漣波均方根值，確實比沒有交錯式的同步 控制要低，亦即，本發明採用的交錯式控制之電壓漣波較 低，因此可延長升壓轉換之輸出電容的壽命，減少線路及 元件的損失。 IV.結論 綜上所述，本發明交錯式控制充電方法及裝置採用交❹ 錯式的數位化控制方式而具有下述功效，故確實能達成本 發明之目的。 1 ·操作參數格式化：就數位元件而言，是利用資料轉 換1§使§fl號轉為成數位資料’組態參數的設定由資料記情 體來負責’透過數位控制器使設計人員可以在不同情況下 自由選擇最佳處理方式’控制迴路會隨著不同的操作模式 與不同的轉移函數改變去適應不同狀態。 10 201029293 2.通訊：數位通訊介面讓主機或系統層級處理器監控 電原供應還可做為可程式功能或其他數位作業進入點， 除了支援程式設定，還可讓系統遠端記錄來監控電路的溫 度/電机/電麼等參數，因此可預測故障以增強系統可靠性， 避免系統停機並提供智慧型故障管理功能。 3.可程式能力：可程式能力可透過軟體修改參數設定 ’不僅推廣以平台為基礎的應用設計方式，也可加快產品h,mts = yJ(^pkX V^)2 + ID(J =^[(2.04 -1.08) x «u622(A) Figure 10 shows the two sets of bucking single illusion 21, 122 in synchronous (non-interlaced) control When the step-down unit 70 12 122 is operated in the "constant current mode", the input current (or the boost mode, the output current of the group 11) Li, the drop voltage of the power switch S2 of the type 1 converter and both Phase inductor current center and waveform. Input current Li rms value of group buck units 121 and 122 without interleaved synchronous control: ^〇l,rms = ^pk x =2 x yjQ.62 «1.5748(A (2) From equations (1) and (2), it can be seen that the input current chopping rms value of the buck unit with 122 interleaved control is indeed lower than that without interleaved synchronous control, that is, The voltage chopping of the interleaved control used in the present invention is low, so that the life of the output capacitor of the boost conversion can be prolonged, and the loss of the line and components can be reduced. IV. Conclusion In summary, the interleaved control charging method of the present invention The device adopts the erroneous digital control method and has the following effects, so the object of the present invention can be achieved. 1 · Operation parameter formatting In the case of digital components, the use of data conversion 1 § converts the §fl number into digital data. The configuration parameters are set by the data ticker. 'The digital controller allows the designer to freely choose the most in different situations. The best way to control the control loop will change to different states with different operating modes and different transfer functions. 10 201029293 2. Communication: Digital communication interface allows the host or system level processor to monitor the power supply and can also be programmed. Function or other digital job entry point, in addition to supporting program settings, allows the system to record remotely to monitor the temperature/motor/electric parameters of the circuit, thus predicting faults to enhance system reliability, avoid system downtime and provide intelligence Type fault management function 3. Programmability: Programmability can modify parameter settings through software 'not only promotes platform-based application design, but also speeds up product
上市時間’產品的差異性不在受限類比控制器的硬體電路 限制改用數位控制器可以整合原本需由外部零件提供的 眾多功能’廠商只需用較少零件就能完成複雜的設計，降 低生產成本並提高可靠度。 4.精確性：數位㈣器的精確度遠超過類比控制在 類比控制設計時需考以件的容許誤差值，而數位控制器 的參數控制是㈣軟財式，其參數及補償值都是儲存在 讀體中’不僅提供精麵控制能力，也能將設計調整更 接近理論上限值以實現更高效能。 5·成本：電流感測臨界值的容許誤差值會電路常須採 用超規格設計易造成最大誤差的產生；數位控制則可用軟 體自我校準來消除這些誤差，讓電路不必為了應付最大可 能誤差而制超規格，這可使電路零件更小體積更精巧 、成本也更低。 6_降低輸入連波·相較於同牛 双於冋步控制方式，本發明採用 交錯式控制方式，能降低輪入連 運皮而延長使用哥命並減少 線路及元件的損失。 11 201029293 惟以上所述者’僅為本發明之較佳實施例而已，當不 能以此限定本發明實施之範圍，即大凡依本發明申請專利 範圍及發明說明内容所作之簡單的等效變化與修飾，皆仍 屬本發明專利涵蓋之範圍内。 【圖式簡單說明】 圖1是一系統方塊圖，說明本發明交錯式充電裝置的 較佳實施例； 圖2是一流程圖，說明本發明交錯式充電的控制方法 的較佳實施例； 圖3及圖4是波形時序圖，說明兩組降壓單元均操作 於「定電流模式」的各元件波形時序； 圖5及圖6是波形時序圖，說明兩組降壓單元操作於 不同模式各元件的波形時序； 圖7及圖8是波形時序圖，說明兩組降壓單元均操作 於「定電壓模式」的波形時序； ' 圖9是一波形時序圖，說明兩組降壓單元於交錯式控 制且降壓單元均操作於「定電流模式」；及 曰" 囷1〇是一波形時序圖，說明兩組降壓單元於非交錯 控制且降壓單元均操作於「定電流模式」。 日二 12 201029293 【主要元件符號說明】 100.......交錯式充電裝置 11 .........升壓模組 12 .........降壓模組 121、122降壓單元 13 .........切換電路 131 、 132 、 133 .........開關驅動器 14……類比/數位轉換模組 15.........數位訊號處理器 21、22 .·電池 301〜306步驟The time-to-market's product differentiation is not limited to the controller's hardware circuit limitations. The digital controller can be used to integrate many of the functions that would otherwise be required from external parts. The manufacturer can complete complex designs with fewer parts and reduce the complexity. Production costs and increased reliability. 4. Accuracy: The accuracy of the digital (four) device far exceeds the tolerance value of the analog control in the analog control design, and the parameter control of the digital controller is (4) soft financial mode, and its parameters and compensation values are stored. In the reading body, 'not only the fine surface control ability, but also the design adjustment closer to the theoretical upper limit to achieve higher efficiency. 5. Cost: The allowable error value of the current sensing threshold value often requires the use of over-specified design to cause maximum error; digital control can be self-calibrated by software to eliminate these errors, so that the circuit does not have to be prepared to cope with the maximum possible error. Ultra-standard, which makes the circuit parts smaller, more compact and less expensive. 6_Reducing the input continuous wave · Compared with the same cow control method, the present invention adopts the interlaced control mode, which can reduce the wheeled connecting skin and prolong the use of the life and reduce the loss of the line and components. 11 201029293 However, the above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, that is, the simple equivalent changes made according to the scope of the invention and the description of the invention. Modifications are still within the scope of the invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a system block diagram showing a preferred embodiment of an interleaved charging device of the present invention; FIG. 2 is a flow chart illustrating a preferred embodiment of a method for controlling interleaved charging according to the present invention; 3 and FIG. 4 are waveform timing diagrams illustrating the waveform timing of each component of the two sets of buck units operating in the "constant current mode"; FIG. 5 and FIG. 6 are waveform timing diagrams illustrating that the two buck units operate in different modes. Waveform timing of components; Figure 7 and Figure 8 are waveform timing diagrams showing the waveform timing of the two sets of buck units operating in "constant voltage mode"; 'Figure 9 is a waveform timing diagram illustrating the interleaving of two sets of buck units Control and buck unit operate in "constant current mode"; and 曰" 囷1〇 is a waveform timing diagram illustrating that the two buck units are in non-interleaved control and the buck unit operates in "constant current mode" .日二12 201029293 [Main component symbol description] 100.......Interlaced charging device 11 .........Boost module 12 .........Buck module 121, 122 buck unit 13 ... ... switching circuit 131, 132, 133 ... ... switch driver 14 ... analog / digital conversion module 15 ... ...digital signal processor 21, 22 · battery 301~306 steps
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