201029126 六、發明說明： ' 【發明所屬之技術領域】 " 本發明是有關於一種基板及其封裝結構，特別是指一 種具有防金屬離子遷移之隔離層基板及其封裝結構。 【先前技術】 參閱圖1，習知的電路基板1包含複數依序向上堆疊的 疊層單元11及一外焊單元12。每一疊層單元11包括一絕 緣層111與一設置在該絕緣層111上的連接線路112，且該 鲁 等連接線路112選擇性地彼此電連接，該外焊單元12包括 一設置於該疊層單元11上的阻焊層121，與複數彼此相間 隔排列的外墊122，該每一阻焊層121是由自由體積大的絕 緣材料所構成，每一外塾122與該等連接線路112選擇性地 電連接。 參閱圖2’該電路基板1可再與一包含複數電連接件的 積體電路（integrated circuit，1C)封裝而成一封裝結構。 當積體電路運作時產生的廢熱，會導致積體電路、電 • 連接件與電路基板的溫度提高，進而讓該外墊122與該外 墊122間’或是該外墊122與該電連接件間產生金屬離子 的電遷移現象，且同時’由於基板最臨靠近積體電路之阻 焊層的構成材料的自由體積較大、且厚度不足，因此無法 阻止此等金屬離子的電遷移而使得該等外墊122與該等電 連接件間出現不该產生的橋接’進而使得該積體電路運作 功能失效。 隨著積體電路的功率需求愈來愈高，意味著其中連接 3 201029126 線路的密度愈來愈高，對應地電路基板的外墊122間距也 更小，特別疋在積體電路進入9〇奈米以下的高階製程，以 及可預見的銅晶片技術引入後，該外墊丨22與該外墊122 間’或是該外塾122與該電連接件間產生的金屬離子電遷 移現象的機率將大幅增加，而造成主要良率限制，對此， 目則並沒有注意到此一發展瓶頸，當然也沒有人提出解決 的方法。 【發明内容】 因此，本發明之目的，即在提供一種具有防金屬離子 遷移之隔離層基板。 於疋，本發明一種具有防金屬離子遷移之隔離層基板 ，包含複數依序向上堆疊的疊層單元、一外焊單元及一隔 離層。 每一疊層單元包括一絕緣層與一設置在該絕緣層上的 連接線路且該等連接線路選擇性地彼此電連接。 該外焊單元包括-設置於該疊層單元上的阻焊層，與 複數彼此㈣関列的外墊，每_特與料連接線路選 擇性地電連接。 該隔離層位於該外焊單元的阻焊層上且材質為自身玻 璃轉換溫度^小於丨贼的材料，並包括複輯應將該等外 塾頂面裸露的開窗，且該隔離層頂面的高度怪大於該等外 塾頂面的兩度。 本發明之另一目的，即在提供一種具有防金屬離子遷 移之隔離層基板的封裝結構。 201029126 於是，本發明一種具有防金屬離子遷移之隔離層基板 的封裝結構，包含一電路基板、一積體電路、複數電連接 • 件及一封裝膠體。 該電路基板包括複數依序向上堆疊的養層單元、一外 焊單元及一隔離層，每一疊層單元具有一絕緣層與一設置 在該絕緣層上的連接線路且該等連接線路選擇性地彼此電 連接，該外焊單元具有一設置於該疊層單元上的阻焊層， 與複數彼此相間隔排列的外塾，每一外塾與該等連接線路 • 選擇性地電連接，該隔離層位於該外焊單元的阻焊層上且 材質為自身玻璃轉換溫度不小於150°C的材料，並具有複數 對應將該等外墊頂面裸露的開窗，且該隔離層頂面的高度 恆大於該等外墊頂面的高度。 該積體電路，具有預定電性功能。 該等電連接件，固結該積體電路與該等外墊，並使該 積體電路與該等外墊電連接。 該封裝膠體，設置在該隔離層與該積體電路間，用以 β 將該電路基板與該積體電路相固接。 本發明之功效在於：在電路基板上設置以自身玻璃轉 換溫度不小於15(TC的材料構成的隔離層，使得當積體電路 與該電路基板結合執行其功能運作時，藉著材料本身在低 於自身玻璃轉換溫度時呈凍結狀態如玻璃狀，而具有極小 的自由體積，進而可防止金屬離子的電遷移現象，有效達 到杜絕該積冑電路運作功能失效的情形發生乃至於提高 該電路基板所構成的封裝結構的良率。 5 201029126 【實施方式】 有關本發明之前述及其他技術内容、特點與功效，在 以下配合參考圖式之一個較佳實施例的詳細說明中，將可 清楚的呈現。 在本發明被詳細描述之前，要注意的是，在以下的說 明内容中，類似的元件是以相同的編號來表示。 參閱圖3,本發明一種具有㊉金屬離子遷移之隔離層基 板之較佳實施例包含複數依序向上堆疊的疊層單元2、一外 焊單元3及一隔離層4。 每一疊層單元2包括一絕緣層21與一設置在該絕緣層 21上的連接線路22且該等連接線路22選擇性地彼此電連 接。 該外焊單元3包括一設置於該疊層單元2上的阻焊層 31，與複數彼此相間隔排列的外墊32，每一外墊32與該等 連接線路22選擇性地電連接。 該隔離層4位於該外焊單元3的阻焊層31上且材質為 自身玻璃轉換溫度不小於15(rc的材料，例如聚醯亞胺 (polymide)等耐高溫、耐化學性之高分子材料並包括複數 對應將該等外墊32頂面裸露的開f 41，且該隔離層4頂面 的高度恆大於該等外墊32頂面的高度，較佳地，該隔離層 4頂面與該任-外塾32頂面的距離不小於，藉著該 隔離層4構成材料的特性，在低於玻璃轉換溫度時呈凍結 狀態如玻璃狀，而具有極小的自由體積，以及足夠的厚度 ，（即該隔離層4頂面與該任一外墊32頂面的距離），可阻 201029126 擋任該二相鄰的外塾μ間的金屬離子如銅離子的電遷移現 象，進而有效達到杜絕元件或電路失效。 ' ㈣圖4’上述本㈣具有防金屬離子遷移之隔離層基 板的較佳實施例，可再與一積體電路5、複數電連接件6及 一封裝膠體7等封裝而成一封裝結構。 該基板的結構已於上述說明，在此不再重複贅述。 該積體電路5，包括預定電性功能。 該等電連接件6,固結該積體電路5與該等外墊”， • 並使該積體電路5與該等外塾32電連接。該等電連接件6 的種類眾多，例如導電凸塊（bump)、錫球⑽如ba⑴等， 圖示令以導電凸塊作說明；由於此等技術已為業界所周知 ，且非本發明的創作重點，在此不多加詳述。 該封裝膠體7’設置在該隔離層4與該積體電路5間， 用以將該電路基板與該積體電路5相固接；較佳地，該封 裝膠體7包覆該積體電路5。 當該積體電路5運作時產生的廢熱，會導致該積體電 • $ 5、該等電連接件6與電路基板的溫度提高，進而讓該外 墊32與該外墊32間，或是該外墊32與該電連接件6間產 生金屬離子的電遷移現象，且同時，由於基板最臨靠近積 體電路5之阻焊層31的構成材料的自由體積較大、且厚度 不足，無法阻止此等金屬離子的電遷移而使得該等外墊32 與該等電連接件6間出現不該產生的橋接，因此，藉著該 隔離層4構成材料的特性，在低於玻璃轉換溫度時呈凍結 狀態如玻璃狀’而具有極小的自由體積，以及足夠的厚度 7 201029126 頂面的距離），可阻 32與該電連接件6 進而有效達到杜絕 ’（及該隔離層4頂面與該任一外墊32 擂任該二相鄰的外墊32間或是該外墊 間的金屬離子如銅離子的電遷移現象， 該積體電路運作功能失效，提昇電子元件的良率。201029126 VI. Description of the Invention: 'Technical Fields According to the Invention>> The present invention relates to a substrate and a package structure thereof, and more particularly to an isolation layer substrate having metal ion migration prevention and a package structure thereof. [Prior Art] Referring to Fig. 1, a conventional circuit board 1 includes a plurality of stacked units 11 and an outer solder unit 12 which are sequentially stacked upward. Each of the stacking units 11 includes an insulating layer 111 and a connecting line 112 disposed on the insulating layer 111, and the connecting lines 112 are selectively electrically connected to each other, and the outer soldering unit 12 includes a stack The solder resist layer 121 on the layer unit 11 and the plurality of outer pads 122 spaced apart from each other, each of the solder resist layers 121 being composed of a free bulky insulating material, each outer turn 122 and the connecting lines 112 Selectively electrically connected. Referring to FIG. 2', the circuit substrate 1 can be packaged into a package structure with an integrated circuit (1C) including a plurality of electrical connectors. The waste heat generated when the integrated circuit operates may cause an increase in the temperature of the integrated circuit, the electrical connector, and the circuit substrate, thereby causing the outer pad 122 and the outer pad 122 to be electrically connected to the outer pad 122. The electromigration phenomenon of metal ions occurs between the pieces, and at the same time, since the constituent material of the solder resist layer closest to the integrated circuit of the substrate is large in free volume and insufficient in thickness, the electromigration of the metal ions cannot be prevented. A bridge that does not occur between the outer pads 122 and the electrical connectors may cause the integrated circuit operation function to fail. As the power requirement of the integrated circuit becomes higher and higher, it means that the density of the connection 3 201029126 line is getting higher and higher, and the spacing of the outer pad 122 of the corresponding circuit substrate is also smaller, especially in the integrated circuit entering 9〇奈After the high-order process below m, and the foreseeable copper wafer technology, the probability of metal ion electromigration between the outer pad 22 and the outer pad 122 or between the outer port 122 and the electrical connector will be A large increase has caused major yield restrictions. For this reason, the development bottleneck has not been noticed, and of course no one has proposed a solution. SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide an isolation substrate having metal ion migration resistance. In the present invention, an isolation layer substrate having metal ion migration prevention comprises a plurality of stacked units stacked in sequence, an outer solder unit and a spacer layer. Each of the stacked units includes an insulating layer and a connecting line disposed on the insulating layer and the connecting lines are selectively electrically connected to each other. The outer soldering unit includes a solder resist layer disposed on the stacking unit, and an outer pad of a plurality of (four) pairs, which are selectively electrically connected to each other. The isolation layer is located on the solder resist layer of the outer soldering unit and is made of a material whose self-glass transition temperature is smaller than that of the thief, and includes a louver that should be exposed to the top surface of the outer cymbal, and the top surface of the isolation layer The height of the blame is greater than two degrees of the top surface of the outer raft. Another object of the present invention is to provide a package structure having an isolation layer substrate resistant to metal ion migration. 201029126 Thus, a package structure of an isolation substrate having metal ion migration prevention comprises a circuit substrate, an integrated circuit, a plurality of electrical connections, and an encapsulant. The circuit substrate comprises a plurality of layer units stacked in sequence, an outer solder unit and an isolation layer, each of the layer units having an insulating layer and a connecting line disposed on the insulating layer and the connecting lines are selectively Electrically connected to each other, the outer soldering unit has a solder resist layer disposed on the stacking unit, and a plurality of outer turns spaced apart from each other, and each outer turn is selectively electrically connected to the connecting lines. The isolation layer is located on the solder resist layer of the outer soldering unit and is made of a material whose self-glass transition temperature is not less than 150 ° C, and has a plurality of open windows corresponding to the exposed top surfaces of the outer pads, and the top surface of the isolation layer The height is always greater than the height of the top surface of the outer pads. The integrated circuit has a predetermined electrical function. The electrical connectors secure the integrated circuit and the outer pads and electrically connect the integrated circuit to the outer pads. The encapsulant is disposed between the isolation layer and the integrated circuit for fixing the circuit substrate to the integrated circuit. The effect of the invention is to provide an isolation layer made of a material having a glass transition temperature of not less than 15 (TC) on the circuit substrate, so that when the integrated circuit and the circuit substrate are combined to perform their functional operation, the material itself is low. In the self-glass transition temperature, it is in a frozen state, such as glass, and has a small free volume, thereby preventing metal ion electromigration, effectively preventing the failure of the operation function of the accumulation circuit, and even improving the circuit substrate. The yield of the package structure is constructed. 5 201029126 [Embodiment] The foregoing and other technical contents, features and effects of the present invention will be clearly described in the following detailed description of a preferred embodiment with reference to the drawings. Before the present invention is described in detail, it is to be noted that in the following description, similar elements are denoted by the same reference numerals. Referring to FIG. 3, the present invention has a separator substrate with ten metal ion migration. The preferred embodiment comprises a plurality of stacked units 2, an externally welded unit 3 and an isolating layer 4 stacked in sequence. Each of the stacking units 2 includes an insulating layer 21 and a connecting line 22 disposed on the insulating layer 21, and the connecting lines 22 are selectively electrically connected to each other. The outer soldering unit 3 includes a layer disposed on the stack. The solder resist layer 31 on the unit 2 is connected to a plurality of outer pads 32 spaced apart from each other, and each outer pad 32 is selectively electrically connected to the connecting lines 22. The isolation layer 4 is located at the outer soldering unit 3 for solder resisting. The layer 31 is made of a material having a glass transition temperature of not less than 15 (rc), a high temperature resistant chemical resistant polymer material such as polymide, and a plurality of corresponding outer surfaces of the outer pads 32 are exposed. The opening f 41, and the height of the top surface of the isolation layer 4 is always greater than the height of the top surface of the outer pad 32. Preferably, the distance between the top surface of the isolation layer 4 and the top surface of the any outer layer 32 is not less than By the characteristics of the material constituting the separation layer 4, it is in a frozen state such as glass when it is lower than the glass transition temperature, and has a small free volume and a sufficient thickness (ie, the top surface of the isolation layer 4 and any of the outer layers) The distance from the top surface of the pad 32) can block the 201029126 blockage of the two adjacent The electromigration phenomenon of metal ions such as copper ions between μ, and thus effectively achieves the failure of components or circuits. '4) Figure 4' (4) The preferred embodiment of the isolation substrate having metal ion migration resistance can be further combined with The body circuit 5, the plurality of electrical connectors 6 and an encapsulant 7 are packaged into a package structure. The structure of the substrate has been described above and will not be repeated here. The integrated circuit 5 includes a predetermined electrical function. The isoelectric connector 6 consolidates the integrated circuit 5 and the outer pads, and electrically connects the integrated circuit 5 to the outer casings 32. The electrical connectors 6 are of various types, such as conductive bumps. Bumps, solder balls (10) such as ba(1), etc., are illustrated with conductive bumps; as these techniques are well known in the art and are not the focus of the present invention, they will not be described in detail herein. The encapsulant 7 ′ is disposed between the isolation layer 4 and the integrated circuit 5 for fixing the circuit substrate to the integrated circuit 5; preferably, the encapsulant 7 covers the integrated circuit 5 . The waste heat generated when the integrated circuit 5 operates may cause the integrated body to be increased, and the temperature of the electrical connector 6 and the circuit substrate is increased, thereby allowing the outer pad 32 and the outer pad 32 to be The electromigration phenomenon of metal ions is generated between the outer pad 32 and the electrical connector 6, and at the same time, since the constituent material of the solder resist layer 31 closest to the integrated circuit 5 is large in free volume and insufficient in thickness, The electromigration of the metal ions is prevented from causing a bridge between the outer pads 32 and the electrical connectors 6 to be generated, and therefore, the properties of the material constituting the spacer layer 4 are lower than the glass transition temperature. In a frozen state, such as glassy, with a very small free volume, and a sufficient thickness 7 201029126 top surface distance), the resistor 32 and the electrical connector 6 can be effectively eliminated (and the top surface of the isolation layer 4 Any of the outer pads 32 may be electrically transferred between the two adjacent outer pads 32 or metal ions such as copper ions between the outer pads, and the integrated circuit fails to function to improve the yield of the electronic components.
種以自身破璃轉換温 度不小於15G°C的材料構成的隔離層，而可防止金屬離子產 生電遷移現象的基板，使得t積體電路與該電路基板結合 執行其功能運作時，藉著構成隔離層材料本身在低於自身 玻璃轉換溫度時呈凍結狀態如玻璃狀，而具有極小的自由 體積，進而可防止金屬離子的電遷移現象，有效達到杜絕 該積體電路運作功能失效的情形發生，確實改善目前的電 路基板，其位於最臨靠近連結之積體電路的阻焊層，因為 構成材料的自由髏積較大、厚度較薄，而在執行其功能運 作時，會出現金屬離子的電遷移現象而導致電路失效的問 題’故確實能達成本發明之目的。 惟以上所述者，僅為本發明之較佳實施例而已，當不 旎以此限定本發明實施之範圍，即大凡依本發明申請專利 範圍及發明說明内容所作之簡單的等效變化與修飾，皆仍 屬本發明專利涵蓋之範圍内。 【圖式簡單說明】 圖1是習知一電路基板的一剖視示意圖，說明習知之 電路基板； 圖2是該電路基板的一局部剖視圖，說明該電路基板 構成的封裝結構； 201029126 圖3是本發明具有防金屬離子遷移之隔離層基板之一 較佳實施例的一剖視示意圖；及 圖4是該較佳實施例的一局部剖視圖，說明該具有防 金屬離子遷移之隔離層基板構成的封裝結構； 201029126 【主要元件符號說明】 2 * *« …疊層單元 4 . .....隔離層 21…… …絕緣層 41…. —>開窗 22…… …連接線路 5…… •-…積體電路 ♦ a; * s< ♦ « ♦ …外焊單元 6 - •…電連接件 3 1…… …阻焊層 7 “" …··封裝膠體 * * * 夕卜a substrate made of a material having a self-breaking glass transition temperature of not less than 15 G ° C, and a substrate capable of preventing electromigration of metal ions, so that the t-stack circuit and the circuit substrate are combined to perform their functional operations, by constitution The material of the isolating layer itself is in a frozen state such as glass when it is lower than its own glass transition temperature, and has a small free volume, thereby preventing the electromigration of metal ions, and effectively preventing the failure of the operation function of the integrated circuit. It does improve the current circuit substrate, which is located at the solder resist layer closest to the connected integrated circuit. Because of the large free accumulation of the constituent materials and the thin thickness, metal ions can be generated when performing its functional operation. The problem of migration failure leads to circuit failure, so it is indeed possible to achieve the object of the present invention. However, the above is only the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, that is, the simple equivalent changes and modifications made by the scope of the invention and the description of the invention. All remain within the scope of the invention patent. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic cross-sectional view of a conventional circuit substrate illustrating a conventional circuit substrate; FIG. 2 is a partial cross-sectional view of the circuit substrate illustrating a package structure of the circuit substrate; 201029126 FIG. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 4 is a cross-sectional view showing a preferred embodiment of a separator substrate having metal ion migration prevention; and FIG. 4 is a partial cross-sectional view of the preferred embodiment, illustrating the structure of the separator substrate having metal ion migration resistance. Package structure; 201029126 [Description of main component symbols] 2 * *« ... laminated unit 4 ... .... isolation layer 21 ... ... insulating layer 41.... -> opening window 22 ... ... connecting line 5 ... •-...Integrated circuit ♦ a; * s< ♦ « ♦ ...external welding unit 6 - •...electrical connector 3 1...... ...soldering layer 7 "" ...··Package colloid* * * 夕卜
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