201025250 >« 六、發明說明： 【發明所屬之技術領威】 本發明相關於一種顯示器及相關驅動方法，尤指一種可 主動調整驅動電壓之顯示器及相關驅動方法。 【先前技術】 由於液晶顯示器（liquid crystal display)具有低輻射、體 積小及低耗能等優點，已逐漸取代傳統的陰極射線管顯示器 (cathode ray tube display)，因而被廣泛地應用在筆記型電 腦、個人數位助理（personal digital assistant，PDA)、平面電 視，或行動電話等資訊產品上。傳統液晶顯示器之方式是利 用外部驅動晶片來驅動面板上的晝素以顯示影像，但為了減 少元件數目並降低製造成本，近年來逐漸發展成將驅動電路 結構直接製作於顯示面板上，例如將閘級驅動電路（gate 春driver)整合於液晶面板（Gate on Array，GOA)之技術。 請參考第1圖’第1圖為先前技術中一液晶顯示器100 之示意圖。如第1圖所示’液晶顯示器1〇0包含一液晶顯示 面板110 ’ 一源極驅動電路120 ’以及一閘極驅動電路130。 液晶顯示器1 〇〇之液晶顯示面板η 〇上設有複數個呈陣列狀 排列的畫素ΡΧ、複數條資料線Eh-Dm，以及複數條閘極線 Gi-Gn。源極驅動電路120用來驅動資料線Dl〜Dm，而閘 201025250 =電路13。可提供輪出電…-分別驅動閘極線 咕參考第2圖。第2 ®為描述液晶顯㈣操作特性之二 意圖。在第2圖中，縱軸代表閘極驅動電路可正常不 的最小輸出電壓（伏特），橫軸代表使用時間（小時），= 顯示器之操作溫度為攝氏85度’曲線A代表正閘極電：日 籲vgh=iiv且負閘極電壓Vgl_nv時的特性曲線，曲線 表正間極電壓Vgh，V且負閘極電壓V.-11V時的特性曲 線。、由於正常操作閘極驅動電路之最小輸出電壓會隨操作時 間增加而逐漸變大，參見第2圖之曲線A，在正閘極電壓 Vgh=llv的操作條件下，液晶顯示器在使用超過約250小時 後’能夠正常操作閘極驅動電路之最小輪出電壓會超出此條 件的理想閘極電壓（Vgh=llV)，容易造成操作異常；如第2、 參圖之曲線B所示，在正閘極電壓Vgh=20V的操作條件下， 液晶顯示器即使在使用約8〇〇小時後，最小輸出電壓仍然維 持在理想的電壓範圍内。因此，提高正閘極電壓Vgh能夠有 效地拉長面板的使用時間。 請參考第3圖’第3圖之圖表說明了液晶顯示器在不同 操作條件下之功率消耗。在第3圖中，T_stress代表施加偏 壓的時間長短，unstress代表尚未施加偏壓。Vgh和Vgl分 別代表正閘極電壓與負閘極電壓（V)，Ih和II分別代表施 201025250 加正閘極電壓Vgh和施加負閘極電壓Vg時之電流（mA)， Ph和P1分別代表施加正閘極電壓Vgh和施加負閘極電壓Vg 時之功率消耗（mW)，而P_sum代表總功率消耗（mW)。 在T_stress相同的條件下比較總功率消耗P_sum，亦即比較 條件一和條件二或比較條件三和條件四，可得知總功率消耗 P_sum和正閘極電壓Vgh成正比。因此，提高正閘極電壓 Vgh雖然能拉長使用時間，卻同時增加面板的功率消耗。 φ 【發明内容】 本發明提供一種可主動調整驅動電壓之顯示器，包含一 顯示面板，用來依據複數組閘極輸出電壓和一共同電壓來開 啟晝素以顯示影像；一閘極驅動電路，用來依據一閘極輸入 -訊號來提供該複數組閘極輸出電壓；一電壓選擇器，耦接於 該閘極驅動電路以接收該複數組閘極輸出電壓中之一第η級 閘極輸出電壓，該電壓選擇器能提供複數個相異之正閘極電 ® 壓和複數個相異之共同電壓，並能依據一參考電壓和該第η 級閘極輸出電壓之間的關係，從該複數個正閘極電壓中選取 一相對應之正閘極電壓以做為一輸出正閘極電壓，以及從該 複數組相異之共同電壓中選取一相對應之共同電壓以做為 該共同電壓；一時序控制器，用來產生一時脈訊號；以及一 電壓產生器，用來產生一負閘極電壓。 本發明另提供一種應用於顯示面板之電壓補償電路，包 201025250 含一閘極驅動電路，用以產生複數組閘極輸出電壓至一晝素 陣列；一電壓選擇器，耦接於該閘極驅動電路以接收複數組 閘極輸出電壓中之一第η級閘極輸出電壓，該電壓選擇器能 提供複數組相異之正閘極電壓和複數組相異之共同電壓，並 能依據一參考電壓和該第η級閘極輸出電壓之間的關係，從 該複數組正閘極電壓中選取一相對應之正閘極電壓以做為 一輸出正閘極電壓，以及從該複數組相異之共同電壓中選取 @ 一相對應之共同電壓以做為該共同電壓；一時序控制器，用 來產生一時脈訊號；以及一電壓產生器，用來產生一負閘極 電壓。 本發明另提供一種驅動顯示面板之方法，包含提供複數 個閘極輸出電壓中之一第η級閘極輸出電壓；比較一參考電 壓和該第η級閘極輸出電壓之間的電位高低；當該第η級閘 極輸出電壓大於該參考電壓時，選取複數組正閘極電壓中一 ®相對應之第一正閘極電壓以做為一輸出正閘極電壓，以及選 取複數組相異之共同電壓中一相對應之第一共同電壓以做 為一輸出共同電壓；以及當該第η級閘極輸出電壓不大於該 參考電壓時，選取該複數個正閘極電壓中大於該第一正閘極 電壓之一第二正閘極電壓以做為該輸出正閘極電壓’以及選 取該複數個共同電壓中小於該第一共同電壓之一第二共同 電壓以做為該輸出共同電壓。 201025250 【實施方式】 請再次參考第3圖，在偏壓相同的條件下比較總功率消 耗P_sum，亦即比較條件一和條件三或比較條件二和條件 四，可得知總功率消耗P_sum和施加偏壓的時間T_stress成 反比。當T_stress超過一個特定值（例如5〇〇小時）後，在 相同偏壓的條件下’總功率消耗p—suni約降為unstress時之 一半（例如從115mV降至46.2mV或從202.9mV降至 ❹111.7mV )。本發明即利用此面板特性，在起始時以較低正閘 極電壓Vgh來驅動面板，以節省功率消耗；當使用時間超過 一預定值時，再以較高正閘極電壓Vgh來驅動面板，提升面 板的使用壽命’同時亦不會大幅增加功率消耗。 由於饋通穿透效應（feed-through)的作用，顯示面板 的共同電壓（common voltage) Vcom亦會隨著正閘極電壓 Vgh之值而改變。請參考第4圖，第4圖說明了共同電壓、 參正閘極電壓Vgh和施加偏壓的時間T_stress之間的關係。如 第4圖所示，Vcom代表當unstress時之共同電壓，共同電 壓Vcom和正閘極電壓Vgh成反比；Vc〇m，代表當τ— 大於一個特定值（例如500小時）時之共同電壓，共同電壓 Vcom’和正閘極電壓¥§11亦成反比。同時，當τ—超過 一個特定值（例如500小時）時，正閘極電壓Vgh需大於一 個特定值（例如15V)才能正常地操作顯示面板。在正閘極 電壓vgh相同的條件下比較共同電壓之值，亦即比較Vc〇m 201025250 和Vcom’，可得知Vcom和vcom，之間差異不大。換而言之， 施加偏壓的時間T一stress對共同電壓影響並不大，因此本發 明僅需考慮正閘極電壓Vgh對共同電壓的影響：在起始時以 較低正閘極電壓Vgh和較高共同電壓vcom來驅動面板，以 節省功率消耗；當使用時間超過一個預定值時，再以較高正 閘極電壓Vgh和較低共同電壓Vcoin來驅動面板，提升面板 的使用壽命，同時亦不會大幅增加功率消耗，或是改變顯示 |面板的特性。 醫 請參考第5圖’第5圖為本發明中液晶顯示器5〇〇之示 意圖。液晶顯示器500包含液晶顯示面板51〇，源極驅動電 路520，閘極驅動電路530 ’以及閘極補償電路54〇。液晶顯 示面板510上設有複數個呈陣列狀排列的畫素ρχ、複數條 資料線Di-Dm’以及複數條閘極線Gi〜Gn。液晶顯示器5〇〇 之源極驅動電路520。閘極驅動電路53〇係依據閘極輸入訊 ®號Si來運作，閘極輸入訊號Si包含電壓訊號Vss、起始脈 衝(start pulse)訊號Vst、時脈訊號Vck，以及反向時脈訊號 Vxck等。依據閘極輸入訊號Si，閘極驅動電路53〇能以相 對應之正閘極電壓vgh和負閘極電壓Vgl來驅動閘極線Gi 〜Gn ’此時閘極驅動電路530之輸出電壓分別由％〜％來 表示。閘極補償電路540可提供閘極輸入訊號si給閘極驅 動電路530以及提供閘極共同電壓Ve〇m至液晶顯示面板 510，並依據閘極驅動電路530之輸出電壓來修正閘極輸入 201025250 訊號Si和共同電壓Vcom之值，因此能以最佳偏壓來驅動液 晶顯不面板510。 當液晶顯示器500剛開始運作時，閘極驅動電路530係 以預定正閘極電壓Vghl和預定負閘極電壓Vgl來驅動閘極 線G1〜Gn。由於閘極驅動電路530之第η級輸出位於訊號 傳遞路徑的末端，其輸出電壓通常最早開始不符合操作條 ©件，因此本發明可依據閘極驅動電路530之第η級輸出電壓 Vn來判斷液晶顯示器500在此種偏壓條件下是否能正常運 作。舉例來說，若液晶顯示器500正常運作的條件下，閘極 驅動電路530之每一級輸出電壓皆需大於參考電壓Vref，本 發明之閘極補償電路540會判斷第η級輸出電壓Vn是否大 於參考電壓Vref :若第η級輸出電壓Vn大於參考電壓Vref， 在絕大部分的情況下閘極驅動電路530之其它級之輸出電壓 也會大於參考電壓Vref，此時會以預定偏壓條件下之正閘極 ®電壓Vghl、負閘極電壓Vgl和共同電壓Vcoml來驅動液晶 顯示面板510。當液晶顯示器500使用超過一定時間後，其 特性可能會衰退，此時若繼續以預定偏壓條件來驅動液晶顯 示面板510，則可能無法達到預定的顯示品質。因此，若第 η級輸出電壓Vn不大於參考電壓Vref，閘極補償電路540會 提供相對應閘極輸入訊號Si，如此才能以較佳偏壓條件下之 正閘極電壓Vgh2、負閘極電壓Vgl和共同電壓Vcom2來驅 動液晶顯示面板510。換而言之，閘極補償電路540能夠依 201025250 據閘極驅動電路530之輸出電壓來主動補償閘極輸入電壓 Si，如此閘極驅動電路530能以相斜應之正閘極電壓Vgh來 驅動閘極線G1〜Gn，以及提供相對應之共同電壓Vc〇m至 液晶顯示面板510。 如第2圖〜第4圖所示，前迷實施例中Vgh2〉Vghl而 Vc〇m2<VC〇in卜亦即當液晶顯示器5〇〇的顯示品質達不到 ❻預定標準時，本發明以較高正閘極電壓Vgh和較低共同電壓 Vcom來驅動面板以提升面板的使用壽命，同時亦不會大幅 增加功率消耗。 請參考第6圖，第6圖為閘極補償電路54〇之功能方塊 圖。閘極補償電路540包含電壓選擇器汐〇丨如狀此1沉^^)5〇、 時序控制器（timing controller)52、電壓產生器（voltage generat〇r)54，以及電壓準位轉移器（levelsMfter)56。電壓選 ®擇器50耦接於閘極驅動電路530和液晶顯示面板51〇，可依 據閘極驅動電路530之輸出電壓^^來提供相對應之正閘極 電壓Vgh和共同電壓Vcom。時序控制器52可提供閘極驅 動電路530運作所需之邏輯訊號Se，而電壓產生器54可提 供負閑極電壓Vgi。電壓準位轉移器56耦接於電壓選擇器 50、時序控制器52、電壓產生器54和閘極驅動電路53〇， 可依據邏輯訊號Sc、正閘極電壓Vgh、和負閘極電壓Vgl 來提供閘極輸入訊號Si，使得間極驅動電路53〇能夠依據包 11 201025250 含閘極輸入訊號^内之電壓訊號Vss、起始脈衝訊號Vst、 時脈訊號Vck，以及反向時脈訊號Vxck等來運作。 請參考第7圖’第7圖為本發明第一實施例中電壓選擇 器50之功能方塊圖。第一實施例之電壓選擇器50包含比較 器 58、類比數位轉換器（Analog to Digital Converter，ADC) 60、計數器62，電壓輸出電路64。比較器58耦接於閑極驅 ❹動電路530’用來比較參考電壓Vref和輸出電壓Vn之電位高 低：若輸出電壓Vn大於參考電壓Vref，比較器58會輸出高 電位類比訊號Va ;若輸出電壓乂„不大於參考電壓Vref，比 較器58會輸出低電位類比訊號Va。類比數位轉換器60麵接 於比較器58，可將類比訊號乂3轉換為數位訊號Vd :若接收 到高電位類比訊號Va，類比數位轉換器60會輸出具邏輯j 電位之數位訊號Vd ;若接收到低電位類比訊號Va，類比數 位轉換器60會輸出具邏輯0電位之數位訊號Vd。計數器62 ® 耦接於類比數位轉換器60，可依據數位訊號Vd產生輸出計 數值Co。電壓輸出電路64包含控制電路66和多工器 MUX1、MUX2，控制電路66耦接於計數器62，可比較輪出 計數值Co和參考計數值Ct的大小並輸出相對應之控制訊號 Vt，多工器MUX1和MUX2則可依據控制訊號Vt輸出相對 應之正閘極電壓和輸出共同電壓。舉例來說，若輸出計數值 Co大於參考計數值Ct，多工器MUX1會輸出正閘極電璧 Vghl (例如11V)至電壓準位轉移器56，以及輸出共同電 12 201025250 壓Vcoml (例如3.89V)至液晶顯示面板510 ;若輸出計數 值Co不大於參考計數值Ct，多工器MUX1會輸出正閘極電 壓Vgh2 (例如20V)至電壓準位轉移器56，以及輸出共同 電壓Vcom2 (例如3.29V)至液晶顯示面板510。 請參考第8圖，第8圖為本發明第一實施例之電壓選擇 器50在運作時之時序圖。第8圖顯示了輸出電壓Vn、數位 ▲訊號Vd、正閘極電壓Vgh和共同電壓Vcom之波形。當輸 攀 出電壓vn之值大於參考電壓Vref時，計數器62開始計數， 直到輸出電壓Vn之值低於參考電壓Vref為止，計算出之輸 出計數值分別由CQl、Cu、（：。3，…等來表示。在第8圖的實 施例中，前三筆輸出電壓Vnl〜Vn3高於參考電壓Vref之時間 分別對應於輸出計數值，其中輸出計數值（:“和Cq3 大於參考計數值Ct，而輸出計數值Cq2小於參考計數值Ct。 由於CQl> Ct，此時仍會以對應於輸出電壓Vnl之正閘極電壓 ® Vghl和共同電壓Vcoml來驅動液晶顯示器。之後，輸出電 壓Vn2之波形偏離理想值，使得CQ2<Ct，此時本發明會選擇 較佳之正閘極電壓Vgh2和共同電壓Vcom2來驅動液晶顯示 器。在使用較佳驅動電壓後，輸出電壓Vn3之波形回復正常’ 因此CQ3>Ct，此時本發明會繼續使用正閘極電壓Vgh2和共 同電壓Vcom2來驅動液晶顯示器。 請參考第9圖，第9圖為本發明第二實施例中電壓選擇 13 201025250 · . 器50之功能方塊圖。第二實施例和第一實施例類似，不同 之處在於第7圖中之第一實施例能提供Vghl/Vgl/Vcoml和 Vgh2/Vgl/Vcom2兩組不同偏壓條件，而第9圖中之第二實 施例則能提供Vghl/Vgl/Vcoml〜Vghn/Vgl/Vcomn等η組不 同偏壓條件。在第二實施例中，電壓輸出電路64之控制電 路66同樣將輸出計數值Co和參考計數值Ct做比較，並輸 出相對應之控制訊號Vt，多工器MUX1和MUX2則可依據 φ控制訊號Vt輸出相對應之正閘極電壓和輸出共同電壓。舉 例來說，若輸出計數值Co大於參考計數值Ct，多工器MUX1 會輸出正閘極電壓Vghl (例如11V)至電壓準位轉移器56， 以及輸出共同電壓Vcoml (例如3.89V)至液晶顯示面板 510;在輸出計數值Co開始不大於參考計數值Ct時，多工 器MUX1首先會輸出正閘極電壓vgh2 (例如13V)至電壓 準位轉移器56,而多工器MUX2首先會輸出共同電壓Vcom2 ❿（例如3.72V )至液晶顯示面板51 〇，再判斷此驅動條件是 否已經足夠。若以正閘極電壓Vgh2和輸出共同電壓Vcom2 來驅動仍無法讓輸出電壓Vn大於參考電壓Vref，輸出計數值 Co依舊不大於參考計數值（^時，此時多工器MUX1會輸出 正閘極電壓Vgh3 (例如15V)至電壓準位轉移器56，而多 工器MUX2會輸出共同電壓vcom3 (例如3.53V)至液晶顯 不面板510 ;若以正閘極電壓¥抑2和輸出共同電壓vcom2 來驅動時輸出電壓Vn大於參考電壓vref，此時電壓選擇器 50會繼續提供此偏壓條件，並定期執行前述判斷步驟。在以 201025250 正閘極電壓Vgh3和輸出共同電壓Vcom3來驅動的情形下， 若輸出電壓Vn再度低於參考電壓Vref，此時會再次變更偏壓 條件，多工器MUX1輸出正閘極電壓Vgh4 (例如20V)至 電壓準位轉移器56，而多工器MUX2輸出共同電壓Vcom4 (例如3.29V)至液晶顯示面板510。換而言之，本發明第 二實施例可依據輸出電壓Vni值逐步改變偏壓之值，而非 一次大幅改變偏壓值。 參 請參考第10圖，第10圖為本發明第二實施例之電壓選 擇器50在運作時之時序圖。第10圖顯示了輸出電壓vn、數 位訊號Vd、正閘極電壓Vgh和共同電壓Vcom之波形。當 輸出電壓Vn之值大於參考電壓Vref時，計數器62開始計數’ 直到輸出電壓Vn之值低於參考電壓Vref為止’計算出之輸 出計數值分別由Col、Co2、Co3、Co4，…等來表示。在第10 圖的實施例中，前四筆輸出電壓νη1〜vn4高於參考電壓vref ®之時間分別對應於輸出計數值Col〜Co4,其中輸出計數值Col 和Cq4大於參考計數值Ct，而輸出計數值c〇2和co3小於參 考計數值ct。由於Col>Ct，此時仍會以對應於輸出電壓vnl 之正閘極電壓Vghl和共同電壓Vcoml來驅動液晶顯示器。 之後，輸出電壓Vn2之波形偏離理想值，使得CQ2<Ct ’此時 本發明會選擇較佳之正閘極電壓Vgh2和共同電壓Vcom2來 驅動液晶顯示器。在使用正閘極電壓Vgh2和共同電壓 Vcom2後，輸出電壓Vn3之波形仍偏離理想值，因此Co3<Ct， 15 201025250 此時本發明會再次選擇較佳之正閘極電壓Vgh3和共同電壓 Vcom3來驅動液晶顯示器。在使用正閘極電壓Vgh3和共同 電壓Vcom3後，輸出電壓Vn4之波形回復正常，因此Co4> Ct，此時本發明會繼續使用正閘極電壓Vgh3和共同電壓 Vcom3來驅動液晶顯示器。 請參考第11圖，第11圖為本發明電壓選擇器50運作 A時之流程圖。第11圖之流程圖包含下列步驟： ❹ 步驟910:提供複數組正閘極電壓與複數組共同電壓 中； 步驟920 :輸出複數組正閘極電壓中一預定正閘極電壓 與一複數組共同電壓中一預定共同電壓； 步驟930 :接收一閘極輸出電壓Vn ; 步驟940 :判斷閘極輸出電壓Vn是否大於一參考電壓 ⑩ Vref;若閘極輸出電壓Vn大於參考電壓Vref， 執行步驟960 ;若閘極輸出電壓Vn不大於參 考電壓Vref，執行步驟950 ; 步驟950 :輸出複數組正閘極電壓中另一相對應之正閘 極電壓與一複數組共同電壓中另一相對應之 共同電壓；執行步驟930; 步驟960 :輸出對應於閘極輸出電壓Vn之正閘極電壓和 共同電壓；執行步驟930。 16 201025250 請參考第12圖，第12圖為本發明另一實施例中液晶顯 不器550之示意圖。液晶顯示器550包含液晶顯示面板51〇, 源極驅動電路520，兩閘極驅動電路531和532，以及閘極 補償電路540。液晶顯示器550和液晶顯示器5〇〇類似，不 同之處在於液晶顯示器550採用雙邊驅動的架構，亦即將閘 極驅動電路531和532分別設置於液晶顯示面板51〇的兩 _側。閘極驅動電路531和532皆依據閘極輸入訊號Si來運 作，其輸出電壓分別由VU〜Vln* Vrl〜Vrn來表示。本發 明之液晶顯示器550同時依據閘極驅動電路531和532之第 11級輪出電壓Vln和Vrn來判斷在預定偏壓條件下是否能正 運作。舉例來說，若第n級輸出電壓Vln和Vrn其中之一 =大於參考電壓Vref，閘極補償電路54〇會提供相對應閘極 ，入巩號Si以同時改變閘極驅動電路531和532之驅動 •件。 〜 打如前所述，本發明可選擇位於訊號傳遞路徑的末端之第 電2出電壓％來做為判斷條件’同時亦可依據其它級輪出 ®來判斷液晶顯示器是否能正常運作。第 明的2 龍為本㈣之㈣例，衫限定本發 Μ上所述僅為本㈣讀佳實闕，凡依本發明申請專 17 201025250 利範圍所做之均等變化與修飾，皆應屬本發明之涵蓋範圍。 【圖式簡單說明】 第1圖為先前技術中一液晶顯示器之示意圖。 第2圖為液晶顯示器操作特性之示意圖。 第3圖為說明液晶顯示器在不同操作條件下所消耗功率之圖 表。 I第4圖為說明液晶顯示器施加偏壓之大小和時間對應關係之 圖表。 第5圖為本發明中一液晶顯示器之示意圖。 第6圖為本發明閘極補償電路之功能方塊圖。 第7圖為本發明第一實施例中電壓選擇器之功能方塊圖。 第8圖為本發明第一實施例之電壓選擇器運作時之時序圖。 第9圖為本發明第二實施例中電壓選擇器之功能方塊圖。 第10圖為本發明第二實施例之電壓選擇器運作時之時序圖。 ® 第11圖為本發明電壓選擇器運作時之流程圖。 第12圖為本發明另一實施例中一液晶顯示器之示意圖。 【主要元件符號說明】 50 電壓選擇器 52 時序控制器 54 電壓產生器 56 電壓準位轉移器 58 比較器 60 ADC 62 計數器 64 電壓輸出電路 18 201025250 66 控制電路201025250 >« VI. Description of the Invention: [Technology Leading to the Invention] The present invention relates to a display and related driving method, and more particularly to a display and an associated driving method capable of actively adjusting a driving voltage. [Prior Art] Because liquid crystal display has the advantages of low radiation, small size and low energy consumption, it has gradually replaced the traditional cathode ray tube display, and thus is widely used in notebook computers. , personal digital assistant (PDA), flat-screen TV, or mobile phone and other information products. The conventional liquid crystal display adopts an external driving chip to drive the pixels on the panel to display images, but in order to reduce the number of components and reduce the manufacturing cost, in recent years, the driving circuit structure has been developed directly on the display panel, for example, the gate is The level driver circuit (gate spring driver) is integrated into the technology of the liquid crystal panel (Gate on Array, GOA). Please refer to Fig. 1 which is a schematic view of a liquid crystal display 100 in the prior art. As shown in Fig. 1, the liquid crystal display 110 includes a liquid crystal display panel 110', a source driving circuit 120', and a gate driving circuit 130. The liquid crystal display panel 1 has a plurality of pixels arranged in an array, a plurality of data lines Eh-Dm, and a plurality of gate lines Gi-Gn. The source driving circuit 120 is used to drive the data lines D1 to Dm, and the gate 201025250 = the circuit 13. Wheel power can be supplied...-drive the gate line separately 咕 Refer to Figure 2. The 2nd ® is intended to describe the operational characteristics of the liquid crystal display (4). In Figure 2, the vertical axis represents the minimum output voltage (volts) that the gate drive circuit can not normally, the horizontal axis represents the usage time (hours), and the display operating temperature is 85 degrees Celsius. Curve A represents positive gate power. : The characteristic curve of the time vgh=iiv and the negative gate voltage Vgl_nv, the characteristic curve when the curve shows the positive inter-pole voltage Vgh, V and the negative gate voltage V.-11V. Since the minimum output voltage of the normal operation gate drive circuit will gradually increase with the increase of the operation time, see curve A of Fig. 2, under the operating condition of positive gate voltage Vgh=llv, the liquid crystal display is used more than about 250. After an hour, the minimum turn-off voltage of the gate drive circuit that can operate normally exceeds the ideal gate voltage (Vgh=llV) of this condition, which is likely to cause abnormal operation; as shown in curve 2 of Figure 2, at the positive gate Under the operating conditions of the pole voltage Vgh=20V, the minimum output voltage of the liquid crystal display remains within the ideal voltage range even after about 8 hours of use. Therefore, increasing the positive gate voltage Vgh can effectively lengthen the use time of the panel. Please refer to Figure 3 on page 3 for a diagram illustrating the power consumption of the LCD display under different operating conditions. In Fig. 3, T_stress represents the length of time during which the bias is applied, and unstress represents that no bias has been applied. Vgh and Vgl represent the positive gate voltage and the negative gate voltage (V), respectively, and Ih and II represent the current of the 201025250 plus positive gate voltage Vgh and the current (mA) when the negative gate voltage Vg is applied, respectively, Ph and P1 represent The positive gate voltage Vgh and the power consumption (mW) when the negative gate voltage Vg is applied, and P_sum represents the total power consumption (mW). Comparing the total power consumption P_sum under the same conditions of T_stress, that is, comparing condition 1 and condition 2 or comparing condition 3 and condition 4, it can be known that the total power consumption P_sum is proportional to the positive gate voltage Vgh. Therefore, increasing the positive gate voltage Vgh can increase the use time while increasing the power consumption of the panel. Φ [Invention] The present invention provides a display capable of actively adjusting a driving voltage, comprising a display panel for turning on a pixel to display an image according to a complex array gate output voltage and a common voltage; a gate driving circuit for The multi-gate gate output voltage is provided according to a gate input-signal; a voltage selector coupled to the gate drive circuit to receive one of the n-th gate output voltages of the complex array gate output voltage The voltage selector can provide a plurality of different positive gate voltages and a plurality of different common voltages, and can be based on a relationship between a reference voltage and the output voltage of the ηth gate, from the complex number Selecting a corresponding positive gate voltage from the positive gate voltage as an output positive gate voltage, and selecting a corresponding common voltage from the common voltages of the complex array as the common voltage; a timing controller for generating a clock signal; and a voltage generator for generating a negative gate voltage. The invention further provides a voltage compensation circuit applied to a display panel, the package 201025250 includes a gate drive circuit for generating a complex array gate output voltage to a pixel array; a voltage selector coupled to the gate drive The circuit receives one of the n-th gate output voltages of the complex array gate output voltage, and the voltage selector can provide a common voltage of the complex gate different positive gate voltage and the complex array, and can be based on a reference voltage And a relationship between the output voltage of the nth gate and a positive gate voltage from the positive gate voltage of the complex array as an output positive gate voltage, and different from the complex array In the common voltage, a common voltage of @1 is selected as the common voltage; a timing controller is used to generate a clock signal; and a voltage generator is used to generate a negative gate voltage. The present invention further provides a method for driving a display panel, comprising: providing one of a plurality of gate output voltages of an nth gate output voltage; comparing a potential between a reference voltage and the output voltage of the nth gate; When the output voltage of the nth gate is greater than the reference voltage, the first positive gate voltage corresponding to a ® of the positive gate voltage of the complex array is selected as an output positive gate voltage, and the complex array is selected to be different. a corresponding common voltage of the common voltage is used as an output common voltage; and when the output voltage of the nth stage gate is not greater than the reference voltage, selecting the plurality of positive gate voltages is greater than the first positive voltage One of the gate voltages is the second positive gate voltage as the output positive gate voltage' and one of the plurality of common voltages is selected to be less than the second common voltage of the first common voltage as the output common voltage. 201025250 [Embodiment] Please refer to Figure 3 again, compare the total power consumption P_sum under the same bias voltage, that is, compare condition 1 and condition 3 or compare condition 2 and condition 4, and know the total power consumption P_sum and application. The time of the bias voltage T_stress is inversely proportional. When T_stress exceeds a certain value (for example, 5 〇〇 hours), the total power consumption p-suni drops to about one-half of unstress under the same bias conditions (for example, from 115 mV to 46.2 mV or from 202.9 mV). ❹111.7mV). The invention utilizes the panel characteristic to drive the panel with a low positive gate voltage Vgh at the beginning to save power consumption; when the usage time exceeds a predetermined value, the panel is driven with a higher positive gate voltage Vgh. , to enhance the life of the panel 'does not significantly increase power consumption. Due to the feedthrough effect, the common voltage Vcom of the display panel also changes with the value of the positive gate voltage Vgh. Please refer to FIG. 4, which illustrates the relationship between the common voltage, the positive gate voltage Vgh, and the time T_stress applied. As shown in Fig. 4, Vcom represents the common voltage when unstressed, and the common voltage Vcom is inversely proportional to the positive gate voltage Vgh; Vc〇m represents a common voltage when τ- is greater than a specific value (for example, 500 hours). The voltage Vcom' and the positive gate voltage ¥§11 are also inversely proportional. Meanwhile, when τ - exceeds a certain value (for example, 500 hours), the positive gate voltage Vgh needs to be larger than a specific value (for example, 15 V) in order to operate the display panel normally. Comparing the values of the common voltage under the condition that the positive gate voltage vgh is the same, that is, comparing Vc〇m 201025250 and Vcom', it can be known that there is little difference between Vcom and vcom. In other words, the time T-stress applied is not significant to the common voltage, so the present invention only needs to consider the effect of the positive gate voltage Vgh on the common voltage: at the beginning with a lower positive gate voltage Vgh And a higher common voltage vcom to drive the panel to save power consumption; when the usage time exceeds a predetermined value, the panel is driven by the higher positive gate voltage Vgh and the lower common voltage Vcoin to improve the service life of the panel while It also does not significantly increase power consumption or change the characteristics of the display panel. Please refer to Fig. 5'. Fig. 5 is a schematic view of the liquid crystal display 5 of the present invention. The liquid crystal display 500 includes a liquid crystal display panel 51A, a source driving circuit 520, a gate driving circuit 530', and a gate compensation circuit 54A. The liquid crystal display panel 510 is provided with a plurality of pixels χ arranged in an array, a plurality of data lines Di-Dm', and a plurality of gate lines Gi to Gn. The source driver circuit 520 of the liquid crystal display 5 。. The gate driving circuit 53 operates according to the gate input signal Si, and the gate input signal Si includes a voltage signal Vss, a start pulse signal Vst, a clock signal Vck, and a reverse clock signal Vxck. Wait. According to the gate input signal Si, the gate driving circuit 53 can drive the gate lines Gi to Gn by the corresponding positive gate voltage vgh and the negative gate voltage Vgl. At this time, the output voltage of the gate driving circuit 530 is respectively %~%To represent. The gate compensation circuit 540 can provide the gate input signal si to the gate driving circuit 530 and the gate common voltage Ve〇m to the liquid crystal display panel 510, and correct the gate input 201025250 according to the output voltage of the gate driving circuit 530. The value of Si and the common voltage Vcom can thus drive the liquid crystal display panel 510 with an optimum bias voltage. When the liquid crystal display 500 is just starting to operate, the gate driving circuit 530 drives the gate lines G1 to Gn with a predetermined positive gate voltage Vghl and a predetermined negative gate voltage Vgl. Since the output of the nth stage of the gate driving circuit 530 is at the end of the signal transmission path, the output voltage of the gate driving circuit 530 usually does not conform to the operating strip, so the present invention can be judged according to the output voltage Vn of the nth stage of the gate driving circuit 530. Whether the liquid crystal display 500 can operate normally under such bias conditions. For example, if the output voltage of each stage of the gate driving circuit 530 needs to be greater than the reference voltage Vref under the condition that the liquid crystal display 500 is normally operated, the gate compensation circuit 540 of the present invention determines whether the output voltage Vn of the nth stage is greater than the reference. Voltage Vref: If the nth stage output voltage Vn is greater than the reference voltage Vref, in most cases, the output voltage of the other stages of the gate driving circuit 530 will be greater than the reference voltage Vref, and the predetermined bias voltage will be used. The positive gate voltage Vghl, the negative gate voltage Vgl, and the common voltage Vcom1 drive the liquid crystal display panel 510. When the liquid crystal display 500 is used for more than a certain period of time, its characteristics may be degraded, and if the liquid crystal display panel 510 is continuously driven under a predetermined bias condition, the predetermined display quality may not be achieved. Therefore, if the nth stage output voltage Vn is not greater than the reference voltage Vref, the gate compensation circuit 540 provides a corresponding gate input signal Si, so that the positive gate voltage Vgh2 and the negative gate voltage can be under a favorable bias condition. Vgl and the common voltage Vcom2 drive the liquid crystal display panel 510. In other words, the gate compensation circuit 540 can actively compensate the gate input voltage Si according to the output voltage of the gate driving circuit 530 according to 201025250, so that the gate driving circuit 530 can be driven by the positive gate voltage Vgh. The gate lines G1 to Gn and the corresponding common voltage Vc〇m are supplied to the liquid crystal display panel 510. As shown in FIG. 2 to FIG. 4, in the foregoing embodiment, Vgh2>Vghl and Vc〇m2<VC〇in, that is, when the display quality of the liquid crystal display 5〇〇 fails to reach a predetermined standard, the present invention compares The high positive gate voltage Vgh and the lower common voltage Vcom drive the panel to increase the life of the panel without significantly increasing power consumption. Please refer to Fig. 6. Fig. 6 is a functional block diagram of the gate compensation circuit 54. The gate compensation circuit 540 includes a voltage selector such as a voltage sink, a timing controller 52, a voltage generator 54, and a voltage level shifter ( levelsMfter)56. The voltage selection switch 50 is coupled to the gate driving circuit 530 and the liquid crystal display panel 51, and can provide a corresponding positive gate voltage Vgh and a common voltage Vcom according to the output voltage of the gate driving circuit 530. The timing controller 52 can provide the logic signal Se required for the gate drive circuit 530 to operate, and the voltage generator 54 can provide the negative idle voltage Vgi. The voltage level shifter 56 is coupled to the voltage selector 50, the timing controller 52, the voltage generator 54, and the gate driving circuit 53A, and can be based on the logic signal Sc, the positive gate voltage Vgh, and the negative gate voltage Vgl. The gate input signal Si is provided, so that the interpole driving circuit 53 can be based on the voltage signal Vss, the start pulse signal Vst, the clock signal Vck, and the reverse clock signal Vxck in the gate input signal ^1, 201025250. Come to work. Please refer to Fig. 7. Fig. 7 is a functional block diagram of the voltage selector 50 in the first embodiment of the present invention. The voltage selector 50 of the first embodiment includes a comparator 58, an analog to digital converter (ADC) 60, a counter 62, and a voltage output circuit 64. The comparator 58 is coupled to the idle driving circuit 530' for comparing the potential of the reference voltage Vref and the output voltage Vn: if the output voltage Vn is greater than the reference voltage Vref, the comparator 58 outputs a high potential analog signal Va; The voltage 乂„ is not greater than the reference voltage Vref, and the comparator 58 outputs a low potential analog signal Va. The analog digital converter 60 is connected to the comparator 58 to convert the analog signal 乂3 into a digital signal Vd: if a high potential analogy is received For the signal Va, the analog-to-digital converter 60 outputs a digital signal Vd having a logic j potential; if a low potential analog signal Va is received, the analog digital converter 60 outputs a digital signal Vd having a logic 0 potential. The counter 62 ® is coupled to The analog-to-digital converter 60 can generate an output count value Co according to the digital signal Vd. The voltage output circuit 64 includes a control circuit 66 and multiplexers MUX1 and MUX2, and the control circuit 66 is coupled to the counter 62 to compare the count value Co and Referring to the magnitude of the count value Ct and outputting the corresponding control signal Vt, the multiplexers MUX1 and MUX2 can output the corresponding positive gate voltage and output according to the control signal Vt. For example, if the output count value Co is greater than the reference count value Ct, the multiplexer MUX1 outputs a positive gate voltage Vghl (for example, 11V) to the voltage level shifter 56, and outputs a common power 12 201025250 pressure Vcoml ( For example, 3.89V) to the liquid crystal display panel 510; if the output count value Co is not greater than the reference count value Ct, the multiplexer MUX1 outputs a positive gate voltage Vgh2 (for example, 20V) to the voltage level shifter 56, and outputs a common voltage Vcom2. (For example, 3.29V) to the liquid crystal display panel 510. Please refer to FIG. 8 and FIG. 8 is a timing chart of the voltage selector 50 of the first embodiment of the present invention. FIG. 8 shows the output voltage Vn and the number ▲ The waveform of the signal Vd, the positive gate voltage Vgh and the common voltage Vcom. When the value of the output climbing voltage vn is greater than the reference voltage Vref, the counter 62 starts counting until the value of the output voltage Vn is lower than the reference voltage Vref, and is calculated. The output count values are respectively represented by CQ1, Cu, (:.3, ..., etc. In the embodiment of Fig. 8, the times when the first three output voltages Vn1 to Vn3 are higher than the reference voltage Vref correspond to the output count values, respectively. Where the output The value (: "and Cq3 is greater than the reference count value Ct, and the output count value Cq2 is smaller than the reference count value Ct. Since CQl> Ct, the positive gate voltage Vghl and the common voltage Vcoml corresponding to the output voltage Vnl will still be used at this time. The liquid crystal display is driven. Thereafter, the waveform of the output voltage Vn2 deviates from the ideal value such that CQ2 < Ct, at which time the present invention selects the preferred positive gate voltage Vgh2 and the common voltage Vcom2 to drive the liquid crystal display. After using the preferred driving voltage, the waveform of the output voltage Vn3 returns to normal 'so CQ3> Ct, at which time the present invention continues to use the positive gate voltage Vgh2 and the common voltage Vcom2 to drive the liquid crystal display. Please refer to FIG. 9. FIG. 9 is a functional block diagram of voltage selection 13 201025250 in the second embodiment of the present invention. The second embodiment is similar to the first embodiment except that the first embodiment in FIG. 7 can provide different bias conditions for Vghl/Vgl/Vcoml and Vgh2/Vgl/Vcom2, and FIG. 9 The second embodiment can provide n sets of different bias conditions such as Vghl/Vgl/Vcom1 to Vghn/Vgl/Vcomn. In the second embodiment, the control circuit 66 of the voltage output circuit 64 also compares the output count value Co with the reference count value Ct, and outputs a corresponding control signal Vt, and the multiplexers MUX1 and MUX2 can control the signal according to φ. The Vt output corresponds to the positive gate voltage and the output common voltage. For example, if the output count value Co is greater than the reference count value Ct, the multiplexer MUX1 outputs a positive gate voltage Vghl (eg, 11V) to the voltage level shifter 56, and outputs a common voltage Vcoml (eg, 3.89V) to the liquid crystal. The display panel 510; when the output count value Co starts not greater than the reference count value Ct, the multiplexer MUX1 first outputs a positive gate voltage vgh2 (for example, 13V) to the voltage level shifter 56, and the multiplexer MUX2 first outputs The common voltage Vcom2 ❿ (for example, 3.72V) is applied to the liquid crystal display panel 51 〇, and it is judged whether or not the driving condition is sufficient. If the output voltage Vn is greater than the reference voltage Vref by the positive gate voltage Vgh2 and the output common voltage Vcom2, the output count value Co is still not greater than the reference count value (^, when the multiplexer MUX1 outputs a positive gate The voltage Vgh3 (for example, 15V) to the voltage level shifter 56, and the multiplexer MUX2 outputs a common voltage vcom3 (for example, 3.53V) to the liquid crystal display panel 510; if the positive gate voltage is 2 and the output common voltage vcom2 When the driving voltage Vn is greater than the reference voltage vref, the voltage selector 50 continues to provide the bias condition, and periodically performs the foregoing determining step. In the case of driving with the 201025250 positive gate voltage Vgh3 and the output common voltage Vcom3 If the output voltage Vn is lower than the reference voltage Vref again, the bias condition is changed again, and the multiplexer MUX1 outputs a positive gate voltage Vgh4 (for example, 20V) to the voltage level shifter 56, and the multiplexer MUX2 outputs the common The voltage Vcom4 (for example, 3.29V) is applied to the liquid crystal display panel 510. In other words, the second embodiment of the present invention can gradually change the value of the bias voltage according to the output voltage Vni value instead of changing the bias voltage substantially once. Referring to FIG. 10, FIG. 10 is a timing chart of the voltage selector 50 in operation of the second embodiment of the present invention. FIG. 10 shows the output voltage vn, the digital signal Vd, the positive gate voltage Vgh, and the common The waveform of the voltage Vcom. When the value of the output voltage Vn is greater than the reference voltage Vref, the counter 62 starts counting ' until the value of the output voltage Vn is lower than the reference voltage Vref'. The calculated output count values are respectively Col, Co2, Co3, Co4. In the embodiment of Fig. 10, the times when the first four output voltages νη1 to vn4 are higher than the reference voltage vref® correspond to the output count values Col~Co4, respectively, wherein the output count values Col and Cq4 are larger than the reference. The value Ct is counted, and the output count values c〇2 and co3 are smaller than the reference count value ct. Since Col>Ct, the liquid crystal display is still driven at the positive gate voltage Vghl and the common voltage Vcoml corresponding to the output voltage vnl. The waveform of the output voltage Vn2 deviates from the ideal value, so that CQ2 < Ct ' At this time, the present invention selects the preferred positive gate voltage Vgh2 and the common voltage Vcom2 to drive the liquid crystal display. When using the positive gate voltage After Vgh2 and the common voltage Vcom2, the waveform of the output voltage Vn3 still deviates from the ideal value, so Co3<Ct, 15 201025250 At this time, the present invention again selects the preferred positive gate voltage Vgh3 and the common voltage Vcom3 to drive the liquid crystal display. After the gate voltage Vgh3 and the common voltage Vcom3, the waveform of the output voltage Vn4 returns to normal, so Co4> Ct, at this time, the present invention continues to use the positive gate voltage Vgh3 and the common voltage Vcom3 to drive the liquid crystal display. Please refer to FIG. 11, which is a flow chart of the operation of the voltage selector 50 of the present invention. The flowchart of FIG. 11 includes the following steps: ❹ Step 910: providing a complex array positive gate voltage and a complex array common voltage; Step 920: outputting a complex array positive gate voltage with a predetermined positive gate voltage and a complex array a predetermined common voltage in the voltage; step 930: receiving a gate output voltage Vn; step 940: determining whether the gate output voltage Vn is greater than a reference voltage 10 Vref; if the gate output voltage Vn is greater than the reference voltage Vref, performing step 960; If the gate output voltage Vn is not greater than the reference voltage Vref, step 950 is performed; Step 950: outputting another corresponding positive gate voltage of the complex array positive gate voltage and another common voltage corresponding to one of the complex array common voltages Step 930 is performed: Step 960: output a positive gate voltage and a common voltage corresponding to the gate output voltage Vn; and step 930 is performed. 16 201025250 Please refer to FIG. 12, which is a schematic diagram of a liquid crystal display 550 according to another embodiment of the present invention. The liquid crystal display 550 includes a liquid crystal display panel 51, a source driving circuit 520, two gate driving circuits 531 and 532, and a gate compensation circuit 540. The liquid crystal display 550 is similar to the liquid crystal display 5, except that the liquid crystal display 550 adopts a bilaterally driven architecture, that is, the gate driving circuits 531 and 532 are respectively disposed on the two sides of the liquid crystal display panel 51. The gate driving circuits 531 and 532 operate according to the gate input signal Si, and the output voltages thereof are represented by VU to Vln* Vrl to Vrn, respectively. The liquid crystal display 550 of the present invention simultaneously judges whether or not it can operate normally under a predetermined bias condition in accordance with the 11th-stage turn-off voltages Vln and Vrn of the gate drive circuits 531 and 532. For example, if one of the nth stage output voltages Vln and Vrn is greater than the reference voltage Vref, the gate compensation circuit 54A provides a corresponding gate, and enters the coordinate Si to simultaneously change the gate drive circuits 531 and 532. Drives and parts. ~ As described above, the present invention can select the second power-out voltage % at the end of the signal transmission path as a judgment condition ‘and can also judge whether the liquid crystal display can operate normally according to other stages of rotation. The first 2 dragons are (4) (4), and the shirts are limited to the above. (4) Read Jiashi, all the equivalent changes and modifications made according to the scope of application of the invention 17 201025250 are all The scope of the invention. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic view of a liquid crystal display in the prior art. Figure 2 is a schematic diagram of the operational characteristics of a liquid crystal display. Figure 3 is a graph illustrating the power consumed by a liquid crystal display under different operating conditions. Fig. 4 is a graph showing the correspondence between the magnitude and time of applying a bias voltage to the liquid crystal display. Figure 5 is a schematic view of a liquid crystal display of the present invention. Figure 6 is a functional block diagram of the gate compensation circuit of the present invention. Figure 7 is a functional block diagram of a voltage selector in the first embodiment of the present invention. Fig. 8 is a timing chart showing the operation of the voltage selector of the first embodiment of the present invention. Figure 9 is a functional block diagram of a voltage selector in a second embodiment of the present invention. Figure 10 is a timing chart showing the operation of the voltage selector of the second embodiment of the present invention. ® Figure 11 is a flow chart of the operation of the voltage selector of the present invention. Figure 12 is a schematic view of a liquid crystal display according to another embodiment of the present invention. [Main component symbol description] 50 Voltage selector 52 Timing controller 54 Voltage generator 56 Voltage level shifter 58 Comparator 60 ADC 62 Counter 64 Voltage output circuit 18 201025250 66 Control circuit
Di-Dm資料線 PX 晝素 MUX1、MUX2 100 、 500 110 、 510 120、520 φ 130、530〜532 540 閘極補償電路 Gi-Gn 閘極線 多工器 液晶顯不器 液晶顯不面板 源極驅動電路 閘極驅動電路 ❿ 19Di-Dm data line PX MMUX1, MUX2 100, 500 110, 510 120, 520 φ 130, 530~532 540 Gate compensation circuit Gi-Gn Gate line multiplexer LCD display LCD display panel source Drive circuit gate drive circuit ❿ 19