201023393 六、發明說明： 【發明所屬之技術領域】 本發明是有關於一種異質接面奈米線結構之製造方 法，特別是指一種以氧化鋅奈米線為基材之異質接面奈米 線結構之製造方法。 【先前技術】201023393 VI. Description of the Invention: [Technical Field] The present invention relates to a method for manufacturing a heterojunction nanowire structure, in particular to a heterojunction nanowire with a zinc oxide nanowire as a substrate The manufacturing method of the structure. [Prior Art]
習知半導體光電元件之基本結構，一般有金屬-半導體 接面（metal-semiconductor，MS )、半導艟同質 p-n 接面 (homojunction )或異質接面（heterojunction )、半導體 P-n-p雙載子電晶體（p-n-p bipolar transistor)與金屬-氧 化物-半導體（metal-oxide-semiconductor，MOS)等結構。 以在半導體光電元件之金屬層或p_n接面結構，都是利用 化學或物理氣相沉積薄膜或結合雜質摻雜技術製作，屬於 —維或三維的平面式（planar )元件。其中，在異質接面 結構方面，目前主要的二維或三維異質接面結構，在光電 特性與縮小尺寸上無法作更大的突破，而且利用薄膜磊晶 或長晶製程昂貴，造成成本高、製程速度慢等缺失。因此， 為了提升元件之光電特性，以及因應元件尺寸微型化之需 ^ ’有必要發展-維的異質接面奈米線結構，利用此種創 性奈米線異質接面之量子效應’可以提升元件的光電特 a"— μ 1工饮不小咏漱備方式來成书 面奈米線’又會產生其它問題’因為習知碳夺㈣ 法主要有電弧放電法、雷射閃蒸法、及化學氣㈣ 201023393 等’上述製備方法除了涉及特殊之製程設備外，還必須使 用觸媒材料’而觸媒材料之熱裂解控制、及大面積成長均 勻性等問題上較為繁雜困難，不利於直立排列之一維異質 接面不米線之成長。而本案發明人有鑑於氧化鋅（Zn〇)奈 米線之水熱法（hydr〇_thermal抑她，htg)成長技術已發_ 展成熟，加上以Zn〇為材料之異質接面結構於光電元件上 的應用性相當廣’因此乃研發出一種以Zn〇為基材之異質 接面奈米線結構的製造方法。 【發明内容】 春 因此，本發明之目的’即在提供一種製程簡單快速、 成本低、奈米線長度與均句度易於調控的以氧化鋅奈米線 為基材之異質接面奈米線結構之製造方法。 於是，本發明以氧化鋅奈米線為基材之異質接面奈米 線結構之製造方法，包含： (A) 提供一基板； (B) 在該基板的表面披覆一層晶種層； (C) 利用水熱法在該基板上成長數個氧化鋅奈米線® 段；及 (D) 利用鍍著方法於該等氧化鋅奈米線段上披覆數個 鍍著部。 其中，所述基板可以為：n型或p型半導體基板、玻 螭基板、陶瓷基板、金屬基板、透明導電基板，或高分子· 材料製成之基板。 由於步驟（c)要成長氧化鋅奈米線段，所以步驟（b)之 4 201023393 晶種層材料必須為包含金屬辞（Zn)之氧化物，例如：氧化 鋁鋅（AZO)、氧化銦辞（IZO)、氧化鎵辞（GZO)，或氧化鋅 (ZnO)。 ' 步驟（C)是取硝酸鋅（Ζη(Ν03)2))，以及環六次甲基四胺 (hexamethylenetetramine, HMT)調配成一反應溶液，再將形 成有晶種層.的基板置於該反應溶液中，使基板上成長出氧 化鋅奈米線段。其中，該反應溶液之溫度為30〜100°C，反 應時間為10~240分鐘。本發明所示的成長溫度與時間分 別為30~100°C及1〇~240分鐘。假如溫度太低或太高的話， 因為（Zn(N〇3)2及HMT溶液無法有效反應合成，將無法有 效成長奈米線。而當成長時間太短或過長時，會使奈米線 分別形成量子點或薄膜狀的型態，這些型態將降低元件的 量子效應，減低元件的應用面。 步驟（D)之鑛著方法可以為：濺鑛（sputter)或蒸鑛 (evaporation)等鑛膜技術，藏鍵例如：直流激鑛、射頻激 鍍等方式，蒸鍵例如：電子束蒸鑛（electron-beam evaporation )、脈衝雷射蒸鑛（Pulsed Laser Deposition, PLD)。本發明所列之鍍著方式主要係以低成本的物理氣相 沉積（PVD)方式進行，但仍可利用如電鍍、水熱法、溶膠 一凝膠法（sol-gel)等溶液複合沉積之鑛著金屬_或金属氧化 物方式、或化學氣相沉積（CVD)等較為複雜的沉積方式。 所述鍍著部之材料可以為金屬、金屬氧化物或是半導 體材料，金屬材料例如：鎳（Ni)、錫（Sn)、鋅（Zn)、铷（Rb)、 鎵（Ga)，半導體材料例如：氧化鎳（NiO)、氧化銅（CuO)、 201023393 氧化錫（SnO)、氮化鎵（GaN)，或者其它半導體材料，另外， 亦可以為銅與其它金屬的氧化物：CuX〇2，所述X是選自 於：硼（B)、鋁（A1)、鎵（Ga)或銦（In)。其中，因為Cu金屬 的便宜造價及普遍性，可以降低元件的整體成本，因此若 以Cu或其化合物來形成金屬氧化物，對於未來的產品應 用上將更具價值。 本發明以氧化鋅奈米線為基材之異質接面奈米線結 構之製造方法，更包含一個步驟（E)，在鍍著部的頂部披覆 一層電極層，所述電極層可以為金（Au)、銀（Ag)、鎳（Ni) 等金屬’或是導電高分子材料，或是其它任何可導電之材 料，例如透明導電薄膜：氧化銦錫（IT〇)、氧化銦辞（Iz〇)、 氧化銘鋅(AZO)、氧化鎵鋅（GZO)，或上述之任一組合。 【實施方式】 有關本發明之前述及其他技術内容、特點與功效，在 以下配合參考圖式之一個較佳實施例的詳細說明中，將可 清楚的呈現。 參閱圖1，本發明以氧化鋅奈米線為基材之異質接面 奈米線結構之製造方法的較佳實施例，是用於製造一異質 接面奈米線結構，所述結構包含：一基板1、一彼覆在該 基板1的表面的晶種層2、數個設置在該晶種層2之表面 的奈米線3，以及一設置在該等奈米線3的頂部的電極層 4。 本實施例之基板1為氧化銦錫（IT0)透明導電材料製 成的基板1。該晶種層2為氧化鋅（Ζη0)薄膜，所述晶種層 201023393 2的適當厚度為100〜5〇〇nm。該等奈米線3皆包括”直立 设置在該晶種層2的表面的氧化鋅奈米線段31，以及一設 置在氧化辞奈米線段31的頂部賴著部32，該等氧化辞 π米線段31之徑長可以為4〇〜1〇〇 nm，平均長度可以為 0.65〜1 ，而本實施例製作出的徑長約為i〇〇nm，平均 長度則約為Ι/zm。本實施例之鍍著部32材料為氧化鎳 (ΝιΟ) ’其厚度可以為1〇〇〜5〇〇nm ,本實施例為3⑽。所 φ 述氧化鋅奈米線段31為n型半導體，而NiO鍍著部32為 P型半導體，使該等奈米線3形成半導體異質接面: 而》亥電極層4之材料為金屬金（Au)，其適當厚度為 100~500nm，本實施例為 200 nm。 參閱圖1、2、3,本發明製造方法之較佳實施例，包 含以下步驟： (1)進行步驟51 :首先取一 ITO製成的：基板1並清 洗之，分別利用去離子水（DI water )、硫酸（H2S〇4 ) /雙 φ 氧水（H2〇2)混合溶液、氫氧化銨（NH4〇p) /雙氧水混合 /谷液…等液體，多次清洗該基板丨，再使用氮氣吹乾基板 1 ° (2 )進行步驟52 :在該基板1的表面沉積該Zn〇薄 膜的晶種層2，可以利用真空濺鍍或蒸鍍等方式沉積，本 實施例是以蒸鍍方式進行，其沉積條件為：真空條件7.6χ 1〇-3 torr，並於腔體内通入氬氣（Ah)，其旖量為24 sccm， 功率為200W，薄膜沉積速率為0.4 A/Sec。 (3 )進行步驟53 :利用水熱法成長該等氧化鋅奈米 201023393 線段31，首先取8〇〇mi的去離子水、6公克的硝酸鋅 (Zn(N03)2>)，以及3公克的環六次甲基四胺 (hexamethylenetetramine，HMT)混合調配成一反應溶液，將 上述成長有晶種層2的基板1置於該反應溶液中。溶液溫 度維持在85 ° C ’浸泡時間亦即為反應時間為60分鐘，經 由適當的浸泡時間與溶液溫度控制，該基板1上即成長出 陣列排列的乳化鋅奈米線段31。之後取出基板1，用去離 子水沖洗並乾燥之。 (4) 進行步驟54:利用鍍著方法於該等氧化鋅奈米 線段31上彼覆鍍著部32,本實施例是以蒸鍍方式沉積Ni〇 鍍著部32，其沉積條件如下：功率為1〇〇 w、沉積速率為 1~3 A/sec、真空條件為 8χ1〇-5 t〇rr。 (5) 進行步驟55 :披覆該電極層4，本實施例是以 瘵鍍方式沉積Au薄膜電極層4，其沉積條件如下：功率為 150 W、沉積速率為〇·4 A/sec、真空條件為5χΐ〇_6比以、 氬氣流量為24 sccm。如此，該異質接面奈米線結構即製 作完成。 β需要說明的是，本實施例之電極層4之形狀呈溝槽狀 是配合金屬光罩（shadow mask)之使用。但是本發明之電極 層4不以溝槽狀為必要，只有當基板t是不透光的材料 時，電極層4必須為溝槽狀，使人射光可以從電極層*之 一側照射進來，並透過電極層4的隙縫而到達p_n異質接 面處’有效地使^件進行光電反應。而基板ι是透光的材 料時’因為人射光可以從基板以―側照射進來而到達^ 201023393 =面處’所以此時該電極層4不一定要是溝槽狀，可 以為整片平面式的薄膜電極。 參閱圖4、5、6,圖4顯示本發明成長出的氧化鋅夺 :線段晶格繞射分析結果，其主要的晶格方向 為 ZnO (〇〇2)和 ZnO (103) ’ 顯矛 * 士 找 顯不由本發明實施例所製備出 ^化鋅奈米線段31 $有良好之晶體結構。而圖5顯示 氧峰奈米線段Μ的SEM圖片，圖6顯示Ni〇鍍著部％ 沉積於氧化鋅奈米線段31頂緣的_圖片。由圖Η 可清楚觀察到本發明製備出的氧化鋅奈轉段31除了具 有高筆直性之外，由於水熱法所製作出的奈米線3的長寬 比、均句度或是密度等方面均較容易獲得控制使氧化辞 奈米線段形成均勾而規則的排列與分布配合後續經 由錄著製程得到的㈣鑛著部32,使本發明成長出以Zn〇 為基材並且均勻排列的異質接面奈米I 3。其中，氧化鋅 不米線31的直後、長度和排列的均句性可分別藉由成長 時間、溶液的濃度、PH值和温度、及晶種層2薄膜的均勻 度等因素來控制。 參閱圖7、8’為本發明最後製作得到的奈米線結構的 光電特性量測結果。利用照光、模擬太陽光以及不照光 (dark)的量測轉變，所述照光為波長刊如瓜的uv光源， 模擬的太陽光光譜4 AM1 5，亦即其^氣大氣光程⑷『 Mass’簡稱八河）為u。可以明顯發現本發明製作出的異 ^接面奈米線結構，無論是對於UV入射光線或是模擬太 陽光’皆具有明顯的光電流變化，顯示該元件具有非常好 201023393 的光電感測效應’因此該奈米線結構在光電感測元件或是 太陽能等光電轉換元件之應用有極大助益。 其中’圖8同樣為電流-電壓曲線，只是其縱轴之電流 已取對數座標，藉此可以更清楚觀察到其光電流變化，元 件之啟動電壓與漏電流在照UV光、照太陽光，以及不照 光下分別為 1.5 V/0.06 μΑ、 1 V/3.2 μΑ，以及 3 V/0.02 μΑ。將照UV光與不照光作比較，照υν光後藉由較小之 啟動電壓（1.5 V)即可驅動元件，其啟動電壓改善量為 [(3-1·5) /3]xlOO% =50 %，反向漏電流增大約3倍。另一方 面，照太陽光與不照光比較，同樣獲得良好的光電特性改 善’照太陽光後的啟動電壓改善量為[(31)/3] X 100%=66% ’反向漏電流增大約“ο倍β 因此本發明不須傳統昂責之磊晶或是長晶製程 綜上所述，本發明藉由水熱法長成氧化鋅奈米線段 31，配合濺鍍、蒸鍍等鍍著方式沉積鍍著部32而形成異 質接面的奈米'線3,由於水熱法之成長技術已發展成熟、 易於控制，加上鑛著方式成長鑛著部32的製程快速簡單， 進而具有 設備成本低及製造快速之優點。 一個p-n異The basic structure of conventional semiconductor optoelectronic components generally includes a metal-semiconductor (MS), a semiconducting pn junction (homojunction) or a heterojunction, a semiconductor Pnp bipolar transistor ( Pnp bipolar transistor) and a metal-oxide-semiconductor (MOS) structure. The metal layer or the p_n junction structure of the semiconductor photovoltaic element is fabricated by chemical or physical vapor deposition film or combined with impurity doping technology, and belongs to a planar or three-dimensional planar element. Among them, in the heterojunction structure, the current two-dimensional or three-dimensional heterojunction structure can not make a greater breakthrough in photoelectric characteristics and downsizing, and the use of thin film epitaxy or long crystal process is expensive, resulting in high cost. The process speed is slow and so on. Therefore, in order to improve the photoelectric characteristics of the components and the need to miniaturize the size of the components, it is necessary to develop a dimensional heterojunction nanowire structure, and the quantum effect of the heterogeneous junction of such a creative nanowire can be improved. The photo-electrical a"- μ 1 cooking drink of the component is not a small preparation method to form a written nanowire 'and other problems will arise' because the conventional carbon capture method has four arc discharge methods, a laser flash method, and Chemical gas (4) 201023393 et al. 'The above preparation method must be used in addition to special process equipment, but also must use catalyst material', and the thermal cracking control of the catalyst material and the uniformity of large-area growth are more complicated, which is not conducive to vertical arrangement. One dimension of heterogeneous junctions does not grow in rice noodles. The inventor of the present invention has developed a hydrothermal method (hydr〇_thermal inhibition, htg) growth technology of zinc oxide (Zn〇) nanowire, and a heterojunction structure with Zn〇 as a material. The applicability of the photovoltaic element is quite wide. Therefore, a method for manufacturing a heterojunction nanowire structure using Zn〇 as a substrate has been developed. SUMMARY OF THE INVENTION Therefore, the object of the present invention is to provide a heterojunction nanowire with a zinc oxide nanowire as a substrate, which is simple and rapid in process, low in cost, and easy to adjust the length of the nanowire and the uniformity of the sentence. The manufacturing method of the structure. Therefore, the method for manufacturing a heterojunction nanowire structure based on a zinc oxide nanowire comprises: (A) providing a substrate; (B) coating a surface of the substrate with a seed layer; C) growing a plurality of zinc oxide nanowire® segments on the substrate by hydrothermal method; and (D) coating a plurality of plating portions on the zinc oxide nanowire segments by a plating method. The substrate may be an n-type or p-type semiconductor substrate, a glass substrate, a ceramic substrate, a metal substrate, a transparent conductive substrate, or a substrate made of a polymer material. Since step (c) is to grow the zinc oxide nanowire segment, step (b) 4 201023393 seed layer material must be an oxide containing metal (Zn), such as: aluminum zinc oxide (AZO), indium oxide ( IZO), gallium oxide (GZO), or zinc oxide (ZnO). 'Step (C) is to take zinc nitrate (Ζη(Ν03)2)), and hexamethylenetetramine (HMT) to prepare a reaction solution, and then place a substrate with a seed layer. In the solution, a zinc oxide nanowire segment is grown on the substrate. The temperature of the reaction solution is 30 to 100 ° C, and the reaction time is 10 to 240 minutes. The growth temperature and time shown in the present invention are 30 to 100 ° C and 1 to 240 minutes, respectively. If the temperature is too low or too high, because the (Zn(N〇3)2 and HMT solutions cannot be effectively reacted and synthesized, the nanowires will not be able to grow effectively. When the growth time is too short or too long, the nanowires will be made. Forming quantum dots or film-like forms, respectively, which will reduce the quantum effect of the component and reduce the application surface of the component. The method of mineralization in step (D) can be: sputtering or evaporation, etc. Mineral film technology, such as: DC ore, RF laser plating, etc., steaming bonds such as: electron beam evaporation (electron-beam evaporation), pulsed laser (Pulsed Laser Deposition (PLD). Listed in the present invention The plating method is mainly carried out by low-cost physical vapor deposition (PVD), but the metal can be deposited by solution such as electroplating, hydrothermal method, sol-gel method, etc. Or a relatively complex deposition method such as a metal oxide method or a chemical vapor deposition (CVD). The material of the plating portion may be a metal, a metal oxide or a semiconductor material, such as nickel (Ni) or tin. (Sn), zinc (Zn),铷 (Rb), gallium (Ga), semiconductor materials such as: nickel oxide (NiO), copper oxide (CuO), 201023393 tin oxide (SnO), gallium nitride (GaN), or other semiconductor materials, in addition, An oxide of copper and other metals: CuX〇2, which is selected from the group consisting of boron (B), aluminum (A1), gallium (Ga) or indium (In), among which, because of the cheap cost and generality of Cu metal Sexuality can reduce the overall cost of the component. Therefore, if Cu or its compound is used to form a metal oxide, it will be more valuable for future product applications. The present invention uses a zinc oxide nanowire as a substrate for a heterojunction nanoparticle. The manufacturing method of the wire structure further comprises a step (E), wherein an electrode layer is coated on the top of the plating portion, and the electrode layer may be metal such as gold (Au), silver (Ag) or nickel (Ni) or It is a conductive polymer material or any other conductive material, such as a transparent conductive film: indium tin oxide (IT〇), indium oxide (Iz〇), oxidized zinc (AZO), gallium zinc oxide (GZO), Or any combination of the above. [Embodiment] The foregoing and other aspects of the present invention The contents, features and effects of the present invention will be clearly described in the following detailed description of a preferred embodiment of the reference drawings. Referring to Figure 1, the heterojunction of the invention is based on a zinc oxide nanowire. A preferred embodiment of the method for fabricating a rice noodle structure is for fabricating a heterojunction nanowire structure comprising: a substrate 1, a seed layer 2 covering the surface of the substrate 1, and a number A nanowire 3 disposed on the surface of the seed layer 2, and an electrode layer 4 disposed on the top of the nanowire 3. The substrate 1 of the present embodiment is made of indium tin oxide (IT0) transparent conductive material. Formed as substrate 1. The seed layer 2 is a zinc oxide (MnO) film, and the seed layer 201023393 2 has a suitable thickness of 100 to 5 nm. The nanowires 3 each include a zinc oxide nanowire segment 31 erected on the surface of the seed layer 2, and a top portion 32 disposed on the oxidized nanowire segment 31. The length of the line segment 31 may be 4 〇 to 1 〇〇 nm, and the average length may be 0.65 〜1, and the diameter of the embodiment is about i 〇〇 nm, and the average length is about Ι / zm. For example, the material of the plating portion 32 is nickel oxide (ΝιΟ), and the thickness thereof may be 1 〇〇 5 5 nm, which is 3 (10) in this embodiment. The zinc oxide nano-line segment 31 is an n-type semiconductor, and NiO plating The portion 32 is a P-type semiconductor, such that the nanowires 3 form a semiconductor heterojunction: and the material of the "Electrical electrode layer 4" is a metal gold (Au) having a suitable thickness of 100 to 500 nm, which is 200 nm in this embodiment. Referring to Figures 1, 2 and 3, a preferred embodiment of the manufacturing method of the present invention comprises the following steps: (1) performing step 51: firstly taking a substrate 1 and cleaning it, using deionized water ( DI water ), sulfuric acid (H2S〇4 ) / double φ oxygen water (H2〇2) mixed solution, ammonium hydroxide (NH4〇p) / hydrogen peroxide mixed / valley Liquid, etc., the substrate is washed a plurality of times, and then the substrate is dried by nitrogen gas 1 ° (2). Step 52: depositing the seed layer 2 of the Zn 〇 film on the surface of the substrate 1 may be vacuum sputtering or Deposited by evaporation or the like, this embodiment is carried out by evaporation, and the deposition conditions are: vacuum condition 7.6 χ 1〇-3 torr, and argon gas (Ah) is introduced into the cavity, and the amount of bismuth is 24 sccm. , the power is 200W, and the film deposition rate is 0.4 A/Sec. (3) Step 53: The hydrothermal method is used to grow the zinc oxide nano 201023393 line segment 31, first taking 8 〇〇mi of deionized water, 6 gram of Zinc nitrate (Zn(N03)2>), and 3 g of hexamethylenetetramine (HMT) are mixed and mixed into a reaction solution, and the substrate 1 on which the seed layer 2 is grown is placed in the reaction solution. The solution temperature is maintained at 85 ° C. The soaking time is 60 minutes. The appropriate immersion time and solution temperature control, the array 1 of emulsified zinc nanowire segments 31 are grown on the substrate 1. The substrate is then removed. 1. Rinse and dry with deionized water. (4) Step 54: plating the portion 32 on the zinc oxide nanowire segments 31 by a plating method. In this embodiment, the Ni crucible plating portion 32 is deposited by evaporation, and the deposition conditions are as follows: the power is 1〇. 〇w, deposition rate is 1~3 A/sec, vacuum condition is 8χ1〇-5 t〇rr. (5) Step 55: coating the electrode layer 4, this embodiment is to deposit Au film electrode by ruthenium plating Layer 4 was deposited under the following conditions: a power of 150 W, a deposition rate of 〇·4 A/sec, a vacuum condition of 5χΐ〇_6 ratio, and an argon flow rate of 24 sccm. Thus, the heterojunction nanowire structure is completed. It should be noted that the electrode layer 4 of the present embodiment has a groove shape and is used in conjunction with a metal shadow mask. However, the electrode layer 4 of the present invention is not required to have a groove shape. Only when the substrate t is a material that is opaque, the electrode layer 4 must be groove-like, so that human light can be irradiated from one side of the electrode layer*. And through the gap of the electrode layer 4 to reach the p_n heterojunction 'effectively, the device is photoelectrically reacted. When the substrate ι is a light-transmitting material, 'because the human light can be irradiated from the substrate to the side to reach the surface of the ^201023393=face, the electrode layer 4 does not have to be a groove shape at this time, and may be a flat piece. Thin film electrode. Referring to Figures 4, 5, and 6, Figure 4 shows the results of the diffraction analysis of the zinc oxide: the segment lattice lattice of the present invention, the main lattice directions of which are ZnO (〇〇2) and ZnO (103) ' It is found that the zinc nitride nanowire segment 31 has a good crystal structure which is not prepared by the embodiment of the present invention. Fig. 5 shows an SEM picture of the oxygen peak nanowire segment ,, and Fig. 6 shows a photo of the Ni〇 plating portion deposited on the top edge of the zinc oxide nanowire segment 31. It can be clearly seen from the figure that in addition to the high straightness of the zinc oxide natrix segment 31 prepared by the present invention, the aspect ratio, the uniformity or the density of the nanowire 3 produced by the hydrothermal method, etc. In the aspect, it is relatively easy to obtain control so that the oxidized nano-line segments are uniformly formed and the regular arrangement and distribution are matched with the (4) ore portion 32 obtained through the recording process, so that the invention grows out of Zn〇 as a substrate and is evenly arranged. Heterojunction nano I 3 . Among them, the straightness, length and arrangement of the zinc oxide non-rice line 31 can be controlled by factors such as growth time, concentration of the solution, pH and temperature, and uniformity of the film of the seed layer 2. Referring to Figures 7 and 8', the results of measurement of the photoelectric characteristics of the nanowire structure finally produced in the present invention are shown. The illumination is measured by illumination, simulated sunlight, and dark light. The illumination is a UV source of wavelengths, and the simulated solar spectrum is 4 AM1 5, which is the atmospheric optical path (4) "Mass' Referred to as the eight rivers). It can be clearly found that the heterojunction nanowire structure produced by the present invention has obvious photocurrent variation for both UV incident light and simulated sunlight, indicating that the component has a very good photo-sensing effect of 201023393' Therefore, the nanowire structure is greatly beneficial in the application of photoelectric sensing elements or photoelectric conversion elements such as solar energy. Figure 8 is also a current-voltage curve, but the current of the vertical axis has taken the logarithmic coordinates, so that the photocurrent change can be more clearly observed. The starting voltage and leakage current of the component are illuminated by UV light and sunlight. And 1.5 V/0.06 μΑ, 1 V/3.2 μΑ, and 3 V/0.02 μΑ, respectively, without illumination. The UV light is compared with the non-illuminated light, and the component is driven by a small starting voltage (1.5 V) after the light is ν, and the starting voltage improvement is [(3-1·5) /3] xlOO% = 50%, the reverse leakage current is increased by about 3 times. On the other hand, compared with the non-illumination, the same photoelectric characteristics are improved. The improvement of the starting voltage after the sunlight is [(31)/3] X 100%=66% 'The reverse leakage current increases. "o times β, therefore, the present invention does not require the traditional arbitrarily epitaxial or long crystal process. In summary, the present invention grows into a zinc oxide nano-line segment 31 by hydrothermal method, and is plated, vapor-deposited, etc. The method of depositing the plating portion 32 to form a heterojunction of the nano 'line 3, the growth technology of the hydrothermal method has been developed and easy to control, and the process of growing the mining part 32 is quick and simple, and thus has equipment. Low cost and fast manufacturing advantages.
而且以往使用化學氣相沉積法（CVD)沉積 質接面結構，成長時間約須5-6小時，耗時相 只能得到二維奈米結構或一般的三維結構，而 10 201023393 到以往成長奈米結構所需的觸媒，本發明可以利用材料之 自我成長特性於大面積基板1上成長排列規則的氧化辞奈 米線段31 ’因此於大面積光電元件製作上具畚極大優勢。 所以本發明確實具有製程簡單快速、成本低、奈米線長度 與均勻度易於調控等優點。 惟以上所述者，僅為本發明之較佳實施例而已，當不 能以此限定本發明實施之範圍，即大凡依本發明申請專利 範圍及發明說明内容所作之簡單的等放變化與修餘，皆仍 屬本發明專利涵蓋之範圍内。 【圖式簡單說明】 圖1是一立體分解圖’顯示本發明製造方法之一較佳 實施例所製造出的一異質接面奈米線結構； 圖2是該較佳實施例之各步驟的流程方塊圖； 圖3是該較佳實施例之各步驟進行時的示意圖.； 圖4是圖1之異質接面奈米線結構的x_ray晶格繞射 (XRD)分析圖； 圖5是掃描式電子顯微鏡（SEM)拍下的照片，顯示該 異質接面奈米線結構的數個氧化鋅奈米線段； 圖6是一類似圖5的照片，顯示數個鍍著部形成於該 等氧化鋅奈米線段的頂部； 圖7是一電流-電壓特性曲線圖，顯示該異質接面奈米 線結構的光電特性； 圖8是一類似圖7的曲線圖，圖中縱座，標為對數座標。 11 201023393 【主要元件符號說明】Moreover, in the past, chemical vapor deposition (CVD) was used to deposit the interface structure, and the growth time was about 5-6 hours. The time-consuming phase could only obtain a two-dimensional nanostructure or a general three-dimensional structure, and 10 201023393 The catalyst required for the rice structure, the present invention can utilize the self-growth property of the material to grow and arrange the regular oxidized nanowire segment 31' on the large-area substrate 1, thus having a great advantage in the fabrication of large-area photovoltaic elements. Therefore, the present invention has the advantages of simple and rapid process, low cost, and easy regulation of the length and uniformity of the nanowire. However, the above is only the preferred embodiment of the present invention, and the scope of the present invention cannot be limited thereto, that is, the simple equivalent change and the repair made according to the scope of the present invention and the description of the invention. All remain within the scope of the invention patent. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is an exploded perspective view showing a heterojunction nanowire structure produced by a preferred embodiment of the manufacturing method of the present invention; FIG. 2 is a step of the preferred embodiment. Figure 3 is a schematic view of the steps of the preferred embodiment. Figure 4 is an x-ray lattice diffraction (XRD) analysis of the heterojunction nanowire structure of Figure 1. Figure 5 is a scan A photograph taken by an electron microscope (SEM) showing a plurality of zinc oxide nanowire segments of the heterojunction nanowire structure; FIG. 6 is a photograph similar to FIG. 5, showing that a plurality of plating portions are formed in the oxidation Figure 7 is a current-voltage characteristic graph showing the photoelectric characteristics of the heterojunction nanowire structure; Figure 8 is a graph similar to Figure 7, in which the vertical block is marked as a logarithm coordinate. 11 201023393 [Main component symbol description]
1 '···' +…基板 32……. •鍍著部 2…… ……晶種層 • ·電極層 3 。. ……奈米線 51-55·· 。《步驟 31… •…氧化鋅奈米線段 121 '···' +...Substrate 32....... • Plated part 2... ...... seed layer • Electrode layer 3 . .......Nano line 51-55··. "Step 31... •...Zinc oxide nanowire segment 12