201015314 六、發明說明： 【發明所屬之技術領域】 本發明關於一種記憶體管理方法，尤指一種用於非揮 發性記憶體的子系統均勻抹除方法及其控制器。 【先前技術】 諸如快閃記憶體儲存系統的非揮發性記憶體系統，由 Ό 於其記憶體系統小巧的實體尺寸及非揮發性記憶體可重複 程式規劃的能力，使得其使用性更為增加。快閃記憶體儲 存系統小巧的實體尺寸，亦讓其在日趨普遍的電子裝置上 的使用需求提高。使用快閃記憶體儲存系統的裝置包含， 仁不拘限於數位相機、數位攝錄影機、數位音樂播放器、 可攜式電腦、全球定位裝置。快閃記憶體儲存系統的#揮 發f生δ己憶體可重複程式規劃的能力讓快閃記憶體儲存系統 θ 可以被重複使用。 Ο _ A -h —般來說’快閃記憶體儲存系統可包含快閃記憶卡及 f夬閃記憶體晶片、组。快Μ記憶體晶片組一般包含快閃記憶 $疋件及一控制器。原則上，一快閃記憶體晶片組可組裝 ;a嵌入式系統。裴配或主系統的製造業者一般取得的快 閃5己憶體，如同其他配件，是以元件的形式呈現，然後， 該快閃記㈣及其域件會再被組裝到一 主系統内。 雖然非揮發性記憶體，或更明確地說’快閃記憶體系 二中的快閃記憶體儲存區塊可被重複程式規劃及抹除，每 個區塊或實體位置在耗損前，僅能以一特定的次數被抹 3 201015314 除，意即’在記憶體容量開始變小之前。換言之，每一個 區塊具有-程式規劃及抹除循環限制。對於某些記憶體而 言’在區塊被視為無法使用之前，一個區塊約可被抹除一 萬次。而對於其他記憶體而言，在區塊被視為耗損之前， -個區塊約可被抹除十萬次或甚至百萬次。#—個區塊耗 損而導致無法使用或快閃記憶體系統部分儲存容量的效能 相當程度地降低時，可能會對快閃記憶體系統的使用者相 當不利，例如：遺失已程式規劃的資料或無法程式 U 料。 快閃記憶體系統區塊或實體位置的耗損，會因為每一 個區塊程式規劃的次數而有所不同。假若一個區塊，或更 明確地說，-儲存元件，被程式規劃一次，然後不再被重 新的程式規劃，則程式規劃及抹除循環的次數將相對於耗 損的區塊來得低。然而’假若—個區塊重複地寫人及抹除， 例如’以-個循環’則該區塊的耗損程度將相對來得高。 熟悉此技藝者應了解’由於主機（即存取或使祕閃記憶體 W 彡統的系統)常使用邏輯區塊位址來存取程式規劃於快閃記 憶體系統的資料’假若一個主機重複地使用相同的邏輯區 塊位址來重複寫入資料時，則快閃記憶體系統中相同的實 體位置或區塊將被重複地寫入及抹除。 當一些區塊耗損而其餘區塊仍有效時，耗損的區塊會 讓快閃記憶體系統的整體性能遭到影響。耗損的區塊除了 本身會讓性能降低之外，快閃記憶體系統的整體性能亦會 在有效區塊數量不足以程式規劃資料時受到影響。通常， 4 201015314 當快閃記憶體系統中出現過多的耗損區塊時，即使快閃記 憶體系統仍然存在有效的其他區塊，但該快閃記憶體系統 還是會被視為無法使用。當包含相當數量未耗損區塊的快 閃記憶體系統被視為無法使用時，报多關聯於該快閃記憶 體系統的資源將遭到浪費。 " Ο ο 為了讓快閃記憶體系統的區塊能夠均勻的耗損，常會 進行一均勻抹除程序。均勻抹除程序，如熟悉此技藝者所 知’是絲允許實體位置翅聯於特定邏輯區塊位址的區 ^被替換’使得相同的邏輯區塊位址並不永遠屬於同一個 實體位置或區塊。藉由變更區塊_的邏輯區塊位址，可 以讓=區塊啸不會在其他區塊耗損前先行耗損。 趙-4:塊==:輪資料的非揮發性記德 3早:=:料的傳統非揮發性記憶體來得快的存取 換句話===，少-映射表的容量。 單位來管理資料。因此°，域體單元而非區塊為 除。然而，記憶體單元中未使憶體單70為單位來抹 ；!亦被抹除，且讓記憶體單==有可能在抹除的同 :況。因此，-種可以延長產生使用上不平均的 揮發性記憶_子线均發性記龍壽命並用於非 一相關領蜮所亟需。 抹除方法及其控制器為目前此 【發明内容】 201015314 ^於先前技藝受限於上述問題。本發明之一目的為提 供-種用於非揮發性記憶體的記憶體營 器，以防止記憶體單元的區塊在使用上的及兵 ^明第一個目的為提供一種記_警理方法’用於 二^數個區塊的非揮發性記憶體，其中讀等區塊具有第 該記賴管理方法包括以下步驟：⑻將該複數個 塊::成複數個記憶體單元，其中該等記憶體單元具有 〇 該數量小於第一數量;(b)將資料寫入到 二等錢料4中的至少-區塊；(e)在 憶體單元 其中之-所屬的區塊皆被寫入後，增加請所 ^的記憶料元相對應的計數值；及(d) Μ至少部份個記 憶體单疋的計數值’對該非揮發性記德體進行一均句抹除 程序。 根據本案構想，該記憶體管理方法在步驟(b)及⑷之 間’進一步包括標記寫入區塊的步驟。 G 根據本案構想，在將資料寫入到該等記憶體單元當中 :至少-區塊後’更包括一在一參考表中標記該寫入區 塊’用以標示該寫入區塊的使用狀態之步驟。 根據本案構想，在該等記憶體單元其中之一所屬的區 塊皆被寫入後’更包括從參考表中删除標示該記憶體單元 寫入區塊的標記之步驟。 根據本案構想，在所有標示該寫入區塊的標記被刪除 後’該記憶體單元的計數值將增加一預設值。 6 201015314 根據本案構想，在該寫入區塊的資料被抹除後，該記 憶體單元的計數值將增加一預設值。 根據本案構想，該計數值代表記憶體單元的抹除次數 累積值。 根據本案構想，該記憶體管理方法在步驟(b)及⑷之 間，進一步包括選取一無標記區塊並將另一資料寫入到該 選取無標記區塊的步驟。 根據本案構想，步驟(d)包括：（dl)計算至少部份記憶 〇 體單元的計數值；（d2)從至少部份的該等記憶體單元當中 找出空的記憶體單元；及(d3)從空的記憶體單元當中再選 擇一具有最少計數值的記憶體單元。 根據本案構想，該記憶體管理方法在步驟⑷及(b)之 間，進一步包括以下步驟：（al)從至少部份的該等記憶體 單元當中選擇一記憶體單元；及(a2)從該被選擇的記憶體 單元當中再選取至少一區塊。 根據本案構想，該被選擇的記憶體單元是隨機、依序、 〇 或經由一均勻抹除程序從至少部份的該等記憶體單元當中 選擇出來。 根據本案構想，該選取區塊是隨機或依序從該被選擇 的記憶體單元當中選取出來。 根據本案構想，該資料比該記憶體單元的容量小。 根據本案構想，該資料包括暫存物件、表格、映射檔 或比該記憶體單元容量小的資料。 7 201015314 根據本案構想，該非揮發性記憶體包括多個通道或資 料匯流排。 本發明第二個目的為提供一種用於非揮發性記憶體的 控制器，該非揮發性記憶體具有複數個區塊，其中該等區 塊具有第一數量，該等區塊組合成複數個記憶體單元，其 中該等記憶體單元具有第二數量，且該第二數量小於第一 數量，該控制器包括：一系統均勻抹除構件，用以對該非 揮發性記憶體進行第一均勻抹除程序，以選擇一記憶體單 〇 元；及一子系統均勻抹除構件，用以對該被選擇的記憶體 單元進行第二均勻抹除程序，以從該被選擇的記憶體單元 選取至少一區塊來程式規劃一資料；藉以防止被選擇的記 憶體單元的區塊在使用上的不平均。 本發明第三個目的為提供一種用於非揮發性記憶體的 控制器，該非揮發性記憶體具有複數個區塊，其中該等區 塊具有第一數量，該等區塊組合成複數個記憶體單元，其 中該等記憶體單元具有第二數量，且該第二數量小於第一 0 數量，該控制器包括：一微處理器，用來程式規劃被選取 區塊及抹除被選取區塊上的資料；一計算單元，耦合於該 微處理器，用來計算每一個該等記憶體單元的計數值；及 一選取器，粞合於該微處理器，用來選擇具有空的記憶體 空間及最少計數值的記憶體單元，並用來從被選擇的記憶 體單元中選取至少一區塊。 根據本案構想，該選取器包括：一子系統均勻抹除構 件，用以對該等記憶體單元其中一個進行第一均勻抹除程 8 201015314 序，以從該記憶體單元當中選取至少一區塊；及一系統均 句抹除構件，用以對該非揮發性記憶體進行第二均勻抹除 程序’以選擇一記憶體單元來程式規劃一資料。 根據本案構想，該控制器進一步包括一緩衝記憶體用 來程式規劃一參考表；及一標記管理單元，用來在該資料 被程式規劃到該選取區塊時，於參考表中加入一標記以 標示該被選擇的記憶體單元的區塊的使用狀態，並在所有 Ο201015314 VI. Description of the Invention: [Technical Field] The present invention relates to a memory management method, and more particularly to a subsystem uniform erase method for non-volatile memory and a controller thereof. [Prior Art] Non-volatile memory systems such as flash memory storage systems have increased their usability due to their compact physical size and non-volatile memory reprogramming capabilities. . The compact physical size of the flash memory storage system also increases the need for use on increasingly popular electronic devices. Devices that use flash memory storage systems include, without limitation, digital cameras, digital video cameras, digital music players, portable computers, and global positioning devices. The ability of the flash memory storage system to reproduce the program can make the flash memory storage system θ reusable. _ _ A -h As a general matter, a flash memory storage system can include a flash memory card and a flash memory chip, group. The fast memory chipset typically contains flash memory components and a controller. In principle, a flash memory chip set can be assembled; a embedded system. Manufacturers of the matching or main system generally obtain flash flashes, like other accessories, in the form of components, and then the flash (4) and its domain components will be assembled into a main system. Although the non-volatile memory, or more specifically the flash memory storage block in the Flash Memory System 2, can be reprogrammed and erased, each block or physical location can only be used before the loss. A specific number of times is erased by 201015314, meaning "before the memory capacity begins to get smaller." In other words, each block has a -programming and erase cycle limit. For some memories, a block can be erased 10,000 times before the block is considered unusable. For other memories, a block can be erased about 100,000 times or even millions of times before the block is considered to be depleted. #—A block that is depleted and results in an inability to use or a portion of the storage capacity of the flash memory system is considerably degraded, which may be quite detrimental to the user of the flash memory system, such as loss of programmed data or Unable to program U material. The loss of the flash memory system block or physical location will vary depending on the number of times each block program is planned. If a block, or more specifically, a storage component, is programmed once and then no longer being reprogrammed by the program, the number of program programming and erase cycles will be lower relative to the lossy block. However, if a block is repeatedly written and erased, for example, 'by-cycle', the extent of the block will be relatively high. Those skilled in the art should understand that 'because the host (that is, the system that accesses or makes the flash memory system) often uses the logical block address to access the data programmed by the program in the flash memory system' if a host repeats When the same logical block address is used to repeatedly write data, the same physical location or block in the flash memory system will be repeatedly written and erased. When some blocks are worn out and the remaining blocks are still valid, the worn blocks can affect the overall performance of the flash memory system. In addition to degrading the performance of the block itself, the overall performance of the flash memory system will also be affected when the number of valid blocks is insufficient to program the data. Normally, 4 201015314 When too many worn blocks appear in the flash memory system, the flash memory system is considered unusable even if there are still other valid blocks in the flash memory system. When a flash memory system containing a significant number of undepleted blocks is considered unusable, reporting resources that are associated with the flash memory system will be wasted. " Ο ο In order to make the block of the flash memory system evenly wear out, a uniform erase process is often performed. Evenly erasing the program, as is known to those skilled in the art, is that the area that allows the physical location to be associated with a particular logical block address is replaced, such that the same logical block address does not always belong to the same physical location or Block. By changing the logical block address of block_, you can let = block whistle not be depleted before other blocks are worn out. Zhao-4: Block ==: Non-volatile memory of round data 3 Early: =: The traditional non-volatile memory of the material is accessed quickly. In other words, ===, less - the capacity of the mapping table. The unit manages the data. Therefore, the domain unit instead of the block is divided. However, in the memory unit, the memory unit 70 is not wiped out; the eraser is also erased, and the memory single == may be erased. Therefore, the species can prolong the use of non-average volatility memory _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The erasing method and its controller are currently the present invention. [Summary of the Invention] 201015314 ^ The prior art is limited by the above problems. An object of the present invention is to provide a memory device for non-volatile memory, to prevent the block of the memory unit from being used, and the first purpose of the object is to provide a note-taking method. a non-volatile memory for two blocks, wherein the read block has the first management method comprising the following steps: (8) the plurality of blocks: into a plurality of memory cells, wherein the The memory unit has 〇 the number is less than the first quantity; (b) the data is written into at least the block of the second money item 4; (e) in the memory element unit, the belonging block is written Thereafter, increasing the count value corresponding to the memory cell of the device; and (d) 计数 at least a portion of the memory cell count value 'to perform a uniform erase process on the non-volatile mark. According to the present invention, the memory management method further includes the step of marking the write block between steps (b) and (4). G According to the present concept, data is written into the memory cells: at least - after the block 'more includes a tag in the reference table to mark the write block' to indicate the use state of the write block The steps. According to the present invention, after the blocks to which one of the memory cells belongs are written, the step of deleting the flag indicating the memory cell write block from the reference table is further included. According to the present concept, the count value of the memory unit is incremented by a predetermined value after all the marks indicating the write block are deleted. 6 201015314 According to the concept of the present invention, after the data of the write block is erased, the count value of the memory unit is increased by a preset value. According to the present concept, the count value represents the cumulative number of erasures of the memory unit. According to the present concept, the memory management method further includes the steps of selecting an unmarked block and writing another material to the selected untagged block between steps (b) and (4). According to the present concept, step (d) includes: (dl) calculating a count value of at least a portion of the memory cells; (d2) finding an empty memory cell from at least a portion of the memory cells; and (d3) Selecting a memory cell with the least count value from the empty memory cells. According to the present invention, the memory management method further includes the steps of: (al) selecting a memory unit from at least a portion of the memory units; and (a2) from the step (4) and (b); At least one block is selected among the selected memory cells. According to the present invention, the selected memory cells are randomly, sequentially, or selected from at least a portion of the memory cells via a uniform erase process. According to the concept of the present invention, the selected blocks are randomly or sequentially selected from the selected memory cells. According to the present concept, the data is smaller than the capacity of the memory unit. According to the concept of the present case, the data includes temporary items, tables, map files or data smaller than the capacity of the memory unit. 7 201015314 According to the present concept, the non-volatile memory includes a plurality of channels or data bus bars. A second object of the present invention is to provide a controller for non-volatile memory having a plurality of blocks, wherein the blocks have a first number, and the blocks are combined into a plurality of memories. a body unit, wherein the memory units have a second quantity, and the second quantity is less than the first quantity, the controller includes: a system uniform erasing member for performing a first uniform erasing of the non-volatile memory a program for selecting a memory unit; and a subsystem uniformly erasing member for performing a second uniform erasing process on the selected memory unit to select at least one from the selected memory unit The block program plans a data; thereby preventing the block of the selected memory unit from being used unevenly. A third object of the present invention is to provide a controller for non-volatile memory having a plurality of blocks, wherein the blocks have a first number, and the blocks are combined into a plurality of memories a body unit, wherein the memory units have a second quantity, and the second quantity is less than the first zero quantity, the controller includes: a microprocessor configured to program the selected block and erase the selected block a data unit coupled to the microprocessor for calculating a count value of each of the memory units; and a selector coupled to the microprocessor for selecting an empty memory A memory unit of space and a minimum count value and used to select at least one block from the selected memory unit. According to the concept of the present invention, the selector includes: a subsystem uniform erase component for performing a first uniform erase process 8 201015314 for one of the memory cells to select at least one block from the memory cells And a system-wide sentence eraser component for performing a second uniform erase process on the non-volatile memory to select a memory cell to program a data. According to the concept of the present invention, the controller further includes a buffer memory for programming a reference table; and a tag management unit for adding a mark to the reference table when the data is planned by the program to the selected block. Indicates the usage status of the block of the selected memory unit, and at all
該被選擇的記憶體單元的區塊被使用後，用來刪除該參考 表中的襟記。 除4根據本案構想，該計數值代表每一個記憶體單元的抹 樟累積值。一旦被選擇的記憶體單元的區塊的標記被 理單元刪除，則該計算單元將把被選擇的記憶體單 的計數值增加一預設值。 據本案構想，該被選取區塊為一無標記區塊。該選 °序或隨機從被選擇的記憶體單元當中選取一區塊。 括·，發明第四個目的為提供—種資料程式職系統包 二個記憶顏組’每—個皆具有複數個區塊，各別記 ^模組的區塊被組合成各別的記憶體單^;及一控制 ，來控職數觀龍模組，包含 > 計算單元，用 有t該記憶體料的計數值；—選取器，絲選擇-具 被=憶體空間且最少計數值的記憶體單元，並用來從 器體單元當中選取至少一區塊;及一微處理 來程式規劃被選取區塊及抹除被選取區塊上的資 9 201015314 料’藉以防止被選擇的記憶體單元的區塊在使用上的不平 均。 減本案構想’該控制器進-步包括-緩衝記憶體， 用來程式規劃—參考表；及-標記管理單元，用來在該資 料被程式規劃到該選取區塊時，於參考表中加入一標記， 以標不該被選擇的記憶體單元的區塊的使用狀態’並在所 有該被選擇的記憶體單元的區塊被使用後， 用來刪除該參 考表中的標記。 本發明第五個目的為提供一種記憶體管理方法，用於 具有複數個區塊的非揮發性記憶體，其中該等區塊具有第 一數量’該記憶體管理方法包括以下步驟：將該複數個 區塊組合成複數個記憶體單元，其中該等記憶體單元具有 第二數量’且該第二數量小於第一數量；（b)計算每一個記 憶體單元的第一計數值；（c)從該記憶體單元當中找出空的 記憶體單元；（d)計算該記憶體單元的每一個區塊的第二計 數值；（e)從該空的記憶體單元當中選擇一具有最少第一計 數值的記憶體單元；（f)從該被選擇的記憶體單元當中選取 一具有最少第二計數值的區塊；及(g)將一資料程式規劃到 該選取區塊；藉以防止被選擇的記憶體單元的區塊在使用 上的不平均。 根據本案構想，該第一計數值及該第二計數值分別代 表每一個記憶體單元的抹除次數累積值及每一個區塊的抹 除次數累積值。 201015314 本發明第六個目的為提供一種用於非揮發性記憶體的 控制器，該非揮發性記憶體具有複數個區塊，其中該等區 塊具有第一數量，該等區塊組合成複數個記憶體單元，其 中該等記憶體單元具有第二數量，且該第二數量小於第一 數量’該控制器包括：一計算單元，用來計算每一個記憶 體單元的第一計數值及該記憶體單元每一個區塊的第二計 數值；一選取器，用來選擇具有空的記憶體空間且最少第 一計數值的記憶體單元，並用來從被選擇的記憶體單元當 0 中選取具有最少第二計數值的一區塊；及一微處理器，用 來程式規劃被選取區塊及抹除被選取區塊上的資料；藉以 防止被選擇的記憶體單元的區塊在使用上的不平均。 本發明第七個目的為提供一種資料程式規劃系統，包 括：多個記憶體模組，每一個皆具有複數個區塊，各別記 憶體模組的區塊被組合成各別的記憶體單元；及一控制 器’用來控制複數個記憶體模組，包含：一計算單元，用 來計算每一個記憶體單元的第一計數值及該記憶體單元每 0 —個區塊的第二計數值；一選取器，用來選擇一具有空的 記憶體空間且最少第一計數值的記憶體單元，並用來從被 選擇的記憶體單元當中選取一具有最少第二計數值的區 塊；及一微處理器，用來程式規劃被選取區塊及抹除被選 取區塊上的資料；藉以防止被選擇的記憶體單元的區塊在 使用上的不平均。 【實施方式】 11 201015314 體，本發明特徵與優點的一些典型實施例將在後段的 說明中詳細敘述。應理解岐本發明能夠在不同的態樣上 具有各種的變化，其皆不脫離本發明的範圍，且其中的說 月及圖式在本質上係當作說明之用’而非用以限制本發明。 在本實施例中’將以四個通道非揮發性記憶體來呈現 本發明’其中通道的數量與資料匯流排的數量相等。然而， 熟悉此技藝者應了解，由多個區塊組合成記憶體單元的單 -通道非揮發性記憶體亦可用於實現本發明的精神。第！圖 υ為四個通道非揮發性記憶體的概念圖，其中，該非揮發性 兒憶體之區塊數為第一數量。如第（圖所示，四個通道非揮 發性記憶體1〇〇具有四個記憶體模组1〇1、1〇2、1〇3、1〇4， 且每一個記憶體模組皆具有n個區塊，11為一整數，故，上 文所稱之第-數量，在本實施例中即為4n。舉例來說，記 隐體模組101包含區塊A1〜An、記憶體模組1〇2包含區塊 記憶體模組1〇3包含區塊(：1〜(：11、記憶體模組ι〇4包 =區塊D1〜Dl1。為了增加四個通道非揮發性記憶體1〇〇的資 W ，存取速度’並讓區塊管理更為容易或減少映射表的容 置，將具有第一數量4n個區塊的非揮發性記憶體1〇〇中的記 憶體模組101、102、1〇3、104中的各別區塊組合成複數個 δ己憶體單元U1〜Un，其中，該等記憶體單元111〜1111具有第二 數1，且該第二數量小於第一數量，在本實施例中該第二 數量即為η。舉例來說，將區塊八丨、區塊m、區塊C1、區 塊D1組合成記憶體單元υι。換句話說，該四個通道非揮發 性記憶體100具有n個記憶體單元U1〜un。 12 201015314 义為了有:程式規劃(意即寫入與抹除)該非揮發性 减體_，記憶體模組101、102、103、104中的 2 二广、B1〜Bn、cl〜cn、D1〜Dn ’將邏輯性地組 統區、-資料區、及一備用區。意即 體 崎別在每一個記憶體模組中具有'系統區、射 =體 及-，用區。-般來說，資料區約占整個記憶體模組的㈣。 Ο ο 、=區主要用來喊系統資料，諸如記憶體模組的區 =每-個區域的區塊碼；每一個區塊的頁碼；及邏輯/ 實體映射表等等。資料區主要用來儲存使用者資料。而備 用區是用來提供替代的空區塊，以取代資料區中的區塊。 詳細地說，當欲將-新的資料寫人^—個已經存有資料的 位址時，則必須將既有的資料先行抹除。 由於記憶體單元資料區内仍有效的記憶體單元為映射 表中二個最小的管理單位，故在原始記憶體單元即將被抹 除之前，儲存於其内的資料將會被複製到備用區内的另一 個記憶體單元中。舉例來說’當一個新的資料即將被寫入 到已經儲存有資料並位於資料區的記憶體單元口丨時，則會 從備用區當中選取另一個記憶體單元^^，然後，儲存於記 憶體單元U1的有效資料將被複製到該記憶體單元112，而新 的資料會被寫入到記憶體單元U2。接下來，該記憶體單元 m上的資料會被抹除且該記憶體單元ui會被挪到備用區以 供未來使用。同時，該記憶體單元U2會被挪到資料區。換 句話說’該記憶體單元U1邏輯上屬於備用區，而該記憶體 單元U2則邏輯上屬於資料區。熟悉此技藝者應了解，資料 13 201015314 區内的記憶體單元的邏輯關係可由邏輯/實體映射表來取 得。再者，記憶體單元中每一個區塊皆具有相同的邏輯單 元數量。意即，記憶體單元U1中的區塊八丨、區塊B1、區塊 C1、區塊D1皆具有相同的邏輯單元數量。 睛參照第2圖。第2圖為依據本發明資料程式規劃系統 的方塊圖。該資料程式規劃系統包含四個通道非揮發性記 憶體100及一控制器210。該控制器21〇是用來控制該四個通 道非揮發性記憶體100的操作，諸如資料的程式規劃、讀 0 取、抹除等等。該控制器210包含一計算單元211、一選取 器212、一微處理器213、一緩衝記憶體214、一標記管理單 元215該口十算單元211、選取器212、標記管理單元214皆 可經由程式規劃於控制器210或非揮發性記憶體1〇〇中記憶 體區塊(未顯示）的硬體或勒體來執行。該處 將資料程式規劃於區塊中及將資料從該區塊:二。 該選取器212包含-系統均勻抹除構件2121。該系統均 勻抹除構件2121主要對該四個通道非揮發性記憶體1〇〇進 ϋ 行二第-均勻抹除程序’以從備用區而非資料區當中選擇 -記憶體單元。在另-個實施例中’該選取器212可進一步 包含-子系統均句抹除構件2122，該子系統均句抹除構件 簡會對該被選擇的記憶體單元進行—第二㈣抹除程序 或經由標記管理單元犯檢查儲存於參考表的標記，以從被 ，的記憶艘單元當中選取至少—區機作為資料程式規 201015314 #簡言之，上述第一均勾抹除程序包含下 算每一個記憶體單元U1〜Un的f— n 值代表每-似龍料第一計數 記憶體單元m〜Un當中找出空的=ΐ數累積值，從 記憶體單Μ t選擇-具有最少|體=，及⑷從空的 一 .v 啕珉夕第一計數值的記憶體單 ::二I:例中’該第一計數值可包括每-個記憶 ^兀11=的抹除次數、使用次序、錯誤修正碼(闕的After the block of the selected memory unit is used, it is used to delete the note in the reference table. In addition to 4, according to the present concept, the count value represents the cumulative value of the wipe of each memory unit. Once the markup unit of the selected memory cell block is deleted, the calculation unit will increment the count value of the selected memory bank by a predetermined value. According to the concept of the case, the selected block is an unmarked block. The selection or random selects a block from the selected memory cells. In addition, the fourth purpose of the invention is to provide a kind of data program system package, two memory groups, each of which has a plurality of blocks, and the blocks of each module are combined into separate memory sheets. ^; and a control, to control the number of Guanlong module, including > calculation unit, with t the memory material count value; - picker, wire selection - with = memory space and minimum count value a memory unit for selecting at least one block from the body unit; and a microprocessor for programming the selected block and erasing the resource on the selected block to prevent the selected memory unit from being selected The blocks are not evenly used. Reduce the case concept 'The controller further includes - buffer memory, used for program planning - reference table; and - tag management unit, used to add the reference table when the data is programmed into the selected block. A flag is used to mark the usage state of the block of the selected memory cell and is used to delete the tag in the reference table after all the blocks of the selected memory cell are used. A fifth object of the present invention is to provide a memory management method for a non-volatile memory having a plurality of blocks, wherein the blocks have a first number 'the memory management method includes the following steps: The blocks are combined into a plurality of memory cells, wherein the memory cells have a second number ' and the second number is less than the first number; (b) calculating a first count value of each memory unit; (c) Finding an empty memory unit from the memory unit; (d) calculating a second count value of each block of the memory unit; (e) selecting one of the empty memory units with a minimum of the first a memory unit that counts values; (f) selects a block having the least second count value from the selected memory cells; and (g) plans a data program to the selected block; thereby preventing selection The blocks of memory cells are not evenly used. According to the concept of the present invention, the first count value and the second count value respectively represent the cumulative value of the erasing times of each memory unit and the cumulative value of the erasing times of each block. 201015314 A sixth object of the present invention is to provide a controller for non-volatile memory, the non-volatile memory having a plurality of blocks, wherein the blocks have a first number, and the blocks are combined into a plurality of blocks a memory unit, wherein the memory units have a second quantity, and the second quantity is less than the first quantity. The controller includes: a calculation unit for calculating a first count value of each memory unit and the memory a second count value of each block of the volume unit; a selector for selecting a memory unit having an empty memory space and a minimum first count value, and for selecting from the selected memory unit when 0 a block of at least a second count value; and a microprocessor for programming the selected block and erasing data on the selected block; thereby preventing the block of the selected memory unit from being used uneven. A seventh object of the present invention is to provide a data program planning system, comprising: a plurality of memory modules each having a plurality of blocks, and the blocks of the respective memory modules are combined into respective memory units. And a controller for controlling a plurality of memory modules, comprising: a calculating unit for calculating a first count value of each memory unit and a second meter for each 0-block of the memory unit a selector for selecting a memory cell having an empty memory space and a minimum first count value, and for selecting a block having a minimum second count value from among the selected memory cells; A microprocessor for programming the selected block and erasing the data on the selected block; thereby preventing the block of the selected memory unit from being used unevenly. [Embodiment] 11 201015314 Some typical embodiments of the features and advantages of the present invention will be described in detail in the description of the latter paragraph. It is to be understood that the invention is capable of various modifications in the various aspects of the invention, and invention. In the present embodiment, the present invention will be presented in four channels of non-volatile memory, wherein the number of channels is equal to the number of data bus bars. However, those skilled in the art will appreciate that single-channel non-volatile memory that is combined into a memory unit from a plurality of blocks can also be used to implement the spirit of the present invention. The first! Figure υ is a conceptual diagram of four channels of non-volatile memory, where the number of blocks of the non-volatile memory is the first number. As shown in the figure (four channels of non-volatile memory 1〇〇 have four memory modules 1〇1, 1〇2, 1〇3, 1〇4, and each memory module has n blocks, 11 is an integer, so the first-number referred to above is 4n in this embodiment. For example, the hidden body module 101 includes blocks A1 to An, and memory modules. Group 1〇2 includes block memory module 1〇3 contains blocks (:1~(:11, memory module ι〇4 package=blocks D1~Dl1. In order to add four channels of non-volatile memory) 1〇〇, W, access speed' and make block management easier or reduce the mapping table, will have the first number of 4n blocks of non-volatile memory 1〇〇 memory model The respective blocks in the groups 101, 102, 1〇3, 104 are combined into a plurality of δ-remember units U1 〜 Un, wherein the memory units 111 -11 1111 have a second number 1, and the second number Less than the first quantity, in the present embodiment, the second quantity is η. For example, the block gossip, the block m, the block C1, and the block D1 are combined into a memory unit υι. In other words, The four-channel non-volatile memory 100 has n memory cells U1~un. 12 201015314 For the purpose of: program planning (meaning writing and erasing) the non-volatile subtractive body _, the memory modules 101, 102 2, Guanguang, B1~Bn, cl~cn, D1~Dn' in the 103, 104 will logically organize the area, the data area, and a spare area. That is, the body is in each memory model. The group has 'system area, shot = body and -, use area. - Generally speaking, the data area accounts for the entire memory module (4). Ο ο , = area is mainly used to call system data, such as memory module Area = block code for each area; page number of each block; and logical/entity mapping table, etc. The data area is mainly used to store user data, and the spare area is used to provide alternative empty blocks. In order to replace the block in the data area. In detail, when you want to write a new data to a location where the data already exists, you must first erase the existing data. The memory unit still valid in the data area is the two smallest management units in the mapping table, so the original memory Before the element is about to be erased, the data stored in it will be copied to another memory unit in the spare area. For example, 'When a new piece of data is about to be written to the already stored data and located in the data When the memory unit of the area is ported, another memory unit ^^ is selected from the spare area, and then the valid data stored in the memory unit U1 is copied to the memory unit 112, and the new data is It is written to the memory unit U2. Next, the data on the memory unit m is erased and the memory unit ui is moved to the spare area for future use. At the same time, the memory unit U2 is Moved to the data area. In other words, the memory unit U1 logically belongs to the spare area, and the memory unit U2 logically belongs to the data area. Those skilled in the art should appreciate that the logical relationship of the memory cells in the data zone 2010-15314 can be obtained from a logical/entity mapping table. Furthermore, each block in the memory unit has the same number of logical units. That is, the block gossip, the block B1, the block C1, and the block D1 in the memory unit U1 all have the same number of logical units. See Figure 2 for the eye. Figure 2 is a block diagram of a data program planning system in accordance with the present invention. The data programming system includes four channels of non-volatile memory 100 and a controller 210. The controller 21A is used to control the operation of the four-channel non-volatile memory 100, such as program planning, reading, erasing, and the like of data. The controller 210 includes a computing unit 211, a selector 212, a microprocessor 213, a buffer memory 214, a tag management unit 215, the port computing unit 211, the selector 212, and the tag management unit 214. The program is programmed to be executed by the hardware or the object of the memory block (not shown) in the controller 210 or the non-volatile memory. The department plans the data program in the block and the data from the block: The picker 212 includes a system uniform wiper member 2121. The system uniform erasing member 2121 mainly performs a two-first uniform erasing procedure on the four-channel non-volatile memory 1 to select a memory unit from the spare area instead of the data area. In another embodiment, the selector 212 can further include a subsystem-sequential erase component 2122 that performs a second (four) erase on the selected memory unit. The program or the mark management unit arbitrarily checks the mark stored in the reference table to select at least the area machine from the memory unit to be the data program 201015314. In short, the first de-coring program includes the following calculation The f-n value of each memory unit U1~Un represents the cumulative value of the empty = ΐ number among the first counting memory units m~Un of each-like material, and is selected from the memory unit Μ t - with the least | Volume =, and (4) from the empty one.v memory number of the first count value:: two I: in the example 'the first count value may include the number of erases per memory ^ 11 = 1, Order of use, error correction code
修正位元數、讀取次數、使用次數、或閒置次數其中之一。 上述第二均勻抹除程序包含下列步驟··⑷計算每一個 區塊的第=計數值，其中該第二計數值代表四個通道非揮 = = 每「一個區塊的抹除次數累積值;(b)從被選 擇的§己憶體卓⑽區塊當中找出空的區塊；及⑷從空的區 塊虽中"^至具有最少計數值的區塊。依據所欲程式 規劃的大小決㈣取區塊隨量。所欲程式規劃的 Γζΐ,ί，：暫存物件、表格、映㈣或比記憶體 單元谷I小⑽訊。在另—個實施财，該第二計數值可 包括四個通道非揮發性記憶m⑼中每—個區塊的抹除次 數、使用次序、錯誤修正瑪(ECC)的修正位元數、讀取次數、 使用次數、或閒置次數其中之_。 該計算單元211主要計算每一個記憶體單元m 〜Un的第 °十 〜 4數值可為每—個記憶體單元U1〜Un的抹 除次數、使財序、錯雜㈣(ECC)的修錄元數、讀取 次數、使用次數、或閒置次數的—個累積值或前述數值的 組合累積值。在另—個實施财料算單元川進一步計 15 201015314 算-第二計數值，該第二計數值可為四個通道非揮發性記 憶體謂中每-個區塊的抹除次數、使用次序、錯誤修正碼 (ECC)的修正位元數、讀取次數、使用次數、或閒置次數的 一個累積值或前述數值的組合累積值。在另一個實施例 中，該計算單元211只計算部份個記憶體單元饥〜也的第一 計數值’或第二計數值。 因此，上述§己憶體單元可從備用區當中隨機、依序、 或依據該第一計數值來作選擇。同樣地，上述區塊亦可從 〇 被選擇的記憶體單元當中隨機、依序、或依據該第二計數 值來作選擇。若記憶體單元是依據第一計數值來選擇的 話，則被選擇的記憶體單元將是具有空的記憶體空間及最 少第一計數值的一個記憶體單元。同樣地，若區塊是依據 第二計數值來選取的話，則被選取的區塊將是具有空的記 憶體空間及最少第二計數值的一個區塊。 選取區塊的數量取決於所欲程式規劃的資料大小。在 本發明中，所欲程式規劃的資料一般包含諸如暫存物件、 D 表格、映射檔或比記憶體單元容量小的資訊。 控制器210的緩衝記憶體214是用來讓四個通道非揮發 性記憶體100暫時程式規劃系統資料’諸如參考表或映射 表。緩衝記憶體214為一靜態隨機存取記憶體(SRAM)。然 而，本發明並不限於此。應了解’其亦可為一動態隨機存 取記憶體(DRAM)、磁性隨機存取記憶體(MRAM)、相變化 隨機存取記憶體(PRAM)或其他適當的記憶體皆可用於實現 本發明。 201015314 在本實施例中，一旦資料程式規劃於選取區塊中，則 標記管理單元215會在參考表中加入一標記，以標示被選擇 的記憶體單元的區塊的使用狀態，並在所有被選擇的記憶 體單元的區塊被使用後’將參考表中的標記予以刪除。在 標記管理單元215將參考表中的標記刪除後，計算單元211 會以一預設值增加被選擇的記憶體單元的第一計數值。再 者，前述標記不僅可被加入到參考表中，亦可被加入到區 塊的冗餘區。每當程式規劃於選取區塊的資料被抹除，計 〇 算單元211會進一步以一預設值增加選取區塊的第二計數 值。 如上所述，該選取器212會從記憶體單元U1〜Un當中選 擇具有空的s己憶體空間及最少第一計數值的記憶體單元， 再從被選擇的記憶體單元當中選取至少一具有空的記憶體 空間及最少第二計數值的區塊。此外，該選取器212會從參 考表中沒有被標記的記憶體單元當中選取該區塊。在另一 個實施例中，該選取器212會從記憶體單元U1〜Un當中選擇 U I有空的記㈣空間及最少第—計數值的記紐單元，再 直接從參考表中沒有被標記的記憶體單元當中選取該區 塊。 ，此一示範實施例中，該系統均勻抹除構件2121並不 會在每次資料被程式規劃時，進行該第—均勻抹除程 2。該第一均勻抹除程序只會在第一計數值達到一第一預 Γ值時才會被啟動。因此，在第—計數值達到—第一預 设值之前’記憶體單元會經由該選取器犯隨機或依序進行 17 201015314 選擇。在另一個實施例中，該系統均勻抹除構件2121會在 每一次資料被程式規劃時，進行該第一均勻抹除程序。 同樣地，在此一示範實施例中，該子系統均勻抹除構 件2122並不會在每一次資料被程式規劃時，進行該第二均 勻抹除程序。該第二均勻抹除程序只會在第二計數值達到 一第二預設值時，才會被啟動。因此，在第二計數值達到 一第二預設值之前，區塊會經由該選取器212隨機或依序進 行選取。不同之處在於，區塊的選取無關於選取方式，而 0 是基於該區塊是否為一無標記區塊而定。在另一個實施例 中，該子系統均勻抹除構件2122會在每一次資料被程式規 劃時，進行該第二均勻抹除程序。 該四個通道非揮發性記憶體100為一快閃記憶體。更明 確地說，該四個通道非揮發性記憶體1〇〇為一多級單元(MLC) NAND快閃記憶體。然而，本發明並不限於此。該四個通道 非揮發性記憶體1 〇〇亦可為單級單元(SLC) NAND快閃記憶 體。 0 請參照第3A-3C圖及第4圖。第3A-3C圖為依據本發明非 揮發性記憶體管理方法的流程圖，而第4圖為依據本 示記憶體單元U1狀態的參考表的概念圖。如上所述，四個 記憶體模組101、102、103、104中的各別區塊組合成各別 的記憶體單元U1〜Un以增加該四個通道非揮發性記憶體1〇〇 的資料存取速度’如步驟S301所示。然後，藉由°該^取器 212隨機、依序、或經由第-均勻抹除程序從備用區中記憶 體單元U1〜Un當中選擇一記憶體單元，諸如記憶體單元 201015314 二：：驟㈣2所示。接著，藉由該選取器212隨機、依序、 或、、里、第二均勻梂除程序從被選擇的記憶體單itUi當中選 ，至夕區塊，如步驟S303_S305所示。第4圖顯*區塊在依 序被f取時：-記憶體單元U1的參考表概念圖。 右區塊是依序或隨機被選取，一旦區塊被選取，則資 料會被寫入該選取區塊，如步驟S3〇6所示，而一標記會藉 由才不》己管理單元215在參考表中被加入，以標示該選取區塊 的使用狀態’如步驟S3〇7所示。除非該選取區塊上的資料 U 被抹除，否則該選取區塊不會再被選取以供任何進一步資 料的程式規劃。 。在這同時，標記管理單元215會持續判定被選擇的記憶 體單元U1中每一個區塊是否已被標記，如步驟幻⑽所示。 假如每一個被選擇的記憶體單元m的區塊皆已被標記（意 即該被選擇的記憶體單元υ〗已被完全的使用且沒有包含任 何無標記區塊），那麼標記管理單元215會將對應於被選擇的 記憶體單元U1的標記全部刪除，如步驟S309所示。舉例來 ^ 說’如第4圖所示，當區塊A1、區塊B1、區塊C1、區塊D1 已全部被使用且標記時，對應於該被選擇的記憶體單元U1 的標記將全部被刪除。在標記管理單元215刪除該被選擇的 記憶體單元U1的標記後，記憶體單元Ui的第一計數值就會 以一預設值增加，例如：增加1，如步驟;5310所示。 相反地，在步驟S306，資料寫入後，假若被選擇的記 憶體單元U1仍包含無標記區塊’則該無標記區塊將供未來 使用且該標記將維持現狀，不會從參考表中被刪除。如上 201015314 所述，每當欲寫入一資料，記憶體單元會被隨機、依序、 或經由第一均勻抹除程序被選擇，如步驟S302所示，也因 此’記憶體單元U1並不會每一次都被選擇。若同一個記憶 體單元在步驟S302再度被選擇’則選取的區塊將無關於選 取方式，而是基於該區塊是否為一無標記區塊而定，如步 驟S311所示。之後’資料會被寫入該無標記區塊，如步驟 S312所示’且另一個標記會藉由標記管理單元215被加入到 該參考表中’以標示該選取的無標記區塊的使用狀態，如 ϋ 步驟S313所示。接下來’該管理方法將從步驟S308接續。 因此步驟S308-S313會持續地重複。 如第4圖所示，區塊A1在步驟S401被選取及標記。之 後，當資料從區塊A1被抹除後，區塊A1的標記會維持不變， 而區塊B1會在步驟S402被選取及標記。接下來，當資料從 區塊B1被抹除後，區塊A1&B1的標記會維持不變，而區塊 C1會在步驟S403被選取及標記。最後，當資料從區塊(^被 抹除後，區塊Al、Bl、Cl的標記會維#不變，而區塊⑴ 會在步驟S404被選取及標記。此時，區塊Ai、B1、C1、D1 的標記將全部被刪除’且全部成為無標記區塊，如所示S4〇5 步驟。 再者，在另一個實施例中，無標記區塊並不保證其為 空的區塊。無標記區塊僅僅表示其尚未被用來程式規劃具 有小容量的資料，諸如暫存物件、表格、映射槽或比記憶 體單元容量小的資料。若被選擇的記憶體單元不但已由資 料所佔據並在參考表中已標記之外’且該記憶體單元邏輯 20 201015314 上f於資料區時，則該標記管理單元215並不會標記該記憶 體單元而疋改以標記邏輯上屬於備用區且對應於該被選 擇的記憶體單元的另—個記憶體單元 。因此，一旦該被選 #的記‘_單元中的資料被抹除且該被選擇的記憶體單元 n時’則該被選擇的記憶體單元會接續參與該 程f規劃循環。換句話說，假若-無標記區塊邏輯上屬於 Ο ο ，料區，的記㈣單元，職無標㈣塊會等到該記憶 早^^輯上屬於備職時才會被選取。在另一個實施例 纟可被動態儲存於非揮發性記憶體酬的 體叫、備用區、資料區、或其他上述位置中。 <規2標以理早心5加人標記是為了標示資料已程 ί 體單元的區塊中’而該標記在所有的記憶 ===後T以刪除，，該標記會以記 ;了解，：―杳“乂區塊為單位’進行刪除。然而， 二ί別的實施例中，該標記亦可以區塊 程二在擇步的==二區塊是經由第二均勻抹除 被寫入到該選取區塊，如步 示1 中該第-均勻抹除程序是依據該其 ⑽中每i區塊的下道非揮發性記憶體 而進行：抹除次數、使用ίΓ鮮個H或組合累積值 元數、讀取次數、使財數、_置缝ΜΕ=)的修正位 入的資料從選轉塊被抹除，如步驟加所示4料= 21 201015314 211會以一預設值增加選取區塊的第二計數值，如步驟S316 所示。接下來，在選擇記憶體單元之後，當欲寫入另一資 料時，該選取器212會依據該第二計數值選取一區塊。意 即，該選取區塊為被選擇的記憶體單元中具有最少第二計 數值的一個區塊，如步驟S317所示。然後，該管理方法將 從步驟S314接續。而步驟S314-S317會持續地重複。 簡言之，隨機或依序選取一個區塊與經由第二均勻抹 除程序來選取一個區塊在流程上的差異，主要在於前者是 〇 依據一個區塊是否為一無標記區塊來作選取，而後者是依 據一個區塊是否具有最少第二計數值來作選取。 本發明主要防止未使用的記憶體單元區塊同時被抹除 並避免不均勻地使用記憶體單元中的區塊，以延長非揮發 性記憶體的壽命。 縱使本發明已由上述之實施例詳細敘述而可由熟悉本 技藝之人士任施匠思而為諸般修飾，然皆不脫如附申請專 利範圍所欲保護者。 0 22 201015314 【圖式簡單說明】 第1圖為四個通道非揮發性記憶體的概念圖； 第2圖為依據本發明資料程式規劃系統的方塊圖； 第3A-3C圖為依據本發明非揮發性記憶體管理方法的流程 圖；及 第4圖為依據本發明顯示記憶體單元狀態的參考表的概念 圖。 【主要元件符號說明】Correct one of the number of bits, the number of reads, the number of uses, or the number of idles. The second uniform erasing program includes the following steps: (4) calculating the =1th count value of each block, wherein the second count value represents four channels of non-swing == cumulative value of erasure times per "one block"; (b) Find an empty block from the selected § 忆 体 卓 (10) block; and (4) From the empty block, "^ to the block with the least count value. Plan according to the desired program Size (4) Take the block according to the amount. If you want to program the program, ί,: temporary object, table, map (4) or smaller than the memory unit valley I (10). In another implementation, the second count value It may include the number of erasures, the order of use, the number of correction bits of the error correction (ECC), the number of readings, the number of uses, or the number of idle times of each of the four channels of non-volatile memory m(9). The calculation unit 211 mainly calculates the value of the tenth to the fourth values of each of the memory cells m to Un, which can be the number of erasures of each of the memory cells U1 to Un, and the repairing elements of the fiscal order and the miscellaneous (four) (ECC). The cumulative value of the number, number of reads, number of uses, or number of idle times or the aforementioned value Combine the cumulative value. In another implementation, the calculation unit further calculates 15 201015314 calculation - the second count value, which can be erased for each of the four channels of non-volatile memory The number of times, the order of use, the number of correction bits of the error correction code (ECC), the number of readings, the number of uses, or a cumulative value of the number of idle times or a combined cumulative value of the aforementioned values. In another embodiment, the calculation unit 211 Only the first count value or the second count value of a part of the memory unit is calculated. Therefore, the above-mentioned § memory unit can be randomly, sequentially, or according to the first count value from the spare area. Alternatively, the above block may also be selected randomly, sequentially, or according to the second count value from the selected memory unit. If the memory unit is selected according to the first count value, then The selected memory unit will be a memory unit having an empty memory space and a minimum first count value. Similarly, if the block is selected according to the second count value, the selected block will be A block having an empty memory space and a minimum second count value. The number of selected blocks depends on the size of the data planned by the program. In the present invention, the data to be programmed generally includes, for example, a temporary object, D table, map file or information smaller than the capacity of the memory unit. The buffer memory 214 of the controller 210 is used to temporarily program the system data of the four-channel non-volatile memory 100 such as a reference table or a mapping table. The memory 214 is a static random access memory (SRAM). However, the present invention is not limited thereto. It should be understood that it can also be a dynamic random access memory (DRAM), magnetic random access memory (MRAM). ), phase change random access memory (PRAM) or other suitable memory can be used to implement the present invention. 201015314 In this embodiment, once the data program is planned in the selected block, the tag management unit 215 adds a flag to the reference table to indicate the usage status of the block of the selected memory unit, and is used at all After the block of the selected memory unit is used, the tag in the reference table will be deleted. After the mark management unit 215 deletes the mark in the reference table, the calculation unit 211 increments the first count value of the selected memory unit by a preset value. Furthermore, the aforementioned markers can be added not only to the reference list but also to the redundant areas of the block. Whenever the data scheduled by the program in the selected block is erased, the counting unit 211 further increases the second count value of the selected block by a preset value. As described above, the selector 212 selects a memory unit having an empty suffix space and a minimum first count value from among the memory units U1 to Un, and then selects at least one of the selected memory units. An empty memory space and a block of at least a second count value. In addition, the picker 212 selects the block from among the memory cells that are not marked in the reference table. In another embodiment, the selector 212 selects the memory of the UI (U) space and the minimum number of count values from the memory cells U1 to Un, and directly from the reference table. The block is selected from the body unit. In this exemplary embodiment, the system evenly erases the member 2121 and does not perform the first uniform wipe 2 each time the data is programmed. The first uniform erase procedure will only be initiated when the first count value reaches a first pre-value. Therefore, before the first count value reaches the first preset value, the memory unit will be randomly or sequentially selected via the selector 17 201015314 selection. In another embodiment, the system uniform erase component 2121 performs the first uniform erase process each time the data is programmed. Similarly, in this exemplary embodiment, the subsystem evenly erases component 2122 and does not perform the second uniform erase procedure each time the data is programmed. The second uniform erase procedure will only be initiated when the second count value reaches a second preset value. Therefore, before the second count value reaches a second preset value, the block is randomly or sequentially selected by the selector 212. The difference is that the selection of the block has nothing to do with the selection method, and 0 is based on whether the block is an unmarked block. In another embodiment, the subsystem uniform erase component 2122 performs the second uniform erase process each time the data is programmed. The four-channel non-volatile memory 100 is a flash memory. More specifically, the four-channel non-volatile memory is a multi-level cell (MLC) NAND flash memory. However, the invention is not limited thereto. The four channels of non-volatile memory 1 〇〇 can also be single-level cell (SLC) NAND flash memory. 0 Refer to Figures 3A-3C and Figure 4. 3A-3C is a flow chart of a non-volatile memory management method according to the present invention, and Fig. 4 is a conceptual diagram of a reference table according to the state of the memory unit U1. As described above, the respective blocks of the four memory modules 101, 102, 103, and 104 are combined into the respective memory cells U1 to Un to increase the data of the four channels of the non-volatile memory. The access speed is as shown in step S301. Then, the memory unit is selected from the memory cells U1 to Un in the spare area by random, sequential, or via the first-wide erase program, such as the memory unit 201015314 2:: (4) 2 Shown. Then, the randomizer, the sequential, or the, the inner, the second uniform erasing program is selected by the selector 212 from the selected memory unit itUi to the evening block, as shown in steps S303_S305. The fourth figure shows that the *blocks are f-fetched in order: - the conceptual diagram of the reference table of the memory unit U1. The right block is selected sequentially or randomly. Once the block is selected, the data is written into the selected block, as shown in step S3〇6, and a mark is obtained by the management unit 215. The reference table is added to indicate the usage state of the selected block as shown in step S3〇7. Unless the data U on the selected block is erased, the selected block will no longer be selected for programming of any further information. . At the same time, the tag management unit 215 continues to determine whether each of the selected memory cells U1 has been marked, as shown in step (10). If the block of each selected memory unit m has been marked (ie, the selected memory unit has been completely used and does not contain any unmarked blocks), then the tag management unit 215 will All the flags corresponding to the selected memory unit U1 are deleted, as shown in step S309. For example, as shown in FIG. 4, when the block A1, the block B1, the block C1, and the block D1 have all been used and marked, the mark corresponding to the selected memory unit U1 will be all. been deleted. After the tag management unit 215 deletes the tag of the selected memory cell U1, the first count value of the memory cell Ui is incremented by a predetermined value, for example, by one, as shown in step 5310. Conversely, in step S306, after the data is written, if the selected memory unit U1 still contains the unmarked block', the unmarked block will be used for future use and the flag will remain as it is, and will not be from the reference table. been deleted. As described in 201015314, whenever a data is to be written, the memory unit is randomly, sequentially, or selected via the first uniform erase program, as shown in step S302, and thus the memory unit U1 does not Every time I was chosen. If the same memory unit is selected again in step S302, the selected block will be irrelevant, but based on whether the block is an unmarked block, as shown in step S311. Then the 'data will be written to the unmarked block, as shown in step S312 'and another tag will be added to the reference table by the tag management unit 215' to indicate the usage status of the selected unmarked block. , as shown in step S313. Next, the management method will continue from step S308. Therefore, steps S308-S313 are continuously repeated. As shown in Fig. 4, block A1 is selected and marked in step S401. Thereafter, when the data is erased from block A1, the mark of block A1 remains unchanged, and block B1 is selected and marked in step S402. Next, when the data is erased from the block B1, the mark of the block A1 & B1 remains unchanged, and the block C1 is selected and marked in step S403. Finally, when the data is erased from the block (^ is erased, the mark of the blocks A1, B1, and Cl will be unchanged, and the block (1) will be selected and marked in step S404. At this time, the blocks Ai, B1 The flags of C1, D1 will all be deleted 'and all become unmarked blocks, as shown in step S4〇5. Furthermore, in another embodiment, the unmarked block does not guarantee that it is empty. An unmarked block simply indicates that it has not been used to program data with a small capacity, such as a temporary object, a table, a mapping slot, or a data smaller than the memory unit. If the selected memory unit is not only data If it is occupied and is marked in the reference table and the memory unit logic 20 201015314 is on the data area, then the label management unit 215 does not mark the memory unit and tampers to mark the logically belong to the spare And corresponding to another memory unit of the selected memory unit. Therefore, once the data in the selected '_ unit of the selected # is erased and the selected memory unit n is' The selected memory unit will continue to participate In the same way, if the -unmarked block logically belongs to Ο ο , the material area, the record (four) unit, the job without the standard (four) block will wait until the memory is early. In another embodiment, it may be dynamically stored in a body call, a spare area, a data area, or other locations of the non-volatile memory, <2, and the standard is added to the heart. Mark the data in the block of the body unit and the mark is deleted after all the memories ===, and the mark will be recorded; understand:: 杳 "乂 block is the unit' to delete. In another embodiment, the flag may also be block 2, and the == 2 block is written to the selected block via the second uniform erase, as in step 1 of the first - The uniform erase procedure is performed according to the next non-volatile memory of each i block in (10): the number of erasures, the number of used H or the combined cumulative value, the number of readings, the earning number, _ The data of the correction bit =) is erased from the selected block, as shown in the step 4 = 21 201015314 211 A preset value increases the second count value of the selected block, as shown in step S316. Next, after selecting the memory unit, when another data is to be written, the picker 212 will follow the second count value. A block is selected, that is, the selected block is a block having the least second count value among the selected memory cells, as shown in step S317. Then, the management method will continue from step S314. S314-S317 will continue to repeat. In short, the difference between the random or sequential selection of a block and the selection of a block via the second uniform erase program is mainly because the former is based on whether a block is An unmarked block is selected, and the latter is selected based on whether a block has a minimum second count value. The present invention primarily prevents unused memory cell blocks from being erased at the same time and avoids uneven use of blocks in the memory cells to extend the life of the non-volatile memory. The present invention has been described in detail by the above-described embodiments, and may be modified by those skilled in the art, without departing from the scope of the appended claims. 0 22 201015314 [Simple description of the diagram] Figure 1 is a conceptual diagram of four-channel non-volatile memory; Figure 2 is a block diagram of a data programming system according to the present invention; and Figures 3A-3C are non-volatile according to the present invention. A flowchart of a volatile memory management method; and FIG. 4 is a conceptual diagram of a reference table showing the state of a memory cell in accordance with the present invention. [Main component symbol description]
100 非揮發性記憶體 101〜104 記憶體模組 A1 〜An 區塊 B1 〜Bn 區塊 Cl 〜Cn 區塊 D1 〜Dn 區塊 U1 〜Un 記憶體單元 210 控制器 211 計算單元 212 選取器 2121 系統均勻抹除構件 2122 子系統均勻抹除構件 213 微處理器 214 緩衝記憶體 215 標記管理單元 S301〜S317 步驟 S401〜S405 步驟 23100 Non-volatile memory 101~104 Memory module A1~An Block B1~Bn Block Cl~Cn Block D1~Dn Block U1~Un Memory unit 210 Controller 211 Calculation unit 212 Picker 2121 System Uniform erasing member 2122 Subsystem uniform erasing member 213 Microprocessor 214 Buffer memory 215 Marking management unit S301 to S317 Steps S401 to S405 Step 23