TWI470428B - Memory managing method for non-volatile memory and controller using the same - Google Patents

Description

Data programming system, memory tube for non-volatile memory Method and controller

The invention relates to a memory management method, in particular to a subsystem uniform erasing method for non-volatile memory and a controller thereof.

Non-volatile memory systems, such as flash memory storage systems, have increased their usability due to their compact physical size and non-volatile memory reprogramming capabilities. The compact physical size of the flash memory storage system also increases the need for use on increasingly popular electronic devices. Devices that use flash memory storage systems include, but are not limited to, digital cameras, digital video cameras, digital music players, portable computers, and global positioning devices. The ability of the non-volatile memory of the flash memory storage system to be reprogrammed allows the flash memory storage system to be reused.

In general, a flash memory storage system can include a flash memory card and a flash memory chip set. A flash memory chip set typically includes a flash memory component and a controller. In principle, a flash memory chip set can be assembled in an embedded system. The flash memory generally obtained by the manufacturer of the assembly or main system, like other accessories, is presented in the form of components, and then the flash memory and other accessories are assembled into a main system.

Although non-volatile memory, or more specifically, flash memory storage blocks in a flash memory system, can be repeatedly programmed and erased, each block or physical location can only be used before consumption. a specific number of times is wiped Except, that is, before the memory capacity begins to get smaller. In other words, each block has a program plan and erase cycle limit. For some memories, a block can be erased about 10,000 times before the block is considered unusable. For other memory, a block can be erased about 100,000 times or even millions of times before the block is considered to be wasted. When a block is worn out and the performance of the memory capacity of the flash memory system is reduced to a considerable extent, it may be disadvantageous to users of the flash memory system, such as missing programmed data or Program planning information.

The loss of the flash memory system block or physical location will vary depending on the number of times each block program is planned. If a block, or more specifically a storage component, is programmed once and then no longer being reprogrammed, the number of program programming and erase cycles will be lower relative to the worn block. However, if a block is repeatedly written and erased, for example, in a loop, the degree of wear of the block will be relatively high. Those skilled in the art should understand that since the host (ie, the system that accesses or uses the flash memory system) often uses the logical block address to access the data programmed by the program in the flash memory system, if a host repeatedly uses the data. When the same logical block address is used to repeatedly write data, the same physical location or block in the flash memory system will be repeatedly written and erased.

When some blocks are worn out and the remaining blocks are still valid, the worn blocks can affect the overall performance of the flash memory system. In addition to degrading the performance of the block itself, the overall performance of the flash memory system will also be affected when the number of valid blocks is insufficient to program the data. usually, When there are too many worn blocks in the flash memory system, even if there are still other valid blocks in the flash memory system, the flash memory system will still be considered unusable. When a flash memory system containing a significant number of undepleted blocks is considered unusable, many of the resources associated with the flash memory system will be wasted.

In order to make the blocks of the flash memory system evenly wear out, a uniform erase process is often performed. The uniform erase procedure, as is known to those skilled in the art, is used to allow physical locations or blocks associated with a particular logical block address to be replaced such that the same logical block address does not always belong to the same physical location. Or block. By changing the logical block address associated with the block, it is possible to make the specific block less expensive before the other blocks are worn out.

Recently, non-volatile memory that transmits data in units of block combinations is rapidly evolving due to the fact that the non-volatile memory has a faster rate than conventional non-volatile memory that transmits data in units of a single block. Access speed, or make block management easier or reduce the capacity of a mapping table. In other words, the non-volatile memory manages data in units of memory cells rather than blocks. Therefore, the data is also erased in units of memory cells. However, unused blocks in the memory unit may be erased at the same time as the erase, and the blocks of the memory cells may be used unevenly. Therefore, a subsystem uniform erasing method which can prolong the life of non-volatile memory and is used for non-volatile memory and its controller are urgently needed in this related field.

The prior art is limited by the above problems. It is an object of the present invention to provide a memory management method for a non-volatile memory and a controller thereof to prevent unevenness in use of blocks of memory cells.

A first object of the present invention is to provide a memory management method for a non-volatile memory having a plurality of blocks, wherein the blocks have a first number, and the memory management method comprises the following steps: (a) Combining the plurality of blocks into a plurality of memory cells, wherein the memory cells have a second number, and the second number is less than the first number; (b) writing data into the memory cells At least one block; (c) increasing a count value corresponding to the memory unit to which the belonging block is written after the blocks to which one of the memory cells belongs is written; and (d) A uniform erase process is performed on the non-volatile memory based on the count value of at least a portion of the memory cells.

According to the present concept, the memory management method further includes the step of marking the write block between steps (b) and (c).

According to the concept of the present invention, after the data is written to at least one of the memory cells, the method further includes marking the write block in a reference table to indicate the use state of the write block. step.

According to the present invention, after the blocks to which one of the memory cells belongs are written, the step of deleting the mark indicating the memory cell write block from the reference table is further included.

According to the present concept, after all the flags indicating the write block are deleted, the count value of the memory unit is increased by a preset value.

According to the concept of the present invention, after the data of the write block is erased, the count value of the memory unit is increased by a preset value.

According to the concept of the present invention, the count value represents the cumulative value of the erasing times of the memory unit.

According to the present invention, the memory management method between steps (b) and (c) further includes the steps of selecting an unmarked block and writing another material to the selected unmarked block.

According to the present concept, step (d) includes: (d1) calculating a count value of at least a portion of the memory cells; (d2) finding an empty memory cell from at least a portion of the memory cells; and (d3) A memory unit having the smallest count value is selected from the empty memory cells.

According to the present invention, the memory management method in the steps (a) and (b) further includes the steps of: (a1) selecting a memory unit from at least a portion of the memory units; and (a2) At least one block is selected from the selected memory cells.

According to the present invention, the selected memory cells are randomly, sequentially, or selected from at least a portion of the memory cells via a uniform erase process.

According to the concept of the present invention, the selected block is randomly or sequentially selected from the selected memory cells.

According to the present concept, the data is smaller than the capacity of the memory unit.

According to the concept of the present case, the data includes a temporary object, a table, a map file or a data having a smaller capacity than the memory unit.

According to the present concept, the non-volatile memory includes a plurality of channels or data bus bars.

A second object of the present invention is to provide a controller for non-volatile memory having a plurality of blocks, wherein the blocks have a first number, and the blocks are combined into a plurality of memories. a body unit, wherein the memory units have a second quantity, and the second quantity is less than the first quantity, the controller includes: a system uniform erasing member for performing a first uniform erasing of the non-volatile memory a program for selecting a memory unit; and a subsystem uniformly erasing member for performing a second uniform erase process on the selected memory unit to select at least one block from the selected memory unit The program plans a data; thereby preventing the block of the selected memory unit from being used unevenly.

A third object of the present invention is to provide a controller for non-volatile memory having a plurality of blocks, wherein the blocks have a first number, and the blocks are combined into a plurality of memories a body unit, wherein the memory units have a second quantity, and the second quantity is less than the first quantity, the controller includes: a microprocessor for programming the selected block and erasing the selected block Data, a computing unit coupled to the microprocessor for calculating a count value of each of the memory units; and a selector coupled to the microprocessor for selecting an empty memory space and A memory unit that has a minimum count value and is used to select at least one block from the selected memory unit.

According to the concept of the present invention, the selector includes: a subsystem uniform erasing member for performing a first uniform erasing process on one of the memory units a method for selecting at least one block from the memory unit; and a system for uniformly erasing the member for performing a second uniform erase process on the non-volatile memory to select a memory unit to program a data .

According to the concept of the present invention, the controller further includes a buffer memory for programming a reference table; and a tag management unit for adding a mark to the reference table when the data is planned by the program to the selected block. To indicate the usage status of the block of the selected memory unit, and after all the blocks of the selected memory unit are used, to delete the mark in the reference table.

According to the present concept, the count value represents the cumulative value of the number of erasures for each memory cell. Once the tag of the block of the selected memory cell is deleted by the tag management unit, the computing unit will increase the count value of the selected memory cell by a predetermined value.

According to the concept of the present invention, the selected block is an unmarked block. The selector sequentially or randomly selects a block from the selected memory cells.

A fourth object of the present invention is to provide a data program planning system, comprising: a plurality of memory modules each having a plurality of blocks, and the blocks of the respective memory modules are combined into respective memory units. And a controller for controlling a plurality of memory modules, comprising: a calculation unit for calculating a count value of the memory unit; and a selector for selecting an empty memory space with a minimum a value memory unit for selecting at least one block from the selected memory unit; and a microprocessor for programming the selected block and erasing the selected block Material; to prevent the block of the selected memory unit from being used unevenly.

According to the concept of the present invention, the controller further includes a buffer memory for programming a reference table; and a tag management unit for adding a tag to the reference table when the data is planned by the program to the selected block To indicate the usage status of the block of the selected memory unit, and to delete the mark in the reference table after all the blocks of the selected memory unit are used.

A fifth object of the present invention is to provide a memory management method for a non-volatile memory having a plurality of blocks, wherein the blocks have a first number, and the memory management method comprises the following steps: (e) Combining the plurality of blocks into a plurality of memory cells, wherein the memory cells have a second quantity, and the second quantity is less than the first quantity; (b) calculating a first count value of each memory unit; (c) finding an empty memory unit from the memory unit; (d) calculating a second count value for each block of the memory unit; (e) selecting one of the empty memory units a memory unit having a minimum first count value; (f) selecting a block having the least second count value from the selected memory cells; and (g) planning a data program to the selected block; Prevents the block of selected memory cells from being used unevenly.

According to the concept of the present invention, the first count value and the second count value respectively represent an accumulated value of the erasing times of each memory unit and an accumulated value of the erasing times of each block.

A sixth object of the present invention is to provide a controller for non-volatile memory having a plurality of blocks, wherein the blocks have a first number, and the blocks are combined into a plurality of memories a body unit, wherein the memory units have a second quantity, and the second quantity is less than the first quantity, the controller includes: a calculating unit, configured to calculate a first count value of each memory unit and the memory a second count value of each block of the unit; a selector for selecting a memory unit having an empty memory space and a minimum first count value, and for selecting a least second of the selected memory units a block of the count value; and a microprocessor for programming the selected block and erasing the data on the selected block; thereby preventing the block of the selected memory unit from being used unevenly.

A seventh object of the present invention is to provide a data program planning system, comprising: a plurality of memory modules each having a plurality of blocks, and the blocks of the respective memory modules are combined into respective memory units. And a controller for controlling the plurality of memory modules, comprising: a calculating unit, configured to calculate a first count value of each memory unit and a second count value of each block of the memory unit; a selector for selecting a memory unit having an empty memory space and a minimum first count value, and for selecting a block having a minimum second count value from among the selected memory cells; The processor is configured to program the selected block and erase the data on the selected block; thereby preventing the block of the selected memory unit from being used unevenly.

Some exemplary embodiments embodying the features and advantages of the present invention are described in detail in the following description. It is to be understood that the invention is capable of various modifications in the various embodiments of the invention invention.

In the present embodiment, the invention will be presented in four channels of non-volatile memory in which the number of channels is equal to the number of data bus bars. However, those skilled in the art will appreciate that a single channel non-volatile memory composed of a plurality of blocks combined into a memory unit can also be used to implement the spirit of the present invention. Figure 1 is a conceptual diagram of four channels of non-volatile memory, wherein the number of blocks of the non-volatile memory is the first number. As shown in FIG. 1, the four-channel non-volatile memory 100 has four memory modules 101, 102, 103, and 104, and each memory module has n blocks, and n is an integer. Therefore, the first quantity referred to above is 4n in this embodiment. For example, the memory module 101 includes blocks A1 to An, the memory module 102 includes blocks B1 to Bn, the memory module 103 includes blocks C1 to Cn, and the memory module 104 includes blocks D1 and Dn. In order to increase the data access speed of the four-channel non-volatile memory 100 and make the block management easier or reduce the capacity of the mapping table, it will have the first number of 4n blocks in the non-volatile memory 100. The respective blocks in the memory modules 101, 102, 103, and 104 are combined into a plurality of memory cells U1 to Un, wherein the memory cells U1 to Un have a second number, and the second number is smaller than the number In one embodiment, the second quantity is n in this embodiment. For example, the block A1, the block B1, the block C1, and the block D1 are combined into the memory unit U1. In other words, the four-channel non-volatile memory 100 has n memory cells U1~Un.

Furthermore, in order to efficiently program (ie, write and erase) the non-volatile memory 100, the respective blocks A1~An, B1~Bn, C1~ in the memory modules 101, 102, 103, 104 Cn, D1~Dn will be logically combined into a system area, a data area, and a spare area. That is, the non-volatile memory 100 has a system area, a data area, and a spare area in each memory module. In general, the data area accounts for approximately 90% of the entire memory module.

The system area is mainly used to record system data, such as the area code of the memory module; the block code of each area; the page number of each block; and the logical/entity mapping table. The data area is mainly used to store user data. The spare area is used to provide an alternative empty block to replace the block in the data area. In detail, when a new data is to be written to an address where the data already exists, the existing data must be erased first.

Since the memory unit still in the memory unit data area is a minimum management unit in the mapping table, the data stored in the original memory unit will be copied to the spare area before the original memory unit is about to be erased. In another memory unit. For example, when a new data is about to be written to the memory unit U1 in which the data is already stored and located in the data area, another memory unit U2 is selected from the spare area and then stored in the memory unit. The valid data of U1 will be copied to the memory unit U2, and the new data will be written to the memory unit U2. Next, the data on the memory unit U1 will be erased and the memory unit U1 will be moved to the spare area for future use. At the same time, the memory unit U2 will be moved to the data area. In other words, the memory unit U1 logically belongs to the spare area, and the memory unit U2 logically belongs to the data area. Those familiar with this art should understand that the information The logical relationship of the memory cells in the region can be obtained by a logical/entity mapping table. Furthermore, each block in the memory unit has the same number of logical units. That is, the block A1, the block B1, the block C1, and the block D1 in the memory unit U1 all have the same number of logical units.

Please refer to Figure 2. Figure 2 is a block diagram of a data program planning system in accordance with the present invention. The data programming system includes four channels of non-volatile memory 100 and a controller 210. The controller 210 is used to control the operation of the four-channel non-volatile memory 100, such as program planning, reading, erasing, and the like of data. The controller 210 includes a computing unit 211, a selector 212, a microprocessor 213, a buffer memory 214, and a tag management unit 215. The computing unit 211, the selector 212, and the tag management unit 214 can all be executed by hardware or firmware programmed in the controller 210 or the memory block (not shown) in the non-volatile memory 100. The microprocessor 213 is responsible for planning the data program in the block and erasing the data from the block.

The picker 212 includes a system uniform wiper member 2121. The system uniform erasing member 2121 performs a first uniform erasing process on the four-channel non-volatile memory 100 to select a memory unit from the spare area instead of the data area. In another embodiment, the picker 212 can further include a subsystem uniform eraser member 2122 that performs a second uniform erase procedure on the selected memory unit or via The tag management unit 215 checks the tags stored in the reference table to select at least one of the selected memory cells as the data program plan.

In short, the first uniform erase program includes the following steps: (e) calculating a first count value of each of the memory units U1 to Un, wherein the first count value represents a wipe of each of the memory units U1 to Un. (b) finding an empty memory cell from the memory cells U1 to Un; and (c) selecting a memory cell having a minimum first count value from the empty memory cells. In another embodiment, the first count value may include the number of erasures of each memory unit U1~Un, the order of use, the number of correction bits of the error correction code (ECC), the number of readings, the number of uses, or One of the number of idle times.

The second uniform erase program includes the following steps: (a) calculating a second count value for each of the blocks, wherein the second count value represents the number of erases of each of the four channels of non-volatile memory 100. Cumulative value; (b) finding an empty block from among the blocks of the selected memory unit; and (c) selecting at least one block having the least count value from the empty blocks. The number of selected blocks is determined according to the size of the data planned by the desired program. The data planned by the program generally includes information such as temporary storage objects, tables, mapping files or smaller than the capacity of the memory unit. In another embodiment, the second count value may include the number of erasures, the order of use, the number of correction bits of the error correction code (ECC), and the read number of each of the four channels of non-volatile memory 100. One of the number of times, the number of uses, or the number of idles.

The calculating unit 211 mainly calculates a first count value of each of the memory units U1 to Un, and the first count value may be the erasing frequency, the use order, and the error correction code (ECC) of each of the memory units U1 to Un. Corrects a cumulative value of the number of bits, the number of readings, the number of uses, or the number of idle times or a combined cumulative value of the aforementioned values. In another embodiment, the computing unit 211 further calculates Calculating a second count value, which may be the number of erasures, the order of use, the number of correction bits of the error correction code (ECC), and the read number of each of the four channels of non-volatile memory 100 A cumulative value of the number of times, the number of uses, or the number of idle times or a combined cumulative value of the aforementioned values. In another embodiment, the calculating unit 211 calculates only the first count value or the second count value of the partial memory units U1~Un.

Therefore, the above memory unit can be selected randomly, sequentially, or according to the first count value from the spare area. Similarly, the above blocks may also be selected randomly, sequentially, or according to the second count value from the selected memory cells. If the memory unit is selected based on the first count value, then the selected memory unit will be a memory unit having an empty memory space and a minimum first count value. Similarly, if the block is selected based on the second count value, the selected block will be a block having an empty memory space and a minimum second count value.

The number of selected blocks depends on the size of the data planned by the program. In the present invention, the data to be programmed generally includes information such as a temporary object, a table, a map file, or a smaller capacity than the memory unit.

The buffer memory 214 of the controller 210 is used to temporarily program the four-channel non-volatile memory 100 with system data, such as a reference table or a mapping table. Buffer memory 214 is a static random access memory (SRAM). However, the invention is not limited thereto. It should be understood that it can also be a dynamic random access memory (DRAM), magnetic random access memory (MRAM), phase change random access memory (PRAM) or other suitable memory for implementing the present invention. .

In this embodiment, once the data program is planned in the selected block, the tag management unit 215 adds a flag to the reference table to indicate the usage status of the block of the selected memory unit, and is selected at all. After the block of the memory unit is used, the tag in the reference table is deleted. After the mark management unit 215 deletes the mark in the reference table, the calculation unit 211 increments the first count value of the selected memory unit by a preset value. Furthermore, the aforementioned markers can be added not only to the reference list but also to the redundant areas of the block. Whenever the data planned by the program in the selected block is erased, the calculating unit 211 further increases the second count value of the selected block by a preset value.

As described above, the selector 212 selects a memory unit having an empty memory space and a minimum first count value from among the memory units U1 to Un, and selects at least one of the selected memory units from the selected memory unit. A block of memory space and a minimum of second count values. In addition, the picker 212 selects the block from among the memory cells that are not marked in the reference table. In another embodiment, the selector 212 selects a memory unit having an empty memory space and a minimum first count value from the memory cells U1~Un, and directly from the referenced memory in the reference table. Select the block from the unit.

In this exemplary embodiment, the system evenly erases the member 2121 and does not perform the first uniform erase procedure each time the data is programmed. The first uniform erase program will only be activated when the first count value reaches a first preset value. Therefore, before the first count value reaches a first preset value, the memory unit is randomly or sequentially performed via the selector 212. select. In another embodiment, the system uniform erase component 2121 performs the first uniform erase process each time the data is programmed.

Similarly, in this exemplary embodiment, the subsystem evenly erases the member 2122 and does not perform the second uniform erase procedure each time the data is programmed. The second uniform erase program will only be activated when the second count value reaches a second preset value. Therefore, before the second count value reaches a second preset value, the block is randomly or sequentially selected by the selector 212. The difference is that the selection of the block is not related to the selection method, but based on whether the block is an unmarked block. In another embodiment, the subsystem uniform erase component 2122 performs the second uniform erase process each time the data is programmed.

The four-channel non-volatile memory 100 is a flash memory. More specifically, the four-channel non-volatile memory 100 is a multi-level cell (MLC) NAND flash memory. However, the invention is not limited thereto. The four-channel non-volatile memory 100 can also be a single-level cell (SLC) NAND flash memory.

Please refer to Figures 3A-3C and Figure 4. 3A-3C is a flow chart of a non-volatile memory management method according to the present invention, and FIG. 4 is a conceptual diagram showing a reference table showing the state of the memory unit U1 in accordance with the present invention. As described above, the respective blocks of the four memory modules 101, 102, 103, and 104 are combined into the respective memory cells U1 to Un to increase the data access of the four channels of the non-volatile memory 100. The speed is as shown in step S301. Then, the memory unit, such as a memory unit, is selected from the memory cells U1~Un in the spare area by the selector 212 randomly, sequentially, or via the first uniform erase program. U1 is as shown in step S302. Then, at least one block is selected from the selected memory cells U1 by the selector 212 randomly, sequentially, or via a second uniform erase program, as shown in steps S303-S305. Figure 4 shows a conceptual diagram of a reference table of a memory unit U1 when the blocks are sequentially selected.

If the block is selected sequentially or randomly, once the block is selected, the data is written into the selected block, as shown in step S306, and a flag is added to the reference table by the tag management unit 215. To indicate the usage status of the selected block, as shown in step S307. Unless the data on the selected block is erased, the selected block will no longer be selected for programming of any further data.

At the same time, the tag management unit 215 continues to determine whether each of the selected memory cells U1 has been marked, as shown in step S308. If the block of each selected memory unit U1 has been marked (ie, the selected memory unit U1 has been completely used and does not contain any unmarked blocks), then the tag management unit 215 will The flags corresponding to the selected memory unit U1 are all deleted, as shown in step S309. For example, as shown in FIG. 4, when the block A1, the block B1, the block C1, and the block D1 have all been used and marked, the marks corresponding to the selected memory unit U1 will all be marked. delete. After the mark management unit 215 deletes the mark of the selected memory unit U1, the first count value of the memory unit U1 is increased by a preset value, for example, by one, as shown in step S310.

Conversely, in step S306, after the data is written, if the selected memory unit U1 still contains an unmarked block, the unmarked block will be used for future use and the mark will maintain the status quo, and will not be from the reference table. been deleted. As above As described above, each time a data is to be written, the memory unit is selected randomly, sequentially, or via a first uniform erase program, as shown in step S302, and therefore, the memory unit U1 does not occur every time. Have been chosen. If the same memory unit is selected again in step S302, the selected block will be irrelevant to the selection mode, but based on whether the block is an unmarked block, as shown in step S311. Thereafter, the data is written to the unmarked block, as shown in step S312, and another tag is added to the reference table by the tag management unit 215 to indicate the usage status of the selected unmarked block. , as shown in step S313. Next, the management method will continue from step S308. Therefore, steps S308-S313 are continuously repeated.

As shown in Fig. 4, block A1 is selected and marked in step S401. Thereafter, when the data is erased from the block A1, the mark of the block A1 remains unchanged, and the block B1 is selected and marked in step S402. Next, when the data is erased from the block B1, the marks of the blocks A1 and B1 remain unchanged, and the block C1 is selected and marked in step S403. Finally, when the data is erased from block C1, the flags of blocks A1, B1, C1 will remain unchanged, and block D1 will be selected and marked in step S404. At this point, the tags of blocks A1, B1, C1, D1 will all be deleted and all become unmarked blocks, as shown in step S405.

Moreover, in another embodiment, an unmarked block does not guarantee that it is an empty block. An untagged block simply indicates that it has not been used to program a material with a small capacity, such as a temporary object, a table, a map file, or a data smaller than the memory unit. If the selected memory cell is not only occupied by the data but has been marked in the reference table, and the memory cell logic When the upper part belongs to the data area, the mark management unit 215 does not mark the memory unit, but instead marks another memory unit that logically belongs to the spare area and corresponds to the selected memory unit. Therefore, once the data in the selected memory unit is erased and the selected memory unit is changed to the spare area, the selected memory unit will continue to participate in the program planning loop. In other words, if an unmarked block logically belongs to a memory cell in a data area, the unmarked block will be selected until the memory cell logically belongs to the spare area. In another embodiment, the reference table can be dynamically stored in the buffer memory 214 of the non-volatile memory 100, the spare area, the data area, or other locations as described above.

The mark is added by the mark management unit 215 to indicate that the data has been programmed in a block of a memory unit, and the mark is deleted after all the blocks of the memory unit are marked. That is, the tag is deleted in units of memory cells instead of in blocks. However, it should be understood that in other embodiments, the tag may also be deleted in units of blocks.

Furthermore, in steps S303-305, if the block is selected from the selected memory unit U1 via the second uniform erase program, the data is written to the selected block after the block is selected. , as shown in step S314. The second uniform erasing procedure is performed according to a cumulative value or a combined cumulative value of the following values of each of the four channels of non-volatile memory 100: erasing times, order of use, error correction code ( ECC) The number of modified bits, the number of reads, the number of uses, or the number of idles. Thereafter, once the written data is erased from the selected block, as shown in step S315, the computing unit 211 will increase the second count value of the selected block by a preset value, as shown in step S316. Next, after selecting the memory unit, when another data is to be written, the selector 212 selects a block according to the second count value. That is, the selected block is one of the selected memory cells having the least second count value, as shown in step S317. Then, the management method will continue from step S314. Steps S314-S317 will continue to repeat.

In short, the difference between the random selection or the sequential selection of a block and the selection of a block via the second uniform erase program is mainly because the former is selected according to whether a block is an unmarked block. The latter is selected based on whether a block has a minimum second count value.

The present invention primarily prevents unused memory cell blocks from being erased at the same time and avoids uneven use of blocks in the memory cells to extend the life of the non-volatile memory.

The present invention has been described in detail by the above-described embodiments, and may be modified by those skilled in the art, without departing from the scope of the appended claims.

100‧‧‧Non-volatile memory

101~104‧‧‧ memory module

Block A1~An‧‧‧

B1~Bn‧‧‧ Block

C1~Cn‧‧‧ Block

D1~Dn‧‧‧ Block

U1~Un‧‧‧ memory unit

210‧‧‧ Controller

211‧‧‧Computation unit

212‧‧‧Selector

2121‧‧‧ system uniform wiping member

2122‧‧‧Subsystem uniform wiping member

213‧‧‧Microprocessor

214‧‧‧ buffer memory

215‧‧‧Mark Management Unit

S301~S317‧‧‧Steps

S401~S405‧‧‧Steps

1 is a conceptual diagram of four-channel non-volatile memory; FIG. 2 is a block diagram of a data programming system according to the present invention; and FIG. 3A-3C is a flow chart of a non-volatile memory management method according to the present invention; And FIG. 4 is a conceptual diagram of a reference table showing the state of the memory cell in accordance with the present invention.

110‧‧‧Non-volatile memory

210‧‧‧ Controller

211‧‧‧Computation unit

212‧‧‧Selector

2121‧‧‧ system uniform wiping member

2122‧‧‧Subsystem uniform wiping member

213‧‧‧Microprocessor

214‧‧‧ buffer memory

215‧‧‧Mark Management Unit

Claims (59)

A memory management method for a non-volatile memory having a plurality of blocks, wherein the blocks have a first number, the memory management method comprising the steps of: (a) combining the plurality of blocks into a plurality of memory cells, wherein the memory cells have a second number, and the second number is less than the first number; (b) writing data to at least one of the memory cells; (c) After the blocks to which one of the memory cells belongs are written, the count value corresponding to the memory cells to which the associated block is written is increased; and (d) according to at least part of the memory cells The count value is a uniform erase procedure for the non-volatile memory. The memory management method according to claim 1, wherein the step of marking the writing block is further included between the steps (b) and (c). The memory management method of claim 2, wherein after the data is written to at least one of the memory cells, the method further includes: marking the write block in a reference table, The step of indicating the state of use of the write block. The memory management method of claim 3, wherein after the block to which one of the memory cells belongs is written, the method further includes deleting the memory cell write area from the reference table. The step of marking the block. The memory management method of claim 4, wherein the count value of the memory unit is increased by a preset value after all the marks indicating the write block are deleted. The method for managing a memory as described in claim 1, wherein After the data of the write block is erased, the count value of the memory unit is increased by a preset value. The memory management method according to claim 1, wherein between steps (b) and (c), further comprising: selecting an unmarked block and writing another data to the selected unmarked block. step. The memory management method according to claim 1, wherein the count value represents an accumulated value of the erasing times of the memory unit. The memory management method of claim 1, wherein the step (d) comprises: (d1) calculating a count value of at least a portion of the memory unit; (d2) from at least a portion of the memory units. Finding an empty memory unit; and (d3) selecting a memory unit having the least count value from the empty memory unit. The memory management method of claim 1, further comprising the steps of: (a1) selecting a memory from at least a portion of the memory cells between steps (a) and (b); And (a2) selecting at least one block from the selected memory unit. The memory management method of claim 10, wherein the selected memory unit is randomly selected from at least a portion of the memory units. The memory management method of claim 10, wherein the selected memory unit is sequentially from at least a portion of the memory units Choose it out. The memory management method of claim 10, wherein the selected memory unit is selected from at least a portion of the memory units via a uniform erase program. The memory management method of claim 10, wherein the selected block is randomly selected from the selected memory unit. The memory management method according to claim 10, wherein the selected block is sequentially selected from the selected memory unit. The memory management method according to claim 1, wherein the data is smaller than a capacity of the memory unit. The memory management method according to claim 1, wherein the data comprises a temporary storage object, a table, a mapping file or a data having a smaller capacity than the memory unit. The memory management method of claim 1, wherein the non-volatile memory comprises a plurality of channels. The memory management method of claim 1, wherein the non-volatile memory comprises a plurality of data bus bars. A controller for non-volatile memory, the non-volatile memory having a plurality of blocks, wherein the blocks have a first number, and the blocks are combined into a plurality of memory cells, wherein the memory The unit has a second quantity, and the second quantity is less than the first quantity, the controller includes: a system uniform erasing member for performing a first uniform erasing process on the non-volatile memory, wherein the first uniform An erase program for selecting another memory unit to copy valid data of a raw memory unit to the other a memory unit and erasing data of the original memory unit; and a subsystem uniformly erasing member for performing a second uniform erasing process on the selected memory unit to select from the selected memory Selecting at least one block from the plurality of blocks of the volume unit as a data program plan, wherein the selected at least one block does not have a mark; thereby preventing the block of the selected memory unit from being used. average. A controller for non-volatile memory, the non-volatile memory having a plurality of blocks, wherein the blocks have a first number, and the blocks are combined into a plurality of memory cells, wherein the memory The unit has a second quantity, and the second quantity is less than the first quantity. The controller includes: a microprocessor for programming the selected block and erasing the data on the selected block; a computing unit, coupling The microprocessor is configured to calculate a count value of the memory cells; and a selector coupled to the microprocessor for selecting a memory cell having an empty memory space and a minimum count value, and for At least one block is selected from the selected memory cells, wherein only the corresponding count values of the memory cells are increased after all the blocks in the memory cells are written. The controller of claim 21, wherein the selector comprises: a subsystem uniform erasing member for performing a second uniform erasing procedure on one of the memory units to extract from the memory Select at least one of the units a block; and a system for uniformly erasing the component for performing a first uniform erase process on the non-volatile memory to select a memory cell to program a data. The controller of claim 21, further comprising a buffer memory for programming a reference table. The controller of claim 23, further comprising a tag management unit for adding a flag to the reference table to indicate the selected memory when the data is programmed into the selected block. The state of use of the block of the body unit, and after all the blocks of the selected memory unit are used, are used to delete the mark in the reference table. The controller of claim 24, wherein the selected block is an unmarked block. The controller of claim 21, wherein the count value represents an accumulated value of the number of erasures of each memory unit. The controller of claim 24, wherein once the tag of the selected memory cell block is deleted by the tag management unit, the computing unit increases the count value of the selected memory cell by one Set the value. The controller of claim 21, wherein the selector sequentially selects a block from the selected memory unit. The controller of claim 21, wherein the selector randomly selects a block from the selected memory cells. The controller of claim 21, wherein the data comprises a temporary object, a table, a mapping file or a data smaller than a memory unit. For example, the controller described in claim 21, wherein the data ratio is The capacity of the selected memory unit is small. The controller of claim 21, wherein the non-volatile memory comprises a plurality of channels. The controller of claim 21, wherein the non-volatile memory comprises a plurality of data bus bars. A data program planning system includes: a plurality of memory modules each having a plurality of blocks, the blocks of the respective memory modules being combined into respective memory units; and a controller for Controlling a plurality of memory modules, comprising: a calculation unit for calculating a count value of the memory unit; and a selector for selecting a memory unit having an empty memory space and a minimum count value, and Selecting at least one block from the selected memory cells to prevent uneven use of the selected memory cells; and a microprocessor for programming the selected blocks and erasing the blocks The data on the block is selected, and only the corresponding counts of the memory unit are increased after all the blocks in the memory unit are written. The data programming system of claim 34, wherein the controller further comprises a buffer memory for programming a reference table. The data program planning system of claim 35, wherein the controller further comprises a mark management unit for adding a mark to the reference table when the data is planned by the program to the selected block, Marking the usage status of the block of the selected memory unit and selecting all of the selected ones After the block of the memory unit is used, it is used to delete the mark in the reference table. The data programming system of claim 36, wherein the selected block is an unmarked block. The data programming system of claim 34, wherein the count value represents an accumulated value of the number of erasures per memory unit. The data program planning system according to claim 36, wherein the calculation unit will increase the count value of the selected memory unit once the mark of the selected memory unit block is deleted by the mark management unit. A preset value. The data program planning system of claim 34, wherein the selector sequentially selects the block from the selected memory unit. The data programming system of claim 34, wherein the selector randomly selects a block from the selected memory unit. For example, the data program planning system described in claim 34, wherein the data includes a temporary storage object, a table, a mapping file or a data smaller than a memory unit. For example, the data program planning system described in claim 34, wherein the data is smaller than the capacity of the selected memory unit. A memory management method for a non-volatile memory having a plurality of blocks, wherein the blocks have a first number, the memory management method comprising the steps of: (a) combining the plurality of blocks into a plurality of memory cells, wherein the memory cells have a second number, and the second number is less than the first number; (b) calculating a first count value of each memory cell; (c) finding an empty memory unit from the memory unit; (d) calculating a second count value for each block of the memory unit; (e) selecting one of the empty memory units Another memory unit having a minimum first count value; (f) selecting at least one block having the least second count value from the selected memory unit; and (g) validating data of a raw memory unit Copying to the other memory unit and erasing the data of the original memory unit; thereby preventing the block of the selected memory unit from being used unevenly. The memory management method according to claim 44, wherein the first count value and the second count value respectively represent an accumulated value of erasing times of each memory unit and an accumulation of erasure times of each block. value. The memory management method according to claim 44, wherein the data comprises a temporary storage object, a table, a mapping file or a data having a smaller capacity than a memory unit. The memory management method of claim 44, wherein the data is smaller than a capacity of the selected memory unit. The memory management method of claim 44, wherein the non-volatile memory comprises a plurality of channels. The memory management method of claim 44, wherein the non-volatile memory comprises a plurality of data bus bars. A controller for non-volatile memory, the non-volatile memory having a plurality of blocks, wherein the blocks have a first number, and the block combinations And a plurality of memory cells, wherein the memory cells have a second quantity, and the second quantity is less than the first quantity, the controller includes: a calculating unit, configured to calculate a first count value of each memory unit And a second count value of each block of the memory unit; a selector for selecting another memory cell having an empty memory space and a minimum first count value, and for selecting from the selected memory unit And selecting at least one block having a minimum second count value among the blocks; and a microprocessor for copying valid data of a original memory unit to the other memory unit and erasing the original The data of the memory unit; thereby preventing the use of the blocks of the selected memory unit from being uneven. The controller of claim 50, wherein the first count value and the second count value respectively represent an accumulated value of erasure times of each memory unit and an accumulated value of erasure times of each block. The controller of claim 50, wherein the data comprises a temporary storage object, a table, a mapping file or a data smaller than a memory unit. The controller of claim 50, wherein the data is smaller than a capacity of the selected memory unit. The controller of claim 50, wherein the non-volatile memory comprises a plurality of channels. The controller of claim 50, wherein the non-volatile memory comprises a plurality of data busses. A data program planning system includes: a plurality of memory modules, each of which has a plurality of blocks, and respective memories The blocks of the module are combined into separate memory units; and a controller for controlling the plurality of memory modules, comprising: a calculating unit for calculating the first count value of each memory unit and a second count value of each block of the memory unit; a selector for selecting another memory cell having an empty memory space and a minimum first count value, and for selecting from the selected memory unit Selecting at least one block having a minimum second count value among the plurality of blocks; and a microprocessor for copying valid data of a original memory unit to the other memory unit and erasing the original The data of the memory unit; thereby preventing the use of the blocks of the selected memory unit from being uneven. The data program planning system of claim 56, wherein the first count value and the second count value respectively represent an accumulated value of erasing times of each memory unit and an accumulation of erasure times of each block. value. For example, the data program planning system described in claim 56, wherein the data includes a temporary storage object, a table, a mapping file or a data smaller than a memory unit. For example, the data program planning system described in claim 56, wherein the data is smaller than the capacity of the selected memory unit.