201008000 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種熱電模組之製造方法，特別是指 一種提高良率的熱電模組之製造方法。 【先前技術】 一般而言，業者以半導體材料製造熱電模組時，為求 極高的熱電性質’大多選用銻化鉍材料經過摻雜後，得到 一 p型熱電塊體和一 η型熱電塊體，然後，再進行切割， 形成許多單一晶粒，再將每一 ρ型晶粒和η型晶粒交錯並 透過焊錫固定於二片佈有金屬電極圖形之氧化鋁基絕緣導 熱板上。 以美國專利第3780425號揭示的熱電單元之製造方法 ’將摻有ρ型和η型的熱電材料分別以粉末冶金法壓製成 塊後’經過刀具切割，得到多數片的ρ型熱電片和η型熱 電片，將ρ型熱電片與η型熱電片交錯排列後，以多張浸 滿樹脂的紙插設於每一 Ρ型熱電片和η型熱電片之間，然 後對該ρ型和η型熱電片沿一方向相向擠壓，使樹脂填滿 於該ρ型和η型熱電片之間，並持續對該ρ型和η型熱電 片擠壓，直到該樹脂固化成型後；再以相同製造方法進行 另一方向的切割、對應排列、灌膠擠壓，及固化成型，然 後與導電體連接形成電迴路。 由於銻化鉍材料是脆性材料，因此，依前述美國第 3780425號專利案實施時，則容易使得ρ型和^型熱電體在 切。彳過程中，因爻到外力的作用，而使該ρ型和η型的熱 5 201008000 電趙有晶粒缺角、晶粒破碎以及晶粒劈裂的情形發生，進 而影響録化叙材料對熱電性質的影響。 】此外，依照美國專利第6274803號揭示的熱電模組之 製造方法顯示，先將p型熱電體塊和n型熱電體塊分別設 於二平板上，再分別利用機械加工的方式，在該二平板上 直接對該ρ型熱電體塊和η型熱電體塊加工，藉以切削出 多數柱狀且相同尺寸並呈間隔排列的ρ型熱電體和η型熱 電趙’然後將該二平板相互蓋合於對應的間隔中，如此使ρ 型熱電體# η型熱電體形成交錯矩陣排列的態樣，然後進 行灌膠iHt ’設置電極層’並以絕緣導熱基板予以封裝。 准，此種機械加工方式，在切削過程中，容易產生許 多P型熱電體和η型熱電體的碎屑，而這些被切削下來的 碎屬並無法回收再加以利，因而很容易造成材料上的浪 費’而使得整個生產成本提高，再者，此種利用直接切割 裸材的方式，仍然會在刀具切削和挖掘的接觸處形成有晶 粒缺角破碎以及晶粒劈裂的情形發生，因而降低該熱電體 對熱電性質的傳輸能力’使得熱電模組的整體良率下降， 無法達到品管要求造成生產率不佳。 如上所述，為了避免p型熱電體和η型熱電體的晶粒 在切削過程中’受到損壞、缺角和劈裂的情況發生，而影 響熱電模組的工作效率’是故急需找尋一種有效的解決方 法。 【發明内容】 因此，本發明之目的，即在提供一種熱電模組的製造 201008000 方法’提昇製造的良率，利用先包埋後切割、排列的方法 ，使熱電體在切割過程中減少晶粒缺角和劈裂的不良現象 發生’得到完整的熱電體晶粒，如此保持熱電體的優良傳 導性質。 於是，本發明之熱電模組之製造方法，包含一包埋步 驟、-縱切步驟、—排列步驟、—第一固化步驟、一橫切 步驟、一錯排步驟、一第二固化步驟、一研磨步驟，及一 封裝步驟。 該包埋步驟是將一 P型半導體塊材和一 η型半導體塊 材分別以-絕緣材包埋，得到—ρ型熱電塊和—η型熱電 塊。 該縱切步驟是分別切割該ρ型熱電塊和η型熱電塊， 侍到多數片皆具有ρ型熱電條的ρ型熱電片及多數片皆 具有η型熱電條的η型熱電片。 該排列步驟是將該等Ρ型熱電片和η型熱電片交錯間 隔地排列。 該第固化步驟是將該絕緣材佈滿於該排列步驟形成 的門隔内#到—具有ρ型熱電片和η型熱電片交錯排列 的組合熱電塊。 該橫切步驟是切割該組合熱電塊，得到多數片具有ρ 型熱電單it和η型熱電單元交錯排列的組合熱電片。 該錯排步驟是將該等組合熱電片間隔錯位地排列，使 每—組合熱電片的Ρ型熱電單元對應於相鄰之另一組合熱 電片的η型熱電單元。 201008000 孩第二固化步驟是將該絕緣材佈滿於該錯排步驟 的間隔中，並得到—頂部與底部皆呈p型、n型熱電單_二 錯矩陣排列的矩陣熱電塊 几父 〜該研磨步驟是分別對該矩陣熱電塊的頂部與底部研磨 得到-待處理熱電塊，該待處理熱電塊的頂面和底面是 呈該Ρ型、η型熱電單元皆暴露於外。 疋201008000 IX. Description of the Invention: [Technical Field] The present invention relates to a method of manufacturing a thermoelectric module, and more particularly to a method of manufacturing a thermoelectric module for improving yield. [Prior Art] In general, when manufacturing thermoelectric modules from semiconductor materials, in order to obtain extremely high thermoelectric properties, most of the plutonium-based materials are doped to obtain a p-type thermoelectric block and an n-type thermoelectric block. The body is then cut to form a plurality of single crystal grains, and each of the p-type grains and the n-type grains are interleaved and fixed by soldering on two alumina-based insulating thermally conductive plates on which metal electrode patterns are arranged. According to the manufacturing method of the thermoelectric unit disclosed in U.S. Patent No. 3,780,425, the thermoelectric materials doped with p-type and n-type are respectively pressed into pieces by powder metallurgy, and then cut by a cutter to obtain a plurality of p-type thermoelectric sheets and n-types. In the thermoelectric sheet, after the p-type thermoelectric sheet and the n-type thermoelectric sheet are staggered, a plurality of paper-impregnated paper is interposed between each of the tantalum-type thermoelectric sheets and the n-type thermoelectric sheet, and then the p-type and the n-type are The thermoelectric sheets are pressed in opposite directions to fill the resin between the p-type and n-type thermoelectric sheets, and the p-type and n-type thermoelectric sheets are continuously pressed until the resin is cured and formed; The method performs cutting, corresponding alignment, potting extrusion, and solidification molding in another direction, and then is connected with the electrical conductor to form an electrical circuit. Since the bismuth telluride material is a brittle material, it is easy to make the p-type and type-type thermoelectric bodies cut when implemented in the aforementioned U.S. Patent No. 3,780,425. In the process of bismuth, due to the action of external force, the p-type and n-type heat 5 201008000 electric Zhao has grain nicking, grain breakage and grain splitting, which affects the thermoelectric properties of the recorded materials. Impact. In addition, according to the manufacturing method of the thermoelectric module disclosed in U.S. Patent No. 6,274,083, the p-type thermoelectric block and the n-type thermoelectric block are respectively disposed on the two flat plates, and then respectively processed by means of machining, in the second The p-type thermoelectric block and the n-type thermoelectric block are directly processed on the flat plate, thereby cutting out a plurality of column-shaped and the same size and arranged at intervals, a p-type thermoelectric body and an n-type thermoelectric Zhao', and then the two plates are covered with each other. In the corresponding interval, the p-type thermoelectric body #n-type thermoelectric bodies are arranged in an interlaced matrix, and then the electroplating iHt 'set electrode layer' is applied and encapsulated by an insulating and thermally conductive substrate. Quasi-, this kind of machining method, in the cutting process, it is easy to produce a lot of P-type thermoelectric body and n-type thermoelectric body debris, and these cut sub-genus can not be recycled and then benefit, so it is easy to cause material The waste's increase the overall production cost. Moreover, the way of directly cutting the bare material still forms a phenomenon of chip corner breakage and grain splitting at the contact between the tool cutting and excavation. Reducing the ability of the thermoelectric body to transfer thermoelectric properties' causes the overall yield of the thermoelectric module to drop, failing to meet quality control requirements and resulting in poor productivity. As described above, in order to prevent the crystal grains of the p-type thermoelectric body and the n-type thermoelectric body from being damaged, missing corners and splitting during the cutting process, and affecting the working efficiency of the thermoelectric module, it is urgent to find an effective one. The solution. SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a method for manufacturing a thermoelectric module of 201008000, which improves the yield of manufacturing, and uses a method of first embedding, cutting, and arranging to reduce the temperature of the pyroelectric body during the cutting process. Defects in cornering and splitting occur 'to obtain a complete thermoelectric grain, thus maintaining the excellent conductive properties of the thermoelectric body. Therefore, the method for manufacturing the thermoelectric module of the present invention comprises an embedding step, a slitting step, an arranging step, a first curing step, a cross cutting step, a staggering step, a second curing step, and a a grinding step, and a packaging step. In the embedding step, a P-type semiconductor bulk material and an n-type semiconductor bulk material are respectively embedded in an insulating material to obtain a -p type thermoelectric block and a ?n type thermoelectric block. The slitting step is to respectively cut the p-type thermoelectric block and the n-type thermoelectric block, and to supply a p-type thermoelectric sheet having a p-type thermoelectric strip for a plurality of sheets and an n-type thermoelectric sheet having a plurality of n-type thermoelectric strips. The aligning step is to arrange the Ρ-type thermoelectric sheets and the n-type thermoelectric sheets in a staggered manner. The first curing step is to fill the insulating material in the door compartment formed by the aligning step #to-combined thermoelectric block having a p-type thermoelectric sheet and an n-type thermoelectric sheet staggered. The cross-cutting step is to cut the combined thermoelectric block to obtain a composite thermograph having a plurality of sheets having a p-type thermoelectric single-it and an n-type thermoelectric unit staggered. The staggering step is such that the combined thermoelectric sheets are arranged in a staggered manner such that the Ρ-type thermoelectric unit of each of the combined thermoelectric sheets corresponds to the n-type thermoelectric unit of another adjacent combined thermoelectric sheet. 201008000 The second curing step of the child is to fill the insulating material in the interval of the staggering step, and obtain a matrix thermoelectric block with a top-to-bottom p-type, n-type thermoelectric single-two-error matrix arrangement. The grinding step is to respectively grind the top and bottom of the matrix thermoelectric block to obtain a thermoelectric block to be processed, and the top surface and the bottom surface of the to-be-processed thermoelectric block are exposed to the outside of the Ρ-type and n-type thermoelectric units.疋
該封裝步驟是分別以-具有一電極層的絕緣板覆蓋在 該待處理熱電塊的頂面和底面上，並與該ρ型、η型熱電單 π呈電性連接，得到一熱電模組。 本發明之功效在於：利用該絕緣材在該縱切步驟和橫 切步驟前，對切割前的Ρ型和η型半導體塊材予以束縛， 而避免在該縱切步驟和橫切步驟時，產生晶粒有沿著切割 方向破損和產生劈裂的狀況發生，並能夠以該排列步驟和 S玄錯排步驟同時進行Ρ型與η型的交錯排列，避免單獨地 進行Ρ型與η型--交錯排列的困擾，如此，減少了該熱 電模組材料的耗損，且能夠降低生產成本，並提高熱電模The encapsulation step is respectively performed on the top surface and the bottom surface of the thermoelectric block to be treated by an insulating plate having an electrode layer, and electrically connected to the p-type and n-type thermoelectric single π to obtain a thermoelectric module. The effect of the present invention is to use the insulating material to bind the Ρ-type and n-type semiconductor blocks before cutting, and avoid the occurrence of the slitting step and the cross-cutting step before the slitting step and the cross-cutting step. The grain has a condition of breakage and splitting along the cutting direction, and the staggered arrangement of the Ρ type and the η type can be simultaneously performed by the arranging step and the S 错 错 , step, so as to avoid the Ρ type and the η type separately - The staggered arrangement, thus reducing the wear and tear of the thermoelectric module material, and reducing the production cost and improving the thermoelectric mode
組的整趙生產良率，進而提升整體的產能，故確實能達到 本發明之目的。 【實施方式】 有關本發明之前述及其他技術内容、特點與功效，在 以下配合參考圖式之二個較佳實施例的詳細說明中，將可 清楚的呈現。 參閱圖1 ’本發明熱電模組之製造方法的第一較佳實施 例’包含一包埋步驟21 ' 一縱切步驟22、一排列步驟23、 8 201008000 一第一固化步驟24、-橫切步驟25、-錯排步驟26、一第 二固化步驟27，及一封裝步驟28。 閱圖2,在進行本實施例之前，先經由推雜過程分別 得到-構成材料為録化㈣p型半導體塊材如，和一構成 材料為録⑽的n型半導體塊材32卜且該p型半導體塊材 311和遠n型半導體塊材321皆呈—高度為4軸的塊狀體 〇The group's overall production yield, which in turn increases the overall capacity, can indeed achieve the objectives of the present invention. The above and other technical contents, features and effects of the present invention will be apparent from the following detailed description of the preferred embodiments of the invention. Referring to Fig. 1 'The first preferred embodiment of the method for manufacturing a thermoelectric module of the present invention' comprises an embedding step 21', a slitting step 22, an arranging step 23, 8 201008000, a first curing step 24, a cross-cutting Step 25, a staggering step 26, a second curing step 27, and a packaging step 28. Referring to FIG. 2, prior to performing the present embodiment, the constituent materials are respectively recorded as a (four) p-type semiconductor bulk material, and an n-type semiconductor bulk material 32 having a constituent material is recorded (10), and the p-type is obtained. Both the semiconductor bulk 311 and the far n-type semiconductor bulk 321 are in the form of a block having a height of 4 axes.
在此說明的是，能夠以熱電效應運用在熱電半導體的 材料甚多’且乃為所屬技術領域者熟知之技藝，故不在此 --列舉；而本發明特別是針對具有易碎方向性之半導體 材料作改善，因此對於運用此種類具有易碎方向性之半導 體材料實施本發日請，皆屬保護之範圍，故不應以此為限 〇 本實施例的包埋步驟21是以-絕緣材33將該p型半 導體塊材311包埋，使該卩型半導體塊材311的六個面皆受 該絕緣材33均勻的包埋且受各方向的束缚並經過一段固 化時間後，得到- p型熱電塊3卜如此，再以相同的方法 包埋該n型半導體塊材32卜得到- η型熱電塊32,其中 ，該絕緣材33是冷固化樹脂，且在本實施射是採用環氛 樹脂（Stmers EP〇Fix)，而該環氧樹脂的固化時間為室溫μ 小時，然而，該絕緣材33也可以硬化樹脂、高分子材料， 及此等之組合代替’此類的固化劑種類甚多，其固化時間 也因固化劑種類而有所不同’且皆為所屬技術領域者熟知 之技藝，故不在此--列舉。 201008000 參閱圖3 ,該縱切步驟22是以鑽石鋸片（圖未示）沿 著一固定的方向，並以的間距寬度，平行地切割該 P型熱電塊31和n型熱電塊32。由於在該包埋步驟21時 ，已用該絕緣材33將該p型半導體塊材311和該n型半導 體塊材321六面束缚在對應的ρ型熱電塊31和11型熱電塊 32中，因此在沿著該固定方向的切割過程中，只有與刀鋒 接觸之處才能解除束缚，如此，得到多數片ρ型熱電片4ι 和多數片η型熱電片42。 在此說明的是，在切割過程中，是對在包埋步驟21所⑩ 形成的該ρ型熱電塊31進行切割，也就是對該絕緣材33 與經由摻雜過程得到的該ρ型半導體塊材311同步地切割後 ，得到多數片ρ型熱電片41。因此，每一 ρ型熱電片41皆 具有一由該ρ型半導體塊材311經切割而成的ρ型熱電條 312，同樣地，每一 η型熱電片42皆具有一由該η型半導 體塊材321經切割而成的η型熱電條322，其中，每一 ρ型 熱電條312有四個面包覆於該絕緣材33中，且該ρ型熱電 片41有二相對側面是裸露出該ρ型熱電條312未受束缚的❿ 二個面，同樣地，每一 η型熱電條322皆有四個面包覆於 該絕緣材33中，且該η型熱電片42有二相對側面是裸露 出該η型熱電條322未党束縛的二裸露面，如此，使每一 ρ 型熱電片41和每一 η型熱電片42受該絕緣材33束缚的部 位，皆能受到該絕緣材33的保護’而避免掉破裂和損壞的 不良現象發生。 參閱圖4,該排列步驟23是先將每一 口型熱電片41間 10 201008000 隔地排列成-長條狀，再將每—n型熱電片42插入二p型 熱電片41之間，如此使該p型熱電片41和^型熱電片42 裸露的側面皆能以一第一間距51才目互對應，且使整體呈現 P型熱電條312與η型熱電條322交錯排列的長條狀。 參閱圖5,該第一固化步驟24是以灌膠方式將該絕緣 材33包埋每—？型熱電片41和η型熱電片42，並以該絕 緣材33填滿在該排列步驟23形成的第_間隔51，使在該 縱切步驟22暴露的二裸露面再次受到束缚，再經過室溫24 小時的固化後’得到一具有？型熱電片41和。型熱電片42 交錯排列且六面皆受到束缚的組合熱電塊6。 然後，進行下一步驟前，先分辨出該組合熱電塊6之 六個面，其中，該六個面是四個具有？型熱電片“和η型 …電片42交錯排而成的交錯面611，及二個具有單種ρ型 熱電片41或單種η型熱電片42的單面612。 參閱圖5、圖6,該橫切步驟25是在一交錯面611上， 以鑽石鋸片（圖未示）沿著一同時跨越每一 ρ型熱電片Μ 和每—η型熱電片42的方向，並以寬度為15mm的間距寬 度切割該組合熱電塊6，如此，得到多數片具有p型熱電單 疋313和n型熱電單元323交錯排列的組合熱電片同 樣地’由於在切割過程中，該絕緣材33束缚著該組合熱電 塊61，使得包埋於内的ρ型熱電條313和η型熱電條 減少破損的機會。 參閱圖7,該錯排步驟26是將每一組合熱電片61以一 第二間隔52相互錯位地排歹,j，使每一組合熱電# 61的ρ 11 201008000 型熱電單元313對應於相鄰另一組合熱電片61的n型熱電 單元323排列，並形成24對p型半熱電單元313與^型熱 電單元323交錯排列的態樣。 參閱圖8，該第二固化步驟27是以灌膠方式將該絕緣 材33包埋每一組合熱電片61，並以該絕緣材η填滿在該 曰排步驟26形成的第二間隔52，在經過室溫24小時的固 化時間後’得到一矩陣熱電& 7，該矩陣熱電塊7的頂部 71是呈現出該Ρ型熱電單元313考口 η型熱電單元323在行 與列的方向皆呈現出交錯排列的態樣，同樣地，該矩陣熱❿ 電塊7的底部也呈現出該ρ型熱電單元313和η型熱電單 兀^323在行與列的方向皆為交錯排列的態樣如此使得該 頂邛71和底部在整體上皆形成有許多等邊狀的 Ρ型熱電單 疋313和11型熱電單元323呈矩陣排列的態樣’而在該矩 陣熱電塊7的四個側面則是在列的方向呈現ρ型熱電單元 與η里熱電單凡323交錯排列，但在行的方向則無ρ型 熱電單兀313與η型熱電單元323交錯排列之態樣。 參_ 9’搭0&圖8，該研磨步驟28是分別對該矩陣 …電塊7的頂部71與底部進行研磨，直到該ρ型孰電單元 3單U和/型熱電單元切裸露於外，而形成—具有Ρ型熱電 疋13和η型熱電單元323矩陣排列之頂面w和底面 的待處理熱電塊g ^ ^ 鬼 其中，母一 Ρ型熱電單元313與11型熱 單兀323的尺寸皆為1.5mmxl.5mmX4mm。 該封裝步驟29是在—組成為氧化基賴緣板％ 佈設-以銅製作電極的電㈣91，得到一具有一電極層Μ 12 201008000 的絕緣板92，並且另以錫膏網印的製程分別在該待處理熱 電塊8的頂面81和底面82上製造黏著用之錫膏然後， 將該絕緣板92的電極層91覆蓋於以塗覆錫膏的該待處理 熱電塊8,呈電連接的設置，通過錫爐烘烤後，得到一熱電 模組9，在此說明的是，該研磨步驟28的研磨方式，及在 該封裝步驟29進行的封裝技術，在所屬技術領域中能夠達 成的手段甚多，且並非本實施例之主要的技術重點故不 在此詳加資述。It is explained here that the material that can be used in thermoelectric semiconductors by thermoelectric effect is very large and is not well known in the art, and the present invention is particularly directed to semiconductors having fragile directionality. The material is improved. Therefore, it is a protection range for the implementation of this type of semiconductor material having a fragile directionality. Therefore, the embedding step 21 of the present embodiment is not limited thereto. 33. The p-type semiconductor bulk material 311 is embedded such that the six faces of the germanium-type semiconductor bulk material 311 are uniformly embedded by the insulating material 33 and bound by the respective directions and after a curing time, the -p is obtained. The type of the thermoelectric block 3 is such that the n-type semiconductor bulk material 32 is embedded in the same manner to obtain the n-type thermoelectric block 32, wherein the insulating material 33 is a cold-curing resin, and the atmosphere is used in the present embodiment. Resin (Stmers EP〇Fix), and the curing time of the epoxy resin is room temperature μ hour. However, the insulating material 33 can also cure resin, polymer material, and combinations of these instead of the type of curing agent of this type. a lot, its The kind of the curing agent due to time vary 'and are all well known to those skilled in the art, it is not in this - exemplified. 201008000 Referring to Fig. 3, the slitting step 22 cuts the P-type thermoelectric block 31 and the n-type thermoelectric block 32 in parallel in a fixed direction along a diamond saw blade (not shown) and at a pitch width. Since the p-type semiconductor bulk material 311 and the n-type semiconductor bulk material 321 have been bound to the corresponding p-type thermoelectric block 31 and the 11-type thermoelectric block 32 by the insulating material 33 at the embedding step 21, Therefore, in the cutting process along the fixed direction, the restraint can be released only when it is in contact with the blade edge, and thus, a plurality of p-type thermoelectric sheets 4i and a plurality of n-type thermoelectric sheets 42 are obtained. Here, it is explained that, during the dicing process, the p-type thermoelectric block 31 formed in the embedding step 21 is cut, that is, the insulating material 33 and the p-type semiconductor block obtained through the doping process. After the material 311 is cut synchronously, a plurality of p-type thermoelectric sheets 41 are obtained. Therefore, each of the p-type thermoelectric sheets 41 has a p-type thermoelectric strip 312 which is cut by the p-type semiconductor bulk 311. Similarly, each of the n-type thermoelectric sheets 42 has an n-type semiconductor block. The n-type thermoelectric strip 322 of the material 321 is cut, wherein each p-type thermoelectric strip 312 has four faces wrapped in the insulating material 33, and the p-type thermoelectric sheet 41 has two opposite sides exposed. The p-type thermoelectric strip 312 is not bound to the two sides. Similarly, each n-type thermoelectric strip 322 has four faces wrapped in the insulating material 33, and the n-type thermoelectric sheet 42 has two opposite sides. The two exposed surfaces of the n-type thermoelectric strip 322 are not exposed, so that each of the p-type thermoelectric sheets 41 and each of the n-type thermoelectric sheets 42 bound by the insulating material 33 can be subjected to the insulating material 33. Protection' to avoid the occurrence of cracks and damage. Referring to FIG. 4, the arranging step 23 is to arrange 10-201008000 between each port type thermoelectric sheet 41 in a strip shape, and then insert each n-type thermoelectric sheet 42 between the two p-type thermoelectric sheets 41, thus The exposed sides of the p-type thermoelectric sheet 41 and the type-type thermoelectric sheet 42 can each correspond to each other at a first pitch 51, and the strip-like shape in which the P-type thermoelectric strip 312 and the n-type thermoelectric strip 322 are alternately arranged is formed as a whole. Referring to FIG. 5, the first curing step 24 embeds the insulating material 33 in a potting manner. The thermoelectric sheet 41 and the n-type thermoelectric sheet 42 are filled with the insulating material 33 at the first interval 51 formed in the arranging step 23, so that the two exposed surfaces exposed in the slitting step 22 are again bound, and then pass through the chamber. After curing for 24 hours, 'get one? Type thermoelectric sheet 41 and. The type thermoelectric sheets 42 are staggered and the combined thermoelectric blocks 6 are bound on all six sides. Then, before proceeding to the next step, the six faces of the combined thermoelectric block 6 are distinguished, wherein the six faces are four? The type of thermoelectric sheet "is a staggered surface 611 formed by staggering the n-type ... electric sheet 42 and two single sides 612 having a single p-type thermoelectric sheet 41 or a single n-type thermoelectric sheet 42. See Fig. 5, Fig. 6 The cross-cutting step 25 is on a staggered surface 611 with a diamond saw blade (not shown) along a direction that spans each of the p-type thermoelectric sheets 每 and each of the n-type thermoelectric sheets 42 simultaneously, and has a width of The combined thermoelectric block 6 is cut at a pitch width of 15 mm, so that a plurality of combined thermoelectric sheets having a p-type thermoelectric unit 313 and an n-type thermoelectric unit 323 staggered are obtained in the same manner, because the insulating material 33 is bound during the cutting process. The combined thermoelectric block 61 reduces the chance of breakage of the p-type thermoelectric strip 313 and the n-type thermoelectric strip embedded therein. Referring to Fig. 7, the staggering step 26 is to treat each combined thermoelectric sheet 61 at a second interval 52. Disconnecting each other, j, arranging the ρ 11 201008000 type thermoelectric unit 313 of each combined thermoelectric # 61 corresponding to the n-type thermoelectric unit 323 of the adjacent another combined thermoelectric sheet 61, and forming 24 pairs of p-type semi-thermoelectric units 313 and ^ type thermoelectric unit 323 staggered arrangement. Referring to Figure 8, the second solid The step 27 is to embed the insulating material 33 into each of the combined thermoelectric sheets 61 in a potting manner, and fill the second interval 52 formed in the arranging step 26 with the insulating material η, after passing through the room temperature for 24 hours. After the curing time, a matrix thermoelectricity is obtained, and the top 71 of the matrix thermoelectric block 7 exhibits a staggered arrangement of the n-type thermoelectric unit 323 in the row and column directions. Similarly, the bottom of the matrix thermal block 7 also exhibits that the p-type thermoelectric unit 313 and the n-type thermoelectric unit 323 are staggered in the row and column directions such that the top cymbal 71 and The bottom portion is formed with a plurality of equilateral Ρ-type thermoelectric cells 313 and 11-type thermoelectric cells 323 arranged in a matrix as a whole. On the four sides of the matrix thermoelectric block 7, ρ is presented in the column direction. The type thermoelectric unit is arranged in a staggered manner with the η 热 thermoelectric unit 323, but in the direction of the row, there is no staggered arrangement of the p-type thermoelectric unit 313 and the n-type thermoelectric unit 323. _ 9' 搭 amp; Fig. 8, the grinding Step 28 is to separately study the top 71 and the bottom of the matrix... Until the p-type electric unit 3 single U and / type thermoelectric unit is barely exposed, forming a thermal block g to be processed having a top surface w and a bottom surface of a matrix arrangement of the 热 type thermoelectric 13 and the n type thermoelectric unit 323 ^ ^ Ghost, the size of the parent-type thermoelectric unit 313 and the type 11 hot single 323 are both 1.5mmxl.5mmX4mm. The encapsulation step 29 is in the composition of the oxidized base plate % - the electrode is made of copper Electric (four) 91, an insulating plate 92 having an electrode layer 20 12 201008000 is obtained, and a solder paste for soldering is separately formed on the top surface 81 and the bottom surface 82 of the thermoelectric block 8 to be processed, respectively. The electrode layer 91 of the insulating plate 92 is covered by the thermoelectric block 8 to be treated with a solder paste, and is electrically connected. After baking in a tin oven, a thermoelectric module 9 is obtained. The polishing method of the polishing step 28 and the packaging technique performed in the packaging step 29 are numerous in the art, and are not the main technical points of the embodiment, and therefore are not described in detail herein.
如上所述，本發明之熱電模組9之製造方法，利用該 絕緣材33包埋該p型半導體塊材311和n型半導體塊材 321，且搭配該縱切步驟22和該橫切步驟25進行切割，並 配合該排列步驟23和錯排步驟26，得到一具有p型熱電單 元313和n型熱電單元呈交錯排列的矩陣熱電塊7，並 將-亥矩陣熱電《7進行研磨，然後在該待處理熱電塊8頂 面81和底面82製作一具有一電極層91的絕緣板92，完成 電ί生連接和封裝製造，得到__熱電模組9。 如此，經由先包埋後切割的方式，可將每一 ρ型半導 體塊材311和η型半導體塊材321在進行切割過程前，先 將其各面又β玄絕緣材33的束缚，以減少切割時刀具接觸所 造成的損壞和破裂，進而得到保護，再者，藉由依序透過 刀。〗及排列的方式，使得本發明僅需二道排列步驟 就可以兀成Ρ型與η型交錯排列，進而避免每一 ρ型半 導體塊材311卩η型半導體塊材321必須不斷地被切割後 ，單獨地—, 延仃P型與η型交錯排列，然後再銲錫的困 13 201008000 擾。 个货咧熟電模組之 表造万法的第二較佳實 施例，大致上是與該第一較佳實施例相同， -包埋步驟21、-縱切步驟22、一排列步驟23、一橫切步 驟25、一錯排步驟26，及一封裝步驟28，其中不相同之處 在於：一第一固化㈣24,及一第二固化步驟η，而 -固化步驟24和該第二固化步驟27與該第一較佳實施例 不同之處在於該絕緣材33的填滿方式不同。 ❿ 該第一固化步驟24是以該絕緣材33將在該排列步驟 23形成的間隔填滿，而避免在該等P型熱電片41和n型孰 電片42的頂部和底部佈滿該絕緣材33，藉此使在該縱切步 驟22暴露的裸露面再次受到束缚，再經過室溫μ小時的 固化後，得到一具有Ρ型熱電條扣和η型熱電條322交 錯排列且六面皆受到束缚的組合熱電塊6。 該第二固化步驟27县L'J封·姐k 該絕緣材33以同樣的方式將 在該排列步驟23形成的笼-M士 ❹ 型和η型组合教電：6 =52填滿’而避免在該等Ρ . 62的頂部和底部佈滿該絕緣材33 ，經過室溫24小時的固化時間後，得到一矩陣熱電塊7 〇 絕緣ΠΤ本發明之熱電模組9之製造方法，利用該 321，使得^埋該Ρ型半導體塊材311和η型半導體塊材 使型半導體塊材如和 先後經過縱切步驟Μ心…土 體塊材321在 33 ^ ㈣22和_步驟25時，《被該絕緣材 •3*3束缚’且穩固的 ， 而不會在切割過程有晶粒破損 14 201008000 和劈裂的狀況發生，如此減少該熱電模組9之材料的耗扩 率，降低生產成本，且能夠以該排列步驟23和該錯排步= 26同時進行p型與n型的交錯排列，避免單獨地――進行 ρ型與η型交錯排列，進而提高熱電模組9的整體生產户率 ’並提升其生產率，故確實能達到本發明之目的。 惟以上所述者，僅為本發明之較佳實施例而已，當不 能以此限定本發明實施之範圍，即大凡依本發明申請專利 範圍及發明說明内容所作之簡單的等效變化與修飾皆仍 屬本發明專利涵蓋之範圍内。 【圖式簡單說明】 圖1是一流程圖，說明本發明熱電模組之製造方法的 該第一較佳實施例； 圖2是一立體圖，說明該第一較佳實施例的包埋步驟 9 圖3是一立體圖，說明該第一較佳實施例的縱切步驟 9 圖4是一立體圖，說明該第一較佳實施例的排列步驟 9 圖5是一立體圖，說明該第一較佳實施例的第一固化 步驟； 圖6是一立體圖，說明該第一較佳實施例的橫切步驟 圖7是一立體圖，說明該第一較佳實施例的錯排步驟 15 9 201008000 圖8是一頂視圖，說明該第一較佳實施例的第二固化 步驟； 圖9是一剖面圖，說明該第一較佳實施例的研磨和封 裝步驟；及 圖10是一剖面圖，說明該第二佳實施例的第一固化步 總。As described above, in the method of manufacturing the thermoelectric module 9 of the present invention, the p-type semiconductor bulk 311 and the n-type semiconductor bulk 321 are embedded by the insulating material 33, and the slitting step 22 and the cross-cutting step 25 are matched. Cutting, and in conjunction with the arranging step 23 and the staggering step 26, a matrix thermoelectric block 7 having a p-type thermoelectric unit 313 and an n-type thermoelectric unit arranged in a staggered manner is obtained, and the -HMW thermoelectric "7 is ground and then The top surface 81 and the bottom surface 82 of the to-be-processed thermoelectric block 8 are formed with an insulating plate 92 having an electrode layer 91, and the electrical connection and package manufacturing are completed to obtain the __ thermoelectric module 9. In this way, each of the p-type semiconductor bulk material 311 and the n-type semiconductor bulk material 321 can be bound to each side of the β-shaped insulating material 33 before the cutting process by the method of embedding and then cutting. The damage and rupture caused by the contact of the cutter during cutting is further protected, and the knives are passed through in sequence. 〗 </ RTI> and the arrangement, so that the present invention can be formed into a Ρ-type and an η-type staggered arrangement only by two alignment steps, thereby avoiding that each of the p-type semiconductor bulk materials 311 卩n-type semiconductor bulk 321 must be continuously cut. Separately, the P-type and the n-type are staggered, and then the solder is trapped by 13 201008000. A second preferred embodiment of the method for forming a battery module is substantially the same as the first preferred embodiment, - an embedding step 21, a slitting step 22, an arranging step 23, a cross-cutting step 25, a staggering step 26, and a packaging step 28, wherein the difference is: a first curing (four) 24, and a second curing step η, and - a curing step 24 and the second curing step The difference from the first preferred embodiment is that the insulating material 33 is filled in a different manner. The first curing step 24 is to fill the space formed by the insulating material 33 at the arranging step 23, and to avoid the insulation on the top and bottom of the P-type thermoelectric sheet 41 and the n-type ytterbium sheet 42. The material 33, whereby the exposed surface exposed in the slitting step 22 is again restrained, and after curing at room temperature for several hours, a tantalum-type thermoelectric strip and an n-type thermoelectric strip 322 are staggered and six sides are A combined thermoelectric block 6 that is bound. The second curing step 27, the county L'J seal, the insulating material 33, in the same manner, the cage-M-type and the n-type combination teaching formed in the arranging step 23: 6 = 52 filled with ' The top and bottom of the crucible 62 are covered with the insulating material 33, and after a curing time of 24 hours at room temperature, a matrix thermoelectric block 7 is insulated and the manufacturing method of the thermoelectric module 9 of the present invention is utilized. 321 so that the Ρ-type semiconductor bulk 311 and the n-type semiconductor bulk slab make the semiconductor bulk material such as and after successively undergoing the slitting step...the bulk block 321 is at 33 ^ (four) 22 and _ step 25, The insulating material is 3*3 bound and stable, and there is no grain breakage 14 201008000 and splitting during the cutting process, thus reducing the material consumption rate of the thermoelectric module 9 and reducing the production cost. And the arrangement step 23 and the staggered step=26 can simultaneously perform the staggered arrangement of the p-type and the n-type, so as to avoid the p-type and the n-type staggered arrangement separately, thereby improving the overall production rate of the thermoelectric module 9. 'And increase its productivity, so it can really achieve the purpose of the present invention. The above is only the preferred embodiment of the present invention, and the scope of the present invention is not limited thereto, that is, the simple equivalent changes and modifications made by the scope of the invention and the description of the invention are all It is still within the scope of the invention patent. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a flow chart illustrating the first preferred embodiment of a method of manufacturing a thermoelectric module of the present invention; FIG. 2 is a perspective view showing the embedding step 9 of the first preferred embodiment. Figure 3 is a perspective view showing the slitting step 9 of the first preferred embodiment. Figure 4 is a perspective view showing the arrangement step 9 of the first preferred embodiment. Figure 5 is a perspective view showing the first preferred embodiment. FIG. 6 is a perspective view showing a cross-cutting step of the first preferred embodiment. FIG. 7 is a perspective view showing the staggered step of the first preferred embodiment. 15 9 201008000 FIG. 8 is a The top view illustrates the second curing step of the first preferred embodiment; FIG. 9 is a cross-sectional view illustrating the grinding and packaging steps of the first preferred embodiment; and FIG. 10 is a cross-sectional view illustrating the second The first curing step of the preferred embodiment is total.
16 20100800016 201008000
【主要元件符號說明】 21 包埋步驟 33 絕緣材 22 縱切步驟 41 Ρ型熱電片 23 排列步驟 42 η型熱電片 24 第一固化步驟 51 第一間隔 25 橫切步驟 52 第二間隔 26 錯排步驟 6 組合熱電塊 27 第二固化步驟 61 組合熱電片 28 研磨步驟 611 交錯面 29 封裝步驟 612 單面 31 P型熱電塊 7 矩陣熱電塊 311 P型半導體塊材 71 頂部 312 P型熱電條 8 待處理熱電塊 313 P型熱電單元 81 頂面 32 η型熱電塊 82 底面 321 η型半導體塊材 9 熱電模組 322 η型熱電條 91 電極層 323 η型熱電單元 92 絕緣板 17[Main component symbol description] 21 embedding step 33 insulating material 22 slitting step 41 Ρ type thermoelectric sheet 23 arranging step 42 n-type thermoelectric sheet 24 first curing step 51 first interval 25 cross-cut step 52 second interval 26 staggered Step 6 Combining Thermoelectric Blocks 27 Second Curing Step 61 Combining Thermoelectric Sheets 28 Grinding Step 611 Staggered Surface 29 Packaging Step 612 Single Side 31 P Type Thermoelectric Block 7 Matrix Thermoelectric Block 311 P Type Semiconductor Block 71 Top 312 P Type Thermoelectric Strip 8 Wait Processing thermoelectric block 313 P-type thermoelectric unit 81 Top surface 32 n-type thermoelectric block 82 bottom surface 321 n-type semiconductor bulk material 9 thermoelectric module 322 n-type thermoelectric strip 91 electrode layer 323 n-type thermoelectric unit 92 insulating plate 17