TW201003655A - Multi-stage programmable phase-change memory cell method and phase-change memory - Google Patents

Abstract

This invention discloses a multi-stage programmable phase-change memory cell method and a phase-change memory, which can be easily implemented, and increase the number of repeating and reduce the thermal cross-talk. The phase-change memory comprises plural phase-change memory cells and a write circuit. Each phase-change memory cell comprises a first electrode, a phase-change material layer and a second electrode. The write circuit imposes a set current impulse through the phase-change memory cell in the selected one of those first and second electrodes in order to fully crystallize the phase-change material layer. According to a write data, at least a reset voltage impulse is imposed in order to generate the amorphous region corresponding to the write data in the phase-change material layer. At least one of the amplitude, width and quantity of the reset voltage impulse is adjustable, and corresponding to the write data.

Description

201003655 IX. Description of the Invention: [Technical Field] The present invention relates to a method of staging a memory cell and a memory method, particularly a method for multi-step (multj_level) stylized one-phase change memory cells and A phase change ram memory (PRAM). [Prior Art]

The phase change memory is a non-volatile memory (n〇n_v〇latile memory) whose stored data does not disappear due to power removal. Since phase-change memory is switching at a relatively fast speed and is compatible with complementary metal oxide semiconductor (CMOS) processes, it is expected to replace flash memory as the mainstream of non-volatile memory. The phase change memory is stored using a phase change material (for example, chalcogenide all〇y) that can be switched between a crystal phase (crystaUine phase) and an amorphous phase (am〇rph〇us phase) by heating. data. The phase change material has a low resistivity (resistivky) and a high reflectance in the crystalline phase τ, and a high resistivity and a low reflectance in the amorphous phase. Phase change § Resonance uses electrical signals to heat the phase change material and uses the difference in resistivity between the crystalline phase and the amorphous phase of the phase change material to discern the stored data. Rewritable optical media (such as cd_rw and dvD_RW) also use phase change materials to store data's but use laser light to heat the phase change material and utilize the difference in reflectance between the crystalline phase and the amorphous phase of the phase change material. Identify the stored data. In the phase change memory, the phase change material is first heated to a temperature exceeding 5 201003655, but below its melting temperature, and then cooled down to convert it from an amorphous phase to a crystalline phase. Set (set), and by heating the phase change material above its melting temperature and then cooling it, it can be converted from crystalline phase to amorphous phase. Generally, this process is called reset. When the binary storage is used, the phase change material in the recording area of the phase change memory cell is converted between two different shapes (for example, completely crystalline and completely amorphous), so that each phase changes the memory cell. ^ : Can store one dollar of information. When the phase change memory adopts multi-stage storage, the phase change material in the recording area of the phase change memory cell is in a plurality of different states (for example, completely crystalline, completely amorphous, and a portion between the two). Conversion between crystallizations to increase the amount of data stored in each phase of the memory cells. For example, if the phase change material in the recording area of the phase change memory cell is switched between four different states, then each phase change memory cell can store the data of the two bits.

See Figure 1, January 2006 IEEE TRANSACTIONS ON £ ·.

U ELECTRON DEVICES Volume 53, Number 1, page 56 ’’HSPICE

The Macromodel of PCRAM for Binary and Multilevel Storage paper exposes a multi-step programmed one-phase change memory cell for phase change memory using multi-level storage. First, a reset current pulse 11 is applied to the phase change memory cell. The phase change material is such that the phase change material in the recording zone is substantially completely amorphous (ie, the degree of crystallization is close to 〇%). Next, a phase change material is set which applies a current pulse 12 to the phase change memory cell to make the recording area The phase change material in the phase has a desired degree of crystallization (for example: 100% 6 201003655, 65% or 40%) 'where the width of the current pulse is set to correspond to the desired degree of crystallization. However, the reset current required for this method The amplitude of the pulse is large, exceeding the maximum current that can be provided by a nanoscale MOS or similar component, so it is not conducive to the implementation. In addition, each phase of the phase changes the phase change material of the phase change memory cell beyond its melting temperature. And forming a large melting area, which easily damages the phase change memory cell and reduces the number of repetitions, and may cause changes in nearby phases. The phase change material of the memory cell unexpectedly reaches its crystallization temperature and is partially crystallized, causing a thermal cross_talk problem. [Inventive content] The purpose of the present invention is to provide a multi-stage stylized one-phase change memory cell. The method is easy to implement, and can improve the number of repetitions and reduce the hot serial number problem. The method of multi-stage stylized one-phase change memory cells of the present invention is applicable to one-phase change memory cells, and the phase change memory cells include sequential Electrically connecting an electrode, a phase change material layer and a second electrode, the method comprising the steps of: applying a set current pulse to the phase change material layer via the first electrode and the second electrode to make the phase The layer of varying material is substantially completely crystallized; and according to a written data, at least one reset voltage pulse is applied to the phase change material layer via the first electrode and the second electrode to generate a size-size in the phase change material layer The amorphous region corresponding to the written data, wherein at least one of the amplitude, the width and the number of the voltage pulse δ and the voltage pulse is adjustable 201003655 And it corresponds to the written data. Yet another object of the present invention i.e., phase-change memory, easy to implement, and can increase and reduce the number of repeated thermal problems to provide a serial number.

Thus, the phase change memory of the present invention comprises a plurality of phase change memory cells and a write circuit. Each phase change memory cell includes a first electrode, a phase change material layer and a second electrode electrically connected in sequence. The write circuit applies a set current pulse to the phase change material layer of the selected phase change memory cell via the first electrode and the second electrode of the selected one of the phase change memory cells, so that the The phase change material layer of the selected phase change memory cell is substantially full crystallized and the at least one resetting electric pulse is applied to the phase change material layer of the selected phase change memory cell according to a written data to An amorphous region corresponding to the 哕 write data is generated in the phase change material layer of the selected phase change memory cell, wherein at least one of the vibration, width and number of the reset voltage pulse is adjustable 'And should be written with this information. [Embodiment] The foregoing and other technical contents, features and effects of the present invention are clearly shown in the detailed description of the preferred embodiment of the present invention. Referring to Fig. 2, m, v, a complex phase change (4), a preferred embodiment package 2, a write circuit 3, and a read circuit 4. The phase change 彳μ touch 21, the first ++ memory cell 2 includes a first electrode connection 24 and a second electrode sequentially connected in sequence, the electrode 22, a phase change material layer 23, and a second electrode pole contact 25, And a dielectric 8 201003655 around the above components 21~25.卩 26. As shown in FIG. 3(a), when the phase change memory cell 2 adopts a vertical structure and a book electrode contact 21, the first electrode 22, the phase change material layer 23, the first electrode 24, and the second electrode contact 25 are vertically arrangement. As shown in the figure, when the phase change memory cell 2 adopts a linear structure, the first electrode 22, the phase change material | 23 and the second electrode 24 are arranged in the horizontal direction. The phase change memory cell 2 can also adopt other structures, and is not limited to the vertical structure and the linear structure.

4 and 5, the method of writing the circuit 3 to select one of the plurality of stages of the phase change memory cells 2 includes the following steps: Step 51: applying the first electrode contact 21 and the second electrode contact μ : A current pulse is set to the phase change material layer 23 such that the phase change material layer 23 is substantially fully crystalline (ie, substantially no amorphous region 2 3 1 is formed in the phase change material layer 23). In step 51, the current pulse is set such that the highest temperature Tmax of the phase change material layer 23 is substantially between its crystallization temperature Tc and its melting temperature (ie, Tc < Tmax < Tm)' to cause the phase change material layer 23 to be non- The crystal phase is converted into a crystalline phase. Step 52 is to apply at least a reset voltage pulse to the phase change material layer 23 via the first electrode contact n盥 second electrode contact 25 to form a θ 〇 and a 贲 in the phase change material layer 23. The amorphous region 231 corresponding to the material, wherein at least one of the vibrating, Vreset, width and number of the reset voltage pulse is adjustable and corresponds to the written data. The width, the number, or the like of 1 'only changes the amplitude, or by changing the amplitude of the reset voltage pulse, for example: the width is fixed, the number is 9 201003655: such as: the amplitude is fixed, the quantity is 丨, only the width is changed, or For example: a few deniers: 1, change both amplitude and width, or for example: fixed amplitude, wide yield: fixed, only change the number, can be formed in substantially complete: 23 different sizes of amorphous regions 23 chemical layer 5(a) to (d) (in the case where the phase change memory cell 2 adopts a vertical structure), and if the amorphous region 231 is sufficient to cover the acoustical contact surface of the first electrode 22 and the phase change material If so, the phase change material layer 23 is said to be substantially completely amorphous.步骤 In step 52, the voltage pulse is reset so that the phase change material H 焉 temperature Tmax substantially exceeds its smelting temperature Tm (ie, 丁_〜, so that the phase change material layer 23 is converted from the crystalline phase to the amorphous phase. The pressure pulse causes the highest temperature of the phase change material layer 23 to be substantially lower than the melting temperature of the (four) portion 26 to avoid % melting of the dielectric portion. Preferably, the contact area of the material layer 23 with the first electrode 22 is substantially When the contact area between the phase change material layer 23 and the second electrode 24 is smaller than that, the reset voltage pulse causes the first electrode contact 21 (four) to subtract the voltage difference obtained by the second electrode contact h from the electric house and the phase change material layer 23 (4) Seebeck coefficient (ie thermoelectric coefficient) is different. Refer to Figure 6, Figure 7 and Table. When phase change memory cell 2 adopts vertical structure (indicated by v) and linear structure (in L), phase change material The layer 23 is made of Ge for 4 and (indicated by coffee) and ^ is said to be written, and the characteristic size of the phase change memory cell 2 (five) is (the prison heart is 65_' and the pulse width is -, according to Verify the result and reset the amplitude of the voltage pulse v The relationship between _ and the highest temperature of the phase change material layer 23 under the crystal phase is as shown in Fig. 6 (4), 10 201003655 and the amplitude Vse of the voltage pulse is set to be the highest with the phase change material layer 23 under the amorphous phase. The relationship between the I and Y max is shown in Fig. 6(b). The relationship between the amplitude Ireset of the reset current pulse and the maximum temperature Tmax of the phase change material layer 23 under the crystal phase is as shown in Fig. 7. As shown, the amplitude between the amplitude of the current pulse and the highest temperature of the phase change material layer 23 in the amorphous phase is set as shown in Figure 7(b), and the reset voltage pulse required for the phase change memory cell 2 is shown. Take a small amplitude (so that the highest temperature of the phase change material layer 23 under the crystalline phase 实质上 substantially reaches its melting temperature) and set the minimum amplitude of the voltage pulse

(The maximum temperature La of the phase change material layer 23 in the amorphous phase is substantially reached to its crystallization temperature.), and the minimum amplitude of the current pulse is reset (the maximum temperature Tmax of the phase change material layer 23 under the crystal phase is made) Substantially reaching its temperature Tm) and setting the minimum amplitude of the current pulse (so that the highest temperature of the phase change material layer 23 in the amorphous phase is substantially reached to its crystallization temperature W as shown in Table 1. As can be seen from these data, By setting the current pulse and resetting with the voltage pulse, the pulse amplitude can be reduced. Table 1 Types of phase change memory cells ^ Reset the minimum amplitude of the voltage pulse Set the minimum amplitude of the voltage pulse Reset the current pulse setting Minimum amplitude of current pulse – SST-V 0.17V 3V ---- 3 5μΑ GST-V ------ 0.27V 45V —·— 3μΑ SST-L 0.49V 7V 16μΑ Z-' C* 丁T 0.60 V ---— 93V GS 1-L 1297ι.δ Meal drawing —--- * x 8, when the phase change memory cell 2 adopts the vertical structure ΙμΑ --------- (in V, 11 201003655

The phase change material layer 23 is made of Se2Sb7〇Te28 (represented by SST), and the characteristic size (indicated by F) of the phase change memory cell 2 is 35, 65, and 150 nm, respectively, and the pulse width is *, according to As a result of the simulation, the relationship between the amplitude of the neon pulse and the temperature Tmax of the phase change material layer U under the crystal phase is as shown in Fig. 8 (4), and the vibrating field iset of the current pulse is set to be in the amorphous phase. The relationship between the highest temperatures of the phase change material layers 23 is as shown in Fig. 8(b), and the phase change memory cells 2 are required to be heavy. The minimum amplitude of the envelope pulse and the set current pulse is shown in Table 2. It can be seen from the 'word-data that even if the feature size is changed, the current pulse can be used to set and the voltage pulse is used for resetting. Table 2 — -- The most set size of the most set current pulse of the special reset voltage pulse of the phase change memory cell —— small amplitude small amplitude — 35nm 0.13V —— 52mA _ 65nm 0.17V ----— A 3 5mA 15 Onm 0.21V " ------ 27uA In addition, the pepper is added „ ............ —————— The extreme gram coefficient is the same as the number 22 When the contact area is substantially smaller than the contact area of the phase change material layer 23 and the second electrode 24, 'when the phase change memory cell 2 adopts the structure i, when the Sibeck coefficient of the phase change material layer 23 is substantially larger than 〇, ^ The voltage pulse causes the voltage of the first electrode contact 21 to be substantially greater than the voltage of the second electrical contact 25 (ie, the voltage difference between the voltage of the first electrode contact 21 minus the voltage of the second electro-optic contact 25 and the phase change). The material layer 23 has a scalar greater than 0), because Xibeck and Bell 12 201003655 ===Electric = affects the 'phase change material', the heat amplitude decreases, and even the direction of the ^^^^ moves, resulting in a voltage efficiency of 21 On the smaller than the flute _ + ^, the younger electrode is in contact with the miscellaneous 0; the younger one is in contact with the voltage of 25 (ie the first thunder) The voltage difference between the voltage of the contact 21 minus the voltage of the second electrode Μ: μM " is 席 席 席 席 的 23 23 , , , , , , , , , , , , , , , , , , , Teach the gentleman to set the second electrode to the second electrode. (4) Cook the concentrated position P. The direction of the spoon moves, resulting in improved operational efficiency, which can reduce the phase change of the abortion and even the reset voltage pulse of the cell 2 When the Sibeck coefficient of the layer 3 of the phase change material layer 23 is substantially less than 0... the voltage pulse only causes the first electrode to be connected to the right pole to contact the 25 cap (ie, the first electrode is connected to the second pole contact 25). The voltage obtained by the voltage is subtracted from the second electric Becker coefficient. The former is substantially larger than 〇, and the 席 energy in the substantive phase change material layer 23 is |, 、, ;) 丫旳^ to move, if the power pulse is reset, the first square is smaller than the voltage of the second electrode contact 25 (ie, the voltage of the second "electrode minus the second electrode contact 25" & _ electric & The difference between the voltage difference and the Sibeck coefficient of the phase change layer 23 is the same.枓^ The white matter is less than 0), and the thermal energy concentration in the phase change layer 23 is in the direction of the second electrode 24. Therefore, in the phase change material layer, r, and When the contact area of the electrode 22 is smaller than the contact surface of the phase change material layer 23, the contact surface of the „-electrode 24, the voltage pulse is reset to obtain the voltage of the first electrode stack. The brother-electricity & difference and phase change material layer 23 of the seat 13 201003655 Beck coefficient is different to improve the operating efficiency. It is worth noting that, in the case where the phase change material layer 23 and the first-contact area are substantially smaller than the phase-change material layer 23 and the second electric contact area, regardless of the phase change memory cell 2, what kind of junction is used: The re-accepting voltage pulse subtracts the voltage of the first electrode contact 21 from the third

The voltage difference obtained by the voltage of 25 and the sill of the phase change material layer 23: when the singular sign is formed, 'the dome shape is formed in the phase change material layer 23; the second number is called (as shown by ® 5(4) to (4)) When the reset voltage pulse is such that the voltage obtained by subtracting the voltage of the second electrode contact 25 from the voltage of the second electrode contact 25 is the same as the Sibeck coefficient of the phase change material layer 23, a U-shaped non-form is formed. Crystal region 231. The minimum amplitude of the reset current pulse of the set current pulse required by the phase change memory cell 2 is the minimum amplitude of the reset current pulse. Iset is between the minimum amplitude of the desired set current pulse and :; : resets the minimum amplitude of the current pulse, which can cause the phase change memory layer 2: k non-positive phase to transform into a crystalline phase, but does not cause phase change memory The layer changes from crystalline phase to amorphous #, so it can be overwritten directly. Furthermore, since the minimum amplitude of the reset voltage pulse required for phase change ^ memory cell 2 is small, even if the amplitude of the weight: electric pulse is selected as The small vibration b' larger than the required reset voltage pulse can still be smaller than The large voltage that can be provided by the meter M〇s or similar components is therefore easy to implement. In addition, the phase change material layer 23 of the phase change memory cell 2 does not form a large (four) melting region every time the program is formed, so that It is less likely to damage the phase change memory cell 2, and the number of repetitions can be increased, and the phase change material layer 23 of the nearby phase change memory cell 2 is less likely to reach its crystallization temperature and partially crystallize. Reducing the hot serial number problem. Fig. 2 and Fig. 3 'Reading circuit 4 reads the phase change memory cell 2 so that the data stored by the selected one is: via the first electrode contact 21 and the second electrode Contact 25, applying a read voltage pulse to the phase change material layer 23' and measuring the current flowing through the phase change material layer 23, wherein the read voltage pulse causes the highest temperature of the phase change material layer 23 to be substantially lower than Its crystallization temperature Tc (ie, Tmax < Tc). When the phase change memory cell 2 adopts a vertical structure (indicated by v) and the phase change material layer 23 is made of Ge22Sb24Te54 (indicated by GST), the characteristic size of the phase change memory cell 2 ( Expressed as F)丨15 Nm, and the half-duplex (denoted by r) of the amorphous region are 25 nm, 50 nm, 70 ηηι, and m, respectively. According to the simulation result, if the read circuit 4 applies an electric pulse to the phase change material layer 23 and detects the flow. If the current of the phase change material layer 23 is read to read the data, since the current to (4) is greatly different, it can be used to distinguish the amorphous regions 231 of different sizes (as shown in FIG. 9), and the read circuit 4 applying a current pulse to the phase change material layer 23, the phase change of the material phase change material material 23 to read the data, in the amorphous region 231 is insufficient to cover the contact of the electrode 22 with the layer of the phase change material layer 23. In the case of a face (for example, the amorphous region 23 1 is dome-shaped, but not large enough, the second amorphous region 231 is u-shaped) 'because the phase change material layer 23 will be right, s+, cable/current current The path is such that there is no difference in the detected 5 voltages, and it cannot be used to distinguish the amorphous area 23 1 of the size. Therefore, the voltage pulse can be used to read the code 10 to avoid the signal being indistinguishable. Preferably, in the phase change material layer 23, the contact surface 15 of the first electrode 22 is substantially smaller than the phase change material layer 23 and the second layer. Under the contact area of the electrode 24, the voltage difference obtained by subtracting the voltage of the first electrode contact 25 from the voltage of the first electrode contact 25 is the same as the Schebis coefficient of the phase change material layer 23, In this way, (4) in the phase change material layer 23 can move to the direction of the second electrode 24, resulting in better heat dissipation effect. "Ji Tian does not use the sigh - the electric wind rushes to make the phase

The k-type material layer 23 substantially completes the as, 70, and the day, and then uses the reset voltage pulse to form the amorphous region 231 of a desired size in the phase change material layer 23, which is easy to realize and can be improved. The number of times of overwriting and the problem of reducing the heat number are indeed achieved, and it is indeed possible to achieve the object of the present invention. 'The only part of the above' is only a preferred embodiment of the present invention, and when the month b is used to limit the implementation of the present invention, such as the 丄18 circumference, that is, the A The description of the content of the invention, the early changes and modifications of the temple effect, are still within the scope of the invention patent. [Simple diagram of the diagram] 模拟 丄 : 模拟 模拟 : : : : : : : : : 模拟 模拟 模拟 模拟 模拟 模拟 模拟 模拟 模拟 模拟 模拟 模拟 模拟 模拟 模拟 模拟 模拟 模拟 模拟 模拟 模拟 模拟 模拟 模拟 模拟 ; ; ; ; ; ; ; , private phase change / FIG. 3 is a cross-sectional view showing phase (a) of the preferred embodiment adopting a vertical structure, or (b) adopting a linear structure; FIG. 4 is a flow chart illustrating a preferred embodiment Method of order memory cell; 16 201003655 Fig. 5A cross-sectional view ' illustrates phase change memory cells forming amorphous regions of different sizes in phase change material layers; Fig. 6 is a simulation diagram illustrating different types of phase change memory cells When '(a) resets the relationship between the amplitude of the voltage pulse and the highest temperature of the phase change material layer under the crystal phase, 'and (8) sets the amplitude of the voltage pulse 舆 the highest in the phase change material layer under the amorphous phase Relationship between temperatures; f 1 Figure 7 is a simulation diagram showing when the types of phase change memory cells are different: (:) resetting the amplitude of the current pulse and the phase temperature of the phase change material layer under the crystal phase Relationship between, and (b) setting the amplitude of the current pulse Relationship with the highest temperature of the phase change material layer in the non-曰 phase; Figure 8 is a simulation diagram illustrating the amplitude of the reset voltage pulse and the crystal phase in the phase of the phase change memory cell The relationship between the lower phase = high temperature, and (b) the setting of the current pulse: the phase change of the material under the amorphous phase / the relationship between the orientation temperature of the ruthenium layer; and Figure 9 is - simulation Figure, said the current difference. 17 201003655 caused by non-Day-day area [Explanation of main component symbols] 2 ...... • Phase change memory cell 25........ • Second electrode contact 21 ······· First electrode contact 26........ • Dielectric portion 22•...·•...first electrode 3 .......... write circuit 23 •...-...phase change material layer 4 ......... • Read circuit 231 ··· Non-day day domain 51, 52·. Step 24••... —First electrode

18

Claims (1)

201003655 X. Patent application scope: 1. A multi-stage stylized one-phase change memory cell method suitable for one-phase change memory cells, the phase change memory cell comprising a first electrode and a phase change material electrically connected in sequence a layer and a second electrode, the method comprising the steps of: applying a set current pulse to the phase change material layer from the second drain and the second electrode to substantially completely crystallize the phase change material layer » and 2. 3. applying at least one reset voltage pulse to the phase change material layer via the first electrode and the second electrode according to the write poor material to generate a non-size corresponding to the write data in the phase change material layer a crystalline region, wherein 'at least one of an amplitude, a width, and a number of the reset voltage pulses is adjustable' and corresponds to the written data. According to the patent application model Ifl flute, ^, M, the gardener, the multi-stage stylized one-phase change, the hidden cell j method, wherein the set current pulse makes the phase change material layer the most p-hungry Between its crystallization temperature and its melting temperature, the /re-t C pulse causes the highest temperature of the phase change material layer to substantially exceed its melting temperature. The method of multi-step stylized one-phase-change L肊 described in item 2, wherein the phase change memory cell further comprises a dielectric portion, wherein the "re-clamping C pulse causes the highest temperature of the phase change material layer to be substantially The melting temperature of the dielectric portion. ', according to the multi-stage stylized-phase change memory method described in the application (4) - item 1, the contact between the layer of the history material and the first electrode 19 4 201003655 is substantially smaller than a contact area of the phase change material layer and the second electrode, wherein the reset voltage pulse subtracts a voltage difference of the voltage of the first electrode from a voltage of the second electrode and the phase change The Sibeck coefficient of the material layer is different. 5 · A phase change memory comprising: a plurality of phase change memory cells, each phase change memory cell comprising a first electrode, a phase change material layer and a first layer electrically connected in sequence a second electrode; and a write circuit for applying a set current pulse to the phase change material layer of the selected phase change memory cell via the first electrode and the second electrode of the selected one of the phase change memory cells To make the selected The phase change material layer of the phase change memory cell is substantially completely crystallized, and according to a write data, at least one reset voltage pulse is applied to the phase change material layer of the selected phase k s memory cell to be Forming, in the phase change material layer of the selected phase change memory cell, an amorphous region corresponding to the written data, wherein at least one of amplitude, width and number of the reset voltage pulse is adjustable, and Corresponding to the written data. 6. The phase change memory according to claim 5, wherein the set current pulse substantially causes a maximum temperature of the phase change material layer of the selected phase change memory cell Between its crystallization temperature and its melting temperature, the reset voltage pulse causes the highest temperature of the 2 varying material layer of the selected phase change memory cell to substantially exceed its melting temperature. 7. According to claim 6 The phase change memory, wherein each phase change memory cell further comprises a dielectric portion, the reset voltage pulse is the highest of the phase change material layer of the selected phase change memory cell Degree of electricity 20 201003655 is lower than the smelting temperature of the dielectric portion of the selected phase change memory cell 〇 8. According to the phase change memory of claim 5, wherein each phase changes the memory cell A vertical structure is used. 9. According to the phase change memory of claim 5, wherein each phase change memory cell adopts a linear structure. 1 〇· According to the phase change memory described in claim 5 Wherein, in each phase change memory cell, a contact area of the phase change material layer with the first electrode is substantially smaller than a contact area of the phase change material layer and the second electrode 'the reset voltage pulse causes the a voltage difference obtained by subtracting a voltage of a first electrode of the selected phase change memory cell from a voltage of a second electrode of the selected phase change memory cell and a phase change material layer of the selected phase change memory cell The coefficient is different. 11. The phase change memory according to claim 5, further comprising a circuit for reading a read circuit to apply a read through the first electrode and the second electrode of the selected phase change memory cell A voltage pulse is applied to the phase change material layer of the selected phase change memory cell, and the current flowing through the phase change material layer of the selected phase change memory cell is detected. 12. The phase change memory of claim 11, wherein the read voltage pulse causes a maximum temperature of the phase change material layer of the selected phase change memory cell to be substantially lower than its crystallization temperature. 3. The phase change memory according to the invention of claim 1, wherein in each phase change memory cell, a contact area of the phase change material layer with the first electrode is substantially smaller than the phase change material layer a contact area with the 21 201003655 of the second electrode, the read voltage pulse is obtained by subtracting the voltage of the first electrode of the selected phase change memory cell from the voltage of the second electrode of the selected phase change memory cell The voltage difference is the same as the Sibeck coefficient of the phase change material layer of the selected phase change memory cell.