TW200943885A - Kasumi algorithm implementation - Google Patents
Kasumi algorithm implementationInfo
- Publication number
- TW200943885A TW200943885A TW097145690A TW97145690A TW200943885A TW 200943885 A TW200943885 A TW 200943885A TW 097145690 A TW097145690 A TW 097145690A TW 97145690 A TW97145690 A TW 97145690A TW 200943885 A TW200943885 A TW 200943885A
- Authority
- TW
- Taiwan
- Prior art keywords
- algorithm implementation
- kasumi algorithm
- function
- stage
- kasumi
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
- H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
- H04L9/0625—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation with splitting of the data block into left and right halves, e.g. Feistel based algorithms, DES, FEAL, IDEA or KASUMI
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/12—Details relating to cryptographic hardware or logic circuitry
- H04L2209/125—Parallelization or pipelining, e.g. for accelerating processing of cryptographic operations
Abstract
There is disclosed an apparatus, and corresponding method, operable to perform an FI function of a Kasumi algorithm, including a reconfigurable processing stage, wherein in a first configuration the processing stage implements a first stage of the FI function and in a second configuration the processing stage implements a second stage of the FI function.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GBGB0724438.7A GB0724438D0 (en) | 2007-12-14 | 2007-12-14 | Kasumi algorithm implementation |
Publications (1)
Publication Number | Publication Date |
---|---|
TW200943885A true TW200943885A (en) | 2009-10-16 |
Family
ID=39048126
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW097145690A TW200943885A (en) | 2007-12-14 | 2008-11-26 | Kasumi algorithm implementation |
Country Status (3)
Country | Link |
---|---|
GB (2) | GB0724438D0 (en) |
TW (1) | TW200943885A (en) |
WO (1) | WO2009077311A1 (en) |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7212631B2 (en) * | 2001-05-31 | 2007-05-01 | Qualcomm Incorporated | Apparatus and method for performing KASUMI ciphering |
US7760874B2 (en) * | 2004-07-14 | 2010-07-20 | Broadcom Corporation | Method and system for implementing FI function in KASUMI algorithm for accelerating cryptography in GSM/GPRS/EDGE compliant handsets |
-
2007
- 2007-12-14 GB GBGB0724438.7A patent/GB0724438D0/en not_active Ceased
-
2008
- 2008-11-26 TW TW097145690A patent/TW200943885A/en unknown
- 2008-11-28 GB GB1011024.5A patent/GB2468457B/en active Active
- 2008-11-28 WO PCT/EP2008/066475 patent/WO2009077311A1/en active Application Filing
Also Published As
Publication number | Publication date |
---|---|
GB201011024D0 (en) | 2010-08-18 |
WO2009077311A1 (en) | 2009-06-25 |
GB2468457B (en) | 2012-05-30 |
WO2009077311A4 (en) | 2009-09-03 |
GB2468457A (en) | 2010-09-08 |
GB0724438D0 (en) | 2008-01-30 |
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