TW200943313A - Operational mode control in serial-connected memory based on identifier - Google Patents
Operational mode control in serial-connected memory based on identifierInfo
- Publication number
- TW200943313A TW200943313A TW098102586A TW98102586A TW200943313A TW 200943313 A TW200943313 A TW 200943313A TW 098102586 A TW098102586 A TW 098102586A TW 98102586 A TW98102586 A TW 98102586A TW 200943313 A TW200943313 A TW 200943313A
- Authority
- TW
- Taiwan
- Prior art keywords
- serial
- operational mode
- identifier
- mode control
- memory based
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/30—Power supply circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
- G11C5/04—Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
Landscapes
- Read Only Memory (AREA)
- Dram (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US2292108P | 2008-01-23 | 2008-01-23 | |
US12/352,009 US7894294B2 (en) | 2008-01-23 | 2009-01-12 | Operational mode control in serial-connected memory based on identifier |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200943313A true TW200943313A (en) | 2009-10-16 |
TWI406296B TWI406296B (zh) | 2013-08-21 |
Family
ID=40876396
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW098102586A TWI406296B (zh) | 2008-01-23 | 2009-01-22 | 根據識別符之串聯記憶體中之操作模式控制 |
TW102121366A TW201342391A (zh) | 2008-01-23 | 2009-01-22 | 根據識別符之串聯記憶體中之操作模式控制 |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW102121366A TW201342391A (zh) | 2008-01-23 | 2009-01-22 | 根據識別符之串聯記憶體中之操作模式控制 |
Country Status (3)
Country | Link |
---|---|
US (2) | US7894294B2 (zh) |
TW (2) | TWI406296B (zh) |
WO (1) | WO2009092163A1 (zh) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8122202B2 (en) | 2007-02-16 | 2012-02-21 | Peter Gillingham | Reduced pin count interface |
US7688652B2 (en) * | 2007-07-18 | 2010-03-30 | Mosaid Technologies Incorporated | Storage of data in memory via packet strobing |
US7889578B2 (en) * | 2007-10-17 | 2011-02-15 | Mosaid Technologies Incorporated | Single-strobe operation of memory devices |
US8390146B2 (en) * | 2008-02-27 | 2013-03-05 | Panasonic Corporation | Semiconductor integrated circuit and various devices provided with the same |
JP5580751B2 (ja) * | 2011-01-18 | 2014-08-27 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US8825967B2 (en) | 2011-12-08 | 2014-09-02 | Conversant Intellectual Property Management Inc. | Independent write and read control in serially-connected devices |
US20130185527A1 (en) * | 2012-01-16 | 2013-07-18 | Qualcomm Incorporated | Asymmetrically-Arranged Memories having Reduced Current Leakage and/or Latency, and Related Systems and Methods |
TWI489444B (zh) | 2012-07-17 | 2015-06-21 | Etron Technology Inc | 應用於嵌入式顯示埠的動態隨機存取記憶體 |
US9476938B2 (en) * | 2013-09-27 | 2016-10-25 | Novachips Canada Inc. | Method and apparatus for testing surface mounted devices |
US10381088B2 (en) * | 2017-03-30 | 2019-08-13 | Silicon Storage Technology, Inc. | System and method for generating random numbers based on non-volatile memory cell array entropy |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5563839A (en) | 1995-03-30 | 1996-10-08 | Simtek Corporation | Semiconductor memory device having a sleep mode |
US5860080A (en) | 1996-03-19 | 1999-01-12 | Apple Computer, Inc. | Multicasting system for selecting a group of memory devices for operation |
US6795896B1 (en) | 2000-09-29 | 2004-09-21 | Intel Corporation | Methods and apparatuses for reducing leakage power consumption in a processor |
US7102958B2 (en) * | 2001-07-20 | 2006-09-05 | Samsung Electronics Co., Ltd. | Integrated circuit memory devices that support selective mode register set commands and related memory modules, memory controllers, and methods |
US6920574B2 (en) | 2002-04-29 | 2005-07-19 | Apple Computer, Inc. | Conserving power by reducing voltage supplied to an instruction-processing portion of a processor |
US7308524B2 (en) | 2003-01-13 | 2007-12-11 | Silicon Pipe, Inc | Memory chain |
JP2005004835A (ja) | 2003-06-10 | 2005-01-06 | Toshiba Corp | 半導体記憶装置 |
JP4221274B2 (ja) | 2003-10-31 | 2009-02-12 | 株式会社東芝 | 半導体集積回路および電源電圧・基板バイアス制御回路 |
US7307907B2 (en) | 2003-12-11 | 2007-12-11 | Texas Instruments Incorporated | SRAM device and a method of operating the same to reduce leakage current during a sleep mode |
JP4666342B2 (ja) | 2004-07-26 | 2011-04-06 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置 |
JP4633578B2 (ja) | 2004-10-22 | 2011-02-16 | ローム株式会社 | 集積回路およびそれを搭載した電子機器 |
US7307899B2 (en) | 2005-05-23 | 2007-12-11 | Intel Corporation | Reducing power consumption in integrated circuits |
US8335868B2 (en) * | 2006-03-28 | 2012-12-18 | Mosaid Technologies Incorporated | Apparatus and method for establishing device identifiers for serially interconnected devices |
US7342816B2 (en) * | 2006-07-26 | 2008-03-11 | International Business Machines Corporation | Daisy chainable memory chip |
US8407395B2 (en) * | 2006-08-22 | 2013-03-26 | Mosaid Technologies Incorporated | Scalable memory system |
US8271758B2 (en) * | 2006-12-06 | 2012-09-18 | Mosaid Technologies Incorporated | Apparatus and method for producing IDS for interconnected devices of mixed type |
US8433874B2 (en) * | 2006-12-06 | 2013-04-30 | Mosaid Technologies Incorporated | Address assignment and type recognition of serially interconnected memory devices of mixed type |
US8331361B2 (en) * | 2006-12-06 | 2012-12-11 | Mosaid Technologies Incorporated | Apparatus and method for producing device identifiers for serially interconnected devices of mixed type |
US8010710B2 (en) * | 2007-02-13 | 2011-08-30 | Mosaid Technologies Incorporated | Apparatus and method for identifying device type of serially interconnected devices |
WO2008101316A1 (en) * | 2007-02-22 | 2008-08-28 | Mosaid Technologies Incorporated | Apparatus and method for using a page buffer of a memory device as a temporary cache |
-
2009
- 2009-01-12 US US12/352,009 patent/US7894294B2/en not_active Ceased
- 2009-01-22 TW TW098102586A patent/TWI406296B/zh not_active IP Right Cessation
- 2009-01-22 TW TW102121366A patent/TW201342391A/zh unknown
- 2009-01-23 WO PCT/CA2009/000075 patent/WO2009092163A1/en active Application Filing
-
2013
- 2013-02-22 US US13/774,477 patent/USRE44926E1/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
USRE44926E1 (en) | 2014-06-03 |
US7894294B2 (en) | 2011-02-22 |
TW201342391A (zh) | 2013-10-16 |
US20090185434A1 (en) | 2009-07-23 |
WO2009092163A1 (en) | 2009-07-30 |
TWI406296B (zh) | 2013-08-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |