TW200942650A - Method for forming conductive structure, and plating apparatus and plating method - Google Patents

Method for forming conductive structure, and plating apparatus and plating method

Info

Publication number
TW200942650A
TW200942650A TW097147072A TW97147072A TW200942650A TW 200942650 A TW200942650 A TW 200942650A TW 097147072 A TW097147072 A TW 097147072A TW 97147072 A TW97147072 A TW 97147072A TW 200942650 A TW200942650 A TW 200942650A
Authority
TW
Taiwan
Prior art keywords
plating
conductive film
film
plated film
via holes
Prior art date
Application number
TW097147072A
Other languages
Chinese (zh)
Other versions
TWI451006B (en
Inventor
Mizuki Nagai
Nobutoshi Saito
Fumio Kuriyama
Akira Fukunaga
Original Assignee
Ebara Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2008170361A external-priority patent/JP5281831B2/en
Priority claimed from JP2008290698A external-priority patent/JP5564171B2/en
Application filed by Ebara Corp filed Critical Ebara Corp
Publication of TW200942650A publication Critical patent/TW200942650A/en
Application granted granted Critical
Publication of TWI451006B publication Critical patent/TWI451006B/en

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/003—Electroplating using gases, e.g. pressure influence
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D21/00—Processes for servicing or operating cells for electrolytic coating
    • C25D21/10—Agitating of electrolytes; Moving of racks
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00—Electroplating characterised by the article coated
    • C25D7/12—Semiconductors
    • C25D7/123—Semiconductors first coated with a seed layer or a conductive layer
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/18—Electroplating using modulated, pulsed or reversing current
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

A method can form a conductive structure, which is useful for three-dimensional packaging with via plugs, in a shorter time by shortening the conventional long plating time that is an impediment to the practical use of electroplating. The method includes forming a conductive film on an entire surface, including interior surfaces of via holes, of a substrate having the via holes formed in the surface; forming a resist pattern at a predetermined position on the conductive film; carrying out first electroplating under first plating conditions, using the conductive film as a feeding layer, thereby filling a first plated film into the via holes; and carrying out second electroplating under second plating conditions, using the conductive film and the first plated film as a feeding layer, thereby allowing a second plated film to grow on the conductive film and the first plated film, both exposed in the resist openings of the resist pattern.
TW097147072A 2007-12-04 2008-12-04 Method for forming conductive structure, and plating apparatus and plating method TWI451006B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2007313715 2007-12-04
JP2008170361A JP5281831B2 (en) 2008-06-30 2008-06-30 Method for forming conductive material structure
JP2008290698A JP5564171B2 (en) 2007-12-04 2008-11-13 Plating apparatus and plating method

Publications (2)

Publication Number Publication Date
TW200942650A true TW200942650A (en) 2009-10-16
TWI451006B TWI451006B (en) 2014-09-01

Family

ID=40988921

Family Applications (2)

Application Number Title Priority Date Filing Date
TW103126362A TWI518213B (en) 2007-12-04 2008-12-04 Method for forming conductive structure
TW097147072A TWI451006B (en) 2007-12-04 2008-12-04 Method for forming conductive structure, and plating apparatus and plating method

Family Applications Before (1)

Application Number Title Priority Date Filing Date
TW103126362A TWI518213B (en) 2007-12-04 2008-12-04 Method for forming conductive structure

Country Status (2)

Country Link
KR (2) KR20090058462A (en)
TW (2) TWI518213B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104347529A (en) * 2013-08-01 2015-02-11 瑞萨电子株式会社 Semiconductor device and manufacturing method thereof, and mounting method of semiconductor device
TWI482239B (en) * 2010-03-22 2015-04-21 Au Optronics Corp Active device array substrate and fabricating method thereof

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103026486B (en) * 2010-07-26 2016-08-03 浜松光子学株式会社 The manufacture method of mediator
CN113363152A (en) * 2020-03-06 2021-09-07 长鑫存储技术有限公司 Semiconductor structure and manufacturing method thereof
KR102641245B1 (en) * 2022-04-21 2024-02-29 가부시키가이샤 에바라 세이사꾸쇼 plating device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5516412A (en) * 1995-05-16 1996-05-14 International Business Machines Corporation Vertical paddle plating cell
US6333560B1 (en) * 1999-01-14 2001-12-25 International Business Machines Corporation Process and structure for an interlock and high performance multilevel structures for chip interconnects and packaging technologies
US7179738B2 (en) * 2004-06-17 2007-02-20 Texas Instruments Incorporated Semiconductor assembly having substrate with electroplated contact pads

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI482239B (en) * 2010-03-22 2015-04-21 Au Optronics Corp Active device array substrate and fabricating method thereof
CN104347529A (en) * 2013-08-01 2015-02-11 瑞萨电子株式会社 Semiconductor device and manufacturing method thereof, and mounting method of semiconductor device

Also Published As

Publication number Publication date
TWI518213B (en) 2016-01-21
KR20140120878A (en) 2014-10-14
TWI451006B (en) 2014-09-01
TW201443298A (en) 2014-11-16
KR20090058462A (en) 2009-06-09

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