200939454 九、發明說明： 【發明所屬之技術領域】 本發明係有關於-種製作於半導性基板之射頻被動元件，其 特別有關於-種製作於使用高缺陷密度之保護薄膜之半導性基板 上之射頻被動元件。 Ο 【先前技術】 隨著無線軌的魏，錢线航件的制量也將日益增 加。然而在縣波賴作辭，以目前標準麵树基板製 作的微波被動元件無法達到高品質因數（qu卿fact〇r，Q)，因此 許多被動元件（如天線，紐II或械H等）係制分離(Qff_chip) 元件’如波導管（waveguide)，介電共振器(DielectricRes〇nat〇r， DR)和表面聲波元件(surfaceAc〇usticWave，SAW)等。然而，使用 分離元件使得主被動元件之積體化較不易達成。因此將主動積體 電路與高Q值的被動元件在高頻時整合製作於單一晶片 (System-on-a-chip ’ SOC)已成為現今通訊與半導體業界的重要課 題！ 目前有四種技術可直接改善矽晶元以整合功能性的被動元件 於晶片上’第一種係結合半導體製程及機械製作的概念，亦即射200939454 IX. INSTRUCTIONS OF THE INVENTION: TECHNICAL FIELD The present invention relates to a radio frequency passive component fabricated on a semiconductive substrate, which is particularly useful for semiconductivity of a protective film fabricated using a high defect density. RF passive components on the substrate. Ο [Prior Art] With the wireless rail, the production of money line will also increase. However, in the county's resignation, microwave passive components fabricated on the current standard surface tree substrate cannot achieve high quality factor (Q), so many passive components (such as antenna, New II or mechanical H) Separation (Qff_chip) components such as waveguides, dielectric resonators (Dielectric Res〇nat〇r, DR) and surface acoustic wave components (surface Ac〇usticWave, SAW). However, the use of separate elements makes the integration of active and passive elements less difficult to achieve. Therefore, the integration of active integrated circuits and high-Q passive components at high frequencies on a single-chip (System-on-a-chip SOC) has become an important topic in the communications and semiconductor industries today! There are currently four technologies that can directly improve the germanium to integrate functional passive components on the wafer. The first system combines the concepts of semiconductor manufacturing and mechanical fabrication.
頻微機電技術(Radio frequency micro electro-mechanical system，RF 200939454 MEMS)。第二種技術係利用高阻值矽晶片（Highsilie()n， HRS)。第三種技術係在矽晶片上方實現一厚膜的低介電材料。第 四種技術係在矽晶片上方沈積一表面保護層。第一種处 技術使得原本的平面電路擴展成立體式的結構。透過機械結構的 設計方式，可以有效避免矽基板之介電損失而提供高Q值的被動 元件。但是，RFMEMS並不是傳統的VLSI的製程技術，其在與 系統中其它元件做整合時需要做更多製程上的整合，以及更多封 〇 裝上的考量。 第二種技術分成兩種實現方法，一質子（或離子）佈植（proton or ion imPlantation)的製程技術，一浮點式長晶過程(F1〇at_ z〇ne Crystal Growth Process)的製程技術。離子佈植技術發展出以高能量 及高劑量的選擇性離子佈植製程（selectivdy f〇rmed i〇n implantation)，將傳統的10Q_cm的低阻值矽基板運用質子佈植的 〇技術轉換為高阻值，使其近似於典型的高絕緣性的神 化鎵（GaAs) (1〇8 Q_cm)基板。浮點式長晶過程技術於成長石夕晶 棒時掺入二族或五族元素相當低以形成高阻值特性。上述兩種技 術都可用來實現树基板上具高效能的被動元件，但切基板的 阻值過南將影響電晶體的載子移動速率，且設備之成本極高。 第三種技術為阻隔低阻值矽基板係以化學氣相沈積設備 _niealvapOT deposits ’ CVD)沈積一低介電材料，使傳輸線信 號只傳播在介電層上方而不滲透進去低阻财基板。然而若要額 7 200939454 外沈積一介電層時且使用化學氣相沈積設備製作，該介電層沈積 厚度會有一限制，大約10#m會產生應力作用使介電層會有龜裂 現象。此外，該低介電材料容易吸附水氣影響成介電特性，故整 合主被動元件還有待考量。 第四種技術係在矽晶片上方沈積一表面保護層，使石夕晶片表 面之移動載子被該表面保護層吸附，因此形成近似絕緣體的微波 0 基板。由 B. R〇ng 等人發表於 Electron Device Letters，IEEE、第 25 卷、第4期、第176—ns頁、2004年四月，“應用於即1(：之表 面保 € 之南阻值矽基板（Surfaee_Passivated High Resistiv办 SiliC〇nSubstratesforRFICs)，’其揭示一低損失、高品質因素之被 動疋件製作於表面保護之高阻值矽基板。然而該篇文獻中並未完 整揭示其實現步職侧實驗參數。因此，吾人該相關技術 進行更進一步的明確揭示該實現方法與步驟。 〇 提供一種具有良好微波特性之半導性基板，一種製作於半導 性基板之_被動元件即可賴，進—步整合域動元件於單一 基板。職是之故，中請人乃細心試驗與研究，並—本鍥而不捨的 精神，終於研究出可應用於微波頻段且製作於半導性基板之射頻 被動元件。 【發明内容】 8 200939454 鑑於以上習知猶之_，本㈣之主要目⑽提供— 作於半生基板之射頻被動元件，其可應用於微波頻段之元件 作。 為達上述目的，轉供—健作於半導性基板之射頻被 動疋件，其包含一半導性基板；一高缺陷密度薄膜；及-射頻被 動元件。該高缺陷密度薄膜之缺陷密度大於MW2。 根據本發明之—特徵，其中該半導性基板係選自錄板、坤 〇化縣板、鍺絲、魏鎵絲、梳織板、碳切基板及半 導體所組賴种之任何—縣板材料之一。 根據本發明之—特徵，其中該轉性基板之電_介於， 到 1 〇4 Ώ-cm。 /艮據本發明之-特徵，其中該高缺陷密度薄膜係為非晶質結 構薄膜及多晶質結構薄膜之一。 ◎ 根據本發明之一特徵’其中該高缺陷密度薄膜係選自石夕薄 膜、石夕錯薄膜、，化鎵薄膜、二氧化石夕薄膜、氮紗化合物薄膜、 氡化鋁薄膜及氮氧化矽薄膜之一。 、 %根據本發明之—特徵，其帽賴絲元件之結構係為滤波 »'、^構、分波器結構、天線結構、電感器結構及電容器結構之一。 為讓本發明之上述和其他目的、特徵、和優點能更明顯易懂， 文特舉數個較佳實施例，並配合所附圖式，作詳細說明如下。 9 200939454 【實施方式】 雖然本發明可表現為不同形式之實施例’但附圖所示者及於 下文中說明者係為本發明可之較佳實施例，並請了解本文所揭示 者係考量為本發明之一範例，且並非意圖用以將本發明限制於圖 示及/或所描述之特定實施例中。 現請參考第1圖，其顯示根據本發明之第—實施例之一種製 作於半導性基板之射頻被動元件1〇〇結構示意圖。其至少包含一 〇 半導性基板113 ; —高缺陷密度薄膜111 ; 一射頻被動元件12〇。 該半導性基板113具有一第一表面112及一第二表面114。 經發明人詳細研究發現，該半導性基板113可以為矽基板、 砷化鎵基板、鍺基板、磷化鎵基板、硫化鎘基板、碳化矽基板及 半導體所組成族群中之任何一種基板材料之一。該半導性基板U3 之電阻率介於HT4到1〇4 Q_cm。其中，石夕基板為一般半導體元件 製程中泛用之基板，因為發基板的優點是成本低，且與目前製程 〇 ± 相容性高，可以有效地整合主被動元件至單一半導性基板而達到 系統單晶片（System on Chip，SOC)。 該尚缺陷密度薄膜111 ’披覆於該半導性基板113之第一表面 112。經發明人詳細研究發現，•該高缺陷密度薄膜ηι的種類有矽 薄膜、矽鍺薄膜、砷化鎵薄膜、二氧化矽薄膜、氮矽化合物薄膜、 SL化紹薄膜及乱氧化石夕薄膜，其又分成非晶質結構薄膜或是多晶 質結構薄膜。當該高缺陷密度薄膜ill披覆於該半導性基板 200939454 之^表面m後，職__ lu _缺陷密度需大於 K) w ’用於捕捉來自該半導性基板113並造成漏電流之電荷。 該高缺陷密度_⑴若為氧錄_時，麵㈣荷可分成四 種·界面陷解電荷、氧化層電荷、固定氧化層電荷及移動離子電 荷。該高缺陷密度_⑴若為料轉断，其缺陷電荷係由 於材料中晶格秘配或結晶中形成之點缺陷、線缺陷、面缺陷、 Ο Ο 晶格差排、螺旋差排...等不良現象所造成之多餘游離電子或電動 載子。 其中，該高缺_度薄膜111係可以物理氣她積系統、化 學氣相沉積系統及離子佈㈣統所製備。物理氣相沉積系統有直 流磁控频製程機台、射頻磁控猶製程機台或分子束蠢晶製程 機台。利賴離子轟擊歸絲面發生發光放電現象（gi〇w dlSCharge) ’而树表面原子彈出後沈積於基本上稱為贿。化 學氣相沉齡統有鎌型化學式氣概積製程機台、特高頻 電_型化學式氣相沈積製程機台、常壓化學式氣相沈積製程 機台或低壓化學錢相_製賴台。雜子佈齡統有高能量 離子佈植機台、巾電麟子顧機台或賴離子佈植機台。 在本發明之第一實施例中，該高缺陷密度薄膜m係以非晶 質結構膜’其製錄佳係以·増強型化學式氣相沈積法進 行。利用魏及氨氣混和而形成，且其魏以9職氣及職 魏做混和稀釋。在製程過程中，應盡量避免較高含量的魏濃 11 200939454 度約少於7%，以利非晶質結構石夕薄膜之形成。由於電漿增強型化 學式氣相沈積製程技術的演進，加以提升薄膜形成的品質及速 率。該高缺陷密度薄膜111亦可使用電漿增強型化學式氣相沈積 之特高頻電漿增強型化學式氣相沈積法（VHF-PECVD)，亦即是 先於該半導性基板113上利用半導體製程做出一非晶矽質薄膜， 再利用一特高頻電漿增強型化學式氣相沈積法，通入<8.4%以下 之矽烷氣體及使用大於70MHz之電漿激發頻率，最後利用矽烷及 ® 氫氣做混和稀釋形成厚度介於300奈米至1微米之間之高缺陷密 度薄膜111。該矽烷氣體含量係使用少於84%以下，其較佳實施 例為少於7%之;e夕烷含量。 該一種製作於半導性基板之射頻被動元件1〇〇可操作頻率大 小為1MHz到l〇OGHz之範圍。該高缺陷密度薄膜m之高缺陷 费度薄膜表面11G可製作—射頻被動元件12()。該射撇動元件 〇 2〇二構可為濾、波器結構、分波器結構、天線結構、電感器結構或 電容器結構。在本發明之一實施例中，該射頻被動元件12〇結構 係為共平面波導結構，由接地面-信麟接地面所形成其最佳 »又片阻抗為搬。該共平面波導結構之辭導絲板113其該第 二表面114不具有金屬。 現月參考第2圖’該共平面波導結構之信號線寬度$為 兄帅、接地面與信號線之距離g為25阿及接地面寬度Wg為 P -該铸性基板1B $ p财基板，其基板阻值為 12 200939454 3000-Ω·αη。該圖2中分別顯示無薄膜彼覆表面保護、氬離子佈植 與非晶質結構矽薄膜坡覆表面保護之頻率響應結果。其中，氬離 子佈植與非晶質結構矽薄膜披覆表面保護之衰減在頻率範圍 30GHz以下皆呈現低於2dB/cm，相較於無薄膜彼覆表面保護之衰 減程度呈現相當大的差異。在頻率17GHz時，無薄膜披覆表面保 濩之衰減為7.8dB/cm、氬離子佈植碎薄膜披覆表面保護之衰減為 1遍/咖及非晶質結構矽薄膜披覆表面保護之衰減為i 3dB/em。 〇顯示出，非晶質結構石夕細披覆表面保護改善該基板之微波頻段 操作損失能力更優於以氬離子佈植矽薄臈披覆表面保護者。 在本發明之第二實施例，如第3圖所揭示係為一金屬氧化物 半導體電容結構製作於-披覆非晶質結構梦薄膜表面保護之發基 板200。該金屬氧化物半導體電容結構22〇，係由一上電極2邓、 一氧化物薄膜2Π、一高缺陷密度薄膜213及-♦基板215所形 成。該金屬氧化物半導體電容結構22〇製作於氧化物薄膜2ιι之 表面210。其中’該氧化物薄膜211沈積於該高缺陷密度薄膜表面 212。該高缺陷密度薄膜213沈積於該石夕基板215之第一表面叫 且該第二表面216上不具有金屬，並做為背部電極。該上電極 半徑R為1mm，形成於一二氧化發薄膜211之二氧化魏面训 上’其係為-歐姆（〇hmic c〇ntact)電極。其功用為將金屬氧化 物半導體電容所儲存之電荷，以最少損失取出。因此希望此部分 沒有整流，串流電阻低’接著強度高，耐焊接性。—般歐姆電極 13 200939454 形成法有蒸鍍法、電鍍法及印刷法等。在製造金屬氧化物半導體 電容時，歐姆電極採用之材料有鎳（Ni)、金（Au)、銀（Ag)、 鈦（Ti)、鈀（Pd)、及鋁（A1)…等。 現請參考第4圖，該圖中分別顯示無薄膜披覆表面保護、氬 離子佈植與非晶質結構石夕薄膜披覆表面保護之基板於攝氏4〇〇度 持溫30分鐘退火製程後，頻率i〇0kHz下電容值隨外加偏壓變化 之響應結果。其中無薄膜披覆表面保護之基板在外加偏壓低於9V 〇 時，由於在表面上的反轉區中形成一個空乏區域，而具有較低之 電容值。而氬離子佈植與非晶質結構矽薄膜披覆表面保護之基板 皆都呈現相當低的電容值且其電容值不受外加偏壓影響，形成良 好的介電材料特性。 綜上所述，根據本發明之一種製作於半導性基板之射頻被動 元件100，其同時具有以下列優點：高頻化、微小化、高品質因素、 易整合於半導體製程及具有高度的商業化價值，各種材料之基板 〇 &可實現該-種製作於半導性基板之射頻被動元件·。另外，具 有低損失及不受外加偏壓影響’可廣泛應用於無線通訊系統被動 元件設計中。 雖然本發日犯赠述健魏_示，财並賴以限定本 發明，任何熟習此技藝者，在不脫離本發明之精神和範圍内，當 可作各種之與佩。如上述的鱗，柯⑽各型式的修正 與變化’ μ會破壞關作的精神。因此本發明之保縣圍當視 200939454 後附之申請專利範圍所界定者為準。Radio frequency micro electro-mechanical system (RF 200939454 MEMS). The second technique utilizes high resistance 矽 wafers (Highsilie(), HRS). A third technique is to implement a thick film of low dielectric material over the germanium wafer. The fourth technique deposits a surface protective layer over the germanium wafer. The first type of technology allows the original planar circuit to be extended to form a structure. Through the design of the mechanical structure, it is possible to effectively avoid the dielectric loss of the substrate and provide a passive component with a high Q value. However, RFMEMS is not a traditional VLSI process technology, and it requires more process integration and more packaging considerations when integrating with other components in the system. The second technique is divided into two implementation methods, a proton or ion imPlantation process technology, and a F1〇at_z〇ne Crystal Growth Process process technology. Ion implantation technology has developed a high-energy and high-dose selective ion implantation process (selectivdy f〇rmed i〇n implantation), which converts the traditional 10Q_cm low-resistance 矽 substrate into proton-planted helium technology. The resistance is such that it approximates a typical highly insulating deuterated gallium (GaAs) (1〇8 Q_cm) substrate. The floating-point crystal growth process technique is relatively low in the incorporation of a Group II or Group 5 element to form a high-resistance property. Both of the above techniques can be used to achieve high-efficiency passive components on the tree substrate, but the resistance of the substrate to the south will affect the carrier movement rate of the transistor, and the cost of the device is extremely high. A third technique is to deposit a low dielectric material by blocking the low resistance 矽 substrate with a chemical vapor deposition apparatus _niealvapOT deposits 'CVD, so that the transmission line signal propagates only over the dielectric layer without penetrating into the low-resistance substrate. However, if a dielectric layer is deposited on the surface of 200939454 and is fabricated using a chemical vapor deposition apparatus, there is a limit to the thickness of the dielectric layer deposited, and about 10#m will cause stress to cause cracking of the dielectric layer. In addition, the low dielectric material easily adsorbs moisture and affects dielectric properties, so the integration of active and passive components remains to be considered. The fourth technique deposits a surface protective layer over the germanium wafer so that the mobile carriers on the surface of the silicon wafer are adsorbed by the surface protective layer, thereby forming a microwave 0 substrate of approximately insulator. Published by B. R〇ng et al. in Electron Device Letters, IEEE, Vol. 25, No. 4, pp. 176-ns, April 2004, “Applying to the 1st: The surface resistance of the surface矽 substrate (Surcee_Passivated High Resistiv SiliC〇nSubstratesforRFICs), 'It reveals a low-loss, high-quality passive component fabricated on a surface-protected high-resistance 矽 substrate. However, this article does not fully reveal its implementation of the step-by-step Side experimental parameters. Therefore, the related art further clarifies the implementation method and steps. 〇 Providing a semi-conductive substrate with good microwave characteristics, a passive component fabricated on a semi-conductive substrate can be used. The step-by-step integration of the domain dynamic components on a single substrate. The reason is that the in-persons are carefully experimenting and researching, and the spirit of perseverance has finally developed RF passives that can be applied to the microwave frequency band and fabricated on semi-conductive substrates. [Explanation] 8 200939454 In view of the above conventional knowledge, the main objective (10) of this (4) provides - RF passive components for semi-finished substrates, which can be used For the above purposes, for the purpose of the transfer, the RF passive component for the semi-conducting substrate, comprising a semi-conducting substrate; a high defect density film; and - RF passive components. The defect density of the density film is greater than MW 2. According to the invention, the semi-conductive substrate is selected from the group consisting of a recording board, a Kunyu County plate, a silk wire, a Wei gallium wire, a woven plate, a carbon-cut substrate, and a semiconductor group. Any of the inventions - one of the county plate materials. According to the invention, wherein the electrically conductive substrate has an electric quantity of between 1 and 4 Ώ - cm. According to the invention, the high defect density The film is one of an amorphous structure film and a polycrystalline structure film. ◎ According to one feature of the present invention, the high defect density film is selected from the group consisting of a stone film, a stone film, a gallium film, and a dioxide film. One of the Shixi film, the nitrogen yarn compound film, the aluminum telluride film and the yttrium oxynitride film. According to the invention, the structure of the cap wire element is a filter»', a structure, a splitter structure , antenna structure, inductance The above and other objects, features, and advantages of the present invention will become more apparent and understood. 9 200939454 [Embodiment] The present invention may be embodied in different forms of embodiments, but the drawings and the following description are preferred embodiments of the present invention, and please understand that the disclosures disclosed herein are considered. This is an example of the invention and is not intended to limit the invention to the particular embodiments illustrated and/or described. Referring now to Figure 1, there is shown a fabrication of a first embodiment of the present invention. Schematic diagram of the RF passive component of the semiconductive substrate. It comprises at least one semiconductor substrate 113; a high defect density film 111; and a radio frequency passive component 12A. The semiconductive substrate 113 has a first surface 112 and a second surface 114. The inventors have found in detail that the semiconductive substrate 113 can be any one of a substrate group consisting of a germanium substrate, a gallium arsenide substrate, a germanium substrate, a gallium phosphide substrate, a cadmium sulfide substrate, a tantalum carbide substrate, and a semiconductor. One. The semiconducting substrate U3 has a resistivity of HT4 to 1〇4 Q_cm. Among them, the Shixi substrate is a commonly used substrate in the general semiconductor device process, because the advantage of the substrate is low cost, and the compatibility with the current process is high, and the active and passive components can be effectively integrated into the single-half-conducting substrate. A system on chip (SOC) is reached. The still defect density film 111' is coated on the first surface 112 of the semiconductive substrate 113. According to detailed research by the inventors, the type of the high defect density film ηι is a ruthenium film, a ruthenium film, a gallium arsenide film, a ruthenium dioxide film, a ruthenium ruthenium compound film, a SL ruthenium film, and a chaotic oxide film. It is further divided into an amorphous structural film or a polycrystalline structural film. When the high defect density film ill is coated on the surface m of the semiconductive substrate 200939454, the __lu _ defect density needs to be greater than K) w ' for capturing the leakage current from the semiconductive substrate 113 Charge. The high defect density _(1), if it is an oxygen recording _, can be divided into four kinds of interface trapping charges, oxide layer charges, fixed oxide layer charges, and mobile ion charges. The high defect density _(1) is a material turn-off, and the defect charge is due to lattice defects in the material or point defects formed in the crystal, line defects, surface defects, Ο 晶 lattice difference rows, spiral difference rows, etc. Excessive free electrons or electric carriers caused by undesirable phenomena. Among them, the high-deficiency film 111 can be prepared by a physical gas deposition system, a chemical vapor deposition system, and an ion cloth (four) system. The physical vapor deposition system has a DC magnetic frequency modulation process machine, an RF magnetic control system, or a molecular beam abbreviated crystal processing machine. The Lilai ion bombards the silk surface to produce a luminescence discharge phenomenon (gi〇w dlSCharge) and the surface of the tree surface is ejected and deposited as a bribe. Chemical vapor phase aging age has a 化学 type chemical gas accumulation process machine, UHF _ type chemical vapor deposition process machine, atmospheric pressure chemical vapor deposition process machine or low pressure chemical money phase _ 赖 台. The hybrids have a high-energy ion implanting machine, a towel, a lining machine or a Lai ion implanter. In the first embodiment of the present invention, the high defect density film m is formed by an amorphous structure film, which is produced by a resilience type chemical vapor deposition method. It is formed by mixing Wei and ammonia gas, and its Wei is mixed with 9 qi and occupational Wei. During the process, high concentrations of Wein 11 will be avoided as much as less than 7% in order to facilitate the formation of amorphous structure. Due to the evolution of plasma enhanced chemical vapor deposition process technology, the quality and rate of film formation are improved. The high defect density film 111 can also be a high frequency plasma enhanced chemical vapor deposition (VHF-PECVD) using plasma enhanced chemical vapor deposition, that is, using a semiconductor prior to the semiconductor substrate 113. The process is to make an amorphous tantalum film, and then use a special high-frequency plasma enhanced chemical vapor deposition method to pass decane gas of less than or equal to 8.4% and use a plasma excitation frequency of more than 70 MHz, and finally utilize decane and ® Hydrogen is mixed and diluted to form a high defect density film 111 having a thickness of between 300 nm and 1 μm. The decane gas content is less than 84%, and the preferred embodiment is less than 7%; e-heptane content. The radio frequency passive component 1 manufactured on the semiconductive substrate has an operable frequency ranging from 1 MHz to 10 kHz. The high defect density film m of the high defect rate film surface 11G can be fabricated - RF passive component 12 (). The swaying element 〇 2 〇 can be a filter, a waver structure, a splitter structure, an antenna structure, an inductor structure or a capacitor structure. In an embodiment of the invention, the RF passive component 12 〇 structure is a coplanar waveguide structure, and the best impedance is formed by the ground plane-Xinlin ground plane. The sinusoidal waveguide 113 of the coplanar waveguide structure has the second surface 114 having no metal. Referring to Figure 2, the signal line width of the coplanar waveguide structure is the distance of the brother, the distance between the ground plane and the signal line g is 25 Å, and the width of the ground plane Wg is P - the substrate of the cast substrate 1B $ p The substrate resistance is 12 200939454 3000-Ω·αη. In Fig. 2, the frequency response results of the surface protection without the film, the argon ion implantation and the surface protection of the amorphous structure ruthenium film are respectively shown. Among them, the attenuation of surface protection of argon ion implantation and amorphous structure ruthenium film coating is less than 2dB/cm in the frequency range below 30 GHz, which is quite different from the degree of attenuation of the surface protection without film. At a frequency of 17 GHz, the attenuation of the surface of the film-free coating is 7.8 dB/cm, and the attenuation of the surface protection of the argon ion implanted film is 1 time/coffee and the attenuation of the amorphous structure 矽 film coating surface protection. For i 3dB/em. 〇 It is shown that the amorphous structure of the fine-grained surface protection improves the microwave frequency band of the substrate, and the operational loss capability is better than that of the surface protector with argon ion implanted thin enamel. In a second embodiment of the present invention, as disclosed in Fig. 3, a metal oxide semiconductor capacitor structure is fabricated on a substrate 200 for protecting the surface of the amorphous structure dream film. The metal oxide semiconductor capacitor structure 22 is formed by an upper electrode 2, an oxide film 2, a high defect density film 213, and a substrate 215. The metal oxide semiconductor capacitor structure 22 is formed on the surface 210 of the oxide film 2 ι. Wherein the oxide film 211 is deposited on the high defect density film surface 212. The high defect density film 213 is deposited on the first surface of the slab substrate 215 and has no metal on the second surface 216 and serves as a back electrode. The upper electrode has a radius R of 1 mm and is formed on the dioxin surface of the dianion film 211, which is an ohmic c〇ntact electrode. Its function is to take out the charge stored in the metal oxide semiconductor capacitor with minimal loss. Therefore, it is desirable that this portion is not rectified, and the current resistance is low, followed by high strength and solder resistance. General ohmic electrode 13 200939454 The forming method includes a vapor deposition method, an electroplating method, a printing method, and the like. When manufacturing a metal oxide semiconductor capacitor, the ohmic electrode is made of nickel (Ni), gold (Au), silver (Ag), titanium (Ti), palladium (Pd), aluminum (A1), or the like. Please refer to Figure 4, which shows the substrate without surface protection, argon ion implantation and amorphous structure. The surface protection of the substrate is maintained at 4 ° C for 30 minutes after the annealing process. The response of the capacitance value at the frequency i 〇 0 kHz with the applied bias voltage. The substrate without the film-coated surface protection has a lower capacitance value due to the formation of a depletion region in the inversion region on the surface when the applied bias voltage is lower than 9V 〇. The argon ion implantation and the amorphous structure ruthenium film coated surface protection substrate all exhibit a relatively low capacitance value and the capacitance value is not affected by the external bias, forming a good dielectric material property. In summary, the radio frequency passive component 100 fabricated on the semiconductive substrate according to the present invention has the following advantages: high frequency, miniaturization, high quality factor, easy integration into the semiconductor process, and high degree of commercialization. The substrate 〇& of various materials can realize the radio frequency passive components fabricated on the semiconductive substrate. In addition, it has low loss and is not affected by external bias. It can be widely used in passive component design of wireless communication systems. Although it is intended that the present invention is not limited to the spirit and scope of the present invention, it can be used in various ways. As with the above scales, the correction and change of the various types of Ke (10) will destroy the spirit of the work. Therefore, the scope of the patent application scope of the present invention is subject to the definition of the patent application scope of 200939454.
〇 15 200939454 【圖式簡單說明】 第1圖顯示為本發明之第一實施例之高缺陷密度薄膜表面保護基 板之共平面波導結構示意圖； 第2圖顯示為本發明之高缺陷密度薄膜表面保護之共平面波導結 構於無薄膜披覆表面保護、氬離子佈植與非晶質結構矽薄膜彼覆 表面保護之頻率響應圖； 第3圖為根據本發明之第二實施例之具有坡覆非晶質結構矽薄膜 〇 表面保護之石夕基板之金屬氧化物半導體電容結構示意圖；以及 第4圖顯示為本發明之高缺陷密度薄膜之具有彼覆非晶質結構石夕 薄膜表面保護之矽基板之金屬氧化物半導體電容結構於無薄膜披 覆表面保護、氬離子佈植與非晶質結構矽薄膜彼覆表面保護之電 容-電壓響應圖。 【主要元件符號說明】 ◎ 100 —種製作於半導性基板之射頻被動元件 110高缺陷密度薄膜表面 111高缺陷密度薄膜 112第一表面 113 —半導性基板 114第二表面 120 —射頻被動元件 200 —披覆非晶質結構矽薄膜表面保護之矽基板 210氧化物薄膜表面 211 —氧化物薄膜 212高缺陷密度薄膜表面 213高缺陷密度薄膜 16 200939454 216第二表面 214第一表面 215 —矽基板 220金屬氧化物半導體電容結構 230上電極〇15 200939454 BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic view showing the structure of a coplanar waveguide of a high defect density film surface protection substrate according to a first embodiment of the present invention; and FIG. 2 is a view showing the surface protection of a high defect density film of the present invention. Frequency response diagram of the coplanar waveguide structure on the surface protection of the film-free coating, the argon ion implantation and the amorphous structure 矽 film; FIG. 3 is a non-slope non-slip according to the second embodiment of the present invention; Schematic diagram of a metal oxide semiconductor capacitor structure of a crystal structure 矽 film 〇 surface protection; and FIG. 4 shows a ruthenium substrate having a surface structure of a high defect density film of the present invention having an amorphous structure The capacitance-voltage response diagram of the metal oxide semiconductor capacitor structure on the surface protection of the film-free surface protection, the argon ion implantation and the amorphous structure ruthenium film. [Main component symbol description] ◎ 100 - RF passive component 110 fabricated on semiconductive substrate High defect density film surface 111 High defect density film 112 First surface 113 - Semiconductive substrate 114 Second surface 120 - RF passive component 200 - coated amorphous structure 矽 film surface protection 矽 substrate 210 oxide film surface 211 - oxide film 212 high defect density film surface 213 high defect density film 16 200939454 216 second surface 214 first surface 215 - 矽 substrate 220 metal oxide semiconductor capacitor structure 230 upper electrode
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