TW200928825A - Bonding pad structure and debug method thereof - Google Patents

Bonding pad structure and debug method thereof Download PDF

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Publication number
TW200928825A
TW200928825A TW96149101A TW96149101A TW200928825A TW 200928825 A TW200928825 A TW 200928825A TW 96149101 A TW96149101 A TW 96149101A TW 96149101 A TW96149101 A TW 96149101A TW 200928825 A TW200928825 A TW 200928825A
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TW
Taiwan
Prior art keywords
pad
solder
blank
bonding pad
pad structure
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TW96149101A
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Chinese (zh)
Inventor
Fu-Chung Wu
Sheng-Yuan Tsai
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Inventec Corp
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Application filed by Inventec Corp filed Critical Inventec Corp
Priority to TW96149101A priority Critical patent/TW200928825A/en
Publication of TW200928825A publication Critical patent/TW200928825A/en

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Abstract

A bonding pad structure is disclosed. The bonding pad includes a main bonding pad and a blank path disposed on the main boding pad for dividing the main bonding pad into a first sub bonding pad and a second sub bonding pad. The bonding pad could include a solder selectively coated on the main bonding pad and the blank path. The main bonding pad could be regarded as close when the solder is coated on the main bonding pad. The main bonding pad could be regarded as open when the solder is not coated on the main bonding pad.

Description

200928825 九、發明說明: 【發明所屬之技術領域】 本發明是有關於一種可重工焊塾,且特別是有關於 一種用於電路除錯之可重工焊墊。 【先前技術】 當在電路板上完成電路佈局與所有製程後,為了避 免後續使用電路板時發生問題,因此,常會再進行一道200928825 IX. DESCRIPTION OF THE INVENTION: TECHNICAL FIELD OF THE INVENTION The present invention relates to a reworkable soldering iron, and more particularly to a reworkable solder pad for circuit debugging. [Prior Art] When the circuit layout and all processes are completed on the board, in order to avoid problems when the board is used later, it is often necessary to perform another

除錯程序,用以確定所有之電路連線與安裝於電路板上 之積體電路是處於正常狀況。 通常這些除錯程序是在電路板之電路佈局與製程完 成後即時進行,因此—些除錯程序所需要之積體電路與 相關之電路連線,會於製作電路板之同時一起完成,以 方便進行㈣檢驗。為避免除錯測料,_路直接連 接而造成短路,並能保留除錯時重工的彈性,電路板上 常在除錯位置配置有零歐姆電阻’當進行除錯程序時, 僅需將零歐姆電阻㈣,即可分別對零歐姆電阻兩端之 -件進行除錯測試。此種做法雖然簡單, 姆電阻購料、備料,及打件等成本。 零政 【發明内容] 因此本發明的目的就是在提供一種可重 局’用以在電路除錯時進行除錯測試。 佈 本發月的另一目的是在提供_種可重工焊墊佈局, 5 200928825 用以取代零歐姆電阻,以節省備料及打料之成本。 依照本發明一較佳實施例,提出一種焊墊結構,應 用於一電路板之一除錯程序。焊墊結構包含一焊墊主體 與穿過焊墊主體之-空白分隔道4白分隔道可分割淳 墊主體為一第一次焊墊與一第二次烊墊。焊墊結構可更 包含一焊料,焊料較佳地為選擇性地覆蓋於空白分隔道 及焊墊主體上。其中’當焊料覆蓋於空白分隔道及焊塾 主體上B夺帛墊主體可視為一通路。當焊料不覆蓋於办 白分隔道及谭墊主體時,㈣主體可視為—開路。焊: 主體之外形可為圓形。空白分隔道之形狀可為直線、折 線,或曲 '線。焊料較佳地為完全地覆蓋焊塾主體。 本發明之另-態樣為一種應用谭塾結構之除錯程 包含設計—焊塾結構,焊塾結構具有-焊塾主體, 焊墊主體可藉由—空自分隔道分割為相鄰之—第一次焊 =第一-人焊墊,形成焊墊結構於一電路板;分別利 -次焊墊與第二次焊墊進行—除錯程序;以及決定 主體為-通路或為__開路。若#焊塾主體為一通路 夺第^含覆蓋-焊料於焊墊主體,以連接第—次焊墊 興第二次焊墊。 #程岸"I墊、°構可直接生成在電路板上,可有效地在除 取代傳統之零歐姆電阻,並省略了零歐姆電阻 求=打料的成本與時間。此外,焊料可依設計者的需 隔道及地覆蓋於焊墊主體上’當焊料覆蓋於空白分 墊主體上時,焊墊主體可視為通路,當焊料不 6 200928825 覆 蓋於空白分隔道及谭墊主體時,焊墊主體可視為_ 【實施方式】 • 卩下將以圖式及詳細說明冑楚說明本發明之 、 任何所屬技術領域中具有通常知識者在瞭解本發知 佳實施例後’當可由本發明所教示之技術,加以改變: 修飾,其並不脫離本發明之精神與範圍。 參照第1 ®,其係料本發明之、料結構—較 ❹ 施例之示意圖。焊墊結構100包含有—焊墊主體11〇 -空白分隔道120。空白分隔道120 4穿過焊塾主體 no,以將焊墊主體11G劃分為—第—次焊塾ιΐ2盘 • 5次焊墊m。其中’空白分隔道12〇為位於 112與第二次焊墊114之間。 人坪墊 由於第一次焊墊112與第二次焊墊m之間利用* 白分隔道m隔開’兩者無法連通,此時之焊墊主體二 而在進行電路板之除錯程序時,可分別利 ❹ 112與第二次焊塾114作為測試之端點。 人112與第二次焊墊114可為焊墊主體11〇之 完整外形的-部分。舉例而言,焊墊主體11G之外形可 為圓形,空白分隔道12()之外 办马罝線,位於空白分隔 " 之第一次焊墊112與第二次焊塾114可分別 為半圓形。第__女搜:執119 & _ # 4墊112與第二次焊墊m可分別利 〆用導線^向外連接,如連接向積體電路晶片之引腳 (pin),或是電路板上之導通孔。 7 200928825 參照第2A圖與第2]5圖,其係分別緣示本發明 塾結構之空白分隔道不同實施例之示意圖。空白分隔道 1池之形狀可為曲線,如第2A圖所示,或者,空白八 之形狀可為折線,如第2B圖所示。空白; 、31120之形狀不限於此,只要空白分隔道120可貫穿焊 塾主體m,以將谭墊主體11〇分割為第一 、 第二次焊墊114即可。 纪 2與 參照第3圖’其騎示本發明之焊塾結構另一較佳 ❿ 實施例之示意圖。焊墊結構i⑽可更包含一焊料13 料130可覆蓋於焊塾主體11〇與空白分隔道12〇上,以 猎由焊料13〇連接第-次焊墊m與第二次焊塾ιΐ4,使 . 焊墊主體U〇可視為通路。焊料130可為錫焊料13〇 可完全地覆蓋於焊塾主體11〇上。其中,焊料13〇之用 量至少須;L以連接第—次料112與第二次焊塾114。 此外,此焊墊結構⑽可提供防止電路板佈局被抄 襲之功能。當不了解本發明精神之第三者經由不當管道 © 拿到使用此焊龍構⑽之電路板時,由於第三者|法 得知此空白分隔道12G之作用’而會將此焊墊結構ι〇〇 判讀成斷路。但實際上,空白分隔道12〇可能會在之後 的製程中被谭合而成為通路。如此-來,不當管道之第 三者便無法拿到正確且完整的電路板佈⑤。 - 參’、、、帛4 ® ’其係緣示本發明之應用焊^結構之除 , 程序較佳實施例之流程圖。步輝41G始;^設計此焊 塾、。構&含在電路設計時提供對應於焊墊結構之符 8 200928825 ’焊塾結構之焊墊主體可被空白分隔道分割成 -人焊墊與第二次焊墊。接著’步驟42〇為在 ^成此焊墊結構於電路板上。㈣43q為分別利 ==:人焊墊與第二次料進行除錯㈣。待除錯程序 =’步驟440為決定此谭墊主體為通路或是開路。 如}fcf·墊主體為通路,則接菩的半趣Μ。 第二第蓋焊料於焊 -、弟一-人焊墊。步騾450可在The debug program is used to determine that all circuit connections and integrated circuits mounted on the board are in a normal condition. Usually, these debugging procedures are performed immediately after the circuit layout and process of the circuit board are completed. Therefore, the integrated circuits required for the debugging programs and the related circuits are connected together at the same time as the circuit board is fabricated, so as to facilitate Carry out (4) inspection. In order to avoid the error detection of the material, the _ path is directly connected to cause a short circuit, and the rework elasticity can be retained when the error is removed. The circuit board is often equipped with a zero ohm resistor at the debug position. When the debug program is performed, only zero ohms are required. The resistor (4) can be used to debug the parts at both ends of the zero ohm resistor. Although this method is simple, the cost of purchasing materials, preparing materials, and parts is the same. Zero-Zone [Explanation] It is therefore an object of the present invention to provide a reproducible 'for debugging tests when circuit is debugged. Another purpose of this month is to provide a reworkable pad layout, 5 200928825 to replace the zero ohm resistor to save the cost of preparation and material. In accordance with a preferred embodiment of the present invention, a pad structure is proposed for use in a debugger of a circuit board. The pad structure comprises a pad body and a white partition through the pad body. The white pad can divide the pad body into a first pad and a second pad. The pad structure may further comprise a solder, and the solder preferably selectively covers the blank spacer and the pad body. Wherein, when the solder covers the blank compartment and the body of the soldering body, the body of the pad can be regarded as a path. When the solder does not cover the white separation channel and the body of the Tan pad, (4) the body can be regarded as an open circuit. Welding: The shape of the body can be round. The shape of the blank divider can be a straight line, a broken line, or a curved line. The solder preferably completely covers the solder fillet body. Another aspect of the present invention is an application of a Tantron structure that includes a design-weld structure, the solder joint structure has a solder body, and the pad body can be divided into adjacent ones by an empty space. First welding = first - human pad, forming a pad structure on a circuit board; respectively - the secondary pad and the second pad - debugging process; and determining the body is - path or __ open circuit . If the #焊塾 body is a pass, the second cover is covered with solder-solder on the pad body to connect the second bond pad to the second bond pad. #程岸"I pad, ° structure can be directly generated on the circuit board, which can effectively replace the traditional zero ohm resistance, and omit the cost and time of zero ohm resistance. In addition, the solder can be covered on the pad body according to the designer's needs. When the solder covers the blank pad body, the pad body can be regarded as a passage when the solder is not covered by the blank divider and the spring. In the case of the main body of the pad, the main body of the pad can be regarded as the following. [Embodiment] The following description of the present invention will be made in the following description of the present invention. The invention may be modified by the teachings of the present invention, and modifications may be made without departing from the spirit and scope of the invention. Referring to the 1st, it is a schematic diagram of the material structure of the present invention. The pad structure 100 includes a pad body 11 〇 - a blank divider 120. The blank partition 120 4 passes through the welding head body no to divide the pad main body 11G into a -first welding 塾 ΐ 2 disk • 5 times pad m. Wherein the blank spacer 12 is located between 112 and the second pad 114. The person's pad is separated from the second pad m by the * white pad m. 'The two cannot communicate, and the pad body 2 is in the process of debugging the board. , respectively, the benefit 112 and the second weld 114 as the end points of the test. The person 112 and the second pad 114 may be a full-profile portion of the pad body 11''. For example, the outer shape of the pad main body 11G may be a circular shape, and the first separation pad 112 and the second secondary welding pad 114 may be respectively disposed outside the blank partition 12 (). Semicircular. The first __ female search: 119 & _ # 4 pad 112 and the second pad m can be separately connected with the wire ^, such as the pin connected to the integrated circuit chip, or the circuit Via holes on the board. 7 200928825 Referring to Figures 2A and 2], there are shown schematic views of different embodiments of blank partitions of the crucible structure of the present invention, respectively. Blank compartment 1 The shape of the pool can be a curve, as shown in Figure 2A, or the shape of the blank eight can be a fold line, as shown in Figure 2B. The shape of the blank 31, 31120 is not limited thereto, as long as the blank partition 120 can penetrate the solder main body m to divide the tan pad main body 11 into the first and second pads 114. 2 and FIG. 3 are schematic views of another preferred embodiment of the solder fillet structure of the present invention. The pad structure i (10) may further comprise a solder 13 material 130 covering the solder body 11 〇 and the blank spacer 12 , to connect the first bonding pad m and the second bonding pad ι 4 to the solder 13 , The pad body U〇 can be regarded as a via. The solder 130 may be a tin solder 13 〇 which may completely cover the solder body 11 . Wherein, the amount of solder 13 is at least required; L is to connect the first material 112 and the second electrode 114. In addition, the pad structure (10) provides the ability to prevent board layout from being copied. When the third party who does not understand the spirit of the present invention obtains the circuit board using the soldering structure (10) via the improper pipe ©, the pad structure is known because the third party | 〇〇〇〇 interpreted as a break. In reality, however, the blank divider 12 may be merged into a path in subsequent processes. So--the third of the improper pipes can't get the correct and complete circuit board cloth5. - The reference to the ', ', and ® 4 ® ' shows the flow chart of the preferred embodiment of the application of the present invention. Step Hui 41G; ^ Design this welding 塾,. The structure & is provided in the circuit design to provide a corresponding to the structure of the pad. 8 200928825 The pad body of the soldering structure can be divided into a human pad and a second pad by a blank partition. Next, the step 42 is performed on the circuit board. (4) 43q is separately profit ==: human welding pad and second material are debugged (4). The program to be debugged = 'Step 440 is to determine whether the body of the pad is a path or an open circuit. For example, if the main body of the fcf·pad is a passage, then it will be half-fun. The second cover is soldered to the solder-and-one-person solder pad. Step 450 can be

‘之製私中一併進行。若是焊墊主體被定為開 :料則步冑偏為保留焊墊主體,不在焊墊主體上覆蓋 由上述本發明較㈣施前知,^本發明具有下列 優點。料墊結構可直接生成在電路板上,可有效地在 =序中取代傳統之零歐姆電阻,並省略了零歐姆電 =料^料的成本與時間。此外,焊料可依設計者的 需未,選擇性地覆蓋㈣塾主體上,#焊料覆蓋於空白 分隔道及焊墊主體上時’焊墊主體可視為通路,+焊料 :覆蓋於空白分隔道及料主體時,料主體可二為開 雖然本發明已以一較佳實施例揭露如上,然其並非 =以限定本發明,任何熟習此技藝者,在不脫離i發明 之精神和範圍内’當可作錢之更動與㈣,因此本發 明之保護範圍當視後附之中請專利範圍所界定者為準。 【圖式簡單說明】 9 200928825 例二 =!明之上述和其他目的、特徵、優點與實施 例迠更明顯易僅,所附圖式之詳細說明如下: 第1 @係㈣本發明之焊墊結構—較佳實施例的示 意闹。 第2A圖與第2B圖分別繪示本發明之焊墊結構之空 白分隔道不同實施例之示意圖。 第3圖’其係繪示本發明之焊墊結構另一 例之示意圖。 第4圖’其係繪示本發明之應用焊墊結構 序'較佳實施例之流程圖。 【主要元件符號說明】 1QG :烊墊結構 110 :焊墊主體 12 .第一次焊塾 1 ^ 114 :第二次焊墊 〇 :空白分隔道 120a :空白分隔道 l2Qb :空白分隔道 130 :焊料 14G :導線 410-460 :步驟 m‘The system is carried out in private. If the main body of the pad is set to be open, the step is biased to retain the main body of the pad, and is not covered by the main body of the pad. The present invention has the following advantages. The pad structure can be directly formed on the circuit board, which can effectively replace the traditional zero ohm resistance in the = order, and omits the cost and time of zero ohms = material. In addition, the solder can be selectively covered (4) on the main body according to the designer's needs. When the solder covers the blank partition and the pad main body, the pad body can be regarded as a via, + solder: covering the blank separation channel and In the case of the main body of the material, the main body of the material can be opened. Although the present invention has been disclosed in a preferred embodiment as above, it is not intended to limit the invention, and any person skilled in the art can't leave the spirit and scope of the invention. It can be used as a change of money and (4), and therefore the scope of protection of the present invention is subject to the definition of patent scope. [Simple description of the drawing] 9 200928825 Example 2 = The above and other objects, features, advantages and embodiments of the present invention are more obvious and obvious. The detailed description of the drawings is as follows: 1st @四(四) The pad structure of the present invention - an illustration of the preferred embodiment. 2A and 2B are schematic views respectively showing different embodiments of the blank partition of the pad structure of the present invention. Fig. 3 is a schematic view showing another example of the structure of the pad of the present invention. Fig. 4 is a flow chart showing a preferred embodiment of the application pad structure of the present invention. [Main component symbol description] 1QG: 烊 pad structure 110: pad body 12. First 塾 1 ^ 114 : second pad 〇: blank compartment 120a: blank compartment l2Qb: blank compartment 130: solder 14G: Conductor 410-460: Step m

Claims (1)

200928825 十、申請專利範圍: 1. 一種焊墊結構’應用於一電路板之一除錯程序,該 焊墊結構包含: 一焊墊主體; 一空白分隔道,穿過該焊墊主體,以分割該焊墊主 體為一第一次焊墊與一第二次焊墊;以及 一焊料,選擇性地覆蓋於該空白分隔道及該焊墊主 體上,其中,當該焊料覆蓋於該空白分隔道及該焊墊主 ,上時,該焊塾主體係為—通路’當該焊料不覆蓋於該 空白分隔道及該焊墊主體時,該焊墊主體係為一開路。 2.如申請專利範圍第1項所述之焊墊結構,其中該焊 墊主體之外形為圓形。 3·如申請專利範圍第1項所述之焊墊結構,其中該第 -人焊墊與該第二次焊墊分別連接向一積體電路之引腳 或是該電路板之一導通孔。 4.如申睛專利範圍第1項所述之焊墊結構,其中該空 白分隔道之形狀為一直線。 5·如申請專利範圍第1項所述之焊墊結構,其中該空 白分隔道之形狀為一折線。 11 200928825 6 -如申睛專利範圍第1項所述之焊墊結構,其中該空 白分隔道之形狀為一曲線。 7·如申請專利範圍第1項所述之焊墊結構,其中該焊 料為完全地覆蓋該焊墊主體。 8.—種焊墊結構,應用於〆電路板之一除錯程序,該 焊塾結構包含: ¥墊主體,包含相鄰之一第一次焊塾與—第二次 焊墊;以及 一空白分隔道,位於該第一次焊墊與該第二次焊墊 之間,以分隔該第—次焊墊與該第二次焊墊。 9·如申請專利範圍第8項所述之焊墊結構,1 塾主體之物為圓形。 、中这焊 10.如申請專利範圍第8項所述之焊墊結構,其中該 第一次焊墊與該第二次焊墊分別連接向一積體電路之引 腳或是該電路板之—導通孔。 11·如申請專利範圍第8項所述之焊墊結構,其中該 空白分隔道之形狀為一直線。 、以 12.如申請專利範圍第8項所述之焊墊結構,其中該 12 200928825 折線 13·如申請專利範圍第8項所述之焊墊結構, 空白分隔道之形狀為一曲線。 w 14·一種應用焊墊結構之除錯程序,包含: 胃設計H结構’該焊塾結構具有—焊塾 ❹ 焊墊主體藉由-空白分隔道分割為相鄰之 — 與一第二次焊墊; 弟一次焊墊 形成該焊塾結構於一電路板; 分別利㈣第—次焊墊與該第 程序;以及 年墊進行—除錯 決定該焊墊主體為一通路或為—開路。 15.如申請專利範圍第14 ❹ 除錯程序,其巾當該料主 4之應料塾結構之 -焊料於該焊塾主體兮通路時,更包含覆蓋 焊墊。 第·'次焊墊與該第二次 13200928825 X. Patent application scope: 1. A solder pad structure is applied to one of the circuit board debugging programs. The pad structure comprises: a pad body; a blank dividing channel passing through the pad body to divide The pad body is a first pad and a second pad; and a solder selectively covering the blank channel and the pad body, wherein the solder covers the blank channel And the main pad of the soldering pad, the main system of the soldering pad is a path "when the solder does not cover the blank dividing channel and the pad body, the main system of the pad is an open circuit. 2. The pad structure of claim 1, wherein the pad body is circular in shape. 3. The pad structure of claim 1, wherein the first human pad and the second pad are respectively connected to a pin of an integrated circuit or a via of the circuit board. 4. The pad structure according to claim 1, wherein the shape of the blank partition is a straight line. 5. The pad structure of claim 1, wherein the blank divider has a shape of a fold line. 11 200928825 6 - The pad structure according to claim 1, wherein the shape of the blank partition is a curve. 7. The pad structure of claim 1, wherein the solder material completely covers the pad body. 8. A pad structure for use in a debugger of a circuit board comprising: a pad body comprising a first one of the adjacent pads and a second pad; and a blank a separator is disposed between the first bonding pad and the second bonding pad to separate the first bonding pad from the second bonding pad. 9. If the pad structure described in claim 8 is applied, the body of the 1 塾 body is circular. 10. The solder pad structure of claim 8, wherein the first bonding pad and the second bonding pad are respectively connected to a pin of an integrated circuit or the circuit board. - Via holes. 11. The pad structure of claim 8, wherein the blank divider is in the shape of a straight line. 12. The pad structure of claim 8, wherein the 12 200928825 fold line 13. The pad structure as described in claim 8 of the patent application, the shape of the blank partition is a curve. W 14 · A debugging procedure for applying a pad structure, comprising: a stomach design H structure 'the solder bump structure has a solder bump body, the pad body is divided into adjacent by a blank partition - and a second solder Pad; a primary pad forms the pad structure on a circuit board; respectively (4) the first-time pad and the first program; and the year pad--debug determines that the pad body is a path or an open circuit. 15. In the case of the patent application No. 14 ❹ Debugging Procedure, the towel also includes a cover pad when the solder is applied to the body of the soldering body. The first 'secondary pad and the second time 13
TW96149101A 2007-12-20 2007-12-20 Bonding pad structure and debug method thereof TW200928825A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104898901A (en) * 2014-03-05 2015-09-09 纬创资通股份有限公司 Connection pad structure and touch panel

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104898901A (en) * 2014-03-05 2015-09-09 纬创资通股份有限公司 Connection pad structure and touch panel
CN104898901B (en) * 2014-03-05 2017-10-13 纬创资通股份有限公司 Bonding pad structure and contact panel

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