TW200921518A - Method for producing RFID and structure thereof - Google Patents

Method for producing RFID and structure thereof Download PDF

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Publication number
TW200921518A
TW200921518A TW096141940A TW96141940A TW200921518A TW 200921518 A TW200921518 A TW 200921518A TW 096141940 A TW096141940 A TW 096141940A TW 96141940 A TW96141940 A TW 96141940A TW 200921518 A TW200921518 A TW 200921518A
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TW
Taiwan
Prior art keywords
substrate
wafer
conductive
antenna pattern
block
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Application number
TW096141940A
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Chinese (zh)
Inventor
Lien-Feng Lin
Original Assignee
Lien-Feng Lin
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Priority to TW096141940A priority Critical patent/TW200921518A/en
Publication of TW200921518A publication Critical patent/TW200921518A/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector

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  • Details Of Aerials (AREA)

Abstract

A method for producing an RFID includes the steps of providing an antenna printed circuit board which includes a substrate and a thin-film antenna having at least one pad and being formed on the substrate; forming a conducting area thicker than the thin-film antenna and joined to the pad; mounting a chip on the substrate; and bonding a bump of the chip with the conducting area.

Description

200921518 九、發明說明: 【發明所屬之技術領域】 本發明涉及電子標籤方面的技術領域,尤其涉 及如何將一晶片組裝到一基板上之薄膜天線圖案上 的技術。 【先前技術】 習知電子標籤的製作方法,是先用銅在一基板 上形成一天線圖,再將一 RFID晶片組裝於該基板上 與該天線圖案連接,諸如台灣公開第200713069號 案即該方法之一例。 在該天線圖案較厚時,該RFID晶片很容易被組 裝到該基板上。當該天線圖案朝薄膜化發展而變得 很薄膜時,諸如台灣公開200729613中提及的 2000人〜5000人(埃),該RFID晶片就很難組裝到該 基板上。這是因為該天線圖案中用於連接該RFID晶 片的接點(pad),也因為薄膜化而變得很薄 (2000A〜5000人),導致它無法承受組裝該RFID晶 片時所需要的高溫,例如焊接所需要的高溫。 更詳而言之’在組裝該RFID晶片時,该接點在 往會因為太薄且受高溫而翻翹、熔化、或從該基板 上剝離,導致該RFID晶片根本無法組裝上去。此 外,高溫也會破壞或降低該接點的導電性能,所以 該RFID晶片即使勉強組裝到該基板上,也難以正常 5 200921518 運作。 【發明内容】 β本發明提供一種新的電子標籤製作方法,其包 括提供-天線電路板。該天線電路板⑽—基板及 形成在該基板上之—薄膜天線圖案,該薄膜天線圖 案包括至少一接點(pad)。接著,在該基板上形成厚 度大於該薄膜線圖案之至少—導電區塊’並使該導 電區,與該接點連接。然後,利用固定黏膠將一晶 片黏著於該基板上,並使該晶片的接腳(bump)連接 該導電區塊。該晶片在黏著過程需要被施壓,以促 使其接腳接觸該導電區塊,而該固定黏膠主要是用 加熱手段予以固化。 本發明也提供一種經由該方法I出之新的電子 私籤,其包括一基板、一薄膜天線圖案、至少—導 電區塊、固定黏膠、及一晶片。該薄膜天線圖宰係 形成在該基板上’厚度在10"以τ (含iMm), 且包括至少一接點。該導電區塊係形成在該基板 上’且厚度大於該薄膜天線圖案,並與該薄膜天線 圖案的接點連接。該固定黏膠係被施加在該導電區 塊f]該晶片係藉該固定黏膠而固定於該基板上, 且該晶片的接腳係以接觸或耦合方式而連接該導電 區塊。 在本發明中,可藉由該較厚的導電區塊來承受 200921518 施壓該晶片的力道及加熱該固定黏膠的高溫。這表 示,該接點在該晶片被施壓、加熱的過程不會因為 很薄而導致翻翹、熔化、或從該基板上剝離,且該 接點的導電性能也不會在該晶片被施壓、加熱的過 程中有明顯減損。 至於本發明的其它發明内容與更詳細的技術及 功效說明’將揭露於隨後的說明。 【實施方式】 第一圖顯示一種電子標籤包括一天線電路板1 及 BB片5 °該天線電路板1包括一基板1 〇及形成 在該基板10上之一薄膜天線圖案n。該薄膜天線 圖案11包括至少一接點(pad)m,通常是兩個,其 分別連接兩薄膜天線112。 該基板10的厚度係50um以下(含50um),其材 貝係為 PET (Polyethylene Terephthalate,聚對 苯二甲酸乙二酯)、PVC(聚氯乙烯)、PI(聚醯亞胺)、 紙、布、纖維其中任一者,或其它薄的可撓性絕緣 材料。 該薄膜天線圖案11是用銅、銀、金、或其它高 ‘電性金屬’以蒸鑛或賤鍍方式形成的,使得該薄 膜天線圖案丨1厚度被控制在10um以下,最好是ium 以下。 該晶片5是射頻識別晶片(RFId chip),其底面 7 200921518 具有至少-接腳(b卿,圖中未示),通常有多個接 腳’其中兩個是用來分別對應連接該薄膜天線圖荦 11的兩接點111。 ~ /本發明之電子標籤製作方法的較佳實施方式, 係如第二到四圖所示,其用於將該晶片5組裝到天 線電路板1上,其過程包括: 提供第一圖所示的天線電路板1。 二二、三圖所示’在該基板10上形成厚度大 於相線圖案11之至少—導電區塊3卜並使該 導電區塊31與該接點⑴連接。圖中的接點m有 兩個’所U該導電區塊31的數量也對應是兩個。由 於該晶片5的接腳通常是多於兩個,所以,在形成 塊31之同時’通常會-併形成厚度相同於 以導電鬼31之至少一支稽區塊32,並使該支樓 區塊,與該導電區塊3“立於同一面且相隔一間 隙θ藉應接收於該晶片的其它接腳。較佳的做 導電貧印出相同厚度的導電區塊31與支撐 區,32= §亥導電膏可以選用銀膠或銀膏其中一者, 或疋^匕的黏稠狀導電材料。藉由該兩導電區塊31 支,,晶片5的兩接腳,並藉該兩支撐區塊犯支撐 拄Ϊ的其它接腳’可使該晶片5被組裝好後能 a' 平而不偏斜,進而確保該兩導電區塊31虚· 該晶片5之間的連接。 /、 士第四圖所不,將該晶片5組裝於該基板1〇 200921518 ^,並使該a日日片5的接腳5()連接該導電區塊3卜 較佳的具體做法是,先在該導電區塊Μ上施予 黏勝4,再將該晶片5置於_定歸4上,並使 該晶片5的接腳50對著該導電區塊3卜然後,施 C »亥曰曰片5則吏5亥晶片5的接腳5〇接觸該導電區 塊31。至於該晶片5的其它接腳,如果有的話,則 會因該晶片5的受屢而對應接觸該支禮區塊^。产 固化該固定鄉4’使得該晶片5確實黏著: «板1G上而不會任意脫落。其中,該固定黏膠4 可選用異方性黏膠或一般黏膠,前者内含奈米導 顆粒’其僅會加強該晶片5的接腳與該導電區塊^ 的導電連接,但不會導致該晶片5各接腳短路。至 於該固定黏膠4的固化,則視其成份而決定用加熱 手段或紫外光照射手段來促使其固化。較佳是使用、 加熱手段。此外,施壓該晶片5與固化該固定黏膠 4兩者是可以同時進行的。 在本發明中,該接點lu與該薄膜天線圖案u 的其它部份都-樣很薄,但由於該較厚的導電區塊 31的存在,使得該接點ηι與該導電區塊31的總 體厚度比該薄鼓線圖案u的其它部份都來得厚 一些’因此’較能承受施壓該晶片5的力道及加熱 5亥固定黏膠4的高溫。這表示,該接點111在該晶 片5被施壓、加熱的過程不會因為很薄而: 輕、熔化、或從該基板10上剝離,且該接點lu的 200921518 導電性能也不會在該晶片5被施壓、加熱的過程 有明顯減損。 - 在第四、五圖中的接點111與該導電區塊31都 位在該基板1 〇的正面,並且相接觸,不同之處在 於,第五圖的接點Π1是全部與該導電區塊3丨重 - ,,第四圖的接點111只有部份與該導電區塊31重 璺,且該晶片5的接腳50離該接點111較遠,所以, 當該晶片5受熱時’該接點U1受熱的影響會較小。 在第四、五圖中的接點m、導電區塊31、及 支撐區塊32都位在該基板10的正面。然而,接點 111、導電區塊31、及支撐區塊32也可以形成在該 基板10的背面,如第六、七圖所示。此時,該導電 區塊31與該接點U1是經由耦合而達成連接的。由 於該晶片5是組裝在位於該基板1〇背面的該導電區 鬼3所以,在當§玄晶片5受熱時,該接點11】典 熱的影響會較小(因為還隔著該基板1 〇厚度)。 +從上述的說明可知,本發明的重點係在增加該 薄=接點111承受熱及壓力的能力,特別是承受熱 ,月b力主要手段主要是形成較厚的導電區塊31, 人要手奴疋加大該晶片5接腳與該接點丨丨丨的距 離。基此,儘管上述說明中的導電區塊31是用導電 膏印的,但它也可以是用電财式來形成,也就是 僅針對該接點丨11進行電鍍以加厚其厚度,所增加 的部份即為該導電區塊31。 曰 10 200921518 ^ 無論如何,任何人都可以從上述例子的說明獲 件足夠教導,並據而了解本發明確實有產業上之利 又未見與本發明相同的技術,所以本發明 有新賴性。又,去θ 丄令 ^ 禾見與本發明類似的技術,所以本 發明有進步枓 _ θ + 丨王。於疋,本發明符合發明專利要件, 美依法提出申請。 11 200921518 【圖式簡單說明】 天線電路板及一待 第一圖,係揭露一整 電子標籤之 組裝的晶片。 =至四圖’係顯示本發明方法之—較佳實施方式。 至七圖’係顯示分別利用本發明方法所產出之 電子標籤的放大結構示意圖。 【主要元件符號說明】 10基板 111 接點(pad) 32支撐區塊 1天線電路板 11薄膜天線圖案 112薄膜天線 31導電區塊 4固定黏膠 曰日 片 12BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the technical field of electronic tags, and more particularly to a technique for assembling a wafer onto a film antenna pattern on a substrate. [Previous Art] A conventional electronic tag is manufactured by first forming an antenna pattern on a substrate by using copper, and then assembling an RFID chip on the substrate to be connected to the antenna pattern, such as the case of Taiwan Publication No. 200713069. An example of a method. When the antenna pattern is thick, the RFID chip can be easily assembled onto the substrate. When the antenna pattern becomes thinner toward thin film development, such as 2000 to 5000 people (Angstrom) mentioned in Taiwan Publication No. 200729613, the RFID wafer is difficult to assemble onto the substrate. This is because the pad for connecting the RFID chip in the antenna pattern is also thin (2000A to 5000 people) due to thinning, so that it cannot withstand the high temperature required for assembling the RFID chip. For example, the high temperature required for welding. More specifically, when the RFID wafer is assembled, the contact is too thin and subjected to high temperature to be warped, melted, or peeled off from the substrate, resulting in the RFID chip being unable to be assembled at all. In addition, the high temperature also destroys or reduces the electrical conductivity of the contact, so that the RFID chip is difficult to operate normally even if it is barely assembled on the substrate. SUMMARY OF THE INVENTION The present invention provides a novel electronic label manufacturing method that includes providing an antenna circuit board. The antenna circuit board (10) is a substrate and a film antenna pattern formed on the substrate, the film antenna pattern including at least one pad. Next, at least a conductive block 'having a thickness greater than the film line pattern is formed on the substrate and the conductive region is connected to the contact. Then, a wafer is adhered to the substrate by a fixed adhesive, and a bump of the wafer is connected to the conductive block. The wafer needs to be pressed during the bonding process to cause its pins to contact the conductive block, and the fixed adhesive is primarily cured by heating. The present invention also provides a novel electronic private tag via the method I, comprising a substrate, a thin film antenna pattern, at least a conductive block, a fixed adhesive, and a wafer. The thin film antenna pattern is formed on the substrate to have a thickness of 10" in τ (including iMm) and includes at least one contact. The conductive block is formed on the substrate and has a thickness greater than the film antenna pattern and is connected to a contact of the film antenna pattern. The fixing adhesive is applied to the conductive block f]. The wafer is fixed to the substrate by the fixing adhesive, and the pins of the wafer are connected to the conductive block by contact or coupling. In the present invention, the thick conductive block can be used to withstand the force of the 200921518 pressing the wafer and heating the fixed adhesive. This means that the contact is not pressed, melted, or peeled off from the substrate because the wafer is pressed and heated, and the conductive properties of the contact are not applied to the wafer. There is a significant impairment in the process of pressing and heating. Other inventive aspects and more detailed technical and functional descriptions of the present invention will be disclosed in the following description. [Embodiment] The first figure shows an electronic tag including an antenna circuit board 1 and a BB chip. The antenna circuit board 1 includes a substrate 1 and a film antenna pattern n formed on the substrate 10. The film antenna pattern 11 includes at least one pad m, usually two, which are connected to the two film antennas 112, respectively. The thickness of the substrate 10 is 50 μm or less (including 50 μm), and the material of the substrate 10 is PET (Polyethylene Terephthalate, polyethylene terephthalate), PVC (polyvinyl chloride), PI (polyimine), paper, Any of cloth, fiber, or other thin flexible insulation. The film antenna pattern 11 is formed by copper or silver, gold, or other high 'electric metal' by steaming or bismuth plating, so that the thickness of the film antenna pattern 丨1 is controlled to be 10 um or less, preferably ium or less. . The wafer 5 is a radio frequency identification chip (RFId chip), and the bottom surface 7 200921518 has at least a pin (b, not shown), and usually has a plurality of pins, two of which are used to respectively connect the film antennas. Figure 2 shows the two junctions 111. ~ / The preferred embodiment of the electronic label manufacturing method of the present invention, as shown in the second to fourth figures, for assembling the wafer 5 onto the antenna circuit board 1, the process comprising: providing the first figure Antenna board 1. As shown in the second and third figures, at least the conductive block 3 having a thickness greater than that of the phase line pattern 11 is formed on the substrate 10 and the conductive block 31 is connected to the contact (1). The contact m in the figure has two 'U' and the number of the conductive blocks 31 also corresponds to two. Since the number of pins of the wafer 5 is usually more than two, the block 31 is formed while being "usually" and formed to have the same thickness as the at least one block 32 of the conductive ghost 31, and the branch area is formed. The block, "standing on the same side of the conductive block 3 and separated by a gap θ, is received by other pins of the wafer. Preferably, the conductive strip 31 and the support region of the same thickness are printed on the conductive strip, 32= § Hai conductive paste can use one of silver glue or silver paste, or viscous conductive material of 疋^匕. By the two conductive blocks 31, the two pins of the wafer 5, and the two supporting blocks The other pins of the support raft can make the wafer 5 assembled and can be a' flat without deflection, thereby ensuring the connection between the two conductive blocks 31 and the wafer 5. /, 4th No, the wafer 5 is assembled on the substrate 1〇200921518^, and the pin 5() of the a-day chip 5 is connected to the conductive block 3. Preferably, the conductive block is first used in the conductive block. Applying the adhesive to the crucible 4, placing the wafer 5 on the etalon 4, and placing the pin 50 of the wafer 5 against the conductive block 3, then The core 5 of the 5th chip 5 contacts the conductive block 31. As for the other pins of the wafer 5, if any, the wafer 5 is affected by the wafer 5 Corresponding to the contact area ^. The curing of the fixed township 4' makes the wafer 5 do adhere: «The plate 1G does not fall off arbitrarily. Among them, the fixed adhesive 4 can be made of anisotropic or general adhesive. The glue, which contains nano-conductive particles, which only strengthens the conductive connection between the pins of the wafer 5 and the conductive blocks, but does not cause short-circuiting of the pins of the wafer 5. As for the curing of the fixed adhesive 4 Then, depending on the composition, it is decided to use a heating means or an ultraviolet light irradiation means to promote the curing. Preferably, the heating means is used. Further, both the pressing of the wafer 5 and the curing of the fixing adhesive 4 can be simultaneously performed. In the present invention, the contact lu is thin as the other portions of the film antenna pattern u, but due to the presence of the thick conductive block 31, the contact ηι and the conductive block 31 are The overall thickness is thicker than the other parts of the thin drum pattern u. It is subjected to the force of pressing the wafer 5 and heating the high temperature of the fixed adhesive 4. This means that the contact 111 is not pressed and heated during the pressing and heating of the wafer 5: light, melted, or The substrate 10 is peeled off, and the electrical conductivity of the contact point 200921518 is not significantly degraded during the pressing and heating of the wafer 5. - The contact 111 and the conductive block in the fourth and fifth figures 31 is located on the front side of the substrate 1 and is in contact with each other, except that the contact Π1 of the fifth figure is all 与-- with the conductive block 3, and the contact 111 of the fourth figure has only a part. The conductive block 31 is overlapped, and the pin 50 of the wafer 5 is far from the contact 111. Therefore, when the wafer 5 is heated, the contact U1 is less affected by heat. The contacts m, the conductive blocks 31, and the support blocks 32 in the fourth and fifth figures are all located on the front side of the substrate 10. However, the contact 111, the conductive block 31, and the support block 32 may also be formed on the back surface of the substrate 10 as shown in the sixth and seventh figures. At this time, the conductive block 31 and the contact U1 are connected via coupling. Since the wafer 5 is assembled in the conductive region ghost 3 located on the back surface of the substrate 1 , when the CMOS wafer 5 is heated, the influence of the junction 11 is small (because the substrate 1 is also separated) 〇 thickness). + As can be seen from the above description, the focus of the present invention is to increase the ability of the thin = contact 111 to withstand heat and pressure, especially to withstand heat, and the main means of the monthly b force is mainly to form a thick conductive block 31. The slave slave increases the distance between the wafer 5 pin and the contact 丨丨丨. Accordingly, although the conductive block 31 in the above description is printed with a conductive paste, it may be formed by an electric fuel type, that is, only the contact 丨 11 is plated to thicken its thickness, which is increased. The portion of the conductive block 31 is the conductive block 31.曰10 200921518 ^ In any case, anyone can obtain sufficient teaching from the description of the above examples, and understand that the present invention does have industrial advantages and does not see the same technology as the present invention, so the present invention has new advantages. . Further, it is a technique similar to the present invention, and therefore the present invention has progress 枓 θ θ + 丨王. Yu Yu, the invention meets the requirements of the invention patent, and the US filed an application according to law. 11 200921518 [Simple description of the diagram] The antenna circuit board and the first picture are the wafers assembled by the whole electronic label. = to four figures show the preferred embodiment of the method of the invention. The seven-figure diagram shows an enlarged schematic view of the electronic tag produced by the method of the present invention, respectively. [Main component symbol description] 10 substrate 111 Contact (pad) 32 support block 1 Antenna circuit board 11 Thin film antenna pattern 112 Thin film antenna 31 Conductive block 4 Fixed adhesive Next day 12

Claims (1)

200921518 申請專利範圍: 1、一種電子標籤製作方法,包括: 提供一天線電路板,該天線電路板包括_基板及 形成在該基板上之一薄膜天線圖案,該薄膜天線圖案 包括至少一接點(pad); 在该基板上形成厚度大於該薄膜線圖案之至少一 導電區塊,並使該導電區塊與該接點連接;及 將一晶片組裝於該基板上,並使該晶片的接腳 (bump)連接該導電區塊。 2、如申請專利範圍第丨項所述的方法,其中該薄 膜天線圖案是形成在該基板的正面,該導電區 導電膏印於該基板的正面,並使該導㈣塊接觸該薄 膜天線圖案的接點。 + 、如申請專利範圍第1項所述的方法,其中該薄 膜天線圖案是形成在該基板的正面,料電區塊是以 印於該基板的背面,並使該導電區塊_合該薄 膜天線圖案的接點。 4、如申請專利範圍第2或3項所述的方法,1 在形成該導電區塊之同日夺,—併以該導電膏印出厚 相同於該導電區塊之至少一支撐區塊,並使 二 塊與該導電區塊位於同—面且相隔 接收於該晶片的其它接腳。 猎以對應 5如申凊專利範圍第1項所述的方法,哕式 係選自銀膠或銀漿其中一者。 μ电局 13 200921518 6、 如申請專利範圍第1項所述的方法,其中所提 供的天線電板路’其薄膜天線圖案的厚度係1 以下 (含 10um)。 7、 如申請專利範圍第1項所述的方法,其中所提 供的天線電板路,其薄膜天線圖案的厚度係1 以下 (含 lum)。 8、 如申請專利範圍第6或7項所述的方法,其中 所提供的天線電板路,其基板的厚度係5〇um以下'(含 50um) 〇 9、 如申請專利範圍第6或7項所述的方法,其中 所提供的天線電板路,其基板的是用PET、pvc、^、 紙、布、纖維其中一者製成。 10、 如申請專利範圍第1項所述的方法,其中將 該晶片組裝於該基板上的過程包括: 在该導電區塊上施予固定黏膠; 將該晶片置於該固定黏膠上,並使該晶片的接腳 對著該導電區塊; 訑壓忒曰曰片,以使該晶片的接腳接觸該導電區 塊;及 固化該固定黏膠。 u、如申請專利範圍第10項所述的方法,其中施 壓該晶片與固化該固定黏膠兩者可同時進行。 12、如中請專利範圍第4項所述的方法,其中將 該晶片組裝於該基板上的過程包括: 14 200921518 在該導電區塊上施予固定黏膠; 將該晶片置於該固定黏膠上,並使該晶片的接腳 分別對著該導電區塊與該支撐區塊; 施壓°亥曰曰片,以使該晶片的接腳接觸該導電區堍 與該支撐區塊;及 & 固化該固定黏膠。 13、 如申請專利範圍帛12項所述的方法,其中施 廢該晶片與固化該固定黏膠兩者可同時進行。 14、 一種電子標籤,包括: 一基板; -薄膜天線圖案,係形成在該基板上, 少-接點(pad),其中,該薄膜天線圖案的 //m 以下(含 ιο#^); 至少一導電區塊’係形成在該基板上,且 於该薄膜天線圖案,並與該薄膜夭綠 、潯膘天線圖案的接點連接; 固疋黏膠,係被施加在該導電區塊上;及 一晶片,係藉該固定黏膠而固定於該基板上, 該晶片的接腳(bump)係連接該導電區塊。土 ,且 15、 如申請專利範圍第14項所述的電子標盆 中5亥该薄膜天線圖案的厚度在1 // m以下(人彳 八 16、 如申請專利範圍第14項所述的 中該薄膜天線圖案是位在該基板的正面,不=其 是位在該基板的正面,且該導電區塊係 签區塊 線圖案的接點。 亀亥㈣天 15 200921518 17、如申請專利範圍第14項所述的電子標载,其 中忒薄膜天線圖案是位在該基板的正面,該導電區塊 疋位在該基板的背面,且該導電區塊係耦合該薄膜天 線圖案的接點。 • 18、如申請專利範圍第16或17項所述的電子標 籤,更包括厚度相同於該導電區塊之至少一支撐區 塊,该支撐區塊係形成於該基板上,且與該導電區塊 位於同一面及相隔一間隙,藉以對應接收於該晶片的 其它接腳。 19、 如申請專利範圍第14項所述的電子標籤,其 中该導電言係為銀膠或銀漿其中一者。 20、 如申請專利範圍第15項所述的電子標籤,其 中該基板的厚度係5〇_以下(含5〇um)。 、 21、 如申請專利範圍第20項所述的電子標籤,其 中該基板的材質係為pET、pvc、ρι、紙、布 中任一者。 /、 16200921518 Patent application scope: 1. An electronic label manufacturing method, comprising: providing an antenna circuit board, comprising: a substrate and a film antenna pattern formed on the substrate, the film antenna pattern comprising at least one contact ( Forming at least one conductive block having a thickness larger than the film line pattern on the substrate, and connecting the conductive block to the contact; and assembling a wafer on the substrate, and bonding the chip (bump) connect the conductive block. 2. The method of claim 2, wherein the film antenna pattern is formed on a front surface of the substrate, the conductive region conductive paste is printed on a front surface of the substrate, and the conductive (four) block contacts the film antenna pattern The junction. The method of claim 1, wherein the film antenna pattern is formed on a front surface of the substrate, the electrical block is printed on the back surface of the substrate, and the conductive block is bonded to the film The contact of the antenna pattern. 4. The method of claim 2, wherein the method of forming the conductive block is performed on the same day, and the conductive paste is printed with at least one support block having the same thickness as the conductive block, and The two blocks are placed on the same side as the conductive block and are received at other pins of the wafer. The hunting method is in accordance with the method described in claim 1, wherein the 哕 formula is selected from one of silver glue or silver paste. The invention is the method of claim 1, wherein the antenna circuit board provided has a thickness of the thin film antenna pattern of 1 or less (including 10 um). 7. The method of claim 1, wherein the antenna circuit board has a thickness of the thin film antenna pattern of 1 or less (including lum). 8. The method according to claim 6 or 7, wherein the antenna circuit board provided has a thickness of the substrate of 5 〇 um or less '(including 50 um) 〇 9, as in the patent application range 6 or 7. The method according to the item, wherein the antenna circuit board provided is made of one of PET, pvc, ^, paper, cloth, and fiber. 10. The method of claim 1, wherein the process of assembling the wafer on the substrate comprises: applying a fixed adhesive to the conductive block; placing the wafer on the fixed adhesive, And placing the pins of the wafer against the conductive block; pressing the slab to contact the pads of the wafer; and curing the fixed adhesive. U. The method of claim 10, wherein the pressing the wafer and curing the fixed adhesive are performed simultaneously. 12. The method of claim 4, wherein the process of assembling the wafer on the substrate comprises: 14 200921518 applying a fixed adhesive to the conductive block; placing the wafer on the fixed adhesive Bonding the pads of the wafer to the conductive block and the supporting block; respectively, pressing the chip to contact the conductive pad and the supporting block; and & Curing the fixed adhesive. 13. The method of claim 12, wherein the disposing of the wafer and curing of the fixed adhesive are performed simultaneously. 14. An electronic tag comprising: a substrate; a film antenna pattern formed on the substrate, a pad-less, wherein the film antenna pattern is //m or less (including ιο#^); a conductive block is formed on the substrate, and is connected to the film antenna pattern and connected to the contact of the film green and 浔膘 antenna pattern; the solid adhesive is applied to the conductive block; And a wafer is fixed on the substrate by the fixing adhesive, and a bump of the wafer is connected to the conductive block. Soil, and 15, as in the electronic standard basin described in claim 14, the thickness of the film antenna pattern is less than 1 // m (Personal 彳8, 16, as described in claim 14) The film antenna pattern is located on the front side of the substrate, not = it is located on the front side of the substrate, and the conductive block is a contact point of the block line pattern. 亀海(四)天15 200921518 17, as claimed The electronic label according to Item 14, wherein the 忒 film antenna pattern is located on the front surface of the substrate, the conductive block is clamped on the back surface of the substrate, and the conductive block is coupled to the contact of the film antenna pattern. 18. The electronic tag of claim 16 or 17, further comprising at least one support block having the same thickness as the conductive block, the support block being formed on the substrate and the conductive region The blocks are located on the same side and are separated by a gap, thereby corresponding to the other pins received by the wafer. 19. The electronic label of claim 14, wherein the conductive language is one of silver glue or silver paste. 20, such as The electronic label of claim 15, wherein the thickness of the substrate is 5 〇 or less (including 5 〇 um). The electronic label according to claim 20, wherein the material of the substrate It is any of pET, pvc, ρι, paper, cloth. /, 16
TW096141940A 2007-11-06 2007-11-06 Method for producing RFID and structure thereof TW200921518A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI566470B (en) * 2015-12-31 2017-01-11 Anti - metal flexible radio frequency identification tag
TWI601229B (en) * 2015-12-25 2017-10-01 韋僑科技股份有限公司 Rfid device and method for making the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI601229B (en) * 2015-12-25 2017-10-01 韋僑科技股份有限公司 Rfid device and method for making the same
TWI566470B (en) * 2015-12-31 2017-01-11 Anti - metal flexible radio frequency identification tag

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