200917675 九、發明說明： 【發明所屬之技術領域】 本發明有關於一種無線收發器之偏壓電路，尤指一種 可用於調整放大器增益之偏壓電路，可將放大器増益調整 時所產生的暫態反應降到最低。 【先前技術】 請參閱第1圖，為習用無線收發器之前端電路圖。如 圖所示’無線收發器(transceiver)之前端電路10包括有一天 線11、一放大器13、一混頻器15及一本地振盪器π。其 中天線11用以接收一接收訊號，例如為一射頻或類比訊 號’並將所接收訊號傳送至放大器13以進行接收訊號的放 大’一般放大器13可為一低雜訊放大器（i〇w n〇ise amplifier ; LNA)。而後，再將放大訊號透過混頻器15及本 地振盪源17進行混波動作，藉此將接收訊號降頻為一中頻 s孔號。透過上述降頻動作的進行，無線收發器之後端電路(未 顯示）才可以對降頻後的訊號（中頻訊號)進行處理。 一般而言’放大器13的增益主要是根據天線η所接收 之接收訊號的強弱來進行調整，例如：當接收訊號為一微 弱的訊號時，便需要提高放大器13的增益，並使得放大器 13可以將微弱的訊號進行適度的放大，藉此無線收發器的 後端電路才能對訊號進行處理。相反的，若接收訊號為一 較大的訊號時’便需要降低放大器13的增益，以使得放大 器13的增益適用於較大的訊號，並以放大器]3對較大的 200917675 訊號進行適度的放大。 一般放大益13的增^大小主要是由與放大器I]相連 接之控制電路19所控制’該控制電路19是以數位方式制 定出多階的增益模式來建置，藉此以進行放大器13增益的 調整。換言之，控制電路19將根據天線11所傳送之接收訊 號的強度來調整放大器13的增益。 以習用之控制電路19來進行放大器13增益的調整時 將會存在有下列的問題：習用之控制電路19是以數位控制 訊號來改變放大器13的增益，因此放大器π的增益無論 是在調升或調降的過程當中都會有暫態反應出現，在應用 時就必須等到暫態反應結束後才可以放大器13進行訊號的 放大，對此將會影響無線收發器之前端電路1〇的工作效率。 此外’控制電路19所輸出之數位控制訊號的大小，主 要是由後端電路偵測放大器13所輸出之放大訊號的強度來 決定’而後端電路還是要等待暫態反應結束才能進行訊號 強度的福測’否則後端電路將會偵測到錯誤的放大訊號強 度’例如可能會偵測到暫態反應時的訊號強度，而造成放 大器13增益的調整出現錯誤。由於在每一次放大器19增 益的調整時’後端電路都必須要等到暫態反應結束後才可 以進行放大訊號強度的感測，再以控制電路19對放大器13 的增益進行調整’不僅會有偵測錯誤的情形發生，亦會造 成無線收發器的工作效率下降。 【發明内容】 200917675 為此’如何針對上述習用技術的缺點，而設計出一種 可應用於調整放大器增益的偏壓電路，不僅玎避免在放大 器增益變動時所造成的暫態反應，並可提高無線收發器處 理接收訊號的效率，此為本發明之發明重點之一；另外， 增益變化同時放大器的雜訊指數與線性度同時伴隨著變 化’其中線性度的表現亦可以透過偏壓電路的調整，進而 調整電晶體的電流密度，最後調整在某特定增益下的線性 度表現。 本發明之主要目的，在於提供一種無線收發器之偏壓 電路，其中偏壓電路用以進行放大器增益的調整，並使得 放大器增益的變化曲線為一類比的平滑曲線，藉此將可避 免放大器增益變動時出現暫態反應的可能。 本發明之次要目的，在於提供一種無線收發器之偏壓 電路’其巾該偏壓電路可輸出—平滑的輸出電流，且該輸 出電流的調升或調降是以類比的方式進行，並使得與偏壓 電路相連接之放大器增益的調整亦是以類比的方式進行。 本發明之又-目的，在於提供一種無線收發器之偏塵 電路’其中該偏虔電路透過一轉換器與放大器相連接，而 轉換器可㈣㈣路所產生之輸出電流轉換成為—調整電 壓，藉此將更有利於進行放大器增益的調整。 本發明之又-目的，在於提供一種無線收發器之偏屋 電路，其巾放大n包括有調整單元，並透過触單元進行 放大器增益的改變，藉此將可以增加放大器增益的調整範 圍。 200917675 為達成上述目的，本發明提供一種無線收發器之偏壓 電路，主要包括有一第一級偏壓單元用以接收一定電流、 一控制電壓及一第一參考電壓，並依據所接收之定電流、 控制電壓及第一參考電壓而產生一第一輸出電流，其中第 一輸出電流的大小是由控制電壓所控制，並以類比的方式 進行調升或調降。 本發明尚提供一種無線收發器之偏壓電路，主要包括 有：一定電流單元，用以產生一偏壓電流；一第一差動單 元，連接定電流單元，並接收一控制電壓、一參考電壓及 偏壓電流；一第一電流鏡，連接第一差動單元，並產生一 第一輸出電流；及一負載單元，與第一差動單元相連接。 本發明又提供一種無線收發器之偏壓電路，主要包括 有：一第一級偏壓單元，包括有：一定電流單元，用以產 生一偏壓電流；一第一差動單元，連接定電流單元，並接 收一控制電壓、一第一參考電壓及定電流單元所產生之偏 壓電流；一第一電流鏡，連接第一差動單元，並產生一第 一輸出電流；及一第二電流鏡，連接第一差動單元，並產 生一第二電流；及至少一第二級偏壓單元，包括有：一第 三電流鏡，連接第二電流鏡，並接收第二電流鏡所產生之 第二電流；一第二差動單元，連接第三電流鏡，並接收控 制電壓及一第二參考電壓；一負載單元，連接第二差動單 元；及一第四電流鏡，連接第二差動單元，並產生一第三 輸出電流。 200917675 【實施方式】 首先，請參閱第2圖，為本發明無線收發器之偏壓電 路一較佳實施例之方塊示意圖。如圖所示，無線收發器 (transceiver)20主要包括有一偏壓電路200、放大器25及天 線27，其中偏壓電路200包括有一第一級偏壓單元21，而 放大器25分別與第一級偏壓單元21及天線27相連接，並 用以將天線27所接收之接收訊號進行放大，例如接收訊號 可為一射頻或類比訊號。放大器25的增益可由第一級偏壓 單元21進行調整，例如以第一級偏壓單元21所輸出之第 一輸出電流II的大小來控制放大器25的增益，而第一級偏 壓單元21在進行放大器25增益的調整時，主要是以天線200917675 IX. Description of the Invention: [Technical Field] The present invention relates to a bias circuit for a wireless transceiver, and more particularly to a bias circuit that can be used to adjust the gain of an amplifier, which can be generated by adjusting the gain of the amplifier. Transient reactions are minimized. [Prior Art] Please refer to Figure 1 for the circuit diagram of the front end of the conventional wireless transceiver. As shown in the figure, the "transceiver" front end circuit 10 includes a day line 11, an amplifier 13, a mixer 15, and a local oscillator π. The antenna 11 is configured to receive a received signal, such as a radio frequency or analog signal 'and transmit the received signal to the amplifier 13 for amplification of the received signal. The general amplifier 13 can be a low noise amplifier (i〇wn〇ise Amplifier ; LNA). Then, the amplified signal is subjected to a mixing operation through the mixer 15 and the local oscillation source 17, thereby down-converting the received signal to an intermediate frequency s hole number. Through the above-mentioned frequency reduction operation, the rear-end circuit (not shown) of the wireless transceiver can process the down-converted signal (intermediate frequency signal). Generally, the gain of the amplifier 13 is mainly adjusted according to the strength of the received signal received by the antenna η. For example, when the received signal is a weak signal, it is necessary to increase the gain of the amplifier 13 and enable the amplifier 13 to The weak signal is moderately amplified, so that the back-end circuit of the wireless transceiver can process the signal. Conversely, if the received signal is a large signal, it is necessary to reduce the gain of the amplifier 13 so that the gain of the amplifier 13 is suitable for a larger signal and moderately amplify the larger 200917675 signal with the amplifier]3. . Generally, the amplification of the gain 13 is mainly controlled by the control circuit 19 connected to the amplifier I]. The control circuit 19 is constructed by multi-level gain mode in a digital manner, thereby performing gain of the amplifier 13. Adjustment. In other words, the control circuit 19 adjusts the gain of the amplifier 13 in accordance with the intensity of the received signal transmitted by the antenna 11. When the gain of the amplifier 13 is adjusted by the conventional control circuit 19, there will be the following problem: the conventional control circuit 19 uses the digital control signal to change the gain of the amplifier 13, so that the gain of the amplifier π is either up or up. In the process of down-conversion, there will be transient reactions. In the application, it is necessary to wait until the transient reaction is over before the amplifier 13 can amplify the signal, which will affect the working efficiency of the front end circuit of the wireless transceiver. In addition, the size of the digital control signal outputted by the control circuit 19 is mainly determined by the strength of the amplified signal outputted by the back-end circuit detecting amplifier 13 and the back-end circuit still has to wait for the end of the transient reaction to perform the signal strength. Measure 'otherwise the back-end circuit will detect the wrong amplified signal strength'. For example, the signal strength during the transient reaction may be detected, and the gain adjustment of the amplifier 13 may be incorrect. Since the gain of each amplifier 19 is adjusted, the 'back-end circuit must wait until the transient reaction is over before the amplification signal strength can be sensed, and then the gain of the amplifier 13 is adjusted by the control circuit 19. The occurrence of error detection will also cause the efficiency of the wireless transceiver to decrease. SUMMARY OF THE INVENTION 200917675 For this reason, how to design a bias circuit that can be applied to adjust the gain of the amplifier for the disadvantages of the above-mentioned conventional techniques, not only avoids the transient reaction caused by the fluctuation of the amplifier gain, but also improves The wireless transceiver processes the efficiency of the received signal, which is one of the focuses of the invention; in addition, the gain varies while the noise index and linearity of the amplifier are accompanied by changes, wherein the linearity can also be transmitted through the bias circuit. Adjust, and then adjust the current density of the transistor, and finally adjust the linearity performance at a certain gain. The main object of the present invention is to provide a bias circuit for a wireless transceiver, wherein the bias circuit is used to adjust the gain of the amplifier, and the curve of the gain of the amplifier is an analog smooth curve, thereby avoiding The possibility of a transient reaction when the gain of the amplifier changes. A secondary object of the present invention is to provide a bias circuit for a wireless transceiver that can output a smooth output current, and the rise or fall of the output current is analogized. And the adjustment of the gain of the amplifier connected to the bias circuit is also performed in an analogous manner. A further object of the present invention is to provide a dust-splitting circuit for a wireless transceiver, wherein the bias circuit is connected to an amplifier through a converter, and the output current generated by the converter (4) (four) is converted into an adjustment voltage. This will be more conducive to the adjustment of the amplifier gain. Still another object of the present invention is to provide a partial-semiconductor circuit for a wireless transceiver in which the lens amplification n includes an adjustment unit and a change in amplifier gain through the touch unit, whereby an adjustment range of the amplifier gain can be increased. 200917675 In order to achieve the above object, the present invention provides a bias circuit for a wireless transceiver, which mainly includes a first stage biasing unit for receiving a certain current, a control voltage and a first reference voltage, and according to the received The current, the control voltage and the first reference voltage generate a first output current, wherein the magnitude of the first output current is controlled by the control voltage and is up-regulated or down-regulated in an analogous manner. The present invention further provides a bias circuit for a wireless transceiver, comprising: a constant current unit for generating a bias current; a first differential unit connected to the constant current unit and receiving a control voltage, a reference a voltage and a bias current; a first current mirror connected to the first differential unit and generating a first output current; and a load unit coupled to the first differential unit. The present invention further provides a bias circuit for a wireless transceiver, comprising: a first stage biasing unit, comprising: a current unit for generating a bias current; a first differential unit, connected a current unit, and receiving a control voltage, a first reference voltage, and a bias current generated by the constant current unit; a first current mirror connected to the first differential unit and generating a first output current; and a second a current mirror connected to the first differential unit and generating a second current; and at least one second stage biasing unit comprising: a third current mirror connected to the second current mirror and received by the second current mirror a second current; a second differential unit connected to the third current mirror and receiving the control voltage and a second reference voltage; a load unit connected to the second differential unit; and a fourth current mirror connected to the second The differential unit generates a third output current. [Embodiment] First, please refer to FIG. 2, which is a block diagram of a preferred embodiment of a bias circuit of a wireless transceiver of the present invention. As shown, the wireless transceiver 20 mainly includes a bias circuit 200, an amplifier 25 and an antenna 27, wherein the bias circuit 200 includes a first stage biasing unit 21, and the amplifier 25 and the first The stage biasing unit 21 and the antenna 27 are connected to amplify the received signal received by the antenna 27, for example, the received signal can be a radio frequency or analog signal. The gain of the amplifier 25 can be adjusted by the first stage biasing unit 21, for example, by controlling the gain of the amplifier 25 by the magnitude of the first output current II output by the first stage biasing unit 21, while the first stage biasing unit 21 is When adjusting the gain of the amplifier 25, the antenna is mainly
27所傳送之接收訊號的大小為依據，以使得放大器： 出之放大訊號符合後端電路(未顯示）的需求。 第-級驗單元21用以接收一定電流Is、一控制電塵 VAGC及-第-參考電壓Vren，並依據該定電流is、控制 電壓VAGC及第-參考電壓Vrefl而產生—第一輸出電流 Π，使得第-輸出電流n具有—平滑的輪出曲線，並以類 比的方式進行第-輸出電流n的調升或調降。其中第一參 考電壓Vren為-固定電壓，而控制電屢vagc則為一可變 電壓，並透過控制電1 VAGC的改變來調整第一輸 II的大小。 又，本發明實闕所狀第—級偏壓單元21，不僅可 採用電流調控的方式來改變放大器25的增益，亦可配合放 大器25的不㈣改以錢調控的方式纽變放大器25的 200917675 增益。例如可以在第一級偏壓單元21與放大器25之間增 設有一轉換器23，該轉換器23用以將第一級偏壓單元 所產生的第一輸出電流丨！轉換成一調整電壓Vreg，並透過 調整電壓Vreg來改變放大器25的增益。又，調整電壓 的大小將會隨著第—級偏壓單元21所輸出的第—輸出電流 II而改變，因此同樣可以第一級偏壓單元21之控制電壓 VAGC對調整電壓Vreg及放大器25增益進行調整。土 由上，的實施方式可得知，放大器25的增益主要是由 第-級偏壓單it 21所輸人之第-輸出電流„或調整電壓 Vreg所控制’且放大II 25增益的曲線與第—輸出電流h 或凋正電壓Vreg的變化曲線相關。在本發明中主要是藉由 第，.及偏偏璧單元21的設置，使得第一輸出電流n及調整 電壓Vreg的曲線成為一類比的輸出曲線，藉此放大器25 的增益將同樣以類比的方式進行改變，並可避免放大器乃 增益在改變時有暫態反應的發生。 明參閱第3圖及第4圖，分別為本發明偏壓電路一較 佳實施例之電路圖及偏壓電路所連接之放大器的電路圖。 如圖所不，偏壓電路200包括有一定電流單元21卜一第一 差動單元214、-第-電流鏡215及—負載單元216，其中 第-差動單元214分別連接定電流單元21卜第一電流鏡215 及負載單元216,並接收該定電流單元2n戶斤產生之偏壓電 流 Ibias 。 疋電流單疋211包括有一定電流源212及一電流鏡電 路213,電流鏡電路213連接該定電流源212，以映射該定 200917675 電流源212之定電流Is而產生偏壓電流Ibias，並將偏壓電 流Ibias提供給第一差動單元214。 第一差動單元214接收一控制電壓VAGC、一第一參考 電壓Vrefl以及定電流單元211所產生之偏壓電流Ibias， 並一據控制電壓VAGC、第一參考電壓Vrefl及偏壓電流 Ibias而產生電流la及lb。 第一電流鏡215用以映射第一差動單元214之電流la 而產生第一輪出電流n，且偏壓電路2〇〇的第一輸出電流 II會Ik著控制電壓VAGC的大小而改變。例如當控制電壓 VA<3C上升的同時電流la將會隨之増加，電流比會隨著電 流la的上升而下降，而第一輸出電流n則會隨著電流^ 的增加而増加，藉此將可以控制電壓VAGC的大小來控制 第一輸出電流II的值。 在本發明另一實施例中，偏壓電路2〇〇包括有負盤罝The size of the received signal transmitted by 27 is based on the amplifier so that the amplified signal meets the requirements of the back-end circuit (not shown). The first level inspection unit 21 is configured to receive a certain current Is, a control electric dust VAGC and a - reference voltage Vren, and generate a first output current according to the constant current is, the control voltage VAGC and the first reference voltage Vref1. Therefore, the first-output current n has a smooth rounding curve, and the first-output current n is up-regulated or down-regulated in an analogous manner. The first reference voltage Vren is a fixed voltage, and the control voltage vagc is a variable voltage, and the size of the first input II is adjusted by controlling the change of the electric VAGC. In addition, the first stage biasing unit 21 of the present invention can not only change the gain of the amplifier 25 by means of current regulation, but also can be used in conjunction with the amplifier 25 to change the control mode of the amplifier 25 to 200917675. Gain. For example, a converter 23 can be added between the first stage biasing unit 21 and the amplifier 25 for converting the first output current generated by the first stage biasing unit! It is converted into an adjustment voltage Vreg, and the gain of the amplifier 25 is changed by adjusting the voltage Vreg. Moreover, the magnitude of the adjustment voltage will change with the first output current II outputted by the first-stage bias unit 21, so that the control voltage VAGC of the first-stage bias unit 21 can also be used to adjust the gain of the voltage Vreg and the amplifier 25. Make adjustments. According to the embodiment of the present invention, the gain of the amplifier 25 is mainly controlled by the first-output current „ or the regulated voltage Vreg input by the first-stage bias single unit 21 and the amplification curve of the gain of II 25 is The first output current h or the positive voltage Vreg is related to the curve of the output current h or the positive voltage Vreg. In the present invention, the first output current n and the adjustment voltage Vreg are approximated by the setting of the first and the partial 璧 unit 21. The output curve, whereby the gain of the amplifier 25 will be similarly changed in an analogous manner, and the transient response of the amplifier when the gain is changed can be avoided. Referring to Figures 3 and 4, respectively, the bias voltage of the present invention Circuit diagram of a preferred embodiment of the circuit and circuit diagram of the amplifier to which the biasing circuit is connected. As shown in the figure, the biasing circuit 200 includes a certain current unit 21, a first differential unit 214, and a - current. The mirror 215 and the load unit 216, wherein the first-differential unit 214 is connected to the constant current unit 21, the first current mirror 215 and the load unit 216, respectively, and receives the bias current Ibias generated by the constant current unit 2n. single The 211 includes a current source 212 and a current mirror circuit 213. The current mirror circuit 213 is connected to the constant current source 212 to map the constant current Is of the current source 212 to generate a bias current Ibias, and the bias current Ibias. The first differential unit 214 receives a control voltage VAGC, a first reference voltage Vref1, and a bias current Ibias generated by the constant current unit 211, and controls the voltage VAGC, the first reference. The voltage Vref1 and the bias current Ibias generate currents la and lb. The first current mirror 215 is used to map the current la of the first differential unit 214 to generate the first round current n, and the bias circuit 2〇〇 An output current II will change with the magnitude of the control voltage VAGC. For example, when the control voltage VA<3C rises, the current la will increase, and the current ratio will decrease as the current la rises, and the first output current n will increase as the current ^ increases, whereby the magnitude of the voltage VAGC can be controlled to control the value of the first output current II. In another embodiment of the invention, the bias circuit 2 includes a negative Pan
1亦可與一轉換器23或—放 2〇〇之苐一電流鏡215連接 200917675 轉換器23及/或放大器25。當轉換器23與偏壓電略2〇〇之 第一電流鏡215相連接時，轉換器23將接收偏壓電路2〇〇 所輸出之第一輸出電流II，並將第一輸出電流11轉換成為 一調整電壓Vreg。而放大器25則連接轉換器23並接收調 整電壓Vreg’藉此以控制調整電壓Vreg的大小進行放大器 25增益的調整，並以調整之放大器25增益將接收訊號進行 適度的放大。 轉換器23包括有一電阻231及一電晶體233之串聯， 例如電阻231連接電晶體23之汲極端，且電晶體23之閘 極端與汲極端共連接。第一輸出電流Π在流入轉換器23 後，將會有部分的第一輸出電流II流過電阻231及電晶體 233 ’而在串聯之電阻231及電晶體233上負載一調整電壓 Vreg，該調整電壓Vreg會隨著第一輸出電流n而增加。在 本發明另一實施例中，轉換器23尚包括有一電容235，電 容235與電阻231及電晶體233並聯以穩定調整電壓vreg 的大小。 放大器25包括有一放大電晶體255及一調整單元 250 ’而放大電晶體255透過調整單元250與偏壓電路200 或轉換器23相連接’例如調整單元250包括有一調控電晶 體251及電阻252/253。放大電晶體255之源極端與電阻252 及電阻253相連接，而電阻252尚串聯有一調控電晶體 251 ’且調控電晶體251之閘極端連接轉換器23並接收調 整電壓Vreg。 在應用時可透過調整電壓Vreg對調控電晶體251進行 200917675 開/關的切換’藉此以改變電阻252及電阻⑸ 並”周整放大電晶體255之源極端上的電壓，而達到放二 25增益改變之目的。當然在*同實施例中調整單 盗 調控電晶體251亦可直接與偏壓電路2⑽相連接 之 去轉換器23的設置。 ’並可省 調整單it 25G的工作方式如下，當第—輸出電产 升的同時罐電壓㈣將賴之增加，然Μ調^ rr,\1 can also be connected to a converter 23 or a current mirror 215 of the second stage of the 200917675 converter 23 and / or amplifier 25. When the converter 23 is connected to the first current mirror 215 of the bias voltage, the converter 23 will receive the first output current II output by the bias circuit 2, and the first output current 11 Converted to an adjustment voltage Vreg. The amplifier 25 is connected to the converter 23 and receives the adjustment voltage Vreg' to thereby adjust the gain of the amplifier 25 by controlling the magnitude of the adjustment voltage Vreg, and moderately amplifies the reception signal with the adjusted amplifier 25 gain. The converter 23 includes a series connection of a resistor 231 and a transistor 233. For example, the resistor 231 is connected to the 汲 terminal of the transistor 23, and the gate terminal of the transistor 23 is commonly connected to the 汲 terminal. After the first output current 流入 flows into the converter 23, a part of the first output current II flows through the resistor 231 and the transistor 233', and the series resistor 231 and the transistor 233 are loaded with an adjustment voltage Vreg. The voltage Vreg will increase with the first output current n. In another embodiment of the present invention, the converter 23 further includes a capacitor 235. The capacitor 235 is connected in parallel with the resistor 231 and the transistor 233 to stabilize the magnitude of the adjustment voltage vreg. The amplifier 25 includes an amplifying transistor 255 and an adjusting unit 250', and the amplifying transistor 255 is connected to the biasing circuit 200 or the converter 23 through the adjusting unit 250. For example, the adjusting unit 250 includes a regulating transistor 251 and a resistor 252/ 253. The source terminal of the amplifying transistor 255 is connected to the resistor 252 and the resistor 253, and the resistor 252 is further connected in series with a regulating transistor 251' and the gate terminal of the regulating transistor 251 is connected to the converter 23 and receives the adjusting voltage Vreg. In the application, the switching voltage Vreg can be used to switch the control transistor 251 to ON/OFF of 200917675 'by thereby changing the resistance 252 and the resistance (5) and "rounding up the voltage on the source terminal of the transistor 255 to reach the second 25. The purpose of the gain change. Of course, in the same embodiment, the single-shot control transistor 251 can also be directly connected to the bias circuit 2 (10) to the setting of the converter 23. The operation mode of the single-it 25G can be adjusted as follows: When the first output power rises, the tank voltage (four) will increase, then adjust rr, \
Vr e g未超過調控電晶體2 5丨的臨界電壓v t時，調控電晶體 251將呈現關閉狀態，此時放大器25之增益將由工作偏^ Vbias及電阻253上所負載的電壓決定。 反之，若第一輸出電流II持續增加，並使得調整電壓 Vreg超過調控電晶體251的臨界電壓vt，調控電晶體251 將緩慢的打開，開始有部分的電流會流過電阻252及調栌 電晶體251，而放大電晶體255之源極端的電壓將會被改 變’藉此以達到改變放大器25增益之目的。因此，在本發 明實施例中，可以偏壓電路200所產生的第一輸出電流u 來改變電阻252/253上的電流，而達到以偏壓電路2〇〇改變 放大器25增益，近而改變該增益之下放大器的線性度表現 之目的。 請參閱弟6圖’為本發明無線收發器之偏壓電路又一 實施例之方塊示意圖。本發明所述之偏壓電路可以如第2 圖所述實施例一般為單一級的偏壓電路，亦可因應放大器 的不同而設計成兩級或者是多級形式的偏壓電路。如圖所 示’無線收發器30之偏壓電路300包括有〜第一級偏壓單 12 200917675 元3〗及一第二級偏壓單元33，該第一級偏壓單元3i及第 二級偏壓單元33皆與一放大器35相連接，並用於進行放 大器35增益的調整。 在實際應用時放大器35分別接收第一級偏壓單元31When Vr e g does not exceed the threshold voltage v t of the regulation transistor 25 丨, the regulation transistor 251 will be in a closed state, at which time the gain of the amplifier 25 will be determined by the voltage applied to the Vbias and the resistor 253. On the other hand, if the first output current II continues to increase and the adjustment voltage Vreg exceeds the threshold voltage vt of the regulating transistor 251, the regulating transistor 251 will slowly open, and a part of the current will flow through the resistor 252 and the tuning transistor. 251, and the voltage at the source terminal of the amplifying transistor 255 will be changed 'by this to achieve the purpose of changing the gain of the amplifier 25. Therefore, in the embodiment of the present invention, the first output current u generated by the bias circuit 200 can be used to change the current on the resistor 252/253, and the gain of the amplifier 25 can be changed by the bias circuit 2〇〇. The purpose of changing the linearity of the amplifier under this gain is changed. Please refer to FIG. 6 for a block diagram showing still another embodiment of the bias circuit of the wireless transceiver of the present invention. The bias circuit of the present invention can be generally a single-stage bias circuit as in the embodiment of FIG. 2, or can be designed as a two-stage or multi-stage bias circuit depending on the amplifier. As shown in the figure, the bias circuit 300 of the wireless transceiver 30 includes a first stage biasing unit 12 200917675 3 and a second stage biasing unit 33. The first stage biasing unit 3i and the second The stage biasing units 33 are all coupled to an amplifier 35 and are used to adjust the gain of the amplifier 35. In practical applications, the amplifier 35 receives the first stage biasing unit 31, respectively.
及第二級偏壓單元33所產生之第一輸出電流„及第三輸出 電流13’且放大器35的增益將隨著第一輸出電流n及第三 輸出電流13的大小而改變。其中偏壓電路3〇〇將依據天線 37所接收之接收訊號的大小來調整放大器35的增益，以使 得放大器35所輸出的放大訊號符合後端電路的需求。 第一級偏壓單元31接收一定電流Is、一控制電壓Vagc 及一第一參考電壓Vref 1，並依據定電流Is、控制電壓 及第一參考電壓Vrefl而產生第一輸出電流n及一第二 出電流12。而第二級偏壓單元33連接第—級偏壓單元= 以接收第二輸出電流12、控制 VAGC及第二參考電壓 Vref2,並產生第三輸出電流13。其中第一參考電壓v响 及第二參考電壓Vl*ef2為—岐電壓，控制電壓vag -可變電壓，而第一輸出電流Ι1Α第三輸出電流心, =由控制電壓VAGC的大小來進行控制。又，第—輸出電 流II及第三輸出電流13是以相對應的方式進行變化， 如：當第-輸出電流η增加時，第三輸出電流13將相斜二 減少。 、〗的 β在本發明實施例中，第一級偏壓單元31及第二級 單元33所輸出之第一輸出電流！！、第二輸出電流12及= 輸出電流13皆具有一平滑的輸出曲線，換言之，上述 13 200917675 皆是以類比的方式進行變化。藉此放大器35的增益同樣會 以類比的方式進行改變’並可避免放大器35增益改變時^ 暫態反應的發生。 請參閱第7圖及第8圖’分別為本發明偏壓電路又一 實施例之電路圖及偏壓電路所連接之放大器的電路圖。如 圖所示’偏壓電路300包括有第一級偏壓單元31及第-級 偏壓單元33 ’並用以輸出一第一輸出電流u及一第三輸出 電流13 ’藉此將可以偏壓電路300所產生之第一輸出電汗 II及第三輸出電流13對放大器35的增益進行調整。 第一級偏壓單元31包括有一定電流單元311、一第一 差動單元314、一第一電流鏡315及一第二電流鏡316，本 發明實施例之第一級偏壓單元31的構造、連接方式及作用 皆與第3圖所述之偏壓電路(200)相近，在此便不再闡述。 第二級偏壓單元33包括有一第三電流鏡331、一第二 差動單元334、一負載單元335及一第四電流鏡336,其中 負載單元335可為一負載電晶體或電阻等可形成負載的元 件。第二電流#兄331連接第一級偏壓單元31之第二電流鏡 316，以接收第二電流鏡316所產生之第二輸出電流12，並 映射第二輸出電流12而產生電流Ic。第二差動單元334連 接第三電流鏡331，以接收控制電壓VAgc、一第二參考電 壓Vref2及第三電流鏡331所產生之電流ic，並形成電流id 及Ie。負載單元335連接第二差動單元334以接收電流μ， 第四電流鏡336連接第二差動單元334以接收電流le，並 且根據電流Ie映射產生一第三輸出電流13。 14 200917675 如上所述，第一輸出電U及第三輪出電流13的大小 皆可遂過控制電壓VAGC來控制’而第一輪出電流n及第 三輸出電流13之間是以相對應的方式變化，例如控制電壓 VAGC增大時第-輸出電流η將會隨之增加，而第三輸出 f流13則會隨之減小’如第9所示之曲線，當控制電壓 VAGC上升至第二參考電壓V禮時，第三輪出電流i3將 會隨之上升；當控制電壓VAGC上升至第—表考電壓 η #，第一輸出電流11將隨之上升而第三輪出電流13則會下 降。放大器35將根據第一輸出電流η及第三輸出電流13 之間的變化物換增^，使得放大器35可達成兩級或多級 增益切換之目的。 放大器35包括有一第一接收電晶體351、一第二接收 電晶體353、一第一放大電晶體355及一第二放大電晶體 356。其中第一放大電晶體355之閘極端連接一第一負載電 阻352 ’而第一放大電晶體356之閘極端則連接一第二負載 Ο 電阻354 ’此外第二放大電晶體356的源極端尚連接一電阻 3% °第一接收電晶體351及第二接收電晶體353分別接收 偏壓電路300所提供之第一輸出電流η及第三輸出電流 其中’第二接收電晶體353尚連接一電阻357。 在實際應用時接收訊號由放大器35之輸入端輸入，放 大器35將會對接收訊號進行放大，並於放大器35之輸出 柒輸出一放大訊號。放大器35的增益主要是由第一輸出電 流π及第三輸出電流13來進行調整，第一輸出電流η及 第二輪出電流13的大小將會影響第一放大電晶體355及第 15 200917675 二放大電晶體356之閘極電壓’藉此將可以達到改變放大 器35增益之目的。 在本發明實施例中，第二放大電晶體356連接有-電 阻358 ’而在本發明另一實施例中，該電阻358亦可以一調 整單元(250，如第4圖所示）進行取代，藉此將可以增加放 大器35增益的調整範圍與增強放A||線性度表現。 +请參閱第1G圖及第u圖，分別為本發明偏壓電路又 -實施例之電路圓及輸出電流曲線圖。本發明實施例所述 之偏壓電路4GG相較於第7圖所述之偏壓電路()相異之 處在於增設-回授電晶體4卜例如為—p通道電晶體。該 回授電晶體41之閘極端連接第二電流鏡316，並與第二電 流鏡316之電晶體的閘極相連接，此外，回授電晶體々I尚 與第一電流鏡315相連接。 回授電晶體41將會映射第一差動單元314上之電流比 而產生一電流if，並將電流辽回授至第一電流鏡315。藉此 第一電流鏡315所產生之第一輸出電流n將不會隨著控制 電壓VAGC的持續降低而出現趨近於零的情況，並形成如 第11圖所示之輸出電流曲線。相較之下第9圖為第7圖所 述之偏壓電路(300)的輸出電流曲線，其中第一輸出電流n 將會因為控制電壓VAGC的持續下降而有趨近於零的現 象，當第一輸出電流11為零的時候將會對放大器（35)增益 的線性度造成影響，而藉由本發明實施例之回授電晶體41 的設置將可避免上述問題的發生。 在本發明實施例中，當電流la減小的同時電流比將會 200917675 增加，此時回授電晶體41則會映射電流比而產生電流辽， 並將電流if回授至第-電流鏡315，藉此第一電流鏡315 所輸出之第*^輸出電流II將不會為零。 晴參閱第12圖，為本發明偏壓電路與放大器之方塊示 意圖。如圖所示，無線收發器5〇包括有一偏壓電路5〇〇、 放大器35及天線27’其中偏壓電路5〇〇包括有一第一級偏 麼單70 5卜而放大器35分別與第一級偏壓單元^及天線 27相連接。And the first output current „ and the third output current 13 ′ generated by the second-stage bias unit 33 and the gain of the amplifier 35 will vary with the magnitudes of the first output current n and the third output current 13 . The circuit 3 调整 adjusts the gain of the amplifier 35 according to the size of the received signal received by the antenna 37, so that the amplified signal output by the amplifier 35 meets the requirements of the back-end circuit. The first-stage bias unit 31 receives a certain current Is. a control voltage Vagc and a first reference voltage Vref1, and generating a first output current n and a second output current 12 according to the constant current Is, the control voltage and the first reference voltage Vref1. The second stage bias unit 33 is connected to the first stage biasing unit = to receive the second output current 12, control the VAGC and the second reference voltage Vref2, and generate a third output current 13. wherein the first reference voltage v and the second reference voltage Vl*ef2 are - 岐 voltage, control voltage vag - variable voltage, and the first output current Ι1 Α third output current center, = is controlled by the magnitude of the control voltage VAGC. Further, the first output current II and the third output current 13 are The corresponding manner is changed, for example, when the first output current η is increased, the third output current 13 is decreased by two. In the embodiment of the present invention, the first stage biasing unit 31 and the second stage are The first output current!!, the second output current 12, and the = output current 13 output by the unit 33 all have a smooth output curve. In other words, the above-mentioned 13 200917675 is changed in an analogous manner. It will also be changed in an analogy manner 'and the transient response can be avoided when the gain of the amplifier 35 is changed. Please refer to FIG. 7 and FIG. 8 ' are circuit diagrams and partial deviations of another embodiment of the bias circuit of the present invention, respectively. A circuit diagram of an amplifier to which a voltage circuit is connected. As shown, the 'bias circuit 300 includes a first stage biasing unit 31 and a first stage biasing unit 33' for outputting a first output current u and a first The three output currents 13' thereby adjust the gain of the amplifier 35 by the first output electrocathode II and the third output current 13 generated by the bias circuit 300. The first stage biasing unit 31 includes a certain current unit 311. ,One A differential unit 314, a first current mirror 315 and a second current mirror 316, the first stage biasing unit 31 of the embodiment of the present invention is constructed, connected, and functioned in the same manner as the bias voltage described in FIG. The circuit (200) is similar and will not be described here. The second stage biasing unit 33 includes a third current mirror 331, a second differential unit 334, a load unit 335 and a fourth current mirror 336. The unit 335 can be a load-carrying element such as a load transistor or a resistor. The second current # brother 331 is connected to the second current mirror 316 of the first stage bias unit 31 to receive the second current mirror 316. The current 12 is output and the second output current 12 is mapped to produce a current Ic. The second differential unit 334 is connected to the third current mirror 331 to receive the control voltage VAgc, a second reference voltage Vref2, and a current ic generated by the third current mirror 331, and form currents id and Ie. The load unit 335 is connected to the second differential unit 334 to receive the current μ, the fourth current mirror 336 is connected to the second differential unit 334 to receive the current le, and a third output current 13 is generated according to the current Ie map. 14 200917675 As described above, the magnitudes of the first output power U and the third wheel current 13 can be controlled by the control voltage VAGC' while the first round current n and the third output current 13 are corresponding. The mode change, for example, the first output current η will increase as the control voltage VAGC increases, and the third output f stream 13 will decrease accordingly. As shown in the ninth curve, when the control voltage VAGC rises to the During the second reference voltage V, the third round of current i3 will rise accordingly; when the control voltage VAGC rises to the first-reference voltage η #, the first output current 11 will rise and the third round of current 13 Will fall. The amplifier 35 will change the variation between the first output current η and the third output current 13 so that the amplifier 35 can achieve two or more stages of gain switching. The amplifier 35 includes a first receiving transistor 351, a second receiving transistor 353, a first amplifying transistor 355 and a second amplifying transistor 356. The gate of the first amplifying transistor 355 is connected to a first load resistor 352' and the gate of the first amplifying transistor 356 is connected to a second load 电阻 resistor 354'. Furthermore, the source terminal of the second amplifying transistor 356 is still connected. A first receiving transistor 351 and a second receiving transistor 353 respectively receive a first output current η and a third output current provided by the bias circuit 300, wherein the second receiving transistor 353 is still connected to a resistor. 357. In actual application, the received signal is input from the input of the amplifier 35, and the amplifier 35 amplifies the received signal and outputs an amplified signal at the output of the amplifier 35. The gain of the amplifier 35 is mainly adjusted by the first output current π and the third output current 13, and the magnitudes of the first output current η and the second round current 13 will affect the first amplifying transistor 355 and the 15th 200917675 Amplifying the gate voltage of transistor 356' will thereby achieve the purpose of varying the gain of amplifier 35. In the embodiment of the present invention, the second amplifying transistor 356 is connected with a resistor 358'. In another embodiment of the present invention, the resistor 358 can also be replaced by an adjusting unit (250, as shown in FIG. 4). Thereby, it is possible to increase the adjustment range of the gain of the amplifier 35 and enhance the linearity of the A|| linearity. + Please refer to FIG. 1G and FIG. u, respectively for the circuit circle and output current graph of the bias circuit of the present invention. The bias circuit 4GG according to the embodiment of the present invention differs from the bias circuit () shown in Fig. 7 in that the add-back transistor 4 is, for example, a -p channel transistor. The gate terminal of the feedback transistor 41 is connected to the second current mirror 316 and is connected to the gate of the transistor of the second current mirror 316. Further, the feedback transistor 々I is still connected to the first current mirror 315. The feedback transistor 41 will map the current ratio on the first differential unit 314 to generate a current if, and the current will be returned to the first current mirror 315. Thereby, the first output current n generated by the first current mirror 315 will not approach zero as the control voltage VAGC continues to decrease, and an output current curve as shown in FIG. 11 is formed. In contrast, FIG. 9 is an output current curve of the bias circuit (300) described in FIG. 7, wherein the first output current n will approach zero due to the continuous decrease of the control voltage VAGC. When the first output current 11 is zero, the linearity of the gain of the amplifier (35) will be affected, and the setting of the feedback transistor 41 by the embodiment of the present invention can avoid the above problem. In the embodiment of the present invention, when the current la decreases, the current ratio will increase to 200917675. At this time, the feedback transistor 41 maps the current ratio to generate the current Liao, and returns the current if to the first current mirror 315. Therefore, the first output current II output by the first current mirror 315 will not be zero. Referring to Figure 12, there is shown a block diagram of a bias circuit and an amplifier of the present invention. As shown, the wireless transceiver 5A includes a biasing circuit 5, an amplifier 35, and an antenna 27'. The biasing circuit 5'' includes a first-stage bias, and the amplifier 35, respectively. The first stage biasing unit and the antenna 27 are connected.
第一級偏壓單以1用以接收-线流h、-控制電壓 VAGC及-第一參考電壓ν_，並依據一定電流is、一控 制電壓VAGC及-第-參考電壓細而產生一第一輸出電 流II及第二輸出電流12。控制電壓VAGC為—可變電壓， 透過控制縣VAGC⑽_可以料—輸㈣流n及第 —輸出電流12的大小逸u·田# ^ 、 進仃5周整，使得第一輸出電流II及第 一輸出電流12為一類比的认f T1 、比的輪出曲線，並可以第一輸出電流 f 一輸出電“2控制放大器35的增益。 ㈣Γ後’明參閱第13圖，為本發明偏壓電路與放大器之 電路圖。如圖所示，偏壓雷 -第-差動單_^5GQ包括有4電流單元511、 ⑽，而放大器35分料第電流鏡515及一第二電流鏡 相連接，並接收第-輪出第電:電流鏡楚515及第二電流鏡518 偏壓電路500所輸出之^電^：11及第二輸出糕12。又’ 的曲線如第50所示，^輪出電流11及第二輸出電流12 €^12^1137 17 200917675 士發明上述實施例之偏壓電路不僅可應詩無線收發 2則端電路的放大器，亦可應用於無線收發器之後端電 斗放大器。此外本發明所述之偏壓電路可產生—以類比 =式__出電流或輪出電壓，因此可適用於各種放大 為以進行放大器增㈣調整’並可將輸出電流、輸出電壓 及/或放大ϋ的暫態反應_最低，以提高整體的工作效率。 以上所述者，僅為本發明之較佳實施例而已，並非用 來限定本發明實施之範圍，即凡依本發明申請專利範圍所 述之形狀、構造、特徵及精神所為之均等變化與修飾，均 應包括於本發明之申請專利範圍内。 【圖式簡單說明】 第1圖·為習用無線收發器之前端電路圖。 第2圖.為本發明無線收發器之偏壓電路一較佳實施例之 方塊示意圖。The first stage bias voltage is used to receive the - line current h, the control voltage VAGC and the -first reference voltage ν_, and generates a first according to a certain current is, a control voltage VAGC and a - reference voltage. Output current II and second output current 12. The control voltage VAGC is - variable voltage, through the control county VAGC (10) _ can be material - input (four) flow n and the first - output current 12 size 逸 u · Tian # ^, into the 5 weeks, so that the first output current II and An output current 12 is an analogy of the f T1 , the ratio of the turn-off curve, and the output current of the first output current f can control the gain of the amplifier 35. (4) Γ ' 明 第 第 明 明 明 明 明Circuit diagram of the circuit and the amplifier. As shown in the figure, the biased lightning-first-differential single_5GQ includes four current units 511, (10), and the amplifier 35 is connected to the current mirror 515 and a second current mirror. And receiving the first-round electric: current mirror Chu 515 and the second current mirror 518 bias circuit 500 output ^ ^ ^ 11 and the second output cake 12. The curve of the ', as shown in the 50th, ^Initial current 11 and second output current 12 €^12^1137 17 200917675 The bias circuit of the above embodiment is not only applicable to the amplifier of the wireless terminal, but also to the rear end of the wireless transceiver. a power amplifier, in addition to the bias circuit of the present invention, can generate - analogy = __ current The voltage is turned on, so it can be applied to various amplifications for the amplifier to increase (four) adjustment 'and the output current, output voltage and / or amplification ϋ transient response _ minimum to improve the overall efficiency. The present invention is not intended to limit the scope of the present invention, and the equivalents and modifications of the shapes, structures, features and spirits described in the claims of the present invention should be included in The invention is within the scope of the patent application. [Simplified description of the drawings] Fig. 1 is a schematic diagram of a front end of a conventional wireless transceiver. Fig. 2 is a block diagram showing a preferred embodiment of a bias circuit of the wireless transceiver of the present invention. .
U 為本發明偏壓電路一較佳實施例之電路圖。 為本發明偏壓電路所連接之放大器的電路圖。 為本發明偏壓電路之輸出電流曲線圖。 為本發明無線收發器之偏壓電路又一實施例之方 塊示意圖。 第7圖：為本發明偏壓電路又一實施例之電路圖。 第8圖：為本發明偏壓電路所連接之放大器的電路圖。 第9圖：為本發明偏壓電路之輸出電流曲線圖。 第10圊：為本發明偏壓電路又一實施例之電路圖。 200917675 第11圖：為本發明上述實施例之輸出電流曲線圖。 第12圖：為本發明偏壓電路與放大器之方塊示意圖。 第13圖：為本發明偏壓電路與放大器之電路圖。 【主要元件符號說明】 10 前端電路 11 天線 13 放大器 15 混頻器 17 本地震盪器 19 控制電路 20 無線收發器 200 偏壓電路 21 第一級偏壓單元 211 定電流單元 212 定電流源 213 電流鏡電路 214 第一差動單元 215 第一電流鏡 216 負載單元 217 電晶體 218 第二電流鏡 23 轉換器 231 電阻 233 電晶體 235 電容 25 放大器 250 調整單元 251 調控電晶體 252 電阻 253 電阻 255 放大電晶體 27 天線 30 無線收發器 300 偏壓電路 31 第一級偏壓單元 311 定電流單元 314 第一差動單元 315 第一電流鏡 316 第二電流鏡 33 第二級偏壓單元 331 第三電流鏡 334 第二差動單元 19 200917675 335 負載單元 336 第四電流鏡 35 放大器 351 第一接收電晶體 352 第一負載電阻 353 第二接收電晶體 354 第二負載電阻 355 第一放大電晶體 356 第二放大電晶體 357 電阻 358 電阻 37 天線 400 偏壓電路 41 回授電晶體 50 無線收發器 500 偏壓電路 51 第一級偏壓單元 511 定電流單元 514 第一差動單元 515 第一電流鏡 518 第二電流鏡U is a circuit diagram of a preferred embodiment of the bias circuit of the present invention. A circuit diagram of an amplifier to which the bias circuit of the present invention is connected. It is a graph of the output current of the bias circuit of the present invention. A block diagram of still another embodiment of a bias circuit of the wireless transceiver of the present invention. Figure 7 is a circuit diagram showing still another embodiment of the bias circuit of the present invention. Figure 8 is a circuit diagram of an amplifier to which the bias circuit of the present invention is connected. Figure 9 is a graph showing the output current of the bias circuit of the present invention. Item 10: A circuit diagram of still another embodiment of the bias circuit of the present invention. 200917675 Fig. 11 is a graph showing the output current of the above embodiment of the present invention. Figure 12 is a block diagram showing the bias circuit and amplifier of the present invention. Figure 13 is a circuit diagram of a bias circuit and an amplifier of the present invention. [Main component symbol description] 10 Front-end circuit 11 Antenna 13 Amplifier 15 Mixer 17 This oscillator 19 Control circuit 20 Wireless transceiver 200 Bias circuit 21 First-stage bias unit 211 Constant current unit 212 Constant current source 213 Current Mirror circuit 214 first differential unit 215 first current mirror 216 load unit 217 transistor 218 second current mirror 23 converter 231 resistor 233 transistor 235 capacitor 25 amplifier 250 adjustment unit 251 regulation transistor 252 resistance 253 resistance 255 amplification Crystal 27 Antenna 30 Wireless Transceiver 300 Bias Circuit 31 First Stage Bias Unit 311 Constant Current Unit 314 First Differential Unit 315 First Current Mirror 316 Second Current Mirror 33 Second Stage Bias Unit 331 Third Current Mirror 334 second differential unit 19 200917675 335 load unit 336 fourth current mirror 35 amplifier 351 first receiving transistor 352 first load resistor 353 second receiving transistor 354 second load resistor 355 first amplifying transistor 356 second Amplifying transistor 357 Resistor 358 Resistor 37 Antenna 400 Bias circuit 41 Feedback transistor 5 0 Wireless Transceiver 500 Bias Circuit 51 First Stage Bias Unit 511 Constant Current Unit 514 First Differential Unit 515 First Current Mirror 518 Second Current Mirror
2020