200908400 九、發明說明： 【發明所屬之技術領域】 本發明爲提供一種自體發電之半導體元件，尤指一種無接觸電阻且可 自行產生電力的自體發電之半導體元件。 【先前技術】 按，熱電效應是在西元1821年，Thomas Johann S e e b e c k最早發現有這種現象。當時他無意間將兩半圓的金屬鉍（b i s m u t h )與銅連接在一起，發現鄰近的指南針（c 〇 m p a s s) 在轉動，表示有磁場擾動現象，當時他將此現象解釋爲熱磁效應（t h e rmomanet i sm)。 因此，利用兩種均質之金屬導體製作形成之封閉迴路，當兩金屬導 體之接合點的溫度分別爲T1與T2時，若T1>T2時回路內產生電流 i，若Τ1=Τ2時無電流產生，當T1CT2時電流i之方向會相 反。此種現象在1821年由T-J-Seebec k發現，因此被稱之 爲席貝克效應（Seebeck effect)。當回路內之電流流動時 會產生電動勢，稱爲熱電動勢（e m ί )，將基準接點打開後之端子所量測 之電動勢被稱爲席貝克熱電動勢（Seebeck emf)。利用席貝克 效應以兩種金屬與兩端接合點所形成之測定溫度感應裝置稱爲熱電偶。 熱電偶進一步解釋，其現象是當二種不同性質金屬端點連接形成一閉 200908400 迴路時’若兩端點間有溫度差，則迴路間會有電流產生，迴路裡溫度較高 之接點稱爲「熱接點(hot junction)」，此點通常被置於測溫處；溫度較低 端稱爲冷接點’即熱電偶之輸出端，其輸出訊號爲一直流電壓；此熱電效 應主要是因不同種類金屬擁有自由電子數不同，當兩金屬連接形成迴路， 溫度改變會造成接觸面之自由電子運動而使金屬間產生電位差。此電位差 由接觸面積、溫度差、與金屬種類來決定，當兩端溢度相同時，端點所產 生之熱電動勢相同，故迴路中不會有電流；若兩端間存在溫度差，導致熱 電動勢大小不同而產生一電流由高電動勢往低電動勢流動。 對於兩個接合點，將基準接點固定保持在某一已知之固定溫度（通常 爲0 °C )，便可以利用基準接點所量測到之測溫接點產生之熱電動勢換算成 溫度値。 目前亦有學者使用鋁與矽基板（S i S u b)的方式來製造，但其 接觸電阻大，通常產生的電壓在接觸點的部份，即因爲接觸電阻太大，而 導致發出的電力已熱能的型態散發掉。 是以’要如何解決上述習用之問題與缺失，即爲本案之發明人與從事 此行業之相關廠商所亟欲硏究改善之方向所在者。 200908400 【發明内容】 故，發明人有鑑於上述缺失，乃搜集相關資料，經由多方評估及考量’ 並以從事於此行業累積之多年經驗，經由不斷試作及修改’始設計出此種 自體發電之半導體元件的發明專利者。 . 本發明之主要目的在於，標準的互補金屬氧化物半導體（CMO S ) 中製程，以離子佈値之技術，使多晶矽層分別成爲複數個p型多晶矽、N 型多晶矽與多晶矽，製作完成後如同結構串聯，而可視爲熱電偶（t h e r m o p i 1 e )，又由於P型多晶矽之席貝克係數（seebeck c oeificient)爲30〇〜1000 μ v/K而N型爲一2 0 0〜—500 //v/K，故當多晶砍使用離子佈値技術時’如.同很多的 金屬串聯，Ρ型多晶矽與Ν型多晶矽之面積不同時，產生之電子與電洞對 不平衡，而有外接迴路時，隨即自我產生電壓，無須再外接電源，使用此 方式即可達到自我供電的優點，且使多晶矽層在半導體的特性下，兼具有 發電源之能力，故無接觸電阻之問題，且發電量穩定，亦可減少積體電路 上所需之元件需求，同時達到省電的效果。 【實施方式】 爲達成上述目的及功效，本發明所採用之技術手段及構造’茲繪圖 就本發明較佳實施例詳加說明其特徵與功能如下，俾利完全了解。 請參閱第一、二圖所示，係爲本發明較佳實施例之剖視圖與部分剖視 圖，由圖中可清楚看出本發明係之半導體元件Α具有一矽基底A 1 ’於矽 200908400 基底A 1上爲依照標準之互補金屬氧化物半導體（CMO S )的製程’而 依序設有氧化層A 2、氮化矽層A 3、氧化層A 2、多晶矽層B、接觸層 A 4、金屬層A 5與鈍化層A 7，且多晶矽層B爲多晶矽B1所構成，並 透過離子佈植之技術，並以光罩以區別出P型多晶矽B 2與N多晶矽B 3 〇 上述之製作流程大約如下所述，首先產生矽基底a 1，於矽基底A 1 上成長氧化層A 2，接著在氧化層A 2上沉積氮化矽層A 3，續在氮化矽 層A3上成長氧化層A 2，之後便在氧化層A2上沉積多晶矽層B，此時 ，以離子佈値技術搭配光罩決定沉積的多晶矽A 1爲P型多晶矽B 2或N 多晶矽B 3，意指藉由打入5和3族的離子以區別P型多晶矽B 2與N多 晶矽B 3，產生複數之P型多晶矽B 2與N型多晶矽B 3，且各P型多晶 矽B 2與N型多晶矽B 3間以多晶矽B1區隔，完成多晶矽層B之後，在 多晶矽層B上產生接觸層A 4以及金屬層A 5與鈍化層A 7，即1完成本發 明之半導體元件A。 而在上述中，若需要多層金屬層A 5時，各金屬層A 5間爲透過金屬 連接層A 6區隔各層的金屬層A 5。 請同時配合參閱第二、三、四圖所示，係爲本發明較佳實施例之之部分剖 視圖、實施型態示意圖一與二，由圖中可清楚看出，自體發電之半導體元 件A設置爲感溫元件C時，其分別設有以P型多晶矽製成的熱端C 2，以 及N多晶矽B 3製成的冷端C1，而爲了使吸收熱溫所產生的溫差變爲更 200908400 大，而將熱端C 2區域的面勸D大，使熱端c 2的面積大大於冷端C1 ’ 則透過席貝克效應（Seebeck effect)所產的溫度差更爲 提高’則當感溫元件C之接點C 4有外接迴路時，隨即自我產生電壓，無 須再外接電源，使用此方式即可達到自我供電的優點，且使多晶砂層B在 半導體的特性下，兼具有發電源之能力，故無接觸電阻之問題，且發電量 穩定，亦可減少積體電路上所需之元件需求，同時達到省電的效果。 其中該感溫元件C進一步可設有加熱器。3，而可與外部裝置，如溫 度計等裝置連結使用。 是以’本發明之自體發電之半導體元件爲可改善習用之技術關鍵在於 一'積體電路內使用自體發電之半導體元件後，而可隨著溫度與電磁波 產生變化時，則可利用於人體體溫監測與防盜，且多晶矽層在半導 體的特性下，故無接觸電阻之問題，又兼具有發電源之能力，且發 電量穩定，亦可減少積體電路上所需之元件需求，當與積體電路電 源並聯使用，進一步可達到省電效果。 二、不需額外^改變標準之互補金屬氧化物半導體（CMO S )的製程， 而僅在沉積多晶矽層時，以離子佈値技術搭配光罩決定沉積的多晶 矽B1爲P型多晶矽B 2或N多晶矽B 3，並決定P型多晶矽B 2 或N多晶矽B 3的數量，因此，可應用於各類形態的積體電路中， 而應用時，不需要額外改變生產製程，便可與現行的標準製程結合 200908400 惟，以上所述僅爲本發明之較佳實施例而已，非因此即拘限本發明之 專利範圍，故舉凡運用本發明說明書及圖式內容所爲之簡易修飾及等效結 構變化，均應同理包含於本發明之專利範圍內，合予陳明。 綜上所述，本發明之自體發電之半導體元件於使用時，爲確實能達到 其功效及目的，故本發明誠爲一實用性優異之發明，爲符合發明專利之申 請要件，爰依法提出申請，盼審委早日賜准本案，以保障發明人之辛苦 發明，倘若鈞局審委有任何稽疑，請不吝來函指示，發明人定當竭力配 合，實感公便。 10 200908400 【圖式簡單說明】 第一圖係爲本發明較佳實施例之剖視圖。 第二圖係爲本發明較佳實施例之部分剖視圖。 第三圖係爲本發明較佳實施例之實施型態示意圖一。 第四圖係爲本發明較佳實施例之實施型態示意圖二。 【主要元件符號說明】 半導體元件 A 矽基底 A 1 氧化層 A2 氮化矽層 A3 接觸層 A4 金屬層 A5 金屬連接層 A6 鈍化層 A7 多晶矽層 B 多晶矽 B 1 P型多晶矽 B 2 N型多晶矽 B3 感溫元件 C 冷贿 Cl 熱端 C 2 力口熱器 C3 11BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention provides a self-generated semiconductor component, and more particularly to a self-generated semiconductor component that has no contact resistance and can generate electric power by itself. [Prior Art] According to the thermoelectric effect, in 1821, Thomas Johann S e e b e c k first discovered this phenomenon. At that time, he inadvertently connected the two semicircular bismuths to the copper and found that the adjacent compass (c 〇mpass) was rotating, indicating a magnetic field disturbance. At that time, he interpreted the phenomenon as a thermomagnetic effect (the rmomanet). i sm). Therefore, a closed loop formed by using two homogeneous metal conductors, when the junction temperature of the two metal conductors is T1 and T2, respectively, if current T is generated in the loop when T1>T2, no current is generated if Τ1=Τ2 When T1CT2, the direction of current i will be opposite. This phenomenon was discovered by T-J-Seebec k in 1821 and is therefore referred to as the Seebeck effect. When the current in the loop flows, an electromotive force is generated, called the thermoelectromotive force (e m ί ), and the electromotive force measured by the terminal after the reference junction is opened is called the Seebeck emf. The temperature sensing device formed by the Sibeck effect with two metals and the joints at both ends is called a thermocouple. The thermocouple is further explained. The phenomenon is that when two different metal ends are connected to form a closed 200908400 loop, 'if there is a temperature difference between the two ends, there will be a current between the loops, and the junction temperature is higher. For "hot junction", this point is usually placed at the temperature measurement; the lower end of the temperature is called the cold junction, that is, the output of the thermocouple, and its output signal is the DC voltage; this thermoelectric effect is mainly Because different types of metals have different numbers of free electrons, when two metals are connected to form a loop, the temperature change causes the free electrons of the contact surface to move, causing a potential difference between the metals. This potential difference is determined by the contact area, temperature difference, and metal type. When the two ends have the same overflow, the thermal electromotive force generated by the end point is the same, so there is no current in the loop; if there is a temperature difference between the two ends, the heat is generated. The magnitude of the electromotive force produces a current that flows from a high electromotive force to a low electromotive force. For two joints, the reference junction is fixed at a known fixed temperature (usually 0 °C), and the thermoelectromotive force generated by the temperature-measured joint measured by the reference junction can be converted into temperature. . At present, some scholars use aluminum and tantalum substrates (S i S ub) to manufacture them, but their contact resistance is large, and the voltage usually generated is at the contact point, that is, because the contact resistance is too large, the power generated has been The type of heat is dissipated. It is based on how to solve the above problems and problems, that is, the inventors of this case and the relevant manufacturers engaged in this industry are looking for the direction of improvement. 200908400 [Summary content] Therefore, in view of the above-mentioned shortcomings, the inventors have collected relevant information, and through multi-party evaluation and considerations, and through years of experience in the industry, through continuous trial and modification, the self-generated power generation was designed. The invention patent of the semiconductor component. The main object of the present invention is to make a polycrystalline germanium layer into a plurality of p-type polycrystalline germanium, N-type polycrystalline germanium and polycrystalline germanium by a technique of ion-bonding in a standard complementary metal oxide semiconductor (CMO S ) process. The structure is connected in series and can be regarded as a thermocouple (thermopi 1 e ), and since the Seebeck c oeificient of the P-type polysilicon is 30〇~1000 μ v/K and the N-type is a 260~-500 // v/K, so when polycrystalline chopping uses ion cloth technology, if there are many metals in series, the area of the polycrystalline germanium and the germanium polycrystalline germanium are different, the generated electron and hole pairs are unbalanced, and there is an external circuit. At that time, the voltage is self-generated, and no external power supply is required. This method can achieve the advantages of self-power supply, and the polysilicon layer has the capability of generating power under the characteristics of the semiconductor, so there is no problem of contact resistance, and power generation. The quantity is stable, and the component requirements on the integrated circuit can also be reduced, and the power saving effect can be achieved. [Embodiment] In order to achieve the above object and effect, the technical means and the structure of the present invention are described in detail. The features and functions of the present invention are described in detail below. Referring to the first and second drawings, which are a cross-sectional view and a partial cross-sectional view of a preferred embodiment of the present invention, it will be apparent from the drawings that the semiconductor device of the present invention has a substrate A 1 ' at 908200908400 substrate A. 1 is an oxide layer A, a tantalum nitride layer A 3, an oxide layer A 2, a polysilicon layer B, a contact layer A 4, a metal, which are sequentially arranged according to a standard complementary metal oxide semiconductor (CMO S ) process. Layer A 5 and passivation layer A 7 , and polycrystalline germanium layer B is composed of polycrystalline germanium B1, and through ion implantation technology, and a photomask to distinguish P-type polycrystalline germanium B 2 and N polycrystalline germanium B 3 〇 As described below, first, the germanium substrate a1 is grown, and the oxide layer A2 is grown on the germanium substrate A1, then the tantalum nitride layer A3 is deposited on the oxide layer A2, and the oxide layer A is continuously grown on the tantalum nitride layer A3. 2, after depositing the polycrystalline germanium layer B on the oxide layer A2, at this time, using the ion cloth technology with the mask to determine the deposition of the polycrystalline germanium A 1 is P-type polycrystalline germanium B 2 or N polycrystalline germanium B 3, meaning by typing 5 And the 3 group of ions to distinguish the P-type polycrystalline germanium B 2 from the N polycrystalline germanium B 3 to generate a complex P-type The crystal 矽B 2 and the N-type polycrystalline 矽B 3 , and each of the P-type polycrystalline 矽B 2 and the N-type polycrystalline 矽B 3 are separated by a polycrystalline 矽B1, and after completing the polycrystalline bismuth layer B, a contact layer A 4 and a metal layer are formed on the polycrystalline bismuth layer B. A 5 and the passivation layer A 7, i.e., 1 complete the semiconductor element A of the present invention. In the above, when the multilayer metal layer A 5 is required, the metal layers A 5 are separated from each other by the metal connection layer A 6 . Please refer to the second, third and fourth figures, which are a partial cross-sectional view of the preferred embodiment of the invention, and schematic diagrams of the first and second embodiments. It can be clearly seen from the figure that the self-generated semiconductor component A When it is set as the temperature sensing element C, it is provided with a hot end C 2 made of P-type polysilicon and a cold end C1 made of N polysilicon B 3 , respectively, and the temperature difference generated by the absorption heat temperature becomes more 200908400 Large, and the surface of the hot end C 2 area is advised to be large, so that the area of the hot end c 2 is larger than the cold end C1 ', and the temperature difference produced by the Seebeck effect is further improved. When the contact C 4 of the component C has an external circuit, the voltage is self-generated, and no external power supply is needed. This method can achieve the advantages of self-power supply, and the polycrystalline sand layer B has the characteristics of the semiconductor under the characteristics of the semiconductor. The ability, so there is no problem of contact resistance, and the power generation is stable, can also reduce the component requirements on the integrated circuit, while achieving the effect of power saving. The temperature sensing element C may further be provided with a heater. 3, and can be used in conjunction with external devices such as thermometers. The technology for improving the conventional semiconductor device of the present invention is a semiconductor device that uses self-generated power in an integrated circuit, and can be used in accordance with temperature and electromagnetic waves. Human body temperature monitoring and anti-theft, and the polysilicon layer under the characteristics of the semiconductor, so there is no problem of contact resistance, and also has the ability to generate power, and the power generation is stable, can also reduce the component requirements on the integrated circuit, when It can be used in parallel with the integrated circuit power supply to further save power. Second, there is no need to change the standard complementary metal oxide semiconductor (CMO S ) process, but only when depositing the polycrystalline germanium layer, the polycrystalline germanium B1 is determined by the ion cloth technique with the mask to be the P-type polycrystalline germanium B 2 or N. Polycrystalline germanium B 3 and determines the number of P-type polycrystalline germanium B 2 or N polycrystalline germanium B 3 , so it can be applied to various forms of integrated circuits, and when applied, it does not require additional changes to the production process, and can be compared with current standards. The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, so that the simple modification and equivalent structural changes of the present specification and drawings are used. All should be included in the scope of the patent of the present invention and combined with Chen Ming. In summary, the self-generated semiconductor component of the present invention can achieve its efficacy and purpose when it is used. Therefore, the present invention is an invention with excellent practicability, and is an application for conforming to the invention patent, and is proposed according to law. To apply, I hope that the trial committee will grant this case as soon as possible to protect the inventor's hard work. If there is any doubt in the trial committee, please do not hesitate to give instructions, the inventor will try his best to cooperate and feel polite. 10 200908400 BRIEF DESCRIPTION OF THE DRAWINGS The first drawing is a cross-sectional view of a preferred embodiment of the invention. The second drawing is a partial cross-sectional view of a preferred embodiment of the invention. The third drawing is a schematic diagram 1 of an embodiment of the preferred embodiment of the present invention. The fourth figure is a schematic diagram 2 of an embodiment of the preferred embodiment of the present invention. [Main component symbol description] Semiconductor component A 矽 Substrate A 1 Oxide layer A2 Tantalum nitride layer A3 Contact layer A4 Metal layer A5 Metal connection layer A6 Passivation layer A7 Polycrystalline layer B Polycrystalline silicon B 1 P-type polycrystalline germanium B 2 N-type polycrystalline germanium B3 Warm element C cold brit C hot end C 2 force hot water C3 11