200905347 爾 iU4 胤zjiW 23674twf.dOC/p 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種晝素結構，且特別是有關於-種 具有雙閘極薄膜電晶體的晝素結構。 【先前技術】 由於顯不器的需求與日遽增，因此業界全力投入 相關顯不器的發展。其中，又以陰極射線管（Cath〇de 0 Ray Tube)因具有優異的顯示品質與技術成孰性，因 此長年獨佔顯示器市場。然而，近來由於綠色環保概 念的興起對於其能源消粍較大與產生輻射量較大的 特性，加亡產品扁平化空間有限，因此無法滿足市場 對於輕、薄、短、小、美以及低消耗功率的市場趨勢。 因此，具有咼晝質、空間利用效率佳、低消耗功率、 無輻射等優越特性之薄膜電晶體液晶顯示器（Thin200905347 iU4 胤zjiW 23674twf.dOC/p IX. Description of the Invention: [Technical Field] The present invention relates to a halogen structure, and in particular to a halogen structure having a double gate thin film transistor . [Prior Art] As the demand for display devices has increased, the industry is fully committed to the development of related devices. Among them, the cathode ray tube (Cath〇de 0 Ray Tube) has an excellent display quality and technical success, so it has dominated the display market for many years. However, due to the recent rise of the concept of green environmental protection, its energy consumption is large and the amount of radiation generated is large. The flattened space of the product is limited, so it cannot meet the market for light, thin, short, small, beautiful and low consumption. Market trends in power. Therefore, it has a thin film transistor liquid crystal display with superior properties such as enamel, space utilization efficiency, low power consumption, and no radiation (Thin
Film Transistor Liquid Crystal Display，TFT-LCD)已 逐漸成為市場之主流。 1 以薄膜電晶體液晶顯示模組（TFT_LCD m〇dule ) 而§ ’其主要係由一液晶顯示面板（HqUid crystal display Panel)及一背光模組（back light module )所 構成。其中，液晶顯示面板通常是由一薄膜電晶體陣 列基板（thin film transistor substrate)、一 彩色遽光 基板（color filter substrate )與配置於此兩基板間之 一液晶層所構成’而背光模組用以提供此液晶顯示面 板所需之面光源，以使液晶顯示模組達到顯示的效 果。此外，薄膜電晶體陣列基板通常包括多條資料線 200905347 P061042ALZ11W 23674twf.doc/p (data line)、多條掃瞄線（scan line)、多個薄膜電晶體 與多個晝素電極(pixel electrode)，其中資料線與$猫 線是配置於一基板上’而資料線與掃瞄線會在^板二 劃分出多個晝素區域。另外’薄膜電晶體是配^於晝 素區域(pixel region)上，而薄膜電晶體與資料線、 猫線以及晝素電極電性連接。薄膜電晶體係透過掃晦 線控制而驅動呈現『開』或『關』的狀態，由此決 ，此薄膜電晶體電性連接的晝素電極是否充入來自 資料線的電荷。 圖1繪示習知薄膜電晶體的剖面 1，此涛膜電晶體100包括一閉極電極1〇2、一閑極3 5〇1〇4-、二半導體層廳、—歐姆接觸層刚、—源極電極 ^在^電極112以及—保護層114。閘極電極⑽是Film Transistor Liquid Crystal Display (TFT-LCD) has gradually become the mainstream of the market. 1 is a thin film transistor liquid crystal display module (TFT_LCD m〇dule) and § ' is mainly composed of a liquid crystal display panel (HqUid crystal display panel) and a backlight module (back light module). The liquid crystal display panel is generally composed of a thin film transistor substrate, a color filter substrate, and a liquid crystal layer disposed between the two substrates. The surface light source required for the liquid crystal display panel is provided to achieve the display effect of the liquid crystal display module. In addition, the thin film transistor array substrate usually includes a plurality of data lines 200905347 P061042ALZ11W 23674twf.doc/p (data line), a plurality of scan lines, a plurality of thin film transistors and a plurality of pixel electrodes. The data line and the cat line are arranged on a substrate, and the data line and the scan line divide the plurality of halogen regions in the second board. In addition, the thin film transistor is disposed on the pixel region, and the thin film transistor is electrically connected to the data line, the cat line, and the halogen electrode. The thin film electro-crystal system is driven to perform an "on" or "off" state by the broom control, thereby determining whether or not the halogen electrode electrically connected to the thin film transistor is charged with electric charge from the data line. 1 is a cross-sectional view 1 of a conventional thin film transistor 100. The transistor 100 includes a closed electrode 1 〇 2, a dummy electrode 3 5 〇 1 〇 4 , a second semiconductor layer chamber, an ohmic contact layer, The source electrode is at the electrode 112 and the protective layer 114. Gate electrode (10) is
L 半導體層106是配置在1〇2。 刚上。歐姆接觸層108酉己置 極絕緣層 no之間以及半導體層106和源極電極 極110與沒極電極112配置在 觸間。源極電 極m與資料線（未緣示）S3觸層⑽上。源極電 -晝素電極（未緣示））ΤΙ接’而汲極電極112與 eWode)電荷 ，連接，由此供應晝素電極（pixel 並覆蓋源極電极11〇與^‘2在_絕緣層刚上， 如圖1所示，由於習知ί 。、 構的設計，由;口溥膜電晶體為單一閘極結 於丰¥體層的導電度受閘極電位的影響 200905347 t^UblU^AL^l i W 23674twf.doc/p 極的電荷流量將有一 H I 電晶體打開進行對晝素電極充電時，透 過此/專膜電晶體而充入晝素 定的極限。 【發明内容】 士必t、月提供種雙閘極薄膜電晶體，其可誘導產生較 大的笔仙_通道以提供較大的電流。The L semiconductor layer 106 is disposed at 1〇2. Just on. The ohmic contact layer 108 and the gate insulating layer no and the semiconductor layer 106 and the source electrode 110 and the electrodeless electrode 112 are disposed in the contact. The source electrode m and the data line (not shown) are on the S3 contact layer (10). The source electro-deuterium electrode (not shown) is connected to the 'dot electrode 112 and eWode' charge, and is connected, thereby supplying a halogen electrode (pixel and covering the source electrode 11〇 and ^'2 in _ The insulation layer is just above, as shown in Figure 1, due to the design of the structure, the conductivity of the gate electrode is a single gate junction and the conductivity of the body layer is affected by the gate potential. 200905347 t^UblU ^AL^li W 23674twf.doc/p The charge flow rate of the pole will be filled with a HI transistor to charge the halogen electrode, and it will be filled with the limit of the ruthenium through the transistor. [Summary of the invention] A double gate thin film transistor is provided in the month of t, which can induce a larger pen-channel to provide a larger current.
本發明提供一種晝素結構，其可誘導產生較大的電流 通道以提供較大的電流。 座线大的U 生=供了種液晶顯示面板，其4素結構可誘導產 生車乂大的電流通道以提供較大的電流。 月提供種液晶顯示器，其液晶面板的書辛社構 電流通道以提供較大的電流。 示裝ΐ 其適用於液晶顯 o 閑極電3門電極、保護層以及第二 層至少覆蓋第一閘極電極 連接叫緣 電極上方之閘極絕緣 ,二夕配置在弟-閘極 半導體層上，邱極1 ^極電極與汲極電極是配置在 置在閑極絕緣層上 閘極電極至少配置在=電極以及汲_。第二 閘極電極與第二閘極電：=方的保護層上。其中第— 且第1極電極與第極電中之-會被施予固定電壓並 號。 閘極電極㈣—會被施予掃插信 200905347 P061042ALZ1TW 23674twf.doc/p 在本發明之-實施例中，以之固定電 1 〜10V。 在本發明之一實施例中，上述之固定電壓是介於 5.5〜6V 〇 ' 在本發明之—實施财，上述之信號線為共用電壓 Ο ϋ 在本發明之—實關中，上述之第二閘極電極的 與半導體層的面積大致相同。 在本發明之一實施例中，上述之 ，括歐姆接觸層’其配置在半導體層和源極電極之it 半導體層與汲極電極之間。本發明提 之門以及 板上之掃晦線與資料線所=结 晶體是配置在基板上，其包括 =^閘極薄膜電 千導體廣源極電極與汲極電極謂 極。第一閘極電極是與掃猫線電性連接、弟—閘極電 覆蓋第-閘極電極。半導體層 在^極、^緣層至少 方之閘極絕緣層上。源禾 _置在弟—閘極電極上 滑上，且雜電極與f料、 =置在+¥體 極絕緣層上，並覆蓋 連接保濩層是配置在閘 極至少配置在半==沒極電極。第二閉極電 在保護層上，发、保濩層上。畫素電極是配置 觸窗是配置在保極電性連接。第一接 内且晝素電極經由接第一觸窗與汲 200905347 P061042ALZ1TW 23674twf.doc/p 極電極電性連接。第二接觸窗是配置在閘極絕緣層與保護 層内，且第二閘極電極是經由接觸窗與信號線電二^接°， 其中信號線會供應固定電壓至第二閘極電極。 在本發明之一實施例中，上述之固定電壓 1〜ιον之間。 ' 在本發明之一實施例中，上述之固定電壓 5.5〜6V之間。 丨於 在本發明之—實施财’上述之信號線為共用電壓線。 在本發明之—實施例中，上述之第二閑極電極 與半導體層的面積大致相同。 貝 在本發明之一實施例中，上述之雙開極薄膜電晶 包括歐姆接_，其配置在轉體層和祕電極 半導體層與没極電極之間。 Ο 本發明提出-種液晶顯示面板，其包括主動元件 基板、對向基板與液晶層。絲元件_基板包 ，、多條掃描線、多條資料線财個晝素結構。多， 制，、，且旦素結構错由掃描線與資料線所控 各晝素結構包括信號線、雙閘極薄膜電晶體、金 窗與第二接觸窗。信號線是配置二 C電晶體是配置在基板上，其包括第 3'半導體層' 源極電極與汲極電極、保 接9 閘極電極。第一閘極電極是與掃瞄線電性連 接。閘極絕緣層至少覆蓋第1極電極。半導體層至少= 200905347 mi(J42Al^nw 23674twf.d〇c/P ===，上。源極— 接。保護層是㈣線電性連 ^電^第二閘極電極至少配置在半導體層上 i極電:連:極層上’其中畫素電極與汲極 Γ o 極經由接第-觸窗與汲極内=畫素電 置在閉極絕緣層與保護層内，二生連窗是配 =線=:其。 卜贈發明之—實施例中，上述之固定電壓是介於 5.5〜6V本發明之—實施例中，上述之固定電壓是介於 為共ΐίίΓ—實施财，上述之各晝素結構的信號線 的第在之—實施例中，上述之各雙閘極薄膜電晶體 極的面積與半導體層的面積大致招同 更包括歐“在:：二雙閘極薄膜電晶體 及半導體層與汲極電極之間。*體層和源極電極之間以 顯示包括 曰曰·，，、員不面板疋配置在背光模組上方，液晶顯 200905347 P061042ALZn'W 23674twf.doc/p 示=包括主動元件陣列基板、對向基板與液晶層。主勒 基板包括第—基板、多條掃描線、多條資料線與 二：旦夕、fi。多條掃描線與多條資料線是配置在第-基 ίί二素結構是配置於第—基板上，且晝素結構轉 雙閘』薄膜所Ϊ::其’各畫素結構包括信號線、 信號線3 g?、署Γι旦素電極第一接觸窗與第二接觸窗。 〇 上广其ϊ括第-ίϊΐ。雙閉極薄膜電晶體是配置在基被 電極與沒極電極:保以】η層、半導體層'源柘 極是與掃晦線電性'=—間極電極。第-閘極電 極。半導體層至少配置在二一、”緣層至少覆蓋第一閉極電 上。源極電極與沒極電極是方之閘極絕緣層 極與資料線電性連接 體層上，且源極電 覆蓋源極電極以及汲極電極:極絕緣層上，並 :體層上方的保護層上：：$電極至少配置在半 中晝素電極與汲旦”电β疋配置在保護層上，其 ^内，且晝素電極經由H接 1第觸窗是配置在保 閘極電極是經由 在閘極、錄層與保護層内，且第_ 在本發明 ι~ιον。 :r定接，其中信號二 =車列基板的對向。液==基板是配置在主動元 基板之間。 層動元件陣列基板與對向 實施例中’上述之固定電麗是介於 在太^ 11 200905347 P061042ALZ1TW 23674twf.doc/p 在本發明之一實施例中，上述之固定電壓是介於 5.5〜6V〇 在本發明之-實施例中’上述之各晝素結構的信號線 為共用電壓線。 在本發明之一實施例中，上述之各雙閘極薄 的第二閘極電極的面積與半導體層的面積大致相同。邱_ 在本發明之一實施例中，上述之各雙閘極薄膜電晶體 (、 更包括歐姆接觸層，其配置在半導體層和源極電極之間以 及半導體層與汲極電極之間。 本發明因採用具有雙閘極薄膜電晶體的晝素結構，因 此可誘導產生較大的電流通道，以提供較大的電流。再者， 由於本發明可使用獨立訊號源供應第二閘極電壓訊號，由 此可將壓抑漏電流，以改善液晶顯示器的顯示品質。 為讓本發明之上述特徵和優點能更明顯易懂，下文特 舉較佳實施例’並配合所附圖式，作詳細說明如下。 【實施方式】 ◎ 第一實施例 圖2是根據本發明一實施例纷示晝素結構的俯視圖。 圖3是緣示沿圖2之I - I ’線的剖面圖。 請同時參照圖2與圖3，晝素結構200是藉由配置在 一基板202上之一掃瞄線204與一資料線206所控制。查 素結構200包括一晝素電極210、一信號線212與—雙^ 極薄膜電晶體214。 甲 晝素電極210會透過一接觸窗216與雙閘極薄膜電日曰 12 200905347 Ρ061042Α1^Ζ11Λν 23674twf.doc/p 體214電性連接。晝素電極210之材質包括銦錫氧化物 (Indium Tin Oxide，ΙΤΟ)或铜辞氧化物(Indium 〇xide, IZO)。信號線212是配置在基板202上並且會透過一接觸 窗218與雙閘極薄膜電晶體214電性連接。 本實施例的雙閘極薄膜電晶體214包括一第一閘極電 極222、-閘極絕緣層224、一半導體層挪、一源極電極 228與-没極電極230、-保護層232以及一第二閘極電極 234。在本實施例中，雙閘極薄膜電晶體214形成於掃聪線 204上，也就是掃目⑤線綱的一部份作為雙閘極薄膜電晶 體214的閘極電極。然而，本實施例的雙 的閘極電極。此外，第-閘極電= 疋配置在基板202上，並且會與掃瞄線2 一閘極電極222之材皙可以.登田加^ 电戌逆接弟 其中之—。《可以銅、鎢、鉻、缺其組合 Ο =極絕緣層224是配置在基板搬上 閘極電極222。閘極絕緣層224之材質包 一 矽或氮氧化矽。半導體層226 3 夕氮化 上方之開極絕緣層224 。半電極從 矽或多晶矽。源極雷搞材質匕括非晶 層226上。源極電極會與資料配置在半導體 極23Θ會與晝素電極i垂，，、、 电性連接並且汲極電 極薄膜電晶體214的電性:連二此外’為了提升雙閑 晶體2U更包括1姆接觸;2二膜電 與源5電極228之間以及半導體層挪與& 13 200905347 W6IU42A1.Z1TW 23674twf.doc/p 間。ft歐姆接觸層236之材質包括叫參雜非晶石夕。 配置在閘極絕緣層224上，並且覆蓋源極 電極230°保護層232之材質包括氧化石夕、 、氧倾或氮化銘。第二閘極電極说 234會經由接觸窗218與信號線212電性連接 應—固定電壓至第二問極電極234。第二‘ 電極例如是—透明導體層或-金屬層，而透明導體芦 之材質包括銦錫氧化物或銦鋅氧化物。 曰 更詳細而言，信號線212所供應的固定電壓是 間’較佳是介於5·5〜6ν之間。此外 t可以疋一共用電壓線（common v〇ltage line)或是獨立 胺φ ^ T將針對習知的細電晶體與本實施例的雙間極薄 膜電晶體進行電性品質的比較。 雔圖+4是繪示習知薄膜電晶體與根據本發明一實施例之 o ^間極薄膜電晶體在對閘極施予不同電壓下汲極所輪出 電流的比較圖。 綠Ϊ參照圖4 ’曲線1表示習知的單一閘極薄膜電晶體 2 ]出之電流分佈。曲線2表示在同時使用第一閘極電極 j與第^閘極電極234且施予第二閘極電極5乂正電壓的 ^况下對第一閘極電極222施予不同電壓汲極電極23〇所 之電流分佈。曲線3表示在同時使用第一閘極電極222 :、第二閘極電極234且施予第二閘極電極丨0V正電壓的情 下對第一閘極電極222施予不同電壓汲極電極230所輪 14 200905347 FUdlU^ALZilW 23674twf.doc/p 出之電流分佈。 由圖4可發現，由於本發明之雙閘極薄膜電晶體2i4 之雙閘極的設計可以誘導半導體層226產生較大的電流通 道，由此提供較大的電流。再者，由於本發明可使用獨立 訊號源供應第二閘極電極電壓訊號，當施予第二閘極電極 一固定電壓的直流信號時可以將漏電流大幅壓制。 圖5是根據本發明一實施例繪示液晶顯示面板的剖面 Γ;圖。請參照圖5，本實施例之液晶顯示面板6〇〇包括一主 動兀件陣列基板610、一對向基板62〇與一液晶層63〇。主 動兀件陣列基板610包括一第一基板612、多條掃描線 614、多條資料線616與多個晝素結構618。其中，掃描線 614、資料線616與晝素結構618是配置在第一基板612 上。此外，畫素結構618是藉由掃描線614與資料線618 所控制。晝素結構618的組成元件與功能相同於圖2所示 之畫素結構200的組成元件與功能，因此不再重複描述。 對向基板620是配置在主動元件陣列基板610的對 向，而液晶層630是位於主動元件陣列基板610與對向基 板620之間。在本實施例中，對向基板62〇可以是彩色濾 光基板或是只有共用電極層的基板。 圖6是根據本發明一實施例繪示液晶顯示器的剖面 圖。請參照圖6,液晶顯示器700包括一液晶顯示面板71〇 二背光模組720以及-前架73〇。液晶顯示面板71〇的組 成几件與功能相同於圖5所示之液晶顯示面板_的組成 元件與功能’因此不再重複描述。 15 200905347 P061042AJLZ11W 23674twf.doc/p 背光模組720可以是直下式背光模組或側邊入光式背 光模組，而为光模組720所採用的光源可以是冷陰極螢光 燈管(cold cathode fluorescence lamp，CCFL)、一發光二極體 (light emitting diode，LED)或是其他適當的光源。此外，前 框730與背光模組720組裝，以固定液晶顯示面板71〇。 另外前框730的材質例如是鐵框、鋁框或是其他材質。 圖7是根據本發明第二實施例之晝素結構的俯視圖。 請參照圖7，晝素結構800包括一掃瞄線2〇4、一資料線 206、一晝素電極21〇、一信號線212、多個接觸窗216與 218、一第一閘極電極222、一半導體層226、一源極電極 228、一汲極電極230以及一第二閘極電極834。 為了降低回踢電壓（kick off voltage)，本實施例將 第二閘極電極834縮小至通道區的大小。更詳細而言，在 圖7所示的晝素結構8〇〇中的第二閘極電極834的面積是 與半導體層226的面積大致相同。除此之外，晝素結構8〇〇 的結構是相同於圖2所示之晝素結構20〇的結構，因此不 再重複描述。 晝素結構800可應用於圖5之液晶顯示面板與圖6之 液晶顯示器。其應用方式相同於圖2所示晝素結構2〇〇的 應用方式，因此，在此不再重複描述。 综上所述，本發明第一實施例所提出之晝素結構具有 雙閘極溥膜電晶體，因此可以誘導產生較大的電流通道， 16 200905347The present invention provides a halogen structure that induces a larger current path to provide a larger current. The large U-seat = a liquid crystal display panel, its 4-cell structure can induce a large current path to provide a large current. A liquid crystal display is provided in the month, and the liquid crystal panel of the book has a current channel to provide a large current.示 ΐ 适用 ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ The Qiuji 1 ^ electrode and the drain electrode are disposed on the idler insulating layer and the gate electrode is disposed at least at the = electrode and 汲 _. The second gate electrode and the second gate are electrically: = on the protective layer of the square. The first - and the first pole electrode and the first pole - will be given a fixed voltage and number. Gate electrode (4) - will be applied to the scan letter 200905347 P061042ALZ1TW 23674twf.doc/p In the embodiment of the invention, the power is fixed at 1 to 10V. In an embodiment of the present invention, the fixed voltage is 5.5~6V 〇' in the present invention, and the signal line is a common voltage Ο ϋ in the present invention - the second, the second The gate electrode has substantially the same area as the semiconductor layer. In an embodiment of the invention, the ohmic contact layer is disposed between the semiconductor layer and the drain electrode of the semiconductor layer and the source electrode. The gate of the invention and the broom and data lines on the board = the junction crystal are disposed on the substrate, and include a gate electrode of the gate electrode and a gate electrode of the gate electrode. The first gate electrode is electrically connected to the sweeping cat line, and the first gate electrode is electrically covered to the first gate electrode. The semiconductor layer is on at least the gate insulating layer of the gate electrode layer. Source Wo_ is placed on the gate-gate electrode, and the impurity electrode and f material are placed on the +¥ body insulation layer, and the connection protection layer is disposed at the gate at least half in the == no Polar electrode. The second closed-pole electricity is on the protective layer, on the hair layer and the protective layer. The pixel electrode is configured. The touch window is configured to be electrically connected. The first terminal and the halogen electrode are electrically connected to the pole electrode via the first contact window and the 200905347 P061042ALZ1TW 23674twf.doc/p electrode. The second contact window is disposed in the gate insulating layer and the protective layer, and the second gate electrode is electrically connected to the signal line via the contact window, wherein the signal line supplies a fixed voltage to the second gate electrode. In an embodiment of the invention, the fixed voltage is between 1 and ιον. In one embodiment of the invention, the above fixed voltage is between 5.5 and 6V. In the present invention, the signal line described above is a common voltage line. In an embodiment of the invention, the second free electrode and the semiconductor layer have substantially the same area. In one embodiment of the invention, the double-electrode thin film electro-crystal described above comprises an ohmic junction disposed between the rotating layer and the secret electrode semiconductor layer and the electrodeless electrode. The present invention proposes a liquid crystal display panel comprising an active device substrate, a counter substrate and a liquid crystal layer. Silk component _ substrate package, multiple scanning lines, multiple data lines, a single structure. Multiple, system, and, and denier structure errors are controlled by scan lines and data lines. Each elementary structure includes a signal line, a double gate thin film transistor, a gold window, and a second contact window. The signal line is a configuration. The C-C crystal is disposed on the substrate and includes a 3'-semiconductor layer' source electrode and a drain electrode, and a 9-gate electrode. The first gate electrode is electrically connected to the scan line. The gate insulating layer covers at least the first electrode. The semiconductor layer is at least = 200905347 mi (J42Al^nw 23674twf.d〇c/P ===, upper. Source - connected. The protective layer is (four) line electrical connection ^ second gate electrode is disposed at least on the semiconductor layer i pole power: even: on the pole layer 'where the pixel electrode and the bungee Γ o pole connected to the first - touch window and the inside of the drain = the pixel is placed in the closed-pole insulation layer and the protective layer, the second window is In the embodiment, the above fixed voltage is between 5.5 and 6 V. In the embodiment of the present invention, the above fixed voltage is between ΐίίΓ-implementation, the above In the first embodiment of the signal line of each of the halogen structures, the area of each of the double gate thin film transistor poles is substantially the same as the area of the semiconductor layer, and includes the "in:: two double gate thin film transistor" And between the semiconductor layer and the drain electrode. The display between the bulk layer and the source electrode is arranged on the backlight module, and the panel is disposed above the backlight module, and the liquid crystal display is 200905347 P061042ALZn'W 23674twf.doc/p = comprising an active device array substrate, a counter substrate and a liquid crystal layer. The main substrate includes a first substrate, A plurality of scanning lines, a plurality of data lines and two: an eve, a plurality of scanning lines and a plurality of data lines are disposed on the first substrate, and the halogen structure is turned to a double gate 』Thin film:: Its 'different pixel structure includes signal line, signal line 3 g?, the first contact window and the second contact window of the Γ Γ 旦 电极 element. 〇上广广ϊ第-ίϊΐ. Double closed The thin film transistor is disposed on the base electrode and the electrodeless electrode: the η layer, the semiconductor layer 'source drain is electrically connected to the broom wire' = the interpole electrode. The first gate electrode. The semiconductor layer is at least configured In the second layer, the edge layer covers at least the first closed-pole current. The source electrode and the electrodeless electrode are on the side of the gate insulating layer and the data line electrical connection layer, and the source electrode covers the source electrode and the gate electrode. The pole electrode: on the pole insulating layer, and on the protective layer above the body layer::$ The electrode is disposed at least in the semi-middle element electrode and the ” ”" electric 疋 疋 is disposed on the protective layer, and the ruthenium electrode is passed through The H-contact 1 touch window is disposed in the gate electrode through the gate, the recording layer and the protective layer, and the The invention is ι~ιον. :r is fixed, wherein the signal two=the opposite direction of the train substrate. The liquid==the substrate is disposed between the active substrate. The layered element array substrate and the opposite embodiment are fixed by the above In one embodiment of the invention, the above fixed voltage is between 5.5 and 6 V. In the embodiment of the invention, the above-mentioned respective elements are The signal line of the structure is a common voltage line. In one embodiment of the invention, the area of the second gate electrode of each of the double gates is substantially the same as the area of the semiconductor layer. In one embodiment of the present invention, each of the double gate thin film transistors described above (and further includes an ohmic contact layer disposed between the semiconductor layer and the source electrode and between the semiconductor layer and the drain electrode. The invention adopts a halogen structure with a double gate thin film transistor, so that a larger current channel can be induced to provide a larger current. Furthermore, since the present invention can supply a second gate voltage signal using an independent signal source. Therefore, the leakage current can be suppressed to improve the display quality of the liquid crystal display. In order to make the above features and advantages of the present invention more apparent, the preferred embodiment will be described in detail below with reference to the accompanying drawings. [Embodiment] ◎ First Embodiment FIG. 2 is a plan view showing a structure of a pixel in accordance with an embodiment of the present invention. Fig. 3 is a cross-sectional view taken along line I - I of Fig. 2. 2 and FIG. 3, the halogen structure 200 is controlled by a scan line 204 and a data line 206 disposed on a substrate 202. The check element structure 200 includes a pixel electrode 210, a signal line 212, and a double ^ Extreme thin film electrocrystal 214. The carbaryl electrode 210 is electrically connected to the double gate thin film electric circuit 12 200905347 Ρ061042Α1^Ζ11Λν 23674twf.doc/p body 214 through a contact window 216. The material of the halogen electrode 210 includes indium tin oxide (Indium) Tin Oxide (ITO) or Indium 〇xide (IZO). The signal line 212 is disposed on the substrate 202 and is electrically connected to the double gate thin film transistor 214 through a contact window 218. The dual gate thin film transistor 214 includes a first gate electrode 222, a gate insulating layer 224, a semiconductor layer, a source electrode 228 and a gate electrode 230, a protective layer 232, and a second gate. The electrode 234. In the present embodiment, the double gate thin film transistor 214 is formed on the wipe line 204, that is, a portion of the sweep line 5 line as the gate electrode of the double gate thin film transistor 214. However, In addition, the first gate electrode is disposed on the substrate 202, and the gate electrode 222 can be connected to the scan line 2 and the gate electrode 222 can be used. Among them - "can be copper, tungsten, chrome, lack of combination Ο = pole insulation 224 is disposed on the substrate to carry the gate electrode 222. The gate insulating layer 224 is made of a material or a tantalum oxynitride. The semiconductor layer 2263 is an open insulating layer 224 over the nitride. The half electrode is germanium or polysilicon. The material of the pole is included in the amorphous layer 226. The source electrode and the data are disposed at the semiconductor pole 23 and will be perpendicular to the halogen electrode i, and electrically connected and electrically connected to the gate electrode film 214: In addition, 'in order to improve the double-free crystal 2U, it includes 1 ohm contact; 2 between the two film electrodes and the source 5 electrode 228, and between the semiconductor layer and the & 13 200905347 W6IU42A1.Z1TW 23674twf.doc/p. The material of the ft ohmic contact layer 236 includes a non-amorphous amorphous stone. The material disposed on the gate insulating layer 224 and covering the source electrode 230° of the protective layer 232 includes oxidized stone, oxidized or nitrided. The second gate electrode 234 is electrically connected to the signal line 212 via the contact window 218 to fix the voltage to the second polarity electrode 234. The second 'electrode is, for example, a transparent conductor layer or a metal layer, and the material of the transparent conductor reed includes indium tin oxide or indium zinc oxide.曰 In more detail, the fixed voltage supplied by the signal line 212 is preferably 'between 5·5 and 6 ν. In addition, a common voltage line (common v〇ltage line) or a separate amine φ ^ T can be used to compare the electrical quality of the conventional fine crystal crystal with the double-electrode thin film transistor of the present embodiment. The figure +4 is a comparison diagram showing the currents of the conventional thin film transistor and the o ^ interlayer thin film transistor according to an embodiment of the present invention, which is applied to the gate at different voltages. Green Ϊ Referring to Figure 4, curve 1 shows the current distribution of a conventional single gate thin film transistor. Curve 2 shows that the first gate electrode 222 is given a different voltage drain electrode 23 while the first gate electrode j and the second gate electrode 234 are simultaneously applied and the second gate electrode 5 is applied with a positive voltage. The current distribution of the station. Curve 3 shows that the first gate electrode 222 is given a different voltage drain electrode 230 when the first gate electrode 222 is used simultaneously, the second gate electrode 234 is applied, and the second gate electrode 丨0V is applied with a positive voltage. Wheel 14 200905347 FUdlU^ALZilW 23674twf.doc/p Current distribution. It can be seen from Fig. 4 that the design of the double gate of the double gate thin film transistor 2i4 of the present invention can induce the semiconductor layer 226 to generate a large current path, thereby providing a large current. Furthermore, since the present invention can supply the second gate electrode voltage signal using an independent signal source, the leakage current can be greatly suppressed when the second gate electrode is applied with a fixed voltage DC signal. FIG. 5 is a cross-sectional view of a liquid crystal display panel according to an embodiment of the invention. FIG. Referring to FIG. 5, the liquid crystal display panel 6A of the present embodiment includes an active element array substrate 610, a pair of substrate 62 and a liquid crystal layer 63. The active element array substrate 610 includes a first substrate 612, a plurality of scan lines 614, a plurality of data lines 616, and a plurality of pixel structures 618. The scan line 614, the data line 616 and the halogen structure 618 are disposed on the first substrate 612. In addition, pixel structure 618 is controlled by scan line 614 and data line 618. The constituent elements and functions of the halogen structure 618 are the same as those of the pixel structure 200 shown in Fig. 2, and therefore the description will not be repeated. The opposite substrate 620 is disposed opposite to the active device array substrate 610, and the liquid crystal layer 630 is disposed between the active device array substrate 610 and the opposite substrate 620. In the present embodiment, the counter substrate 62 may be a color filter substrate or a substrate having only a common electrode layer. Figure 6 is a cross-sectional view showing a liquid crystal display according to an embodiment of the invention. Referring to FIG. 6, the liquid crystal display 700 includes a liquid crystal display panel 71, a backlight module 720, and a front frame 73A. The constituent elements of the liquid crystal display panel 71 are the same as those of the liquid crystal display panel shown in Fig. 5, and thus the description will not be repeated. 15 200905347 P061042AJLZ11W 23674twf.doc/p The backlight module 720 can be a direct-lit backlight module or a side-lit backlight module, and the light source used for the optical module 720 can be a cold cathode fluorescent tube (cold cathode). Fluorescence lamp (CCFL), a light emitting diode (LED) or other suitable light source. Further, the front frame 730 is assembled with the backlight module 720 to fix the liquid crystal display panel 71A. In addition, the material of the front frame 730 is, for example, an iron frame, an aluminum frame, or other materials. Figure 7 is a plan view of a halogen structure in accordance with a second embodiment of the present invention. Referring to FIG. 7, the pixel structure 800 includes a scan line 2〇4, a data line 206, a halogen electrode 21〇, a signal line 212, a plurality of contact windows 216 and 218, and a first gate electrode 222. A semiconductor layer 226, a source electrode 228, a drain electrode 230, and a second gate electrode 834. In order to reduce the kick off voltage, the present embodiment reduces the second gate electrode 834 to the size of the channel region. In more detail, the area of the second gate electrode 834 in the halogen structure 8A shown in Fig. 7 is substantially the same as the area of the semiconductor layer 226. Except for this, the structure of the halogen structure 8〇〇 is the same as the structure of the halogen structure 20〇 shown in Fig. 2, and therefore the description will not be repeated. The halogen structure 800 can be applied to the liquid crystal display panel of Fig. 5 and the liquid crystal display of Fig. 6. The application method is the same as that of the pixel structure 2〇〇 shown in FIG. 2, and therefore, the description will not be repeated here. In summary, the halogen structure proposed in the first embodiment of the present invention has a double gate 溥 film transistor, and thus can induce a large current channel, 16 200905347
i-Ub i WZAL.^1 i w 23674twf.d〇c/P 由此提供較大的電流。再者，由於本發明可使用獨立訊號 源供應第二閘極電極電壓訊號，由此可壓抑漏電流。因此， 可改善液晶顯示器的顯示品質。 〇 0 本發明第二實施例所提出之晝素結構具有雙閑極薄 二日曰體’因此可以誘導產生較大的電流通道，由此提供 -乂。再者’由於本發明可使用獨立訊號源供應第 電壓訊號’由此可Μ抑漏電流。此外，由於第 ==電極面雜小至與半導體層大致_，所以可減少 她聯極電極重疊區域所造成的回踢電壓(Kick〇ff )因此’可改善液晶顯示器的顯示品質。 限定本發Γ已以較佳實施例揭露如上，然其並非用以 脫離太! 賴技術領域巾具有通常知識者，在不 脫離本發明之精神和範在不 因此本發明之些°今之更動與潤飾， 為準。X月之保雜圍虽視後附之申請專利範圍所界定者 【圖式簡單說明】 面圖圖！是根據習知技崎示習知薄膜電晶體的剖 圖2是根據本發明一實施例給 以繪示，之w，線:☆的俯視圖。 所輪出之電流的比較圖。 δ龟壓下>及極電極 圖 晶顯示面板的剖面 是根據本發明一實施例綠示液 17 200905347 nj〇iU4/AL·乙i i W 23674twf.doc/p 圖。 圖6是根據本發明一實施例繪示液晶顯示器的剖面 圖。 圖7是根據本發明第二實施例之晝素結構的俯視圖。 【主要元件符號說明】 100 :薄膜電晶體 102 :閘極電極 ^ 104 :閘極絕緣層 106:半導體層 108 :歐姆接觸層 110 :源極電極 112 :汲極電極 114 :保護層 120 :基板 200 :晝素結構 202 :基板 〇 204 :掃瞄線 206 :資料線 210 :晝素電極 212 :信號線 214 ··雙閘極薄膜電晶體 216、218 :接觸窗 222 :第一閘極電極 224 :閘極絕緣層 18 200905347 tvoio^z/kL·^l i W 23674twf.doc/p 226 :半導體層 228 :源極電極 230 :汲極電極 232 :保護層 234 :第二閘極電極 236 :歐姆接觸層 600 .液晶顯不面板 ^ 610 :主動元件陣列基板 612:第一基板 614 ·掃描線 616 :資料線 618 :晝素結構 620 :對向基板 630 :液晶層 700 ·液晶顯不為 710 .液晶顯不面板 〇 720:背光模組 730 :前框 834 :第二閘極電極 19i-Ub i WZAL.^1 i w 23674twf.d〇c/P This provides a larger current. Furthermore, since the present invention can supply the second gate electrode voltage signal using an independent signal source, the leakage current can be suppressed. Therefore, the display quality of the liquid crystal display can be improved. 〇 0 The halogen structure proposed in the second embodiment of the present invention has a double-small-thin thin two-day scorpion', so that a large current path can be induced, thereby providing -乂. Furthermore, since the present invention can supply the first voltage signal using an independent signal source, the leakage current can be suppressed. Further, since the == electrode surface is so small as to be substantially _ with the semiconductor layer, the kickback voltage (Kick〇ff) caused by the overlap region of the junction electrode thereof can be reduced, so that the display quality of the liquid crystal display can be improved. The present invention has been disclosed in the above preferred embodiments, but it is not intended to be used in a singular manner. The technical field of the present invention has the ordinary knowledge, and does not deviate from the spirit and scope of the present invention. Retouching, prevail. Although the X-Yue Zhiwei is defined by the scope of the patent application attached to the following [Simplified illustration] Fig. 2 is a plan view showing a thin film transistor according to an embodiment of the present invention. Fig. 2 is a plan view showing a w, a line: ☆ according to an embodiment of the present invention. A comparison of the currents that are rotated. The δ turtle pressure > and the electrode pattern of the crystal display panel are green liquids according to an embodiment of the present invention 17 200905347 nj〇iU4/AL·i i W 23674twf.doc/p. Figure 6 is a cross-sectional view showing a liquid crystal display according to an embodiment of the invention. Figure 7 is a plan view of a halogen structure in accordance with a second embodiment of the present invention. [Main component symbol description] 100: thin film transistor 102: gate electrode ^ 104: gate insulating layer 106: semiconductor layer 108: ohmic contact layer 110: source electrode 112: drain electrode 114: protective layer 120: substrate 200 : Alizarin structure 202: substrate 〇 204: scan line 206: data line 210: halogen electrode 212: signal line 214 · double gate thin film transistor 216, 218: contact window 222: first gate electrode 224: Gate insulating layer 18 200905347 tvoio^z/kL·^li W 23674twf.doc/p 226 : semiconductor layer 228 : source electrode 230 : drain electrode 232 : protective layer 234 : second gate electrode 236 : ohmic contact layer 600. Liquid crystal display panel ^ 610: active device array substrate 612: first substrate 614 · scan line 616: data line 618: halogen structure 620: opposite substrate 630: liquid crystal layer 700 · liquid crystal display is not 710. No panel 720: backlight module 730: front frame 834: second gate electrode 19