TW200847614A - Constant current and constant voltage driving circuit of low acoustic noise and speed controllable DCBL fan motor - Google Patents

Constant current and constant voltage driving circuit of low acoustic noise and speed controllable DCBL fan motor Download PDF

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TW200847614A
TW200847614A TW96119609A TW96119609A TW200847614A TW 200847614 A TW200847614 A TW 200847614A TW 96119609 A TW96119609 A TW 96119609A TW 96119609 A TW96119609 A TW 96119609A TW 200847614 A TW200847614 A TW 200847614A
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control
end point
terminal
type bipolar
bipolar junction
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TW96119609A
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Chinese (zh)
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TWI327814B (en
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Yi-Pin Lin
Sheng-Yi Yang
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Ampson Technology Inc
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Abstract

A constant current and constant voltage driving circuit of a DC motor is used for driving a first magnetic coil and a second magnetic coil included in the DC motor. The driving circuit includes an integrated circuit (IC) chip, a first switch, a second switch. The integrated circuit chip generates currents to drive the first switch and the second switch by using the constant-current driving method. The first switch and the second switch amplify the generated currents by using the constant-voltage driving method, to drive the first magnetic coil and the second magnetic coil, respectively. Furthermore, the driving circuit can also include a control circuit, and control the first magnetic coil and the second magnetic coil with pulse width modulation signals to obtain the desired rotation frequency of the DC motor.

Description

200847614 九、發明說明: 【發明所屬之技術領域】 本發明是有關於-種直流馬達之驅動電路,且特別是 有關於-種結合定電流以及定電壓來驅動直流無刷⑴C Brushless,DCBL)式風翁馬達之驅動電路。 【先前技術】200847614 IX. Description of the Invention: [Technical Field] The present invention relates to a driving circuit for a DC motor, and particularly relates to a combination of a constant current and a constant voltage for driving a DC brushless (1) C Brushless, DCBL) The drive circuit of the wind motor. [Prior Art]

傳統上’直流無刷式風扇的使用主要是為了各種電子 品的散熱功能。因為當埶量在產%肉 田…、里隹座口口内部累積而無法散去 時,各種讀將無法正常卫作,甚至整個系統可能產生當 ,或元件產生損壞。所以,制直流馬達風扇作為熱量傳 遞的裝置’可使系統内各種元件在較佳的溫度環境下正 工作。 、一般驅動直流風扇馬達係利用定電壓輸出的驅動方 法。睛參照第1A圖,係繪示傳統利用定電壓輸出的驅動電 路。此驅動電路1〇〇包含兩電晶體M1及M2,且兩電晶體Traditionally, the use of DC brushless fans has been mainly for the heat dissipation of various electronic products. Because when the amount of sputum is accumulated in the meat field of the production, and the inside of the mouth of the scorpion is accumulated and cannot be dissipated, the various readings will not be able to function properly, and even the entire system may be damaged or the components may be damaged. Therefore, the use of a DC motor fan as a means of heat transfer enables various components of the system to operate in a preferred temperature environment. The general drive DC fan motor is a driving method that uses a constant voltage output. Referring to Fig. 1A, a conventionally driven circuit using a constant voltage output is shown. The driving circuit 1〇〇 includes two transistors M1 and M2, and two transistors

Ml及M2分別為一 NPN型雙極接面電晶體(Bip〇hMl and M2 are respectively an NPN type bipolar junction transistor (Bip〇h

Junction Transist〇r,BJT),且其集極對射極電壓分別為 及Vce2,亦即第1圖中兩輸出點DO及DOB的電壓。兩輸 出點DO及DOB的電壓係分別用以驅動直流風扇馬達中提 供電磁場的兩磁性線圈L1及L2,其中兩磁性線圈L1及 =的阻抗分別為Z1及Z2。此外,供應電壓及供應總電流 分別為VCC及ICC,而流經兩磁性線圈li及L2的電流分 別為II及12。 以定電壓驅動時,兩電晶體Ml及M2係藉由兩控制電 壓k號VI及V2所控制,且在不同時間開啟。當電晶體關 6 200847614 閉時,電晶體會進入截止區(cutoff region)中工作,此時流 經電晶體的電流非常小而接近零,所以輸出點的電壓約略 等於VCC。當電晶體開啟時,電晶體的電流會逐漸加大而 進入飽和區(saturation region)中工作,且集極對射極的飽和 電壓为別為Vcei,sat及Vce2,sat ’且幾乎固定不變。此時 VCC = VCel,sat + Π*Ζ1 = VCe2,cutoff + I2*Z2 或 VCC = Vce2’sat + I2*Z2 = vcel,cut0ff + n*zi ,其中Z1及Z2由兩磁性線圈LI及L2的線圈電阻以及風 扇馬達轉動頻率所決定。 然而,以疋電壓驅動的方式較適用於大電流的情形。 倘若在低驅動電流馬達中仍使用定電壓驅動的話,就磁性 線圈L1而言(磁性線圈L2亦同),由於vcel維持固定且線 圈電阻為較大值,所以電源VCC的小幅度變化便會造成低 電流II在比例上大幅度的變化,而使得馬達轉速變化且不 穩定。所以此種驅動方法不適合低轉速、低電流馬達的應 用。 另一方面,以定電壓驅動的方式,在電晶體M1 (或電 晶體M2)進行開啟與關閉的切換動作時,會因磁場變化的 緣故而於磁性線圈L1(或磁性線圈L2)上感應出一反電動 勢,且此反電動勢會使磁性線圈及整個風扇馬達產生相當 的噪音。凊參照第1B圖,係繪示直流電壓源以及輸出端點 DO及DOB之輸出電壓的量測波形圖。由圖中可知,在電 晶體Ml及M2進行切換時,輸出端點D〇及D〇B的輸出 電壓均會有瞬間衝高的反電動勢產生,且對於量測到的直 7 200847614 流電源VCC亦會造成電源噪音的影響。請參照第1C圖, 係繪不輸出端點00及!)〇3之輸出電壓的量測波形及其相 對應的頻谱圖。由圖中可知,由於在輸出端點及 產生的反電動勢以及電源噪音等雜訊的影響,使得 中除了有㈣(施)存在之外,也同時存在許多奇數倍頻 f以及偶數倍頻率,且奇數倍頻率及偶數倍頻率收斂緩 慢,造成主要的噪音干擾。 習知解決上述問題的方法係提出一種定電流方式的驅 動方法,可適用於低轉速、低電流的馬達,且能減低風扇 馬達所造成的噪音。請參照第2圖,係繪示習知利用定電 流輸出的驅動電路。此驅動電路2〇〇包含兩電晶體Μ)、 M4,且各有一端連接至一第一參考電壓vss,其中兩電晶 體M3及M4亦分別為一 NPN型雙極接面電晶體(bjt),且 其集極對射極電壓分別為13及U,亦即第2圖中兩輸 出點DO及DOB的電壓。兩輸出點D〇及D〇B的電壓係分 別驅動直流風扇馬達中提供電磁場的兩磁性線圈及 L4,其中兩磁性線圈L3及L4的阻抗分別為Z3及Z4。此 外,供應電壓為VCC,且流經兩磁性線圈L3及l4的電流 分別為13及14。 兩電晶體M3及M4係藉由兩控制電壓信號V3及V4 所控制,且在不同時間開啟。當電晶體M3開啟時,電晶 體M3會根據控制電壓信?虎V3而處於主動區regi〇n) 中工作,所以流經磁性線圈L3的電流13趨於一固定值而 保持不變。同樣地,當電晶體M4開啟時,電晶體%4會根 據控制電壓信號V4而處於主動區中卫作,所以流經磁性線 8 200847614 圈L4的電流14也會趨於一固定值而保持不變。此時 VCC = Vce3,active + I3*Z3= Vce4,cutoff + I4*Z4,且 14 = 0 或 VCC = Vce4,active + I4*Z4= Vce3,cutoff + I3*Z3,且 13=0 、 ,其中13及14為定值,可由定電流之設計規格所決定,且 • z3及z4也由兩磁性線圈L3及L4的線圈電阻以及風扇馬 達轉動頻率所決定。如此一來,電晶體M3及M4分別如同 受控制的定電流源一般,在電晶體開啟期間才有電流源產 生,藉此提供定電流。定電流驅動雖可解決定電壓驅動所 造成的一些問題,然而,由於其工作電流通常在考慮1(:散 熱問題之下無法增大,所以無法適用於高轉速的風扇馬達。 因此,需要一種驅動電路,可同時減低風扇馬達所產 生的噪音,並適合高轉速、高電流風扇馬達的應用。 L發明内容】 依照本發明-實施例,提出一種直流馬達之定電流定 電壓驅動電路。直流馬達包含一第_磁性線圈以及一第二 磁性線圈,其中第一磁性線圈具有—第一端點以及一第二 端點,第二磁性線圈具有—第三端點以及—第四端點,且 弟一端點以及第四端點均電性耦接於一第一參考電壓。此 驅動電路包含一積體電路晶 M 月 苐一開關以及一第二開 關。積體電路晶片具有一第一曰 於屮被外 日日片輸出端以及一第二晶片 第六端點,其中第一㈣一弟五端點以及-—晶片輸w ~ 1電㈣接於積體電路晶片的第 輸“,弟五端點電性輕接於-第二參考電壓,第 200847614 六端點電性耦接於第一磁性線圈之第一端點。第二開關具 有一第二控制端、一第七端點以及一第八端點,其中第二 控制端電性耦接於積體電路晶片的第二晶片輪出端,第七 端點電性耦接於第二參考電壓,第八端點電性耦接於第二 磁性線圈之第三端點。 其中,第一開關以及第二開關係根據分別流經第一晶 片輸出端以及第二晶片輸出端之一第一電流以及一第二電 流而於不同時間開啟,藉以分別驅動第一磁性線圈以 一磁性線圈,其中第一電流或第二電流實質上係為一定 值,而第一磁性線圈以及第二磁性線圈則係分別於不同時 間根據第一開關以及第二開關各別所產生之一定電壓來驅 動。 " 由上述本發明之實施例可知,應用此直流馬達之驅動 電路可同時包含定電流驅動以及定電壓驅動的優點,不僅 可減低馬達所產生的噪音,並適合於高轉速、高電流之馬 達的應用。 【實施方式】 請參照第3圖,係繪示依照本發明一第一實施例之直 流馬達之驅動電路的示意圖。直流馬達包含兩磁性線圈li 和L2,且兩磁性線圈LaL2各具有一端電性麵接於一第 -參考電壓’而在本實施例中第一參考電壓係為一接地端 GND。此驅動電路300包含一積體電路(IC)晶片3〇2以及兩 開關Q1和Q2 ’且在本例中開關Q1和Q2均分別為一 型雙極接面電晶體⑻τ)。此IC晶片规係採用四腳位(pin) 200847614 單列直插式封裝(single-in-line package,SIP),且其四個腳 位分別為耦接第二參考電壓VCC的端點、晶片輸出端DO 和DOB以及耦接接地端GND的端點,而在本實施例中第 二參考電壓VCC係為一高直流電壓。電晶體Q1的控制端, 即基極端,電性耦接於1C晶片302的晶片輸出端DO,其 射極端電性耦接於高直流電壓VCC,而其集極端則電性耦 接於磁性線圈L1的另一端。電晶體Q2的控制端,即基極 端,電性耦接於1C晶片302的晶片輸出端DOB,其射極端 電性耦接於高直流電壓VCC,而其集極端則電性耦接於磁 性線圈L2的另一端。 其中,當1C晶片302工作時,晶片輸出端DO和DOB 會於不同時間產生對應的工作電流IC1和IC2,且電晶體Q1 以及電晶體Q 2分別根據流經晶片輸出端D Ο和D Ο B的電 流IC1和IC2、磁場感測以及控制狀態而於不同時間開啟, 藉以分別驅動兩磁性線圈L1和L2。兩磁性線圈L1和L2 則係分別於不同時間根據電晶體Q1以及電晶體Q2各別所 產生之一定電壓來驅動。其中,電流IC1或IC2實質上係為 一定值,且分別流至晶片輸出端DO和DOB。 此外,驅動電路300更可包含兩電阻R1和R2以及兩 電容C1和C2,其中電阻R1電性耦接於電晶體Q1的控制 端以及1C晶片302的晶片輸出端DO之間,電阻R2電性 耦接於電晶體Q2的控制端以及1C晶片302的晶片輸出端 DOB之間。兩電阻R1和R2係分別用以減少晶片輸出端 DO和DOB的電壓,亦即減少1C晶片302的操作功率,進 而降低1C晶片302在工作時的操作溫度。此外,兩電阻 11 200847614 R1和R2在使用上必須使得電晶體q〗和q2分別工作於飽 和區中’並確保電晶體Q1和Q2的工作溫度不致過熱。兩 電谷C1和C2則是分別電性耦接於磁性線圈L1和L2的一 端以及電晶體Q1和Q2的集極端,用以進一步減低由反電 動勢所引起的突波。 請參照第4圖,係繪示依照本發明一第二實施例之直 流馬達之驅動電路的示意圖。直流馬達包含兩磁性線圈L1, 和L2,,且兩磁性線圈]^1,和]12,各具有一端電性耦接於高 直流電壓VCC。驅動電路300a包含一 1C晶片303以及兩 開關Q1’和Q2’,且在本例中開關Qi,和q2,均分別為一 NpN 型雙極接面電晶體(BJT)。電晶體Q1,的控制端,即基極端, 電性耦接於1C晶片303的晶片輸出端DO,其射極端電性 耦接於接地端GND,而其集極端則電性耦接於磁性線圈L1, 的另一端。電晶體Q2,的控制端,即基極端,電性耦接於 1C晶片303的晶片輸出端DOB,其射極端電性耦接於接地 端GND,而其集極端則電性耦接於磁性線圈L2,的另一端。 同樣地,當1C晶片303工作時,晶片輸出端d〇*d〇b 會於不同時間產生對應的工作電流Ici,和Ic2,,且電晶體 Q1’以及電晶體Q2,根據分別流經晶片輪出端D〇和d〇b的 電流IC1’和Ια’、磁場感測以及控制狀態而於不同時間開 啟,藉以分別驅動兩磁性線圈L1,和L2,。兩磁性線圈li, 和L2,則係分別於不同時間根據電晶體Q1,以及電晶體 各別所產生之一定電壓來驅動。其中,電流,或Ic2,實質 上係為一疋值,且分別自晶片輸出端和輸出。 此外,驅動電路300a也可包含兩電阻R1,和R2,以及 12 200847614 兩电令Cl和C2,其中電阻R1,電性搞接於電晶體^,的 控制知以及1C曰曰片303的晶片輸出端D〇之間,電阻 電性輕接於電晶體Q2,的控制端以及IC晶片3〇3的晶片輪 出端DOB之間。*電阻R1,和R2,係分別用以減少晶片輸 出端DO和D0B的電麼’亦即減少lc晶片則的操作功 率’進而降低IC晶片303在工作時的操作溫度。此外,兩 電阻R1,和R2,在使用上必須使得電晶體Q1,和分別工 作於飽和时,並確保電晶體Q1,和Q2,的工作溫度不致過 熱,。兩電容C1’和C2’則是分別電絲接於磁性線圈u,和 L2的一端,用以進一步減低由反電動勢所引起的突波。 請參照第5圖,係繪示第3圖中積體電路晶片内部的 電路方塊示意圖。積體電路(IC)晶片3〇2中包含一磁性感測 元件500、一控制電路5〇2以及一驅動電路5〇4。磁性感測 几件500係用以偵測直流馬達轉動時所產生的磁場變化,Junction Transist〇r, BJT), and its collector-to-emitter voltages are respectively Vce2, which is the voltage of the two output points DO and DOB in Figure 1. The voltages of the two output points DO and DOB are respectively used to drive the two magnetic coils L1 and L2 of the power supply magnetic field in the DC fan motor, wherein the impedances of the two magnetic coils L1 and = are Z1 and Z2, respectively. In addition, the supply voltage and the total supply current are VCC and ICC, respectively, and the currents flowing through the two magnetic coils li and L2 are II and 12, respectively. When driven at a constant voltage, the two transistors M1 and M2 are controlled by two control voltages k and VI, and are turned on at different times. When the transistor is off 6 200847614, the transistor will go into the cutoff region, where the current through the transistor is very small and close to zero, so the output point voltage is approximately equal to VCC. When the transistor is turned on, the current of the transistor will gradually increase and enter the saturation region, and the saturation voltage of the collector to the emitter is Vcei, sat and Vce2, sat' and is almost fixed. . At this time VCC = VCel, sat + Π * Ζ 1 = VCe2, cutoff + I2 * Z2 or VCC = Vce2 'sat + I2 * Z2 = vcel, cut0ff + n * zi , where Z1 and Z2 are composed of two magnetic coils LI and L2 The coil resistance and the fan motor rotation frequency are determined. However, the method of driving with a 疋 voltage is more suitable for the case of a large current. If the constant voltage drive is still used in the low drive current motor, the magnetic coil L1 (the same as the magnetic coil L2), because the vcel remains fixed and the coil resistance is a large value, a small change in the power supply VCC will result in The low current II varies greatly in proportion, making the motor speed change and unstable. Therefore, this driving method is not suitable for applications with low speed and low current motors. On the other hand, when the transistor M1 (or the transistor M2) performs the switching operation of turning on and off in a constant voltage driving manner, it is induced on the magnetic coil L1 (or the magnetic coil L2) due to the change of the magnetic field. A counter electromotive force, and this back electromotive force causes considerable noise in the magnetic coil and the entire fan motor. Referring to Figure 1B, the measurement waveforms of the DC voltage source and the output voltages of the output terminals DO and DOB are shown. As can be seen from the figure, when the transistors M1 and M2 are switched, the output voltages of the output terminals D〇 and D〇B are instantaneously generated by the counter electromotive force, and for the measured straight 7 200847614 power supply VCC It also causes power supply noise. Please refer to the 1C figure, the system does not output the endpoint 00 and! ) The measured waveform of the output voltage of 〇3 and its corresponding spectrogram. As can be seen from the figure, due to the influence of noise at the output end point and the generated back electromotive force and power supply noise, there are many odd multiples f and even multiple frequencies in addition to (4) (application). And the odd-numbered frequency and the even-numbered frequency converge slowly, causing major noise interference. A conventional method for solving the above problems proposes a constant current driving method which can be applied to a low-speed, low-current motor and can reduce the noise caused by the fan motor. Referring to Fig. 2, a conventional driving circuit using a constant current output is shown. The driving circuit 2 includes two transistors M), M4, and one end is connected to a first reference voltage vss, wherein the two transistors M3 and M4 are also an NPN bipolar junction transistor (bjt). And its collector-to-emitter voltages are 13 and U, respectively, that is, the voltages of the two output points DO and DOB in FIG. The voltages of the two output points D〇 and D〇B respectively drive the two magnetic coils and L4 which provide electromagnetic fields in the DC fan motor, wherein the impedances of the two magnetic coils L3 and L4 are Z3 and Z4, respectively. In addition, the supply voltage is VCC, and the currents flowing through the two magnetic coils L3 and L4 are 13 and 14, respectively. The two transistors M3 and M4 are controlled by two control voltage signals V3 and V4 and are turned on at different times. When the transistor M3 is turned on, the transistor M3 operates in the active region regi〇n according to the control voltage signal Tiger V3, so the current 13 flowing through the magnetic coil L3 tends to a fixed value and remains unchanged. Similarly, when the transistor M4 is turned on, the transistor %4 is in the active region according to the control voltage signal V4, so the current 14 flowing through the magnetic line 8 200847614 circle L4 also tends to a fixed value and remains unchanged. . At this time VCC = Vce3, active + I3*Z3 = Vce4, cutoff + I4*Z4, and 14 = 0 or VCC = Vce4, active + I4*Z4 = Vce3, cutoff + I3*Z3, and 13 = 0, where 13 and 14 are fixed values, which can be determined by the design specifications of the constant current, and • z3 and z4 are also determined by the coil resistance of the two magnetic coils L3 and L4 and the rotational frequency of the fan motor. As a result, the transistors M3 and M4 are respectively controlled as a constant current source, and a current source is generated during the period in which the transistor is turned on, thereby providing a constant current. The constant current drive can solve some problems caused by constant voltage drive. However, since its operating current is usually not considered to be increased under the consideration of heat dissipation, it cannot be applied to a high-speed fan motor. Therefore, a drive is required. The circuit can simultaneously reduce the noise generated by the fan motor and is suitable for the application of the high-speed, high-current fan motor. SUMMARY OF THE INVENTION According to the present invention, a constant current constant voltage driving circuit for a DC motor is proposed. The DC motor includes a first magnetic coil and a second magnetic coil, wherein the first magnetic coil has a first end point and a second end point, and the second magnetic coil has a third end point and a fourth end point, and the second end point The point and the fourth end are electrically coupled to a first reference voltage. The driving circuit comprises an integrated circuit crystal switch and a second switch. The integrated circuit chip has a first The outer day chip output end and the second chip sixth end point, wherein the first (four) one brother five end points and the - chip transfer w ~ 1 electricity (four) are connected to the integrated circuit chip The second switch is electrically coupled to the second reference voltage, and the sixth end is electrically coupled to the first end of the first magnetic coil. The second switch has a second control end, a seventh end point and an eighth end point, wherein the second control end is electrically coupled to the second wafer wheel output end of the integrated circuit chip, and the seventh end end is electrically coupled to the second reference voltage, the eighth end The first switch and the second open relationship are respectively connected to the first current of the first chip output end and the second chip output end and a second current according to the third end point of the second magnetic coil. The current is turned on at different times to drive the first magnetic coil to a magnetic coil, wherein the first current or the second current is substantially constant, and the first magnetic coil and the second magnetic coil are respectively at different times. Driving according to a certain voltage generated by each of the first switch and the second switch. According to the embodiment of the present invention, the driving circuit using the DC motor can simultaneously include constant current driving and constant voltage driving. In order to reduce the noise generated by the motor, it is suitable for the application of a high-speed, high-current motor. [Embodiment] Referring to Figure 3, a DC motor drive according to a first embodiment of the present invention is illustrated. A schematic diagram of the circuit. The DC motor includes two magnetic coils li and L2, and each of the two magnetic coils LaL2 has one end electrically connected to a first reference voltage. In the present embodiment, the first reference voltage is a ground GND. The driving circuit 300 includes an integrated circuit (IC) chip 3〇2 and two switches Q1 and Q2'. In this example, the switches Q1 and Q2 are respectively a type of bipolar junction transistor (8) τ). The system uses a four-pin (pin) 200847614 single-in-line package (SIP), and its four pins are respectively coupled to the end of the second reference voltage VCC, the chip output terminals DO and DOB. And the end point of the grounding terminal GND is coupled, and in the embodiment, the second reference voltage VCC is a high DC voltage. The control terminal of the transistor Q1, that is, the base terminal, is electrically coupled to the chip output terminal DO of the 1C chip 302. The emitter is electrically coupled to the high DC voltage VCC, and the collector is electrically coupled to the magnetic coil. The other end of L1. The control terminal of the transistor Q2, that is, the base terminal, is electrically coupled to the chip output terminal DOB of the 1C chip 302. The emitter is electrically coupled to the high DC voltage VCC, and the collector is electrically coupled to the magnetic coil. The other end of L2. Wherein, when the 1C chip 302 is in operation, the wafer output terminals DO and DOB generate corresponding operating currents IC1 and IC2 at different times, and the transistor Q1 and the transistor Q 2 flow through the wafer output terminals D Ο and D Ο B, respectively. The currents IC1 and IC2, the magnetic field sensing, and the control state are turned on at different times to drive the two magnetic coils L1 and L2, respectively. The two magnetic coils L1 and L2 are driven at different times according to respective voltages generated by the respective transistors Q1 and Q2. Among them, the current IC1 or IC2 is substantially constant and flows to the wafer output terminals DO and DOB, respectively. In addition, the driving circuit 300 further includes two resistors R1 and R2 and two capacitors C1 and C2, wherein the resistor R1 is electrically coupled between the control terminal of the transistor Q1 and the chip output terminal DO of the 1C chip 302, and the resistor R2 is electrically connected. It is coupled between the control terminal of the transistor Q2 and the wafer output terminal DOB of the 1C wafer 302. The two resistors R1 and R2 are used to reduce the voltage at the output terminals DO and DOB, respectively, i.e., to reduce the operating power of the 1C wafer 302, thereby reducing the operating temperature of the 1C wafer 302 during operation. In addition, the two resistors 11 200847614 R1 and R2 must be used such that the transistors q and q2 operate in the saturation region, respectively, and ensure that the operating temperatures of the transistors Q1 and Q2 are not overheated. The two valleys C1 and C2 are electrically coupled to one ends of the magnetic coils L1 and L2 and the collector terminals of the transistors Q1 and Q2, respectively, for further reducing the spur caused by the counter electromotive force. Referring to Figure 4, there is shown a schematic diagram of a drive circuit of a DC motor in accordance with a second embodiment of the present invention. The DC motor includes two magnetic coils L1, and L2, and two magnetic coils, ^1, and 12, each having one end electrically coupled to the high DC voltage VCC. The driver circuit 300a includes a 1C chip 303 and two switches Q1' and Q2', and in this example, the switches Qi, and q2 are each an NpN type bipolar junction transistor (BJT). The control terminal of the transistor Q1, that is, the base terminal, is electrically coupled to the chip output terminal DO of the 1C chip 303, and the emitter is electrically coupled to the ground GND, and the collector is electrically coupled to the magnetic coil. L1, the other end. The control terminal of the transistor Q2, that is, the base terminal, is electrically coupled to the chip output terminal DOB of the 1C chip 303, and the emitter is electrically coupled to the ground GND, and the collector is electrically coupled to the magnetic coil. The other end of L2. Similarly, when the 1C wafer 303 is in operation, the wafer output terminal d〇*d〇b will generate corresponding operating currents Ici, Ic2, and the transistor Q1' and the transistor Q2, respectively, flowing through the wafer wheel. The currents IC1' and Ια' of the terminals D〇 and d〇b, the magnetic field sensing and the control state are turned on at different times, thereby driving the two magnetic coils L1, and L2, respectively. The two magnetic coils li, and L2 are driven at different times according to the transistor Q1 and a certain voltage generated by the respective transistors. Wherein, the current, or Ic2, is substantially a threshold and is output from the output and output of the chip, respectively. In addition, the driving circuit 300a may also include two resistors R1, and R2, and 12 200847614 two electric switches Cl and C2, wherein the resistor R1 is electrically connected to the control of the transistor, and the chip output of the 1C chip 303. Between the terminals D, the resistance is electrically connected between the control terminal of the transistor Q2 and the wafer wheel end DOB of the IC chip 3〇3. * Resistors R1, and R2 are used to reduce the power of the wafer output terminals DO and DOB, respectively, that is, to reduce the operating power of the lc wafer, thereby reducing the operating temperature of the IC wafer 303 during operation. In addition, the two resistors R1, and R2 must be used to make the transistor Q1, and operate separately, and ensure that the operating temperatures of the transistors Q1, and Q2 are not overheated. The two capacitors C1' and C2' are respectively connected to the ends of the magnetic coils u, and L2, to further reduce the spur caused by the counter electromotive force. Referring to Fig. 5, there is shown a block diagram of the circuit inside the integrated circuit chip in Fig. 3. The integrated circuit (IC) chip 3〇2 includes a magnetic sensing element 500, a control circuit 5〇2, and a driving circuit 5〇4. Magnetic sensing Several pieces of the 500 series are used to detect changes in the magnetic field generated when the DC motor rotates.

並藉以輸出一感測信號。控制電路5〇2電性耦接於磁性感 測元件500,並接收由磁性感測元件5〇〇所輸出的感測信 唬,以輸出相對應的控制信號。驅動電路5〇4電性耦接於 控制電路502,並接收由控制電路5〇2所輸出的控制信號, 藉以透過輸出端點DO和DOB輸出相對應的驅動信號。U 請參照第6圖,係繪示第3圖中1C晶片的内部驅動電 路與外部電路連接的示意圖晶片3〇2中包含兩開關Q〇〇 和Qdob,以及用以提供一定電流之一定電流源。在本實施 例中,開關Qdo和Qdob均分別為一 NPN型雙極接面電晶 體,而定電流源可由一 NPN型雙極接面電晶體(^^來實現。 電晶體卩⑽和Qdob的控制端’即基極端’分別接收控制電 13 200847614 壓信號V〇〇以及V〇ob ’而電晶體Qdo和Qdob的集極端則 分別作為1C晶片302的晶片輸出端DO和DOB。電晶體 QA的控制端,即基極端,係經由另一 NPN型雙極接面電晶 體Qb來對其進行偏壓,使得電晶體Qa工作於主動區(active ' region)中並提供一定電流;電晶體Qa的集極端係電性麵接 " 於電晶體Qdo和Qdob的射極端’而電晶體Qa的射極端則 係經由一電阻Ra電性耦接於接地端GND。 當電晶體Qa開啟時,電晶體Qa會於主動區中工作, ί 且流經其集極端的電流I會趨近於一固定值而保持不變。 兩電晶體Qdo和Qdob係精由兩控制電壓信號Vdo以及Vdob 控制,且分別在不同時間開啟。當電晶體Qdo開啟時,電 晶體Qdo會根據控制電壓信號Vdo而處於主動區中工作’ 流經電晶體Qdo的電流IC1會趨於一固定值而保持不變。同 樣地’當電晶體Qdob開啟時’電晶體Qdob會根據控制電 壓信號Vdob而處於主動區中工作’流經電晶體Qdob的電 流Ic2也會趨於一固定值而保持不變。 t 當電晶體Qdo受到控制電壓信號VD0的控制而開啟 時,電晶體Q1也會因此開啟,並工作於飽和區(saturation region)中,使得由電晶體QDO的集極端產生的電流IC1可經 由電晶體Q1放大,並於輸出端點DO’產生相對應足夠大的 電壓來驅動磁性線圈L1動作。同樣地,當電晶體QDOB受 * 到控制電壓信號VD0B的控制而開啟時,電晶體Q2也會因 • 此開啟,並工作於飽和區中,使得由電晶體Qdob的集極端 產生的電流IC2可經由電晶體Q2放大,並於輸出端點DOB’ 產生相對應足夠大的電壓來驅動磁性線圈L2動作。 14 200847614 請參照第7圖,係繪示依照本發明一第三實施例之直 流馬達之驅動電路的示意圖。相較於第3圖而言,此驅動 電路300b中更包含電阻R3和R4。電阻R3和R4的一端係 分別電性耦接於磁性線圈L1和L2以及電晶體qi和Q2的 集極端’而另一端則分別電性耦接於電容C1和C2,藉以 避免瞬間的大電流而影響磁性線圈L1和L2的動作。And by which a sensing signal is output. The control circuit 5〇2 is electrically coupled to the magnetic sensing element 500 and receives the sensing signal output by the magnetic sensing element 5〇〇 to output a corresponding control signal. The driving circuit 5〇4 is electrically coupled to the control circuit 502 and receives the control signal outputted by the control circuit 5〇2, thereby outputting the corresponding driving signal through the output terminals DO and DOB. U. Referring to FIG. 6, a schematic diagram showing the connection between the internal driving circuit of the 1C chip and the external circuit in FIG. 3 includes two switches Q〇〇 and Qdob, and a constant current source for supplying a certain current. . In this embodiment, the switches Qdo and Qdob are respectively an NPN-type bipolar junction transistor, and the constant current source can be realized by an NPN-type bipolar junction transistor (^^. The transistor 卩(10) and Qdob The control terminal 'ie, the base terminal' receives the control signals 13 200847614 and the voltage signals V〇〇 and V〇ob ', respectively, and the collector terminals of the transistors Qdo and Qdob serve as the chip outputs DO and DOB of the 1C wafer 302, respectively. The control terminal, the base terminal, is biased via another NPN-type bipolar junction transistor Qb such that the transistor Qa operates in the active 'region and provides a certain current; the transistor Qa The extremes of the electrical interface are connected to the emitters of the transistors Qdo and Qdob, and the emitters of the transistors Qa are electrically coupled to the ground GND via a resistor Ra. When the transistor Qa is turned on, the transistor Qa will work in the active region, and the current I flowing through the collector's extreme will stay close to a fixed value and remain unchanged. The two transistors Qdo and Qdob are controlled by two control voltage signals Vdo and Vdob, respectively. Turn on at different times. When the transistor Qdo is turned on, The crystal Qdo will operate in the active region according to the control voltage signal Vdo. The current IC1 flowing through the transistor Qdo will tend to be constant and remain unchanged. Similarly, when the transistor Qdob is turned on, the transistor Qdob will be controlled according to the control. The voltage signal Vdob is in the active region. The current Ic2 flowing through the transistor Qdob also tends to a constant value and remains unchanged. t When the transistor Qdo is turned on by the control voltage signal VD0, the transistor Q1 is also turned on. It will therefore be turned on and operate in the saturation region, so that the current IC1 generated by the collector terminal of the transistor QDO can be amplified by the transistor Q1 and generate a correspondingly large voltage at the output terminal DO' to drive The magnetic coil L1 operates. Similarly, when the transistor QDOB is turned on by the control of the control voltage signal VD0B, the transistor Q2 is also turned on and operates in the saturation region, so that the set terminal of the transistor Qdob is made. The generated current IC2 can be amplified by the transistor Q2, and a correspondingly large voltage is generated at the output terminal DOB' to drive the magnetic coil L2 to operate. 14 200847614 Please refer to FIG. A schematic diagram of a driving circuit of a DC motor according to a third embodiment of the present invention. The driving circuit 300b further includes resistors R3 and R4. The ends of the resistors R3 and R4 are respectively Electrically coupled to the magnetic coils L1 and L2 and the collector terminals of the transistors qi and Q2, and the other end is electrically coupled to the capacitors C1 and C2, respectively, to avoid the momentary large current affecting the action of the magnetic coils L1 and L2 .

請參照第8圖,係繪示依照本發明一第四實施例之直 流馬達之驅動電路包含轉速頻率偵測信號產生電路的示意 圖。相較於第3圖而言,此驅動電路3〇〇c可更包含一開關 Q3以及電阻R5,且在本例中開關Q3係為一 NPN型雙極 接面電晶體。電晶體Q3的控制端,即基極端,係經由 電阻R5電性耦接於電晶體Q2的集極端以及磁性線圈乙2, 電aa體Q3的射極端係電性_接於接地端,而電晶體Q3的 集極端則是用以輸出一電壓偵測信號,其中此電壓偵測信 號係為一馬達轉速頻率偵測信號FG (Frequency Generation) ’供控制系統對直流風扇馬達的運轉進行轉速 頻率的_。在本實施射,電晶體Q3係根據輸出端點 B的電壓^號輸出馬達轉速頻率偵測信,虎。而在另 •實苑例中,電晶體Q3則係根據輸出端點DO,的電壓信號 輸出馬達轉逮頻率偵測信號FG。 二乡…、第9圖,係繪示第8圖中輸出端點DO,及DOB, Μ壓以及轉速頻率偵測信號的量測波形圖。以第8圖的 :,當電晶體Q2根據Ic晶片3〇2進行開啟和關 二隸:、日”電晶體Q3會根據電晶體Q2所產生之連續高 低轉換的電壓,進行相對應的開啟和關閉,使得電晶體Q3 200847614 的集極端輸出電壓在耦接一負載至高電位時可產生相對應 高低轉換的電壓,而形成可供偵測的馬達轉速頻率偵測信 號FG。 請參照第10圖,係繪示依照本發明一第五實施例之直 ' 流馬達之驅動電路包含轉速頻率偵測信號產生電路的示意 、 圖。相較於第8圖而言,此驅動電路300d同樣可更包含電 阻R3和R4。電阻R3和R4的一端係分別電性耦接於磁性 線圈L1和L2以及電晶體Q1和Q2的集極端,而另一端則 C 分別電性耦接於電容C1和C2,藉以避免瞬間的大電流而 影響磁性線圈L1和L2的動作。 請參照第11圖,係繪示依照本發明一第六實施例之直 流馬達之驅動電路包含PWM控制電路的示意圖。相較於第 3圖而言,此驅動電路300e更包含一開關Q4,且在本例中 開關Q4係為一 PNP型雙極接面電晶體。電晶體Q4的控制 端,即基極端,係用以接收一脈衝寬度調變(Pulse Width Modulation)信號PWM1,其射極端係電性耦接於高直流電 壓VCC,而其集極端則是電性耦接於電晶體Q1的基極端 並經由電阻R1電性耦接於1C晶片302的晶片輸出端DO。 當電晶體Q4在飽和區工作時,無論晶片輸出端DO是否有 電流的切換動作’電晶體Q1均處於截止區(cut-off)中工 作,且流經磁性線圈L1的電流為0。當電晶體Q4在截止 ‘ 區中工作時,此時則可忽略電晶體Q4,使得電晶體Q1可 • 進行一般的切換動作。如此一來,便可藉由調整信號PWM1 而控制電晶體Q1的開啟和關閉,使得磁性線圈L1可進行 動作和停止動作之間的轉換,以達到直流馬達的轉速頻率 16 200847614 合乎所需的要求。在本實施例中,電晶體Q4係電性耦接於 電晶體Q1並經由一電阻電性耦接於晶片輸出端DO,而在 另一實施例中,電晶體Q4則是電性耦接於電晶體Q2並經 由一電阻電性耦接於晶片輸出端DOB。 請參照第12圖,係繪示依照本發明一第七實施例之直 流馬達之驅動電路包含PWM控制電路的示意圖。相較於第 11圖而言,此驅動電路3 00f更包含一開關Q5,且在本例 中開關Q5亦為一 PNP型雙極接面電晶體。電晶體Q5的控 制端,即基極端,係用以接收另一脈衝寬度調變信號 PWM2,其射極端係電性耦接於高直流電壓VCC,而其集 極端則是電性耦接於電晶體Q2的基極端並經由電阻R2電 性耦接於1C晶片302的晶片輸出端DOB。如此一來,便可 藉由調整信號PWM1及PWM2而控制電晶體Q1和Q2的 開啟和關閉,使得磁性線圈L1和L2可各別進行動作和停 止動作之間的轉換,以達到直流馬達的轉速頻率同時合乎 所需的要求。 請參照第13圖,係繪示依照本發明一第八實施例之直 流馬達之驅動電路包含轉速頻率偵測信號產生電路以及 PWM控制電路的示意圖。相較於第12圖而言,此驅動電 路300g更包含兩開關Q6和Q7,且在本例中開關Q6係為 一 PNP型雙極接面電晶體,而開關Q7係為一 NPN型雙極 接面電晶體。電晶體Q 6的控制端’即基極端’係經由電阻 R7和R2電性耦接於電晶體Q2的基極端以及電晶體Q5的 集極端,且電性耦接於1C晶片302的晶片輸出端DOB,而 電晶體Q6的射極端係電性耦接於高直流電壓VCC。電晶 17 200847614 控制端’即基極端,係經由-串接電阻R8電性輕 接於电晶體Q0的集極端,且經由一 於接地端GND,電晶體Q7 、且電性輕接 rxm ^ 體Q7的射極端係電性輕接於接地端 G膽,而電日日日體Q7的集極端則是用以輸出馬達轉速頻㈣ Γ二Γ:控制系統對直流風扇馬達的運轉進行轉速頻 率的制。如此一來,便可藉由改變脈衝寬度調變信號, 2同時偵測直流風扇馬達的轉速頻率,以獲得使 的馬達轉速頻率。 Γ 請參照第14圖’係繪示依照本發明另-實施例之IC 晶片的内部驅動電路與外部電路連接的示意®。相較於第6 圖而言,此1C晶片302a中可更包含兩開關Qc和%,且 在本例中開關Qc和qd均分別為一 npn型雙極接面電晶 體電a曰體Qc的基極端係接收一控制電壓信號,其射 極係電1±輕接於電晶體qd〇的基極端,並經由一串接電 阻Rc電性搞接於接地端GND,而其集極端係經由一串接 電阻RE電性輕接於-參考高電堡VDD。電晶體%的基極 端係接收-控制電壓信號Vd,其射極端係電性搞接於電晶 體Q麵的基極端,並經由-串接電阻、電性麵接於接地 ,GND’而其集極端係經由一串接電阻Rp電性耗接於參考 高電壓VDD。其中,t晶體Qc和Qd係分別在不同時間接 收控制電壓信號Vc^ Vd而開啟,且控制電㈣號%和 VD可根據1C晶片中的磁性感測元件以及控制電路產生。 當電晶體Qc接收控制電壓信號Vc而開啟時,節點C 係處於高位準狀態,使得電晶體Qd。開啟,而電晶體Q1 亦隨之開啟以驅動磁性線圈L1。當電晶體Qc接收為低電 18 200847614 ί的:制電壓信號^而關閉時,節點C係處於低位準狀 電晶體^關閉’而電晶體Q1亦隨之關閉。此 …、而由電晶體Qd接收控制電麼信號VD而開啟,使 D處於高位準狀態,電晶體Qdob開啟,而電晶體 二亦隨之開啟以驅動磁性線圈l2。磁性線圈^和u即 疋藉由控制電壓仏唬Vc和ν〇之連續高低電壓的轉換而動 作0Referring to Fig. 8, there is shown a schematic diagram of a driving circuit for a DC motor according to a fourth embodiment of the present invention, including a rotational frequency detecting signal generating circuit. Compared with FIG. 3, the driving circuit 3〇〇c may further include a switch Q3 and a resistor R5, and in this example, the switch Q3 is an NPN type bipolar junction transistor. The control terminal of the transistor Q3, that is, the base terminal, is electrically coupled to the collector terminal of the transistor Q2 via the resistor R5 and the magnetic coil B2, and the emitter terminal of the electrical aa body Q3 is electrically connected to the ground terminal, and the electricity is connected. The collector terminal of the crystal Q3 is used for outputting a voltage detection signal, wherein the voltage detection signal is a motor speed frequency detection signal FG (Frequency Generation) for the control system to perform the rotation frequency of the DC fan motor. _. In this embodiment, the transistor Q3 outputs a motor speed frequency detection signal according to the voltage of the output terminal B, the tiger. In another example, the transistor Q3 outputs a motor switching frequency detection signal FG according to the voltage signal of the output terminal DO. Erxiang..., Figure 9 is a measurement waveform diagram of the output terminal DO, and DOB, pressure and speed frequency detection signals in Figure 8. In Figure 8, when the transistor Q2 is turned on and off according to the Ic chip 3〇2, the daytime transistor Q3 will perform the corresponding turn-on according to the continuous high and low switching voltage generated by the transistor Q2. Closed, so that the collector output voltage of the transistor Q3 200847614 can generate a corresponding high and low conversion voltage when coupled to a load to a high potential, and form a motor speed frequency detection signal FG that can be detected. Referring to FIG. 10, A schematic diagram of a driving circuit for a direct current motor including a rotational frequency detecting signal generating circuit according to a fifth embodiment of the present invention is shown. The driving circuit 300d can also include a resistor as compared with FIG. R3 and R4. One ends of the resistors R3 and R4 are electrically coupled to the magnetic coils L1 and L2 and the collector terminals of the transistors Q1 and Q2, respectively, and the other end is electrically coupled to the capacitors C1 and C2, respectively. The instantaneous high current affects the operation of the magnetic coils L1 and L2. Referring to Fig. 11, there is shown a schematic diagram of a drive circuit including a PWM control circuit for a DC motor according to a sixth embodiment of the present invention. In other words, the driving circuit 300e further includes a switch Q4, and in this example, the switch Q4 is a PNP type bipolar junction transistor. The control terminal of the transistor Q4, that is, the base terminal, is used to receive a pulse width modulation. The Pulse Width Modulation signal PWM1 is electrically coupled to the high DC voltage VCC, and the collector is electrically coupled to the base terminal of the transistor Q1 and electrically coupled to the 1C via the resistor R1. The wafer output terminal DO of the wafer 302. When the transistor Q4 operates in the saturation region, regardless of whether or not the wafer output terminal DO has a current switching action, the transistor Q1 operates in a cut-off and flows through the magnetic coil. The current of L1 is 0. When the transistor Q4 is operating in the cut-off region, the transistor Q4 can be ignored at this time, so that the transistor Q1 can perform a general switching operation. Thus, the signal PWM1 can be adjusted. The control transistor Q1 is turned on and off, so that the magnetic coil L1 can perform switching between the action and the stop action to achieve the desired requirement of the DC motor speed frequency 16 200847614. In this embodiment, the transistor Q4 is Electrical The transistor Q1 is electrically coupled to the wafer output terminal DO via a resistor, and in another embodiment, the transistor Q4 is electrically coupled to the transistor Q2 and electrically coupled to the wafer via a resistor. Output terminal DOB. Referring to Fig. 12, there is shown a schematic diagram of a driving circuit of a DC motor according to a seventh embodiment of the present invention including a PWM control circuit. Compared with Fig. 11, the driving circuit 3 00f further includes A switch Q5, and in this example the switch Q5 is also a PNP type bipolar junction transistor. The control terminal of the transistor Q5, that is, the base terminal, is used to receive another pulse width modulation signal PWM2, the emitter end The collector is electrically coupled to the high DC voltage VCC, and the collector is electrically coupled to the base terminal of the transistor Q2 and electrically coupled to the wafer output terminal DOB of the 1C wafer 302 via the resistor R2. In this way, the on and off of the transistors Q1 and Q2 can be controlled by adjusting the signals PWM1 and PWM2, so that the magnetic coils L1 and L2 can be switched between the respective action and the stop action to achieve the speed of the DC motor. The frequency meets the required requirements at the same time. Referring to FIG. 13, a schematic diagram of a driving circuit of a DC motor including a rotational frequency detecting signal generating circuit and a PWM control circuit according to an eighth embodiment of the present invention is shown. Compared with FIG. 12, the driving circuit 300g further includes two switches Q6 and Q7, and in this example, the switch Q6 is a PNP type bipolar junction transistor, and the switch Q7 is an NPN bipolar. Junction transistor. The control terminal 'the base terminal' of the transistor Q 6 is electrically coupled to the base terminal of the transistor Q2 and the collector terminal of the transistor Q5 via the resistors R7 and R2, and is electrically coupled to the chip output end of the 1C wafer 302. DOB, and the emitter pole of the transistor Q6 is electrically coupled to the high DC voltage VCC. The crystal terminal 17 200847614 is the terminal end of the control terminal, which is electrically connected to the collector terminal of the transistor Q0 via the series-connected resistor R8, and is connected to the ground terminal GND, the transistor Q7, and electrically connected to the rxm body. The emitter of the Q7 is electrically connected to the grounding G, while the collector of the electric Japanese and Japanese Q7 is used to output the motor speed. (4) Γ2: The control system performs the speed of the DC fan motor. system. In this way, by changing the pulse width modulation signal, 2 simultaneously detecting the rotational frequency of the DC fan motor to obtain the motor rotation frequency. Γ Referring to Fig. 14, there is shown a schematic diagram of the connection of an internal driving circuit of an IC chip according to another embodiment of the present invention to an external circuit. Compared with FIG. 6, the 1C chip 302a may further include two switches Qc and %, and in this example, the switches Qc and qd are respectively an npn-type bipolar junction transistor. The base terminal receives a control voltage signal, and the emitter is electrically connected to the base end of the transistor qd〇, and is electrically connected to the ground GND via a series resistor Rc, and the collector is connected to the ground terminal GND. The series resistor RE is electrically connected to the reference high voltage VDD. The base extreme of the transistor % receives the control-voltage signal Vd, and its emitter is electrically connected to the base end of the Q-plane of the transistor, and is connected to the ground via a series-connected resistor and an electrical surface, GND' The extreme is electrically connected to the reference high voltage VDD via a series resistor Rp. Wherein, the t crystals Qc and Qd are respectively turned on at different times to receive the control voltage signal Vc^Vd, and the control electric (4) % and VD can be generated according to the magnetic sensing element and the control circuit in the 1C wafer. When the transistor Qc receives the control voltage signal Vc and turns on, the node C is in a high level state, so that the transistor Qd. Turn on, and the transistor Q1 is turned on to drive the magnetic coil L1. When the transistor Qc is received as a low voltage, the voltage is turned off, the node C is in the low level, and the transistor Q1 is turned off. The ... is controlled by the transistor Qd to receive the control signal VD, so that D is in a high level state, the transistor Qdob is turned on, and the transistor 2 is also turned on to drive the magnetic coil 12. The magnetic coils ^ and u are operated by the conversion of the continuous high and low voltages of the control voltages 仏唬Vc and ν〇.

请參照第15圖,係緣示依照本發明又一實施例之ic 晶片的内部驅動電路與外部電路連接的示意圖。相較於第 14圖而言,此IC晶片3〇2b中可更包含一開關Qe,且在本 例中開關QE係為-NPN型雙極接面電晶體。電晶體以的 控制即基極端,係電性搞接於參考高電壓VDD,其集 極端係電性_於高直流電壓VCC,而其射極端則是經由 串接電阻REf性論於電晶體Qd的集極端。在此, 當控制電壓信號^和Vd對電晶體^和Qd反覆地進行切 換時,參考高電壓VDD、電晶體qe以及串接電阻Re均可 用以穩定流經電晶體(^和Qd之電流的變化。 f施原理及鮭爭 由於用來驅動磁性線圈的電晶體會根據控制信號而進 行反覆地開啟及關閉,所以流經磁性線圈的電流會瞬間作 大巾田度地變化’使得磁性線圈產生的磁場變化會感應出一 反電動勢’而這種反覆瞬間衝高的電壓會使得磁性線圈及 整個風扇馬達產生持續的噪音。反電動勢的變化大小可由 下列式子求得: 19 200847614 dV = L * di/dt 其中,dV係流經磁性線圈的電流變化所感應出的電壓變 化’ L係為磁性線圈的電感值’而di/dt係為流經磁性線圈 的電流對時間的瞬間改變率。因此,若是能減少流經磁性 線圈之電流的瞬間變化,則便可減少電壓變化,進而減低 馬達所產生的嗓音。 ΟReferring to FIG. 15, a schematic diagram showing the connection of an internal driving circuit of an ic chip to an external circuit according to still another embodiment of the present invention is shown. In comparison with Fig. 14, the IC chip 3〇2b may further include a switch Qe, and in this example, the switch QE is a -NPN type bipolar junction transistor. The control of the transistor is the base extreme, which is electrically connected to the reference high voltage VDD. The set of extreme electrical properties is high DC voltage VCC, and the emitter end is connected to the transistor Qd via the series resistor REf. The extreme of the set. Here, when the control voltage signals ^ and Vd repeatedly switch between the transistors ^ and Qd, the reference high voltage VDD, the transistor qe, and the series resistor Re can be used to stabilize the current flowing through the transistors (^ and Qd). The principle and competition of the f. Because the transistor used to drive the magnetic coil will be turned on and off repeatedly according to the control signal, the current flowing through the magnetic coil will instantaneously change the size of the large towel. The change in the magnetic field induces a counter electromotive force' and this repeated transient high voltage causes continuous noise in the magnetic coil and the entire fan motor. The magnitude of the change in the back electromotive force can be obtained by the following equation: 19 200847614 dV = L * Di/dt where dV is the voltage change induced by the change in current flowing through the magnetic coil 'L is the inductance value of the magnetic coil' and di/dt is the instantaneous rate of change of the current flowing through the magnetic coil with respect to time. If the instantaneous change of the current flowing through the magnetic coil can be reduced, the voltage change can be reduced, thereby reducing the noise generated by the motor.

L 以下將對本發明之實施例的驅動電路進行分析說明。 請再參照第6圖,以電晶體(^〇及電晶體(^〇8而言,其集 極端分別產生的電流IC1和IC2可由下列式子表示:L The following describes an analysis of the driving circuit of the embodiment of the present invention. Referring again to Figure 6, in the case of a transistor (^〇 and transistor), the currents IC1 and IC2 generated by the collectors are represented by the following equation:

Ici = Is * exp(Vbel/yT)Ici = Is * exp(Vbel/yT)

Ic2 = Is * exp(Vbe2/VT) 其中Is係為一電流放大常數,VT係隨溫度變化的熱電壓。 此外 icl + iC2 = I,且 vbel-vbe2 = Vdo_Vd〇b = Vid,其中工 係流經QA之集極端的定電流,所以在經過運算推導之後可 得式(1)以及式(2) ··Ic2 = Is * exp(Vbe2/VT) where Is is a current amplification constant and VT is a thermal voltage that varies with temperature. In addition, icl + iC2 = I, and vbel-vbe2 = Vdo_Vd〇b = Vid, where the system flows through the extreme current of the set of QA, so after the operation derivation, equations (1) and (2) can be obtained.

Ici = 1/(1+ exp(_vid/VT)) ⑴Ici = 1/(1+ exp(_vid/VT)) (1)

Ic2 - 1/(1+ exp(Vid/yT)) (2) μ參照第16圖’係綠示第6圖的驅動電路中電晶體 Qdo及Qdob之集極端的電流隨時間之部分波形的示意圖。 由圖式以及式⑴和式⑺可知,當電晶體%及q議在進 行開啟及關閉的切換動作時,亦即在切換時間dt中,電流Ic2 - 1/(1+ exp(Vid/yT)) (2) μ Refer to Figure 16 for a partial waveform of the current over time at the collector extremes of the transistors Qdo and Qdob in the drive circuit of Figure 6 . It can be seen from the equations and equations (1) and (7) that when the transistors % and q are in the switching action of turning on and off, that is, in the switching time dt, the current

Ic^Ic2的大小均會根據電· Vid而改變,並且呈現近似線 性的變化’因此流經磁柯綠m ^生線圈的電流對時間的瞬間改變率 di/dt也會因此而近似盘一 a也 馬吊數;亦即,橫跨於磁性線圈的 電壓幾乎不會有瞬間的大轡 J幻大k化,所以相對地可減低馬達所 20 200847614 產生的噪音。此外,將流經電晶體Qd〇及Qd〇b集極端的電 流藉由電晶體Q1和Q2以定電壓的驅動方式加以放大,如 此一來,便可適用於高轉速、高電流的風扇馬達。The size of Ic^Ic2 will change according to the electric Vid, and will exhibit an approximately linear change'. Therefore, the instantaneous change rate di/dt of the current flowing through the magnetic coil of the magnetic coil is also approximated. Also, the horse hoist number; that is, the voltage across the magnetic coil is hardly instantaneous, so the noise generated by the motor unit 20 200847614 can be relatively reduced. Further, the current flowing through the terminals Qd〇 and Qd〇b of the transistor is amplified by the constant voltage driving of the transistors Q1 and Q2, so that it can be applied to a fan motor of high rotation speed and high current.

请參照第17圖,係繪示第6圖中當高直流電壓為12V 時直流電壓源以及輪出端點D〇,及D〇B,之輸出電壓的量 測波形圖。由圖中可清楚地發現,原先可能產生的反電動 勢幾乎已不復存在,同時直流電壓源也不再受到任何的電 源桑曰干擾’亦即馬達可能造成的噪音問題已經獲得解 決。请參照第18圖,係繪示第6圖中當高直流電壓為12v 時輸出端點DO,及D〇B,之輸出電壓的量測波形及其相對 應的頻譜圖。由圖中可清楚地發現,偶數倍頻率的比例已 絰減少,且奇數倍頻率在一定倍數(如9倍)之後幾乎可以忽 略,其收斂的情形明顯地改善。 請參照第19圖,係繪示第6圖中當高直流電壓為24v 時直流電壓源以及輪出端點DO,及DOB,之輸出電壓的量 測波形圖。由圖中可清楚地發現,當增加直流電壓以進行 驅動時,輸出端點D〇’及D〇B,的輸出電壓波形依然相當 C疋且直流電壓源也不受任何電源噪音的干擾,而這 也頌不所轭加的直流電壓值對此驅動電路而言並無太大的 衫響。睛參照第20圖,係繪示第6圖中當高直流電壓為⑽ 時輸出端,點DO,及D0B,之輸出電壓的量測波形及其相對 應的頻譜圖。由圖中可清楚地發現,其收斂的情形亦同樣 明顯地改善。 •田上述本發明之實施例可知,應用此直流馬達之驅動 电路可同時包含定電流驅動以及定電屡驅動的優點,不僅 21 200847614 可減低馬達所造成的噪音,並適合於高轉速、高電流之 達的應用。 机馬 雖然本發明已以實施例揭露如上,然其並非用以限定 本發明,任何所屬技術領域中具有通常知識者,在不脫^ 本發明之精神和範圍内,當可作各種之更動與潤飾,因此 本發明之保護範圍當視後附之申請專利範圍所界定者為 【圖式簡單說明】 处為讓本發明之上述和其他目的、特徵、優點與實施例 能更明顯易懂,所附圖式之詳細說明如下: 第1A圖係繪示傳統利用定電壓輸出的驅動電路。 第1B圖係繪示直流電壓源以及輸出端點D〇及d〇b 之輪出電壓的量測波形圖。 第1C圖係繪示輸出端點D〇及d〇B之輸出電壓的量 /則波形及其相對應的頻譜圖。 第2圖係繪示習知利用定電流輸出的驅動電路。 。第3圖係繪示依照本發明一第一實施例之直流馬達之 1區動電路的示意圖。 第4圖,係繪示依照本發明一第二實施例之直流馬達 之驅動電路的示意圖。 第5圖’係繪示第3圖中積體電路晶片内部的電路方 塊示意圖。 第6圖係繪示依照本發明實施例之1C晶片的内部驅動 22 200847614 電路與外部電路連接的示意圖。 第7圖係繪示依照本發明一第三實施例之直流馬達之 驅動電路的示意圖。 第8圖係繪示依照本發明一第四實施例之直流馬達之 驅動,路包含轉速頻率偵測信號產生電路的示意圖。 第9圖係繪示第8圖中輸出端點D〇’及D〇B,之電壓以 及轉速頻率偵測信號的量測波形圖。 第10圖係繪示依照本發明一第五實施例之直流馬達之 驅動電路包含轉速頻㈣測信號產生電路的示意圖。 第11圖係繪示依照本發明一第六實施例之直流馬達之 驅動電路包含PWM控制電路的示意圖。 第12圖係繪讀照本發明一第七實施例之直流馬達之 驅動電路包含PWM控制電路的示意圖。 第13圖係!會示依照本發明一第八實施例之直流馬達之 驅動電路包含轉速頻率偵測信號產生電路以及pwM控制 電路的示意圖。 第14圖係繪示依照本發明另一實施例之ic晶片的内 部驅動電路與外部電路連接的示意圖。 第15圖係繪示依照本發明又—實施例之1(:晶片的内 部驅動電路與外部電路連接的示意圖。 第16圖係繪示帛6圖的驅動電路中電晶㈣⑽及q麵 之集極端的電流隨時間之部分波形的示意圖。 第17圖係繪示第6圖中當高直流電壓為i2v時直流電 麼源以及輸出端點DO,及DOB,之輸出電壓的量測波形 圖〇 23 200847614 第18圖,係繪示第6圖中當高直流電壓為12V時輸出 端點DO’及DOB’之輸出電壓的量測波形及其相對應的頻 譜圖。 第19圖係繪示第6圖中當高直流電壓為24V時直流電 壓源以及輸出端點DO’及DOB’之輸出電壓的量測波形 圖。 第20圖,係繪示第6圖中當高直流電壓為24V時輸出 端點DO’及DOB’之輸出電壓的量測波形及其相對應的頻 譜圖。 【主要元件符號說明】 100、200、300、300a〜300i :驅動電路 302、302a、302b、303 :積體電路晶片 Q1〜Q7、Qdo、Qdob、Qa〜Qe:雙極接面電晶體 24Please refer to Fig. 17, which is a measurement waveform diagram of the output voltage of the DC voltage source and the terminal terminals D〇 and D〇B when the high DC voltage is 12V in Fig. 6. It can be clearly seen from the figure that the back electromotive force that may have been generated almost no longer exists, and the DC voltage source is no longer interfered by any power mulberry. The noise problem that the motor may cause has been solved. Please refer to Fig. 18, which shows the measurement waveform of the output voltages of the output terminals DO and D〇B when the high DC voltage is 12v, and the corresponding spectrum diagram. It can be clearly seen from the figure that the ratio of the even-numbered frequencies has been reduced, and the odd-numbered frequencies are almost negligible after a certain multiple (e.g., 9 times), and the convergence thereof is remarkably improved. Please refer to Figure 19 for the measurement waveform of the output voltage of the DC voltage source and the terminal DO and the DOB when the high DC voltage is 24V in Figure 6. It can be clearly seen from the figure that when the DC voltage is increased for driving, the output voltage waveforms of the output terminals D〇' and D〇B are still quite C疋 and the DC voltage source is not interfered by any power supply noise. This also does not have a yoke voltage value that is not too large for this driver circuit. Referring to Fig. 20, the measurement waveform of the output voltage of the output terminal, the point DO, and the D0B when the high DC voltage is (10) in Fig. 6 and the corresponding spectrum diagram are shown. It can be clearly seen from the figure that the convergence is also significantly improved. According to the embodiment of the present invention, the driving circuit using the DC motor can simultaneously include the advantages of constant current driving and constant power driving, and not only 21 200847614 can reduce the noise caused by the motor, and is suitable for high speed and high current. The application of the. Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any person skilled in the art can make various changes without departing from the spirit and scope of the invention. The above and other objects, features, advantages and embodiments of the present invention will become more apparent and understood by the appended claims. The detailed description of the drawings is as follows: Fig. 1A shows a conventional driving circuit using a constant voltage output. Figure 1B shows a measurement waveform of the DC voltage source and the output voltages of the output terminals D〇 and d〇b. Figure 1C shows the output/voltage waveforms of the output terminals D〇 and d〇B and their corresponding spectrums. Fig. 2 is a diagram showing a conventional driving circuit using a constant current output. . Fig. 3 is a view showing a zone 1 dynamic circuit of a direct current motor according to a first embodiment of the present invention. Fig. 4 is a view showing a driving circuit of a direct current motor according to a second embodiment of the present invention. Fig. 5 is a schematic view showing the circuit block inside the integrated circuit wafer in Fig. 3. Figure 6 is a schematic diagram showing the internal driving of a 1C wafer in accordance with an embodiment of the present invention. Fig. 7 is a view showing a driving circuit of a direct current motor according to a third embodiment of the present invention. Figure 8 is a schematic diagram showing the driving of a DC motor according to a fourth embodiment of the present invention, the circuit including a rotational frequency detecting signal generating circuit. Fig. 9 is a graph showing the measurement waveforms of the voltages of the output terminals D〇' and D〇B, and the rotational frequency detection signals in Fig. 8. Fig. 10 is a view showing a driving circuit of a DC motor according to a fifth embodiment of the present invention comprising a rotational frequency (four) measuring signal generating circuit. Figure 11 is a diagram showing a drive circuit of a DC motor according to a sixth embodiment of the present invention including a PWM control circuit. Figure 12 is a schematic diagram showing the driving circuit of a DC motor according to a seventh embodiment of the present invention including a PWM control circuit. Fig. 13 is a view showing a drive circuit of a DC motor according to an eighth embodiment of the present invention, which includes a rotational speed frequency detecting signal generating circuit and a pwM control circuit. Figure 14 is a diagram showing the connection of an internal driving circuit of an ic chip to an external circuit in accordance with another embodiment of the present invention. Figure 15 is a schematic view showing the connection between the internal driving circuit of the wafer and the external circuit in accordance with the present invention. Figure 16 is a diagram showing the set of electro-crystal (4) (10) and q-plane in the driving circuit of Figure 6 Schematic diagram of the waveform of the extreme current over time. Figure 17 shows the measurement waveform of the output voltage of the DC source and the output terminal DO and DOB when the high DC voltage is i2v in Figure 6. 200847614 Figure 18 is a diagram showing the measured waveforms of the output voltages of the output terminals DO' and DOB' when the high DC voltage is 12V in Fig. 6 and its corresponding spectrum diagram. Figure 19 shows the sixth picture. In the figure, when the high DC voltage is 24V, the DC voltage source and the output voltages of the output terminals DO' and DOB' are measured. Fig. 20 shows the output when the high DC voltage is 24V in Fig. 6. The measured waveforms of the output voltages of the points DO' and DOB' and their corresponding spectrograms. [Description of main components] 100, 200, 300, 300a to 300i: drive circuits 302, 302a, 302b, 303: integrated circuits Wafers Q1 to Q7, Qdo, Qdob, Qa~Qe: Bipolar junction transistor 24

Claims (1)

200847614 十、申請專利範圍: 人一種直流馬達之定電流定電壓驅動電路,該直流馬 磁二:第一磁性線圈以及一第二磁性線圈,其中該第-=圈ί有一第-端點以及-第二端點,該第二磁性線 ’、#二端點以及一第四端點,且該第二端點以及該 弟㈣點均電性耦接於H考„,該驅㈣路包含: 一穑艘 Φ 2々日 U . n Λ.Α- _ 晶片輸出端; Γ -第-開關,具有-第一控制端、一第五端點一 :六端,’其中該第_控制端係電性輕接於該積體電路晶 之该第一晶片輸出端,該第五端點係電性耦接於一第二 參考電壓,該第六端點係電性轉接於該第_磁性線圈之該 第一端點;以及 #山第二開關,具有一第二控制端、一第七端點以及一 弟端點,其中该第二控制端係電性耦接於該積體電路晶 片之該第二晶片輸出端,該第七端點係電性耦接於該第二200847614 X. Patent application scope: A constant current constant voltage driving circuit for a DC motor, the DC magnetic field 2: a first magnetic coil and a second magnetic coil, wherein the first -= circle ί has a first-end point and - a second end point, the second magnetic line ', the two end points, and a fourth end point, and the second end point and the fourth (four) point are electrically coupled to the H test, the drive (four) way includes: A Φ 2々日 U. n Λ.Α- _ chip output; Γ - first switch, with - first control end, a fifth end one: six end, 'where the first _ control end Electrically lightly connected to the first chip output end of the integrated circuit crystal, the fifth end point is electrically coupled to a second reference voltage, and the sixth end point is electrically coupled to the first magnetic field The first end of the coil; and the second switch of the mountain, having a second control end, a seventh end point, and a second end point, wherein the second control end is electrically coupled to the integrated circuit chip The second chip output end is electrically coupled to the second end 積體電路晶片,具有一第一曰山山 /、力 乐日日片輸出端以及 第 f考電壓’該第八端點係電性耦接於該第二磁性線圈之該 第三端點; ^八中。亥第一開關以及該第二開關係根據分別流經該 ::晶片輪出端以及該第二晶片輸出端之一第一電流以及 -第二電流而於不同時間開啟,藉以分別驅動該第一磁性 ί S以及該第二磁性線圈’丨中該第-電流或該第二電流 貝貝上係為-^值,而該第—磁性線圈以及該第二磁性線 圈則係分料不同時間根據該第—開關以及該第二開關各 別所產生之一定電壓來驅動。 25 200847614 T續寻利槌圍第1項所述 一開關係為-第—ΡΝΡ型雙極接面電晶體=第其中該第 為-第二PNP型雙極接面電晶體,—二弟-開關係 面電晶體以及該第二PNP型雙極而二s P型雙極接 電路晶片分別於不同時„啟而據該積體 用以將該第-電流以及該第二電::大飽和區二:並分別 =電?:五端點及該第六端點分別為該第 面電晶體之基極姓、私托山 又極接 Γ ^一端及集極端,該第二控制端、# 弟七知點及該第八端點分別為祕 δχ 體之基極端、射極端及集2以—清型雙極接面電晶 -門請專利範㈣1項所述之驅動電路,其中該第 為::ΡΝ型雙極接面電晶體,該第二開_ 接面電晶體以及該第- NPNH弟一 νρν型雙極 體電路4分別於不同時„啟^作於飽和區中, !用以將該第一電流以及該第二電流放大,而該第一控制 I該第五端點及該第六端點分別為該第—ΝΡΝ型雙極接 =電晶體之基極端、射極端及集極端,該第二控制端、該 :七端點及該第八端點分別為該第二ΝΡΝ型雙極接面電晶 體之基極端、射極端及集極端。 •如申明專利範圍第1項所述之驅動電路,更包含: 一第一電阻,電性耦接於該積體電路晶片之該第一晶 片輸出端以及該第-開關之該第一控制端之間;以及 26 200847614 二::該第二晶 •々如申睛專利範圍帛1項所述之驅動電路,更包含 第電谷,電性耦接於該第一開關之該第六端點 -弟二電容,電性耦接於該第二開關之該第八端點The integrated circuit chip has a first 曰山山,, a lyrics output terminal, and a f-th voltage, the eighth end is electrically coupled to the third end of the second magnetic coil; ^ Eight. The first switch and the second open relationship are respectively turned on at different times according to a first current and a second current flowing through the wafer rounding end and the second wafer output end respectively, thereby driving the first The magnetic ί S and the second current coil '丨 of the first current or the second current of the babe are -^ value, and the first magnetic coil and the second magnetic coil are divided into different times according to the The first switch and the second switch are each driven by a certain voltage generated by the second switch. 25 200847614 T Continued to find the first open relationship of the first item of the 槌 槌 为 - 第 第 第 第 第 第 第 = = = = = = = = 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二The open-faced transistor and the second PNP-type bipolar and two-s P-type bipolar-connected circuit wafers are respectively turned on according to the integrated body for the first current and the second current:: Zone 2: and ======================================================================================== The seventh point and the eighth end point are respectively the driving circuit of the base of the δ χ body, the emitter end, and the set 2 of the clear type bipolar junction electro-crystal-gate patent (4), wherein the The:: ΡΝ-type bipolar junction transistor, the second open-junction transistor and the first-NPNH- νρν-type bipolar circuit 4 are respectively in the saturation region, The first current and the second current are amplified, and the fifth end point and the sixth end point of the first control I are respectively the first-type bipolar connection=electric crystal The base terminal, the emitter terminal and the collector terminal, the second control terminal, the seven-end terminal and the eighth terminal are respectively a base terminal, an emitter terminal and a collector terminal of the second die-type bipolar junction transistor . The driving circuit of the first aspect of the invention, further comprising: a first resistor electrically coupled to the first chip output end of the integrated circuit chip and the first control end of the first switch And the driving circuit of the second crystal, such as the application of the second aspect of the invention, further comprising a first valley, electrically coupled to the sixth end of the first switch a second capacitor electrically coupled to the eighth end of the second switch 6·如申請專利範圍第 動電路更包含: 5項所述之驅動電路,其中該驅 月二第三電阻,電性耦接於該第-開關之該第六端點以 及該弟一電容之間;以及 :第四電阻’電性耦接於該第二開關之該第八端點以 及該弟二電容之間。 7·如申請專利範圍第1項所述之驅動電路,更包含: 々一第三NPN型雙極接面電晶體,具有一第三控制端、 =第九端點以及一第十端點,該第三控制端係電性耦接於 該第二開關之該第八端點以及該第二磁性線圈之該第三端 點,该第九端點係用以輸出一電壓偵測信號,該第十端點 係電性耦接於該第一參考電壓,且該第三控制端、該第九 端點及該第十端點分別為該第三NPN型雙極接面電晶體之 基極端、集極端及射極端;以及 一第五電阻,電性耦接於該第三NPN型雙極接面電晶 體之違第二控制端以及該第二開關之該第八端點之間。 27 200847614 8·如巾請專圍第7項所述之驅動電路,i中該電 制唬係為-馬達轉速頻率偵測信號。 二、如丄申明專利範圍第7項所述之驅動電路,更包含: 弟電阻,電性麵接於該第一 及該第-電容之m _之該弟六端點以 C 及^第=阻’電性論於該第二開關之該第 以 及該弟一電容之間。 •如申咕專利範圍第1項所述之驅動電路,更包含: 一笛::四PNP型雙極接面電晶體’具有一第四控制端、· 以接# 1點以及-第十"端點,其中該第吨制端係用 該第-央脈衝寬度調變信號,該第十一端點係電性耦接於 人$彳電壓’該第十二端點係電性輕接於該第-開關 =該^控制端,且該第时制、該第十—端點及該第 一&點分別為該第四PNP型雙極接面電晶體之基 射極端及集極端。 11 ·如申請專利範圍第丨項所述之驅動電路,更包含: 一奸—第五PNP型雙極接面電日日日體,具有—第五控制端3、 2十三端點以及一第十四端點,其中該第五控制端係用 、收:第一脈衝寬度調變信號,該第十三端點係電性耦 δ亥第二參考電壓’該第十四端點係電性輕接於該第一 幵m之該第一控制端以及該積體電路晶片之該第一晶片輸 28 200847614 出端;以及 :第六ΡΝΡ型雙極接面電晶體,具有—第六控制 以接收-第二脈衝寬度調變= =二參考電壓,該第十六端點 =該第二控制端以及該積體電路晶片之該第二晶片輸 Ο 別為ίΓ㈣五㈣端、㈣十三端黯該第切端點分 極端…ΡΝΡ型雙極接面電晶體之基極端、射極端及集 別為=1以六控難、該第十五端點及㈣十六端點分 極端’、ΡΝΡ型雙極接面電晶體之基極端、射極端及集 ^如申請專利範圍第^項所述之驅動電路,更包含: 一―第七ΡΝΡ型雙極接面電晶體,具有_第七控制端、 ^弟十七端點以及-第十八端點,其中該第七控制端係電 抹輕接於該第m該第二控制端、該第六清型雙極 曰電曰曰體之該第十六端點以及該積體電路晶片之該第二 曰曰片輪,端’该第十七端點係電性純於該第二參考電壓; 一#第人ΝΡΝ型雙極接面電晶體,具有_第人控制端、 ,十九端點以及-第二十端點,其中該第人控制端係電 、=接於該第七開關之該第十人端點,該第十九端點係用 乂 =出t壓债測信號,該第二十端點係電性輛接於該第 一參考電壓; 第八電阻,電性耦接於該第七pNp型雙極接面電晶 29 200847614 弟七控制端以及該積體電路晶片之該第二晶片輪出 蝠之間;以及 =弟九電阻,電性輕接於該第七PNP型雙極接面電晶 ,之該第十八端點以及該第八職型雙極接面電晶體^ 弟八控制端之間; ^ 其中该第七控制端、該第十七端點及該第十八端 ::該第七PNP型雙極接面電晶體之基極端、射極端及隼 別該第人控制端、該第十九端點及該第二十端點分 ^弟ΝΡΝ型雙極接面電晶體之基極端、集極端及射 ”13·如申請專利範圍第12項所述之驅動電路,其中該 電C偵縣遽係為_馬達轉速頻率彳貞測信號。 I4·如申請專利範圍第1項所述之驅動電路,盆中該 積體電路晶片中更包含: ’、β 一磁性感測元件,用則貞測該直流馬達轉動時所產生 之磁場變化,並輪出一感測信號; 、 控制電路,電性輕接於該磁性感測元件,並接收該 感測《以輸出相對應之至少一控制信號;以及 驅動電路,電性耦接於該控制電路,並接收該控制 信號以輪出相對應之至少一驅動信號。 I5·如申睛專利範圍第1項所述之驅動電路,其中該 積體電路晶片中更包含: 30 200847614 -第九開關’具有-第九控制端、—第二十 及一第二十二端點,其中該第二十—端點係為該第一晶 輸出端; -第十開關’具有一第十控制端、—第二十三端點以 及-第二十四端點,其中該第二十三端點係為該第二晶片 輸出端;以及The driving circuit of the fifth aspect of the invention includes: the driving circuit of the fifth item, wherein the third resistor of the second month is electrically coupled to the sixth end of the first switch and the capacitor And the fourth resistor is electrically coupled between the eighth end of the second switch and the second capacitor. 7. The driving circuit of claim 1, further comprising: a third NPN type bipolar junction transistor having a third control end, a ninth end point, and a tenth end point, The third control terminal is electrically coupled to the eighth end of the second switch and the third end of the second magnetic coil, the ninth end is configured to output a voltage detection signal, The tenth end point is electrically coupled to the first reference voltage, and the third control end, the ninth end point, and the tenth end point are respectively base ends of the third NPN type bipolar junction transistor And a fifth resistor electrically coupled between the second control terminal of the third NPN-type bipolar junction transistor and the eighth terminal of the second switch. 27 200847614 8·If you want to cover the driving circuit described in item 7, the electric system is the motor speed frequency detection signal. 2. The driving circuit as described in claim 7 of the patent scope, further comprising: a resistor, the electrical surface being connected to the first and the first capacitor - m _ of the six-terminal end with C and ^ = The resistance is based on the first of the second switch and the capacitor. • The drive circuit as described in claim 1 of the patent scope further includes: a flute:: four PNP-type bipolar junction transistor 'has a fourth control terminal, · connects # 1 point and - tenth & quot An end point, wherein the first ton end uses the first-phase pulse width modulation signal, and the eleventh end point is electrically coupled to the human 彳 voltage 'the twelfth end point is electrically connected The first switch = the control terminal, and the tenth time, the tenth end point, and the first & point are respectively a base emitter extreme and a set terminal of the fourth PNP type bipolar junction transistor . 11 · The driving circuit as described in the scope of application for the patent scope includes: a rape-five-type PNP-type bipolar junction electric day and day body, having - fifth control end 3, 23 end point and one a fourteenth end point, wherein the fifth control end uses: a first pulse width modulation signal, the thirteenth end point is electrically coupled to a second reference voltage of the fourth threshold The first control terminal of the first 幵m and the first chip transmission 28 200847614 of the integrated circuit chip; and: a sixth ΡΝΡ type bipolar junction transistor having a sixth control Receiving - second pulse width modulation == two reference voltages, the sixteenth endpoint = the second control terminal and the second chip of the integrated circuit chip are Γ (four) five (four) end, (four) thirteen The end point of the end point is divided into extremes... the base end of the 双-type bipolar junction transistor, the emitter end and the set are =1 to six control difficulties, the fifteenth end point and (four) sixteen end points are extreme ', The base terminal, the emitter end and the set of the 双-type bipolar junction transistor, such as the driving circuit described in the patent application scope , further comprising: a “seventh-type bipolar junction transistor having a seventh control terminal, a seventeenth terminal, and an eighteenth terminal, wherein the seventh control terminal is electrically connected to the light The mth second control end, the sixteenth end of the sixth clear bipolar neodymium body, and the second buck wheel of the integrated circuit chip, the end of the seventeenth end The point system is electrically pure to the second reference voltage; a #1 person ΝΡΝ type bipolar junction transistor having a _ first control end, a nineteen end point, and a twentieth end point, wherein the first person controls The end system is connected to the tenth end of the seventh switch, and the nineteenth end point is connected to the t-pressing debt signal, and the twentieth end point is electrically connected to the first a reference voltage; an eighth resistor electrically coupled to the seventh pNp-type bipolar junction transistor 29 200847614, the seventh control terminal and the second wafer wheel of the integrated circuit chip are between the bats; Nine resistors, electrically connected to the seventh PNP type bipolar junction crystal, the eighteenth end point and the eighth type bipolar junction transistor ^ Between the ends; ^ wherein the seventh control end, the seventeenth end point, and the eighteenth end:: the base end of the seventh PNP type bipolar junction transistor, the emitter end, and the first person control The terminal end, the nineteenth end point, and the twentieth end point of the dipole-type bipolar junction transistor base end, the collector terminal and the shot "13", as described in claim 12, the driving circuit, The electric C Detective 遽 is the _ motor speed frequency speculation signal. I4 · The driving circuit described in claim 1 of the patent scope, the integrated circuit chip in the basin further contains: ', β a magnetic sexy The measuring component is used to measure the change of the magnetic field generated when the DC motor rotates, and rotates a sensing signal; and the control circuit is electrically connected to the magnetic sensing component and receives the sensing "to correspond to the output" At least one control signal; and a driving circuit electrically coupled to the control circuit and receiving the control signal to rotate the corresponding at least one driving signal. I5. The driving circuit of claim 1, wherein the integrated circuit chip further comprises: 30 200847614 - the ninth switch 'has a ninth control terminal, - a twentieth and a twenty-second An endpoint, wherein the twentieth-end is the first crystal output; the tenth switch has a tenth control end, a twenty-third end point, and a twenty-fourth end point, wherein the a twenty-third end point is the second chip output; 一定電流源,提供一定電流,並具有一第二十五端點 以:一第二十六端點,纟中該第二十五端點係電性耦接於 該第九開關之該第二十二端點以及該第十開關之該第二十 四端點’該第二十六端點係電性耦接於該第—參考電壓。 ^ I6·如申請專利範圍第15項所述之驅動電路,其中該 第九開關係為一第九NPN型雙極接面電晶體,且該第九控 制端係用以接收一第一控制電壓信號,該第一控制電壓信 號使得該第九NPN型雙極接面電晶體工作於主動區或截: 區:’該第十開關係為—第十刪型雙極接面電晶體,且 忒第十控制端係用以接收一第二控制電壓信號,該第二控 制电壓㈣使得該第十NPN型雙極接面電晶體工作於主動 區或截止區中’且该第九控制端、該第二十一端點及該第 =十一端點分別為該第九NPN型雙極接面電晶體之基極 端二集極端及射極端,該第十控制端、該第三十三端點及 省第一十四端點分別為該第十NpN型雙極接面電晶體之基 極端、集極端及射極端。 17·如申凊專利範圍第15項所述之驅動電路,其中該 31 200847614 疋電流源包含: 一第十一 NPN型雙極接面電晶體,該第十一 NPN型 雙極接面電晶體具有一第十一控制端用以接收一偏壓使得 該第十一 NPN型雙極接面電晶體工作於主動區中並提供一 疋電流’且該第十一控制端、該第二十五端點及該第二十 六端點分別為該第十一 NPN型雙極接面電晶體之基極端、 集極端及射極端。 18·如申請專利範圍第ι5項所述之驅動電路,其中該 積體電路晶片中更包含: 端、一第二十七端點以及一第二十八端點,其中該第十二 控制端係用以接收一第三控制電壓信號,該第二十八端點 一第十二NPN型雙極接面電晶體,具有一第十二控制 參考電壓以及該第九開關之該第九控 係電性耦接於該第一 制端;以及 第十二NPN型雙極接面電晶體,具有一第十三控制 一第四控制電壓信號,該第三十端點係電 參考電壓以及該第十開關之該第十控制 端、一第二十九端點以及一第三十端點,其中該第十三 制端係用以掊你一 ^ ~ 性耦接於該第一 端;a certain current source, providing a certain current, and having a twenty-fifth end point to: a twenty-sixth end point, wherein the twenty-fifth end point is electrically coupled to the second end of the ninth switch The twelve-terminal end point and the twenty-fourth end point of the tenth switch are electrically coupled to the first reference voltage. The driving circuit of claim 15, wherein the ninth open relationship is a ninth NPN type bipolar junction transistor, and the ninth control terminal is configured to receive a first control voltage a signal, the first control voltage signal causes the ninth NPN-type bipolar junction transistor to operate in an active region or a section: a region: the tenth open relationship is a tenth deleted bipolar junction transistor, and The tenth control terminal is configured to receive a second control voltage signal, wherein the fourth control voltage (4) causes the tenth NPN type bipolar junction transistor to operate in the active region or the cutoff region, and the ninth control terminal, the The twenty-first end point and the eleventh end point are respectively a base extreme two set extreme and an emitter extreme of the ninth NPN type bipolar junction transistor, and the tenth control end and the thirteenth end point And the first fourteen endpoints of the province are the base extreme, the collector extreme and the emitter extreme of the tenth NpN-type bipolar junction transistor, respectively. 17. The driving circuit of claim 15, wherein the 31 200847614 疋 current source comprises: an eleventh NPN type bipolar junction transistor, the eleventh NPN type bipolar junction transistor Having an eleventh control terminal for receiving a bias voltage such that the eleventh NPN-type bipolar junction transistor operates in the active region and provides a current “and the eleventh control terminal and the twenty-fifth terminal The point and the twenty-sixth end point are respectively a base terminal, a collector terminal and an emitter terminal of the eleventh NPN type bipolar junction transistor. The driving circuit of claim 1 , wherein the integrated circuit chip further comprises: an end, a twenty-seventh end point, and a twenty-eighth end point, wherein the twelfth control end For receiving a third control voltage signal, the twenty-eighth terminal-twelfth NPN type bipolar junction transistor has a twelfth control reference voltage and the ninth control system of the ninth switch Electrically coupled to the first terminal; and a twelfth NPN-type bipolar junction transistor having a thirteenth control-fourth control voltage signal, the thirtieth end point is an electrical reference voltage and the first a tenth control end, a twenty-nine end point, and a thirtieth end of the ten switch, wherein the thirteenth end is configured to be coupled to the first end; 32 200847614 集極端及射極端 19.如申請專利範圍第18項所述之驅動電路,复中該 =十二卿型雙極接面電晶體以及該第十三NPN型雔^ 接面電晶體之集極端係分別透過電阻電⑽接於 J 考電壓。 、罘二翏 Ο 2〇.如申請專利範圍第18項所述之驅動電路,更包含. 端、一^:麵型雙極接面電晶體,具有—第十四控制 鳊一第二十一端點以及一第三十二端點 J制端係電性麵接於一第三參考電壓,該第三十」= 於該第二參考電壓’該第三十二端點係電性輕接 ^型雙極接面電晶體之集極端以及該第十三 n雙轉面電晶體之集極端,且該第十四控制端、該 -k點及該第三十二端點分別為該第十四職型錐 極接面電晶體之基極端、集極端及射極端。 又 ^Ι1· μ請專利範㈣1項所述之驅動電路,其中該 :人::晶片係採用四腳位單列直插式封裝,且該些腳位 :二::一晶片輸出端、該第二晶片輸出端、用以電性麵 =該弟二參考電壓之一第三晶片輸出端,以及用以電性 搞接於該第—參考電壓之—第四晶片輸出端。 驅動2電申請專利範圍第1項所述之驅動電路,其中該 — 路係用以驅動一直流無刷式風扇馬達。 3332 200847614 Set extreme and extremes 19. According to the driver circuit described in claim 18, the zhongzhong=12 Qing type bipolar junction transistor and the thirteenth NPN type 雔^ junction transistor The set extremes are connected to the J test voltage through the resistor (10).罘二翏Ο 2〇. The driving circuit described in claim 18, further includes: a terminal, a ^: surface type bipolar junction transistor, having - fourteenth control one twenty one eleven The end point and a thirty-two end point J-terminal end are electrically connected to a third reference voltage, and the thirty-sixth== the second reference voltage 'the thirty-second end point is electrically connected The set extreme of the ^-type bipolar junction transistor and the collector extreme of the thirteenth n-double-turned transistor, and the fourteenth control terminal, the -k point, and the thirty-second endpoint are respectively The base of the fourteen-type tapered pole junction transistor, the extreme set and the extreme. Further, the driving circuit described in the first paragraph of the patent model (4), wherein: the person:: the chip is a four-pin single-in-line package, and the feet: two:: a chip output, the first The output end of the second chip, the third chip output end for the electrical surface=the second reference voltage, and the fourth chip output end for electrically connecting to the first reference voltage. The driving circuit described in claim 1 is applied to drive the electric motor, wherein the circuit is used to drive the brushless fan motor. 33
TW96119609A 2007-05-31 2007-05-31 Constant current and constant voltage driving circuit of low acoustic noise and speed controllable dcbl fan motor TWI327814B (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103633900A (en) * 2012-08-28 2014-03-12 晶致半导体股份有限公司 Brushless DC motor control device and method
TWI463787B (en) * 2012-08-21 2014-12-01 Amtek Semiconductor Co Ltd Brushless dc motor control device and method

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI811792B (en) * 2021-09-15 2023-08-11 致新科技股份有限公司 Motor controller

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI463787B (en) * 2012-08-21 2014-12-01 Amtek Semiconductor Co Ltd Brushless dc motor control device and method
CN103633900A (en) * 2012-08-28 2014-03-12 晶致半导体股份有限公司 Brushless DC motor control device and method
CN103633900B (en) * 2012-08-28 2016-03-23 晶致半导体股份有限公司 Brushless DC motor control device and method

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