TW200842967A - Method of etching nitride semiconductor - Google Patents

Method of etching nitride semiconductor Download PDF

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TW200842967A
TW200842967A TW96113277A TW96113277A TW200842967A TW 200842967 A TW200842967 A TW 200842967A TW 96113277 A TW96113277 A TW 96113277A TW 96113277 A TW96113277 A TW 96113277A TW 200842967 A TW200842967 A TW 200842967A
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layer
nitride
dielectric layer
nitride layer
semiconductor
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TW96113277A
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TWI359454B (en
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Wei-I Lee
Hsin-Hsiung Huang
Hung-Yu Zeng
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Univ Nat Chiao Tung
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Abstract

This invention forms a dielectric layer on a gallium nitride layer, and patterns of strips and dots are formed on this dielectric layer by lithographic etching and light exposure processes. The dielectric layer is used as a mask in the subsequent epitaxy lateral overgrowth of gallium nitride; a thicker layer of gallium nitride is grown on the top of the existing gallium nitride layer; the dielectric layer is removed by wet etching , and the thicker layer of gallium nitride over the dielectric layer is etched to predetermined shapes.

Description

200842967 九、發明說明: 【發明所屬之技術領域】 ,特別是一種於氮化物半導 % 本發明為一種半導體的蝕刻方法 體進行姓刻的方法。 【先前技術】 目前發光二極體(Light Emitting Device,L.E.D·)已成為 繼電晶體和雷射二極體之後,以半導體製程技術發展出具革命性 釀影響的光電產品。更值得注意的是,高亮度氮化鎵(GaN)半導體 已成為發展發光二極體之主要元件材料之一。 、故在發光二極體之製造技術中,已大量使用了傳統半導體製 造技彳^。而在半導體製造的習知技術中,乾蝕刻技術(Dry Etching) f 具有尚度離子轟擊破壞(I0I1—B〇ml3ar(jment Damage)的危險,且 於乾姓刻後不容易得到平滑表面。對於氮化鎵(GaN)發光二極體 - 之技術發展亦有不利影響。 故相對而言,濕蝕刻技術具有低度的離子轟擊破壞危險,且 成本相對來的低,使得濕飿刻技術在發光二極體技術上被大量且 0 廣泛的採用。 檢視如習知技藝中的美國專利編號第6, 355, 497號 「Removable large area,low defect density films for led and laser diode growth」發明專利,此專利是利用侧向成長法 w (Epitaxy Lateral Overgrowth ; EL0G)成長出 3 族-氮化物薄膜 • (Group瓜-nitride film),再利用化學蝕刻的方式蝕刻其中的 介電層,達到3族-氮化物薄膜與基板剝離的目的。 另檢視如習知技藝中的美國專利編號第7, 097, 920號「Group III nitride based semiconductor substrate and process for manufacture thereof」的發明專利,此專利是利用侧向成長法及 懸吊式(Pendeo Epitaxy Lateral Overgrowth; PENDE0 方式,在 5 200842967 基板剝離之目的减軸仃賴,_氮化鎵顧與藍寶石 與氮ϊίϊίί方對於—刻之融熔氫氧化鉀 半導體結構;故無法成為ί‘法形成所需之 【發明内容】 模板::二i化:ϊΐ導ίί=方法:首先於氮化錄 介電層作為後續氮化_向成長法 j p taxy Lateral 〇vergro她;EL〇G)之 屛 蝕刻介電層上方之氮化鎵化介電層移除’並 化鎵厚膜和基板㈣。猎域職讀殊雜,最後使氮 介電 ,目的;亦可她物半; 長p技術(Epitaxy Lateral 〇Ve™^^ τ λ Epitaxy Lateral 0ver™h^ pp re)基板上成長氮化鎵厚膜,再利用 使用在峨結構=在侧向成長技術之結構製程’亦可 本侧液職化鎵的選擇性 :氮化厂; 用、、的方法。而本發明亦可應用在其他化 6 200842967 合物半導體製程上。 言侧?融熔氫氧化鉀對二氧化石夕及氮化鎵厚膜的 二甘二踐了氮化錄厚膜和原始基板的剝離,已經由本發 明結果提出其機制的合理解釋及可行性。 且可化物半導體中引入空氣,增加其光取出之效率, ^^化物半導體中製造出規則排列之特殊晶面。 離,+======原始基板分 拖,可,替卷昂貴的雷射剝離設備用以製造氮化物半導體基 板除了可以減低製造成本,亦可以增加生產良率。 【實施方式】 用賊ΐ發基=理’係於氮化鎵層上成長—層介電層,再利 =:,ιΐ:: ϊ使介電層形成點狀或條狀圖形,蝕刻後,晶 刻方4二式在結?上方成長氮化鎵厚膜,並利用化學餘 x 1 ^/丨私貝方形成二角形微米隧道或特定之錐形結構。 中詳如=·—種於氮化鎵半導體進行侧的方法,其第-實施例 如第1A圖所示,本發明提供一半導體基底1〇1,一 3於半導體基底1G1表面上,—介電層103以不連續 方式,形成於弟一氮化鎵層1〇2表面上,第二氮化 、 ,==電^3與第—氮化鎵層102上,第二4鎵層⑽ 102的厚度來的厚,可稱為氮化鎵厚膜。 侧上f ΐ所示’以側邊侧方式餘去介電層⑽,由此進入 餞刻。而圖中虛線表示可能之繼續姓刻方向。 ,續如第ic ®所示,繼續以側邊侧方賴去 方之第二氮化鎵層1〇4,逐漸形成孔洞1〇5的部分。曰 7 200842967 刚,=去第二氮化鎵層 104之特定形狀。 κ形成’错以形成第二氮化鎵層 最後如第1Ε圖所示,除麥车墓雜, 102’即可以清禁臺屮筮、—土底1〇1與第一氮化鎵層 狀。 4看出弟—氮化鎵層⑽所形成之六角形立錐體形 中詳細敘述如f於氮化叙半導體進行餘刻的方法,其第二實施例 具有’半導體基底201 於半導體基底201之其他突出部分之表面t威鎵層腿形成200842967 IX. Description of the invention: [Technical field to which the invention pertains], particularly a nitride semiconducting %. The present invention is a method of etching a semiconductor etching method. [Prior Art] At present, Light Emitting Device (L.E.D.) has become a photovoltaic product and a laser diode to develop a photoelectric product with a revolutionary influence on semiconductor process technology. More notably, high-brightness gallium nitride (GaN) semiconductors have become one of the main component materials for the development of light-emitting diodes. Therefore, in the manufacturing technology of the light-emitting diode, the conventional semiconductor manufacturing technology has been widely used. In the conventional technology of semiconductor manufacturing, the dry etching technique (Dry Etching) f has the danger of ion bombardment damage (I0I1 - B〇ml3ar (jment damage), and it is not easy to obtain a smooth surface after the dry name is written. The technical development of gallium nitride (GaN) light-emitting diodes also has an adverse effect. Therefore, the wet etching technique has a low risk of ion bombardment damage, and the cost is relatively low, so that the wet etching technique is illuminated. The diode technology is widely used and widely used. In the patent of U.S. Patent No. 6,355,497, entitled "Removable large area, low defect density films for LED and laser diode growth", The patent uses a lateral growth method w (Epitaxy Lateral Overgrowth; EL0G) to grow a 3-group-nitride film (Group melon-nitride film), and then etches the dielectric layer by chemical etching to reach a group III-nitrogen. The purpose of peeling off the film from the substrate. Further, see, for example, U.S. Patent No. 7,097,920, "Metal III nitride based semiconductor substrate and process for ma Inventive patent of nufacture thereof, which uses the side-growth method and the pendant type (Pendeo Epitaxy Lateral Overgrowth; PENDE0 method, which is used for the purpose of 5 200842967 substrate stripping, _ GaN and sapphire and sapphire and nitrogen ϊ ϊ ϊ ϊ For the engraved melting of the potassium hydroxide semiconductor structure; therefore, it cannot be required for the formation of the ί' method. Template:: 二i: ϊΐ ί ίί=Method: First, the nitride dielectric layer is used as a follow-up Nitridation _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Finally, the nitrogen is dielectrically charged, and the target is half; the long p technique (Epitaxy Lateral 〇VeTM^^ τ λ Epitaxy Lateral 0verTMh^ pp re) grows a gallium nitride thick film on the substrate, and is used again.峨 structure = structural process in the lateral growth technology 'can also be selective on the side of the liquid gallium selectivity: nitriding plant; use, and the method. The invention can also be applied to other processes 6 200842967 compound semiconductor process Yanbian? Melting potassium hydroxide Xi and gallium oxide stone thick titanium nitride peeling practice Gan two thick and recording the original substrate, and it has been proposed to explain the feasibility of a reasonable mechanism by which the present invention result clear. Air is introduced into the sizable semiconductor to increase the efficiency of light extraction, and a special crystal plane which is regularly arranged is fabricated in the semiconductor semiconductor. Off, +======The original substrate is divided, and the expensive laser stripping equipment used to manufacture the nitride semiconductor substrate can reduce the manufacturing cost and increase the production yield. [Embodiment] Using a thief to make a base = 'received on a gallium nitride layer to grow a layer of dielectric layer, and then ==, ιΐ:: ϊ to form a dielectric layer into a dot or strip pattern, after etching, The crystal engraving method is formed by growing a gallium nitride thick film over the junction and forming a polygonal micro-tunnel or a specific tapered structure by using a chemical residue x 1 ^/丨. In the first embodiment, as shown in FIG. 1A, the present invention provides a semiconductor substrate 1〇1, a 3 on the surface of the semiconductor substrate 1G1, and a dielectric material. The layer 103 is formed on the surface of the gallium nitride layer 1〇2 in a discontinuous manner, the second nitride, the ==3 and the gallium nitride layer 102, and the second 4 gallium layer (10) 102 The thickness is thick and can be called a gallium nitride thick film. On the side, f ΐ is shown, leaving the dielectric layer (10) in a side-side manner, thereby entering the engraving. The dotted line in the figure indicates the possible direction of continuing the surname. Continued as shown in the first ic®, continue to form the portion of the hole 1〇5 with the second gallium nitride layer 1〇4 on the side of the side.曰 7 200842967 Just, = go to the specific shape of the second gallium nitride layer 104. κ forms 'wrong to form a second gallium nitride layer. Finally, as shown in the first figure, in addition to the wheat tomb, 102' can clear the raft, the soil bottom 1〇1 and the first gallium nitride layer . 4 seeing the hexagonal vertical pyramidal shape formed by the GaN layer (10), the method of performing the lithography of the semiconductor is described in detail, and the second embodiment has the other protrusion of the semiconductor substrate 201 on the semiconductor substrate 201. Part of the surface t-gauge layer leg formation

表面Ϊ ===嶋_—嶋細A 203B結合第一 基底2〇1产凹陷部分,第二氮化錁層 就黎〇〇見化1 豕層2〇3A,成為氮化鎵層2_之厚膜。 ^如弟2C圖所示,藉由該半導體基底2〇1之凹 乂 2〇3Β 5 204^ ? 二氮化鎵層 分已逐漸“形成第 第二f圖所示’除去半導體基底201 ’即可以清楚看出 一虱化叙層203B所形成之六角形立錐體形狀。 中詳於肢録半導體進行侧的方法,其第三實施例 首先如第3A圖所示,提供半導體基底3〇1,第一 ^成於铸體基底3〇1表面上,一介電層綱形二H2 層302表面上,其中介電層綱具有一特定空孔;^弟一統鎵 繼續如第3B圖所示,形成第二氮化鎵層3〇4於介電芦 仍如第3C圖所示,以侧邊侧方錢去介電層 ' 样 蝕刻=蝕去介電層3〇3上方之第二氮化鎵層3〇4。 且▲、、、只 最後如第3D晒示,除去半導體基底謝與第一氮化嫁層 8 200842967 第二氮化鎵層304所形成之六角形立錐體形 中詳於氮化鎵半導體進_的方法,其第四實施例 細首ίΐ第4A圖卿,提供半導縣底姻,第-氮化鎵芦 侧表面^「介^^:^不糊狀以形成於半導體基i 3形成於弟一氮化鎵層402Δ兩侧之側邊。Surface Ϊ ===嶋_—嶋 fine A 203B combines the first substrate 2〇1 to produce a concave portion, and the second tantalum nitride layer is a Lithium nitride layer 2〇3A, which becomes a gallium nitride layer 2_ Thick film. ^, as shown in Fig. 2C, by the semiconductor substrate 2〇1, the recess 2乂3Β 5 204^? the gallium nitride layer has gradually "formed the second f diagram to remove the semiconductor substrate 201" It can be clearly seen that the shape of the hexagonal vertical pyramid formed by the formation layer 203B is detailed in the method of performing the side of the semiconductor, and the third embodiment first provides the semiconductor substrate 3〇1 as shown in FIG. 3A. The first layer is formed on the surface of the casting substrate 3〇1, and a dielectric layer is formed on the surface of the two H2 layer 302, wherein the dielectric layer has a specific hole; the second layer of the gallium continues as shown in FIG. 3B. Forming the second gallium nitride layer 3〇4 in the dielectric reed as shown in FIG. 3C, and removing the dielectric layer from the side side by side etching = etching the second nitride on the dielectric layer 3〇3 The gallium layer is 3〇4, and ▲, ,, and finally only as shown in the 3D, removing the semiconductor substrate and the first nitrided layer 8 200842967, the hexagonal vertical pyramid formed by the second gallium nitride layer 304 is detailed in the nitrogen The method of the gallium semiconductor into the _, the fourth embodiment of the fine head ΐ ΐ 4A figure Qing, providing the semi-guided county, the first - GaN reed surface ^ "介 ^ ^: ^ To form a paste in a semiconductor substrate formed in i 3 Di 402Δ side of a gallium nitride layer on both sides.

夺面上弟示’第二氮化鎵層娜形成於第—氮化鎵層舰 :及"電層4G3 *面上,而第二氮化鎵層4㈣接合第-氮 化I豕層402A,並成為氮化鎵層4Q2B之厚膜。 圖所示’開始以側邊_方式進入,钕去介電層403, 逐漸姓刻弟二氮化鎵層402B,開始產生孔洞4〇4。 為完ΐίΓΓ!示’受侧部分的第二氮化鎵層逐漸形成 —最,,如第4Ε圖所示,除去半導體基底4〇1 出第二氮化鎵層402Β所形成之六角形立錐體形狀 本發明之半導體基板包括由藍寶石、碳化石夕 等材料所製成之基板。The second GaN layer is formed on the first GaN layer: and the "electric layer 4G3* surface, and the second GaN layer 4(4) is bonded to the first-nitride I 豕 layer 402A And become a thick film of the gallium nitride layer 4Q2B. The figure shown begins to enter in a side-by-side manner, and the dielectric layer 403 is removed, and the gallium nitride layer 402B is gradually formed to form a hole 4〇4. For the sake of completion, the second GaN layer is formed gradually. As shown in FIG. 4, the hexagonal vertical pyramid formed by removing the second GaN layer 402 from the semiconductor substrate 4〇1 is removed. Shape The semiconductor substrate of the present invention includes a substrate made of a material such as sapphire or carbon carbide.

302,即可以清楚看出 狀0 ’即可以清楚看 〇 、石申化鎵、或石夕 本發明氮化鎵層之形成,係以氮化鎵成長晶種,進行懸吊式 或空橋式(Air-Bridge)成長製程,並利用側向成長方式g結^冓 上方成長氮化鎵厚膜。而氮化鎵厚膜是以氫化物氣相磊^法 (Hydride Vapor Phase Epitaxy ; HVPE)、金屬有機氣相化學沉 ,法(Metal Organic Chemical Vapor Deposition; M0CVD)、或 是脈衝雷射沉積法(Pulsed Laser Deposition ; PLD)等方法, 且利用側向成長技術以長成數十微米以上之氮化鎵厚膜。其中側 向成長技術也可利用懸吊式侧向成長技術代替。而若侧向成長技 ,若用懸吊式成長技術代替,則蝕刻液會直接蝕刻具有氮極性之 氮化叙,不會先餘刻介電層。 於本發明中所形成的介電層係作為遮罩使用,其中介電質層 9 200842967 可使用二氧化石夕、氮化石夕或氧化鋅箄射料·划H , 如士i ^-一· 一 f寻材科,利用曝光、顯影、蝕 :介電 (Line Pmern)、或隨機形成之開;;哪、順條狀 Π撕 Pattern)、或隨機形成 f = Pattera)、 本發明之濕伽ij方式是以炼融㈣心:,attern) °302, that is, it can be clearly seen that the shape of 0' can clearly see the formation of gallium nitride layer of yttrium, shishen gallium, or Shi Xiben, and is grown by GaN growth crystal type, suspended or empty bridge type (Air-Bridge) grows the process and uses the lateral growth method to form a gallium nitride thick film. The gallium nitride thick film is a Hydride Vapor Phase Epitaxy (HVPE), a Metal Organic Chemical Vapor Deposition (M0CVD), or a pulsed laser deposition method ( Pulsed Laser Deposition (PLD) and other methods, and using a lateral growth technique to grow a gallium nitride thick film of several tens of microns or more. Lateral growth techniques can also be replaced by suspended lateral growth techniques. If the lateral growth technique is replaced by a suspension growth technique, the etching solution will directly etch the nitride having a nitrogen polarity without first leaving the dielectric layer. The dielectric layer formed in the present invention is used as a mask, wherein the dielectric layer 9 200842967 can use a sulphur dioxide, a nitrite or a zinc oxide sputum, and a H, such as 士i ^-一· a f-finished material, using exposure, development, etching: dielectric (Line Pmern), or randomly formed open;; which, stripped strips, or randomly formed f = Pattera), the wet gamma of the present invention The ij way is to smelt (four) heart:,attern) °

=}之=餘^氮化鎵經濕蝕刻後所形成之晶面為 翁各於厂、33一62丨等晶面群。若蝕刻反應之時間充足, Κΐίϊ可帥原絲板分麵成觸立錄化鎵制。而钱 tit使用光電化學侧(PhQt⑽奶—1)方法 運仃補助。 A、、,右使用之遮罩圖形為條狀圖形,則在蝕刻過程中會先形成三 2道’接著隧道侧壁會接合而使氮化鎵和半導體基板分離。其 :若使用之遮罩圖形為點狀或隨機開口_,則在侧過程中會 先形成六角錐,接著氮化鎵厚膜會和半導體基板分離。 以上所述僅為本發明之較佳實施例而已,並非用以限定本發 明^申請專利範圍;凡其它未脫離本發明所揭示之精神下所完成 之等效改變或修飾,均應包含在下述之申請專利範圍内。 【圖式簡單說明】 第1圖所示為本發明之第一實施方式。 第2圖所示為本發明之第二實施方式。 第3圖所示為本發明之第三實施方式。 第4圖所示為本發明之第四實施方式。 【主要元件符號說明】 101半導體基底 102第一氮化鎵層 103介電層 200842967 104第二氮化鎵層 105孔洞 201半導體基底 202凹陷部分 203A第一氮化鎵層 203B第二氮化鎵層 204孔洞部分 301半導體基底 302第一氮化鎵層 303介電層 304第二氮化鎵層 401半導體基底 402A第一氮化鎵層 402B第二氮化鎵層 403介電層 404孔洞部分=} = = ^ ^ After the wet etching of gallium nitride, the crystal face formed by Weng is in the factory, 33-62丨 and other crystal face groups. If the etching reaction time is sufficient, Κΐίϊ can be used to make the original silk plate faceted into a touch-aligned gallium system. The money tit uses the photoelectrochemical side (PhQt (10) milk-1) method to transport subsidies. A, and the mask pattern used for the right is a strip pattern, and then three or two lanes are formed in the etching process. Then, the tunnel sidewalls are joined to separate the gallium nitride from the semiconductor substrate. It is: if the mask pattern used is a dot or a random opening _, a hexagonal cone is formed in the side process, and then the gallium nitride thick film is separated from the semiconductor substrate. The above are only the preferred embodiments of the present invention, and are not intended to limit the scope of the present invention; any equivalent changes or modifications made without departing from the spirit of the present invention should be included in the following. Within the scope of the patent application. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 shows a first embodiment of the present invention. Fig. 2 shows a second embodiment of the present invention. Fig. 3 shows a third embodiment of the present invention. Fig. 4 shows a fourth embodiment of the present invention. [Main element symbol description] 101 semiconductor substrate 102 first gallium nitride layer 103 dielectric layer 200842967 104 second gallium nitride layer 105 hole 201 semiconductor substrate 202 recessed portion 203A first gallium nitride layer 203B second gallium nitride layer 204 hole portion 301 semiconductor substrate 302 first gallium nitride layer 303 dielectric layer 304 second gallium nitride layer 401 semiconductor substrate 402A first gallium nitride layer 402B second gallium nitride layer 403 dielectric layer 404 hole portion

Claims (1)

200842967 十、申請專利範圍: 1· -種於氮化解導體騎侧的方法,至少包含: 縣底’—第—氮化物層形成於該半導體基底表 ^ ’产介電層具不連續形狀以形成於該第一氮化物 s表化物層形成於該介電層與該第—氮化物層上; 以侧邊蝕刻方式蝕去該介電層; 以侧,侧方式縣該介電層上方之該第二氮化物層 一孔洞,藉以形成該第二氮化物層之特定形狀。 4200842967 X. Patent application scope: 1. The method for arranging the side of the nitriding solution conductor comprises at least: a bottom layer of the county--the nitride layer is formed on the surface of the semiconductor substrate, and the dielectric layer has a discontinuous shape to form The first nitride s epitaxial layer is formed on the dielectric layer and the first nitride layer; the dielectric layer is etched by side etching; the side of the dielectric layer is laterally and laterally The second nitride layer has a hole to form a specific shape of the second nitride layer. 4 2. 如申明專利範圍第1項所述,其中該氮 導 化鎵半導體。 3. ^申請,範Dfl項所述,其中該半導體基板至少包含由誌 貞石、碳化矽、砷化鎵及矽等材料所製成。 義 4·如申請專利範圍第1項所述,《中該氮化物層至少包含以侧向 成長方式成。 5·如申請專利範圍第1項所述,其中該介電層至少 矽、氮化矽及氧化鋅等材料。 6·如申請專利範圍第丨項所述,其中該侧邊蝕刻方式至少包含渴 姓刻。 “、、、 • 一種於氮化録半導體進行餘刻的方法,至少包含: 提供一半導體基底,該半導體基底具有一凹陷部分與 部分,一第一氮化物層形成於該半導體基底之該突出部分/表面 一第二氮化物層形成於該第一氮化物層表面上,复& 2 該半導體基底之該凹陷部分; /、中仍保留 以側邊餘刻方式蝕去該第二氮化物層,係藉由該半 之該=陷,分進入以進行蝕刻,成為一孔洞,藉以形成特 之該第二氮化物層。 y 8·如申請專利範圍第7項所述,其中該氮化物半導體至小 尸 化鎵半導體。 夕匕含氮 12 200842967 9· ^請,範圍第7項所述’其中該半導體基板至少包含由藍 貝石、奴化矽、砷化鎵及矽等材料所製成。 忉·^:^利乾圍第7項所述,其中該氮化物層至少包含以侧向 成長方式形成。 利範圍第7項所述,其中該介電層至少包含二氧化 矽、氮化矽及氧化鋅等材料。 12. =請專纖圍第7項所述’其中該側邊侧方式至少包含濕 触刻。 13. —種於氮化物半導體進行蝕刻的方法,至少包含· 面卜,底二第了氮化物層形成於該半導體基底表 有一特定空孔4狀 形成一第二氮化物層於該介電層上; 以侧邊餘刻方式姓去該介電層; 以側邊侧方式縣該介鶴上方之該第 一孔洞,藉以形成該第二氮化物層之特定形狀。 風馬 14. ,申請專利範圍第13項所述,其中該氮 氮化鎵半導體。 m 15. =請專^範圍第13項所述,其中該半導體基板至少包含由 藍貝石、奴化矽、砷化鎵及矽等材料所製成。 16·如申請專利範圍第13項所述,:i:中兮务各从β , 向成長方式形成。祉,、中叙化物層至少包含以側 Π.如申請專利細第13項所述,其中該介電層至 矽、氮化矽及氧化鋅等材料。 3 —乳化 18.tU專利範圍第13項所述,其中該側邊姓刻方式至少包含 19· 一種於氣化叙半導體進行餘刻的方法,至少包含: 提供-半導體基底’一第一氮化物層’該第一 連_狀以職於該铸體基絲面上,—介電層,該介 13 200842967 電層形成於該第一氮化鎵層之兩侧侧邊; 一第二氮化物層形成於該第一氮化物層表面上與該介 表面上; 9 以侧邊餘刻方式蝕去該介電層; ^ 以侧邊餘刻方式蝕去該第二氣化物層,成為一孔洞,藉以 成特定形狀之該第二氮化物層。 ‘ 20·如申請專利範圍第19項所述,其中該氮化物半導體至少句人 氮化鎵半導體。 3 21·如^請專利範圍第19項所述,其中該半導體基板至少包含由 藍寶石、碳化矽、砷化鎵及矽等材料所製成。 22·如申請專利範圍第19項所述,其中該氮化物層至少包 向成長方式形成。 23·如申請專利範圍第19項所述,其中該介電層至少包含二氧化 矽、氮化矽及氧化鋅等材料。 平 _ 24·如申請專利範圍第19項所述,其中該侧邊蝕刻方式 濕蝕刻。 、夕匕32. As described in claim 1, the nitrogen-conducting gallium semiconductor. 3. ^Application, as described in the paragraph Dfl, wherein the semiconductor substrate comprises at least a material such as aragonite, tantalum carbide, gallium arsenide and germanium. 4. As described in item 1 of the scope of the patent application, the nitride layer comprises at least a lateral growth. 5. The method of claim 1, wherein the dielectric layer is at least germanium, tantalum nitride, and zinc oxide. 6. As described in the scope of the patent application, wherein the side etching method includes at least a thirst. A method for performing a lithography on a nitride semiconductor includes at least: providing a semiconductor substrate having a recessed portion and a portion, a first nitride layer being formed on the protruding portion of the semiconductor substrate a surface-second nitride layer is formed on the surface of the first nitride layer, and the recessed portion of the semiconductor substrate is further removed by etching away the second nitride layer by side etching By the half of the sag, the etch is performed to form a hole, thereby forming the second nitride layer. y 8 · As described in claim 7, wherein the nitride semiconductor To the small cadaveric gallium semiconductor. Xi Xi Nitrogen 12 200842967 9 · ^ Please, the scope of the seventh item described in 'the semiconductor substrate at least contains materials such as blue stone, saponin, gallium arsenide and antimony. The method of claim 7, wherein the nitride layer comprises at least a lateral growth. The dielectric layer comprises at least cerium oxide and tantalum nitride. Zinc oxide 12. = Please refer to item 7 of the special fiber. The side side method includes at least wet contact. 13. The method of etching in a nitride semiconductor, including at least Forming a nitride layer on the semiconductor substrate having a specific void 4 forming a second nitride layer on the dielectric layer; the side layer is left over by the side of the dielectric layer; The first hole above the crane is formed to form a specific shape of the second nitride layer. Wind Horse 14. The patent application scope is described in Item 13, wherein the gallium nitride nitride semiconductor. m 15. = Please According to the scope of item 13, wherein the semiconductor substrate is made of at least materials such as lanolite, saponin, gallium arsenide and antimony. 16. As described in claim 13 of the patent application, i: Each is formed from β to a growth mode. The ruthenium, the middle-salt layer includes at least a side Π. As described in claim 13, wherein the dielectric layer is a material such as tantalum, tantalum nitride, and zinc oxide. - Emulsification of the 18.tU patent scope mentioned in item 13, wherein the side name is engraved The method comprises at least 19· a method for performing a remnant on a gasification semiconductor, comprising at least: providing a semiconductor substrate 'a first nitride layer' for the first connection to serve on the base surface of the casting body, a dielectric layer, the dielectric layer is formed on the sides of the first gallium nitride layer; a second nitride layer is formed on the surface of the first nitride layer and the intervening surface; The dielectric layer is etched away by the residual etching method; ^ the second vaporized layer is etched away by a side engraving to form a hole, thereby forming the second nitride layer of a specific shape. '20·If the patent application scope Item 19, wherein the nitride semiconductor is at least a human gallium nitride semiconductor. 3 21· As claimed in claim 19, wherein the semiconductor substrate comprises at least a material made of sapphire, tantalum carbide, gallium arsenide and germanium. 22. The method of claim 19, wherein the nitride layer is formed at least in a growth mode. 23. The method of claim 19, wherein the dielectric layer comprises at least materials such as cerium oxide, cerium nitride, and zinc oxide. Flat _ 24· As described in claim 19, wherein the side etching method is wet etching.夕匕3 1414
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Publication number Priority date Publication date Assignee Title
US8906778B2 (en) 2011-03-08 2014-12-09 National Chiao Tung University Method of semiconductor manufacturing process

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8906778B2 (en) 2011-03-08 2014-12-09 National Chiao Tung University Method of semiconductor manufacturing process

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