TW200831959A - LCD panel and array substrate and the method for forming the array substrate - Google Patents

LCD panel and array substrate and the method for forming the array substrate Download PDF

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TW200831959A
TW200831959A TW96103086A TW96103086A TW200831959A TW 200831959 A TW200831959 A TW 200831959A TW 96103086 A TW96103086 A TW 96103086A TW 96103086 A TW96103086 A TW 96103086A TW 200831959 A TW200831959 A TW 200831959A
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Taiwan
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block
array substrate
substrate
color
layer
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TW96103086A
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Chinese (zh)
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TWI327235B (en
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Chi-Hua Sheng
Wei-Chih Lien
Su-Hung Huang
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Au Optronics Corp
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Publication of TWI327235B publication Critical patent/TWI327235B/en

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Abstract

An array substrate comprises a base, a black matrix and a plurality of color layers. The black matrix is formed on the base. The black matrix is composed of a plurality of blocks and two ends of some blocks have different thickness. The plurality of color layers is disposed on the base, and each color layer is formed between two adjacent blocks and covers at least one end of the above two blocks, wherein the two ends of each block are covered by different color layer.

Description

200831959 九、發明說明: 【發明所屬之技術領域】 本發明係關於一種陣列基板,特別是關於一種具有色 阻且應用於顯示面板的陣列基板之結構。 【先前技術】 隨著顯示科技的進步,與傳統的CRT顯示器相比,薄 膜電晶體液晶顯示器(thin film transistor liquid crystal display,TFT-LCD)由於具有輕、薄、低輻射以及 體積小而不佔空間的優勢,目前已經成為顯示器市場的主 力產品,為因應液晶顯示產品的快速發展,液晶面板廠商 的產業競爭日增。 彩色濾光片(color filter,CF)是液晶顯示器中,最 重要的零組件之一,主要功能是使液晶顯示器能產生彩色 的晝面。請參照圖- A,圖中顯示了彩色濾、光片i的上視 圖,其主要元件包括了一黑色矩陣11以及黑色矩陣11定 義之隔間内的複數個色阻14。 請參照圖- B,圖- B係為圖一 A的剖面視圖。圖中 〃、、頁示了彩色濾光片1的基本結構。彩色濾光片1包括一基 底10、一黑色矩陣12、複數個色阻14及一導電層16。 、黑色矩陣12,形成於基底10上,且由複數個區塊組 成。色阻14亦形成於基底1〇上,並位於兩相鄰之區塊間, 具有紅色(R)、綠色(G)及藍色(B)三種色阻14。其中,液 晶顯示器的色彩呈現,係因為背光之白光通過純爐光片 5 200831959 1上的色阻丨4時,會分別產生紅色、綠色及藍色三種顏色, 並透過這三種顏色的組合,而構成各種色彩。而黑色矩陣 12的功能在於將紅色、綠色及藍色三種顏色色阻14隔開, 並遮住三種顏色的部分光線,避免漏光影響色度,進而提 高對比度。 然而,由於影像色度的需求不同,廠商必須將三種顏 色的色度做些調整。一般來說,當彩色濾光片丨中的色阻 14膜厚不同時,所呈現出來的色度大小也會隨之不同,膜 厚愈高的色阻14,其所呈現出來的色度愈高。因此,廠商 會依據需求,使不同顏色的色阻14具有不同的膜厚高度。 例如:欲使顯示畫面偏藍時,彩色濾光片所製作的色, 監色色阻14之膜厚高度會較紅色色阻μ及綠色色阻μ 高,而使得各色阻14間具有膜厚斷差。 上述彩色濾光片1之各色色阻間的膜厚高度差異,雖 可付合影像色度的需求,但是卻會衍生出下列問題: 一、經過色阻製程後,色阻的膜面常會有牛角(Tusn〇) 的形成,而導致膜面不均的狀況。因此,在形成色阻之後, 還會進行一平坦化步驟,對色阻的膜面進行研磨 (Polish),以去除牛角,使色阻膜面平坦化。 但疋,由於色阻之間具有膜厚斷差,導致在進行研磨 (Polish)時,只能去除膜厚高度較高的色阻之牛角,而無 法去除膜厚高度較低的色阻之牛角。故此,各色色阻間的 膜厚高度差異,將造成彩色濾光片之色阻膜面無法完全平 坦化的問題。 6 200831959 一、製作色阻之後,彩色濾光片的上表面會形成一層 導電層(ITQ)。如此—來,當彩色濾光片與薄膜電晶體陣列 基板對組的時候,才會有通電的功能。 …但是,由於各色色阻間具有膜厚高度的差異,會產生 W層不的狀況。如圖—β所示,由於藍色⑻色阻 14的膜厚高度較高,所以在鍍上導電層16的過程中,有 一侧邊無法鍍到導電層16。 二、在cell製程中,會在彩色濾光片上塗佈(⑺扣丨呢) 一層配向膜層(如:PI),接著以磨刷(rubbing)的方式進行 配向動作,使得液晶分子可細定方向傾斜排列。 蚁,由於各色色_具有膜厚高度異,將使得 配向版層上的配向不連續,而導致液晶無法_傾斜轉動。 犮是,鐘於上述習知技術中所仍然不足之處,對此提 供一實際有效咖^案,物·崎 【發明内容】 古产目的係在於改善陣職板上各色阻間膜厚 膜厚 層不連續的問題。料4—致’以避免產生導電 200831959 配向不連續的問題發生。 本發明之另—目的係在於改善_基板上各色阻間的 1 =,使得各色阻的膜厚高度—致,以提升液晶顯示 面板的製程良率。 本發明提供-種陣列基板,此陣列基板的結構包括一 基底:-黑色矩陣及複數個色阻。黑色矩陣,形成於基底 上,係由複數個區塊組成,且部份區塊之兩端具有不同的 厚度。複數個色阻,設置於基底上,且每—色阻形成於兩 相鄰之,塊間,並分別覆蓋上述兩相鄰區塊之至少—端。 其中,每一區塊之兩端分別被不同之色阻所覆蓋。 …本發明提供一種陣列基板的製造方法,步驟如下所 述·提供-基底。形成-黑色矩陣於基底上表面,里色矩 陣係由複數麵塊域,其中,部份區塊之兩端具有不同 的厚度。形成複數個色阻於基底上,每_色_形成於兩 相鄰之區塊間,且分別覆蓋上述兩相鄰區塊之至少一端, 其中母一區塊之兩端分別被不同之色阻所覆蓋。 關於本發明之優點與精神,以及更詳細的實施方式可 以藉由以下的實施方式以及所附圖式得到進一步的瞭解。 【實施方式】 •明參照圖一 A至圖二E,其係為本發明之陣列基板的 製造方法示意圖。請參照圖二A,首先提供一基底2〇,並 塗佈或沉積一材料層22a於基底20上方。其中,此材料層 22a的材料係由Cr、Cr〇、Ni等金屬或金屬化合物、樹脂 200831959 :^有機材料及原料(Plgment)所組成的 =ΓΓΓ遮住不同顏色的部分光線,避免漏光BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an array substrate, and more particularly to a structure of an array substrate having a color resistance and applied to a display panel. [Prior Art] With the advancement of display technology, thin film transistor liquid crystal display (TFT-LCD) does not occupy light, thin, low radiation and small volume compared with conventional CRT displays. The advantages of space have become the main products of the display market. In response to the rapid development of liquid crystal display products, the industry competition of LCD panel manufacturers is increasing. A color filter (CF) is one of the most important components in a liquid crystal display. Its main function is to enable a liquid crystal display to produce a colored surface. Referring to Figure-A, there is shown a top view of the color filter, light sheet i, the main components of which include a black matrix 11 and a plurality of color resists 14 in the compartment defined by the black matrix 11. Please refer to Figure-B, Figure-B is a cross-sectional view of Figure A. In the figure, the basic structure of the color filter 1 is shown in 〃 and . The color filter 1 includes a substrate 10, a black matrix 12, a plurality of color resists 14, and a conductive layer 16. A black matrix 12 is formed on the substrate 10 and is composed of a plurality of blocks. The color resist 14 is also formed on the substrate 1 and is located between two adjacent blocks, and has three color resists 14 of red (R), green (G) and blue (B). Among them, the color display of the liquid crystal display is because the white light of the backlight passes through the color resistance 丨4 on the pure furnace light sheet 5 200831959 1 , and three colors of red, green and blue are respectively generated, and through the combination of the three colors, Form a variety of colors. The function of the black matrix 12 is to separate the red, green and blue color resistors 14 and cover part of the light of the three colors to prevent the light leakage from affecting the chromaticity, thereby improving the contrast. However, due to the different requirements of image chromaticity, manufacturers must adjust the chromaticity of the three colors. In general, when the color resistance of the color filter 丨 14 is different, the chromaticity will be different. The higher the thickness of the color resist 14 , the more chromaticity it will appear. high. Therefore, the manufacturer will make the color resists 14 of different colors have different film thicknesses according to the requirements. For example, when the display screen is bluish, the color of the color filter produced by the color filter is higher than the red color resistance μ and the green color resistance μ, so that the color resistance 14 has a film thickness. difference. The difference in film thickness between the color resists of the color filter 1 described above can meet the requirements of image chromaticity, but the following problems are derived: 1. After the color resist process, the film surface of the color resist is often The formation of horns (Tusn〇), resulting in uneven film surface. Therefore, after the color resist is formed, a planarization step is performed to polish the film surface of the color resist to remove the horn and flatten the surface of the color resist film. However, due to the film thickness difference between the color resists, only the horn of the color resistance with a high film thickness can be removed during the polishing, and the horn of the color resistance with a low film thickness cannot be removed. . Therefore, the difference in film thickness between the color resists causes a problem that the color resist film surface of the color filter cannot be completely flattened. 6 200831959 1. After the color resist is formed, a conductive layer (ITQ) is formed on the upper surface of the color filter. In this way, when the color filter and the thin film transistor array substrate are paired, the power supply function is obtained. ... However, since there is a difference in film thickness between the color resists of each color, a W layer is not generated. As shown in Fig. β, since the film thickness of the blue (8) color resist 14 is high, the conductive layer 16 cannot be plated on one side during the plating of the conductive layer 16. Second, in the cell process, it will be coated on the color filter ((7) buckle layer) a layer of alignment film (such as: PI), and then rubbing (rubbing) way to make the liquid crystal molecules can be fine Tilted in a fixed direction. Ants, because of the different color _ with different film thicknesses, will cause the alignment on the alignment layer to be discontinuous, resulting in the liquid crystal not being able to tilt. Therefore, Zhong is still insufficiency in the above-mentioned conventional technology, and provides a practical and effective coffee case. The problem of layer discontinuity. Material 4 - To prevent the occurrence of electrical conduction 200831959 The problem of alignment discontinuity occurs. Another object of the present invention is to improve the 1 = between the color resists on the substrate, so that the film thickness of each color resist is increased to improve the process yield of the liquid crystal display panel. The present invention provides an array substrate having a structure comprising a substrate: a black matrix and a plurality of color resists. The black matrix, formed on the substrate, is composed of a plurality of blocks, and the ends of the partial blocks have different thicknesses. A plurality of color resists are disposed on the substrate, and each color resist is formed between two adjacent blocks, and covers at least the ends of the two adjacent blocks. Wherein, both ends of each block are respectively covered by different color resists. The present invention provides a method of fabricating an array substrate, the steps of which are as follows - providing a substrate. The black matrix is formed on the upper surface of the substrate, and the inner color matrix is composed of a plurality of surface blocks, wherein the ends of the partial blocks have different thicknesses. Forming a plurality of color resists on the substrate, each _ color _ is formed between two adjacent blocks, and covering at least one end of the two adjacent blocks respectively, wherein the two ends of the mother block are respectively different color resists Covered. The advantages and spirit of the present invention, as well as the more detailed embodiments, may be further understood by the following embodiments and the accompanying drawings. [Embodiment] FIG. 1A to FIG. 2E are schematic views showing a method of manufacturing an array substrate of the present invention. Referring to Figure 2A, a substrate 2 is first provided and a layer of material 22a is applied or deposited over the substrate 20. The material of the material layer 22a is composed of a metal or a metal compound such as Cr, Cr, or Ni, and a resin: 200831959: organic material and raw material (Plgment), which covers part of the light of different colors to avoid light leakage.

Htfp 高對比度。在較佳實施财,上述樹脂 及原枓(Pigment)係為黑色較佳。 ^著’將材料層22a圖案化而形成一矩陣於基底2〇 士 例中’矩陣以黑色矩陣舉例表示,此黑色矩 陣係由稷數健塊組成,製作過程請參照圖二b。如圖二b 所示’塗佈-光阻層62於該材料層孤上表面,接著利用 一光罩64對材料層22a進行微刻程序,以 區塊22。 其中,此光罩64係為半色調光罩(half_t〇ne廳㈡ 或多灰階光罩(multi-t〇nemask)。由於上述兩類光罩具有 不同透光率的透光區,使得所_出來的部分區塊之兩端 具有不同的厚度。 在-較佳實施例中,光罩64具有第一透光區⑽、第 二透光區64b及第三透光區64c三種透光區。透光率由小 至大依序為第-透光區64a、第二透光區64b及第三透光 區64c。曝光顯影後第一透光區64a所對應的材料層2% 全被蝕刻,第二透光區64b所對應的材料層被部分蝕 刻,第二透光區64c所對應的材料層22a亦被部分钮刻或 不姓刻’若為部分餘刻’則被餞刻程度較輕微。 因此,本實施例之區塊22具有階梯狀與矩形方塊狀兩 種型恶,如圖二C所示。相鄰之第二透光區64b與第三透 光區64c所對應形成的區塊22之兩端具有不同的厚度,且 為階梯狀。而兩端皆與第一透光區64a相鄰之第三透光區 200831959 64c所對應形成的區塊22,則為均一厚度的矩形方塊狀區 塊22 〇 請參照圖二D,形成黑色矩陣之後,接著形成複數個 色阻24於基底20上,上述色阻24包括紅色色阻(R)24、 綠色色阻(G)24及藍色色阻(B)24三種色阻,依序形成於基 底20上。 ^ 每一色阻24係形成於兩相鄰之區塊22間,且分別覆 , 述兩相鄰區塊22之至少一端,其中每一區塊22之兩 端分別被不同之色阻24所覆蓋。 在本發明實施例中,被同一色阻24所覆蓋之相鄰區塊 22之兩端具有相等的厚度。如圖二D所示,紅色色阻 0024、綠色色阻⑹24與藍色色阻⑻24所覆蓋之相鄰區 塊22之兩端具有相等的厚度。 值得注意的是,若在色度要偏藍之情況下,及膜厚高 • 度要一致的需求下,藍色色阻(B)24所覆蓋之相鄰區塊22 「之兩端具有較低的厚度。藉此,三種色阻24膜厚高度不但 相等,而且形成於陣列基板之藍色色阻(B)24具有比紅色 色阻(R)24、綠色色阻⑹24更大的體積,亦即此陣列基板 所能呈現的色度係為偏藍。 當然,亦可根據色度要偏紅或偏綠等其他需求,來★周 整特定顏色色阻24所覆蓋之相鄰區塊22之 ^ 小,以保持三種顏色色阻24之膜厚高度的均等。 也就是說,根據色度需求,不同顏色之色阻24具有不 同的體積。當所有色阻24的膜厚高度相等時,體積愈大的 200831959 色阻24所覆蓋之相鄰區塊μ之兩端具有愈低的膜厚高度。 、因此,本發明主要係利用半色調光罩(half-tonemask) ,多灰階光罩(multi-tone mask)製造出膜厚高度不同的 區塊22,藉此控制各色阻24的膜厚高度。 一般來說,本發明實施例中,上述區塊22之厚度為1 至1· 5微米。紅色色阻(R)24、綠色色阻(〇24與藍色色阻 (β)24之厚度係為1微米至2· 5微米。 凊繼續參照圖二E,當形成複數個色阻24於基底2〇 上之後’开>成一導電層26於黑色矩陣22及色阻24上,其 中上述導電層邡舉例為ΙΤ0透明導電層。接著,在ce^ 製程中,會在導電層26上塗佈(coating)—層配向膜層, 例如PI膜層,並進行後續的配向及組裝程序。 本發明之陣列基板可為一種彩色濾光片,係可應用於 色阻形成於主動元件陣列基板的對向基板上,及色阻形成 於主動元件陣列上方(GQlQr⑴細Qn ⑽)兩種 液晶顯不面板型態。 …月 > 圖一圖二係為色阻形成於主動元件陣列基板 的對向基板上之液晶顯示面板示意圖。此液晶顯示面板包 括一主動元件陣列基板、一陣列基板以及設置於主動元件 陣列基板與陣列基板之間的液晶層38。 陣列基板,設置於主動元件陣列基板之上方,陣列基 板之構造即與前述之構造相同,包括—第—基底2Q,一黑 色矩陣及複數個色阻24。 黑色矩陣形成於第一基底2〇上,且黑色矩陣係由複數 200831959 個區塊22組成,其中部分區塊22之兩端具有不同的厚度。 複數個色阻24,設置於第-基底2〇上,且每一色阻24形 成於兩相鄰之區塊22間,並分別覆蓋上述兩相鄰區塊& 之端’其中每-區塊22之兩端分別被不同之色阻24所 覆蓋。此外,陣列基板更包括—第—導電層%及一配向膜 層27,依序形成於黑色矩陣及色阻24上表面。 主動元件陣列基板包括—第二基底3Q,—主動元件陣 歹J 32 ’叹置於第二基底3〇上。一第二導電層祁及一第二 配向膜層37依序形成於主動元件陣列32上。其中,所述 主動元件陣列32舉例係為薄膜電晶體陣列。 請參照圖四,圖四係為色阻形成於主動元件陣列上方 (color filter on array,c〇A)之液晶顯示面板示意圖。 此液晶顯示面板之特徵在於,在陣列基板中具有一主動元 件陣列形成於基底的上方,且位於色阻與黑色矩陣之下方。 如圖四所示’此液晶顯示面板包括一陣列基板、一對 及—液晶層58。其中’對向基板5G係與陣列基 、口d又置。夜晶層58則設置於陣列基板與對向基板50 之間。 —陣列基板’包括—第一基底40,一主動元件陣列仙、 —黑色矩陣及複數個色阻44。 主動元件陣削8形成於第—基底4G上,主動元 4〇 8舉例係為薄膜電晶體陣列。黑色矩陣形成於第一基底 上,且黑色矩陣係由複數個區塊42組成,其中部分區 塊犯之兩端具有不同的厚度,如圖四所示。複數個色阻 12 200831959 =設置於第—基底如上,且每―色阻44軸於兩相鄰 之區塊42間’並分霞蓋上述兩相_塊42之-端,其 t母一區塊42之兩端分別被不同之色阻44所覆蓋。此外’ 列基板更包括-第—導電層46與絲元件48連接、一 平坦層49械於黑色矩陣及複數個色阻&上,及一第一 配向膜層47形成於平坦層49上。 々而對向基板50則包括一第二基底·、以及依序形成 於第-基底501上之-第二導電層5()2及一第二配向膜層 503。 、曰 在較佳實施例中,以上所述之第-基底20、40及第二 基底3Q、5G1皆為透明絕緣基底。第—導電層26、46及第 二導電層36、502皆為IT〇透明導電層。第一配向膜層27、 47及第二配向膜層π、503皆為pi膜層。 “在上述實施例中,係利用半色調光罩(half—切肪贴处) 來形成兩端膜厚高度不同的階梯狀區塊22,以控制色阻24 膜厚。然而,亦可细其他技術手段絲成兩端膜厚高度 不同的區塊22。 請參照圖五A,可利用半色調光罩(half—t〇ne贴池) 或夕灰階光罩(multi-tone mask)的設計,使部分區塊22 的一端係具有一斜邊(bevel edge)。 請參照圖五B,在形成黑色矩陣於基底2〇上表面的過 &中先塗佈或/儿積一次材料層,並藉由第'一種光罩進行 祕影钱刻程序,來形成一第一次區塊221於基底2〇上表 面。接著,再塗佈一次材料層,並藉由第二種光罩進行微 13 200831959 序’來形成一第二次區塊222於第一次區塊如 其中’上述第二次區塊2以大小係小於第一次 之小’故兩端膜厚焉度不同的區塊22亦即由第…: =221與第二次區塊222所組成,在較佳實施例中^ &塊22亦為階梯狀。而兩端膜厚高度均等的區塊2 兩種鮮的透絲設計,選紐軸第—次 221或第二次區塊222 —起形成。 鬼Htfp High contrast. Preferably, the resin and the original pigment are preferably black. The pattern of the material layer 22a is patterned to form a matrix in the substrate 2's example. The matrix is represented by a black matrix, which is composed of a number of blocks, and the manufacturing process is shown in Figure 2b. As shown in Fig. 2b, the coating-photoresist layer 62 is placed on the surface of the material layer, and then the material layer 22a is microetched by a mask 64 to block 22. Wherein, the reticle 64 is a halftone reticle (half_t〇ne hall (2) or a multi-t〇ne mask). Since the two types of reticle have different light transmissive areas, The two ends of the partial block have different thicknesses. In the preferred embodiment, the photomask 64 has three transparent regions: a first light transmitting region (10), a second light transmitting region 64b, and a third light transmitting region 64c. The light transmittance is from the smallest to the largest, the first light-transmitting region 64a, the second light-transmitting region 64b, and the third light-transmitting region 64c. After exposure and development, the material layer corresponding to the first light-transmitting region 64a is 2% Etching, the material layer corresponding to the second transparent region 64b is partially etched, and the material layer 22a corresponding to the second transparent region 64c is also partially engraved or not engraved. Therefore, the block 22 of the embodiment has two types of faults, a stepped shape and a rectangular square shape, as shown in FIG. 2C. The adjacent second light transmitting area 64b corresponds to the third light transmitting area 64c. The formed blocks 22 have different thicknesses at both ends and are stepped, and the third transparent regions 200831959 64c adjacent to the first transparent regions 64a are The formed block 22 is a rectangular block-shaped block 22 of uniform thickness. Referring to FIG. 2D, after forming a black matrix, a plurality of color resists 24 are formed on the substrate 20, and the color resist 24 includes a red color resist. (R) 24, green color resist (G) 24 and blue color resist (B) 24 three color resists are sequentially formed on the substrate 20. ^ Each color resist 24 is formed between two adjacent blocks 22, and At least one end of each of the adjacent blocks 22 is respectively covered, wherein the two ends of each block 22 are respectively covered by different color resists 24. In the embodiment of the present invention, adjacent to the same color resist 24 Both ends of the block 22 have equal thicknesses. As shown in Fig. 2D, the red color resist 0024, the green color resist (6) 24 and the adjacent blocks 22 covered by the blue color resist (8) 24 have equal thicknesses at both ends. In the case where the chromaticity is blue, and the film thickness is high, the adjacent block 22 covered by the blue color resist (B) 24 has a lower thickness at both ends. Thereby, the thickness of the three color resists 24 is not only equal, but the blue color resistance (B) 24 formed on the array substrate has a redr The color resistance (R) 24 and the green color resistance (6) 24 are larger, that is, the color of the array substrate can be bluish. Of course, depending on other requirements such as red or green color. ★ The size of the adjacent block 22 covered by the specific color resist 24 is adjusted to keep the film thickness of the three color resists 24 equal. That is, according to the chromaticity requirement, the color resists 24 of different colors have Different volumes. When the film thicknesses of all the color resists 24 are equal, the larger the volume, the lower the film thickness of the adjacent blocks μ covered by the 200831959 color resist 24. Therefore, the present invention mainly A block 22 having a different film thickness is produced by a half-tone mask and a multi-tone mask, thereby controlling the film thickness of each color resist 24. Generally, in the embodiment of the present invention, the thickness of the block 22 is 1 to 1.5 μm. The red color resist (R) 24 and the green color resist (the thickness of the 〇24 and the blue color resist (β) 24 are from 1 μm to 2.5 μm. 凊Continuing to refer to FIG. 2E, when a plurality of color resists 24 are formed on the substrate After the second layer is turned on, a conductive layer 26 is formed on the black matrix 22 and the color resist 24, wherein the conductive layer 邡 is exemplified as a 透明0 transparent conductive layer. Then, in the ce^ process, the conductive layer 26 is coated. (coating)—layer alignment film layer, such as PI film layer, and performing subsequent alignment and assembly process. The array substrate of the present invention can be a color filter, which can be applied to a pair of color resists formed on an active device array substrate. On the substrate, and the color resistance is formed on the active device array (GQlQr (1) fine Qn (10)) two kinds of liquid crystal display panel type. ... month > Figure 1 is a color resist formed on the active substrate array substrate opposite substrate The liquid crystal display panel includes an active device array substrate, an array substrate, and a liquid crystal layer 38 disposed between the active device array substrate and the array substrate. The array substrate is disposed above the active device array substrate. The structure of the array substrate is the same as the foregoing structure, including a first substrate 2Q, a black matrix and a plurality of color resistors 24. The black matrix is formed on the first substrate 2, and the black matrix is composed of a plurality of 200831959 blocks 22. The composition has a different thickness at both ends of the partial block 22. A plurality of color resists 24 are disposed on the first substrate 2, and each color resist 24 is formed between the two adjacent blocks 22, and covers the above The two adjacent blocks & the end of each of the blocks 22 are respectively covered by different color resists 24. In addition, the array substrate further includes a -first conductive layer % and an alignment film layer 27, in order Formed on the upper surface of the black matrix and the color resist 24. The active device array substrate includes a second substrate 3Q, the active device array J 32 'slanted on the second substrate 3 。. A second conductive layer 一 and a second The alignment layer 37 is sequentially formed on the active device array 32. The active device array 32 is exemplified by a thin film transistor array. Referring to FIG. 4, FIG. 4 is a color resist formed on the active device array (color filter) On array,c〇A) The liquid crystal display panel is characterized in that an array of active components in the array substrate is formed above the substrate and under the color resistance and the black matrix. As shown in FIG. 4, the liquid crystal display panel includes an array. a substrate, a pair, and a liquid crystal layer 58. The 'opposing substrate 5G is disposed with the array substrate and the port d. The night layer 58 is disposed between the array substrate and the opposite substrate 50. - The array substrate includes - A substrate 40, an active device array, a black matrix, and a plurality of color resists 44. The active device array 8 is formed on the first substrate 4G, and the active cells 4-8 are exemplified by a thin film transistor array. The black matrix is formed on the first substrate, and the black matrix is composed of a plurality of blocks 42, wherein some of the blocks have different thicknesses at both ends, as shown in FIG. A plurality of color resists 12 200831959=set on the first substrate as above, and each color resistance 44 axis is between two adjacent blocks 42' and divides the end of the two phases_block 42 to the end of the two sides. Both ends of block 42 are covered by different color resists 44, respectively. Further, the column substrate further includes a -first conductive layer 46 connected to the wire member 48, a flat layer 49 to the black matrix and a plurality of color resists & and a first alignment film layer 47 formed on the flat layer 49. The opposite substrate 50 includes a second substrate, and a second conductive layer 5() 2 and a second alignment film layer 503 which are sequentially formed on the first substrate 501. Further, in the preferred embodiment, the first substrate 20, 40 and the second substrates 3Q, 5G1 described above are transparent insulating substrates. The first conductive layers 26, 46 and the second conductive layers 36, 502 are all IT transparent conductive layers. The first alignment film layers 27, 47 and the second alignment film layers π, 503 are all pi film layers. "In the above embodiment, a half-tone mask (half-cut-in place) is used to form stepped blocks 22 having different film thicknesses at both ends to control the film thickness of the color resist 24. However, it is also fine. The technical means is to form a block 22 with different film thicknesses at both ends. Referring to Figure 5A, a half-tone mask or a multi-tone mask can be used. One end of the partial block 22 has a bevel edge. Referring to FIG. 5B, in the formation of a black matrix on the upper surface of the substrate 2, the material layer is first coated or/or accumulated. And a first mask 221 is formed on the upper surface of the substrate 2 by a masking process of the first mask. Then, the material layer is coated once and microscopically performed by the second mask. 13 200831959 The sequence 'to form a second block 222 in the first block, such as the block in which the second block 2 is smaller than the first time, so the film thickness of the two ends is different. 22, that is, consisting of: ...: 221 and the second block 222. In the preferred embodiment, the block & block 22 is also stepped. Blocks of equal height and thickness of the end film 2 are two kinds of fresh silk-through design, and the selection of the first axis 221 or the second block 222 is formed.

…-般來說,上述第-次區塊划之厚度為(微米至 斂米,區塊22之厚度為u微米至丨.5微米。 明參照圖五C ’在另-實施例中,兩端膜厚高度不同 、區塊22除了第-次區塊221與第二次區塊222之外,更 了包括-第三次區塊223。請同時參照圖五β,形成第二次 區塊222之後,再塗佈—次材料層,並藉由第三種光罩進 行微影侧程序,來形成第三次區塊223於第-次區塊221 之上表面0 /、中上述第二次區塊223之大小係小於第一次區塊 221之大小,故兩端膜厚高度不同的區塊四亦即由第一次 區=2卜第二次區塊222及第三次區塊223所組成,在 f佺貝轭例中,此區塊22亦為階梯狀。而兩端膜厚高度均 等的,塊22财娜上述三種光罩的透光區設計,選擇性 地與第-次區塊22卜第二次區塊222或第三次區塊223 一起形成。 兩端膜厚高度不同的區塊22,除了可以用來降低膜厚 14 200831959 南度較高的色阻24高度之外,亦可用來增加膜厚高度較低 的色阻24而度。請參照圖五d,在本實施例中,原本紅色 色阻(R)24與綠色色阻(G)24的膜厚高度皆高於藍色色阻 (B)24(紅色色阻(r)24與綠色色阻(g)24之體積較大)。因 此,為使藍色色阻(B)24的膜厚高度與紅色色阻(1〇24及綠 色色阻(G)24 —致,故使藍色色阻(B)24所覆蓋之相鄰區塊 22之兩端具有較高的厚度,以提高藍色色阻(B)24的膜厚 高度。 此實施例中,兩端膜厚高度不同的區塊22係為一種階 梯狀區塊22,可利用半色調光罩(haif—切ne脆冰)來形 成。或者,亦可依序形成第一次區塊221與第二次區塊222 來形成。 使各色阻膜厚高度一致的方法,除了利用兩端膜厚高 度不同的區塊來調整之外,亦可搭配使用一調整層29,此 調整層29形成於色阻與基底之間,可用來墊高色阻24的 膜厚。 請參照圖五E至圖五G,分別顯示了調整層29在陣列 基板中的位置型態。 請參照圖五E,調整層29形成於膜厚高度需增加之色 阻24與基底20之間,並位於相鄰之區塊22間。如圖所示, 原本藍色色阻(B)24之膜厚高度大於紅色色阻(r)24及綠 色色阻(G)24之膜厚咼度,但在紅色色阻(r)24與綠色色阻 (G)24下方增加了調整層29之後,便能使所有色阻高度均 等,且不影響原本之色度。 15 200831959 請參照圖五F,調整層29形成於膜厚高度需增加之色 阻24與基底20之間,且其兩端接觸到相鄰之區塊22。如 圖所示,原本藍色色阻⑻24之膜厚高度大於紅色色阻 (R)24及綠色色阻(G)24之膜厚高度,但在紅色色阻(1〇24 與、’’彔色色阻(G)24下方增加了調整層29之後,便能使所有 色阻高度均等,且不影響原本之色度。 請參照圖五G ’調整層29形成於膜厚高度需增加之色 阻24與基底20之間,且區塊22至少有部份覆蓋到調整層 29 :也就是說,部分區塊22係位於調整層29之上。如圖 所示’原本藍色色阻(B)24及綠色色阻(G)24之膜厚高度大 於紅色色阻⑻24之膜厚高度,但在紅色色阻⑻24與其相 鄰之區塊22下謂加了碰層29之後,便能使所有色阻 咼度均等,且不影響原本之色度。In general, the thickness of the first-order block is (micron to converging meters, and the thickness of block 22 is u micron to 丨.5 micrometers. See Figure 5C in another embodiment, two The height of the end film is different, and the block 22 includes the third block 223 in addition to the first block 221 and the second block 222. Please refer to FIG. 5 at the same time to form the second block. After 222, the sub-material layer is further coated, and the lithography side program is performed by the third reticle to form the third sub-block 223 on the surface 0 / / of the first sub-block 221 The size of the secondary block 223 is smaller than the size of the first block 221, so the block 4 with different film thicknesses at both ends is also the first sub-region = 2 b, the second sub-block 222 and the third sub-block. In the case of the yoke yoke, the block 22 is also stepped. The thickness of the film at both ends is equal, and the light transmissive area of the above three kinds of masks is designed to be selectively The sub-block 22 is formed by the second sub-block 222 or the third sub-block 223. The block 22 having different film thicknesses at both ends can be used to reduce the film thickness 14 200831959 In addition to the height of the resistor 24, it can also be used to increase the color resistance of the film thickness to a lower degree. Referring to Figure 5d, in the present embodiment, the original red color resist (R) 24 and green color resist (G) 24 The film thickness is higher than the blue color resistance (B) 24 (the red color resistance (r) 24 and the green color resistance (g) 24 are larger). Therefore, in order to make the blue color resistance (B) 24 film thickness The height is the same as the red color resistance (1〇24 and the green color resistance (G)24, so that the two ends of the adjacent block 22 covered by the blue color resistance (B) 24 have a higher thickness to increase the blue color. The film thickness of the resist (B) 24. In this embodiment, the block 22 having different film thicknesses at both ends is a stepped block 22 which can be formed by using a halftone mask (haif-cut brittle ice). Alternatively, the first block 221 and the second block 222 may be formed in sequence. The method for making the thickness of each color resist film uniform is adjusted by using blocks having different film thicknesses at both ends. An adjustment layer 29 can also be used, which is formed between the color resist and the substrate, and can be used to increase the film thickness of the color resist 24. Referring to FIG. 5E to FIG. 5G, the adjustment layer is respectively displayed. The position pattern in the array substrate. Referring to FIG. 5E, the adjustment layer 29 is formed between the color resist 24 and the substrate 20 which are required to be increased in film thickness, and is located between the adjacent blocks 22. The film thickness of the original blue color resistance (B) 24 is greater than the film thickness of the red color resistance (r) 24 and the green color resistance (G) 24, but in the red color resistance (r) 24 and the green color resistance (G) After adding the adjustment layer 29 under the 24, the height of all the color resists can be equalized without affecting the original chromaticity. 15 200831959 Please refer to Figure 5F, the adjustment layer 29 is formed at the film thickness height to increase the color resistance 24 and Between the substrates 20, and both ends of the substrate 20 are in contact with adjacent blocks 22. As shown in the figure, the film thickness of the original blue color resist (8) 24 is greater than the film thickness of the red color resist (R) 24 and the green color resist (G) 24, but in the red color resist (1〇24 and ''彔色色After the adjustment layer 29 is added under the resistance (G) 24, all the color resistances can be made equal, and the original chromaticity is not affected. Please refer to FIG. 5G 'the adjustment layer 29 to form a color resistance 24 which needs to be increased at the film thickness. Between the substrate 20 and the block 22 at least partially covering the adjustment layer 29: that is, the partial block 22 is located above the adjustment layer 29. As shown in the figure, 'the original blue color resistance (B) 24 and The film thickness of the green color resist (G) 24 is greater than the film thickness of the red color resist (8) 24, but after the red color resist (8) 24 and the adjacent block 22 are said to have the touch layer 29, all the color resists can be made. The degree is equal and does not affect the original color.

值得注意的是,調整層29之材料係可為氧化銦錫 化銦鋅、Ti〇2、GZ0、ZaO或。在圖五E與圖五F 施例中’罐層29與區塊22的先後形成順序並無限制;、 而在圖五F之實施例中,由於部份的區塊&位於調整層 29上方’故必須先形成調整層29後,才接著形成區塊 练上所述,本發明之技術手段可有效地調整 上各色阻之财高度,故时下珊點·· 板 一、改善_基板上各色阻_厚高度不均的問題, 以使得所有色阻之膜面經過研磨㈣剛程 的平坦化。 于^王面 -、改善陣列基板上各色阻間的膜厚斷差,使得各色 200831959 阻的膜厚高度一致,以避免產生導電層不連續的問題。 二、改善陣列基板上各色阻間的膜厚斷差,使得各色 阻的膜厚高度一致,以避免配向膜層配向不連續的問題發 生。 四、於改善陣列基板上各色阻間的膜厚斷差,使得各 色阻的膜厚高度一致,以提升液晶顯示面板的製程良率。 本發明雖以較佳實例闡明如上,然其並非用以限定本 發明精神與發明實體僅止於上述實施例爾。對熟悉此項技 術者,當可輕易了解並利用其它元件或方式來產生相同的 功效。是以,在不脫離本發明之精神與範圍内所作之修改, 均應包含在下述之申請專利範圍内。 【圖式簡單說明】 藉由以下詳細之描述結合所附圖示,將可輕易的了解 上述内容及此項發明之諸多優點,其中: 圖一 A係為彩色濾光片之上視圖; 圖一B係為彩色濾光片之剖面視圖; 圖二A至圖二E係為本發明之陣列基板的製造方法 示意圖; 圖二係為本發明液晶顯示面板之第一實施例示意 圖; 圖四係為本發明液晶顯示面板之第二實施例示意 圖; 17 200831959 圖五A係為本發明陣列基板之第-變化例; 圖五B係、為本發明陣列基板之第二變化例; 圖五C係為本發明陣列基板之第三變化例; 圖五D係為本發明陣列基板之第四變化例; 圖五E係為本發明陣列基板之第五變化例; 圖五F係為本發明陣列基板之第六變化例;及 圖五G係為本發明陣列基板之第七變化例。 【主要元件符號說明】 1 :彩色濾光片 10 :基底 U:黑色矩陣 12 :區塊 14 :色阻 16 :導電層 20 ·基底、第一基底 22a :材料層 22 :區塊 221 :第一次區塊 222 :第二次區塊 223 :第三次區塊 24 :色阻 26 :導電層、第一導電層 27 :配向膜層、第一配向膜層 29 :調整層 30 :第二基底 32 :主動元件陣列 36 :第二導電層 37 :第二配向膜層 40 ··第一基底 42 :區塊 44 :色阻 46 :第一導電層 47 :第一配向膜層 49 :平坦層 50 :對向基板 501 :第二導電層 502 :第二配向膜層 58 :液晶層 18It should be noted that the material of the adjustment layer 29 may be indium zinc tin oxide, Ti〇2, GZ0, ZaO or. In the embodiment of Fig. 5E and Fig. 5F, there is no limitation on the order of formation of the can layer 29 and the block 22; and in the embodiment of Fig. 5F, since the partial block & is located at the adjustment layer 29 Above, it is necessary to form the adjustment layer 29 first, and then form the block to practice. The technical means of the present invention can effectively adjust the height of the upper color resistance, so that the time is lower, the board is improved, and the substrate is improved. The problem of unevenness of thickness and thickness is such that the film faces of all the color resists are planarized by grinding (four). In the surface of the film, the film thickness difference between the color resists on the array substrate is improved, so that the film thicknesses of the respective colors of 200831959 are uniform, so as to avoid the problem that the conductive layer is discontinuous. Second, the film thickness difference between the color resists on the array substrate is improved, so that the film thicknesses of the respective color resists are uniform, so as to avoid the problem of discontinuous alignment of the alignment film layer. Fourth, in improving the film thickness difference between the color resists on the array substrate, the film thickness of each color resist is uniform, so as to improve the process yield of the liquid crystal display panel. The present invention has been described above by way of a preferred embodiment, and is not intended to limit the spirit of the invention and the inventive subject matter. For those skilled in the art, other components or means can be easily understood and utilized to produce the same effect. Modifications made within the spirit and scope of the invention are intended to be included within the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS The above and other advantages of the invention will be readily understood by the following detailed description in conjunction with the accompanying drawings in which: Figure 1A is a top view of a color filter; B is a cross-sectional view of a color filter; FIG. 2A to FIG. 2E are schematic views showing a manufacturing method of the array substrate of the present invention; FIG. 2 is a schematic view showing a first embodiment of the liquid crystal display panel of the present invention; A schematic diagram of a second embodiment of a liquid crystal display panel of the present invention; 17 200831959 FIG. 5A is a first variation of the array substrate of the present invention; FIG. 5B is a second variation of the array substrate of the present invention; The third variation of the array substrate of the present invention; FIG. 5D is a fourth variation of the array substrate of the present invention; FIG. 5E is a fifth variation of the array substrate of the present invention; FIG. A sixth variation; and FIG. 5G is a seventh variation of the array substrate of the present invention. [Main component symbol description] 1 : Color filter 10 : Substrate U: Black matrix 12 : Block 14 : Color resist 16 : Conductive layer 20 · Substrate, first substrate 22a : Material layer 22 : Block 221 : First Sub-block 222: second sub-block 223: third sub-block 24: color resist 26: conductive layer, first conductive layer 27: alignment film layer, first alignment film layer 29: adjustment layer 30: second substrate 32: active device array 36: second conductive layer 37: second alignment film layer 40··first substrate 42: block 44: color resist 46: first conductive layer 47: first alignment film layer 49: flat layer 50 : opposite substrate 501 : second conductive layer 502 : second alignment film layer 58 : liquid crystal layer 18

Claims (1)

200831959 十、申請專利範圍: 1· 一種陣列基板,包括·· 一基底; 亥^上’該矩陣係由複數個區塊組成, 且。亥區塊之兩端具有不同的厚 战 複數個色阻,設置於該基底上,且該$ =之該區塊間’並分別覆蓋上述兩相鄰該區塊 更包括一主動元 黎 2·如申請專利範圍第丨項所述之陣列基板 件陣列形成於該基底上。 3·如申請專利範圍第i項所述之陣列基板,其中被同一該色 阻所覆蓋之相鄰該區塊之兩該端具有相等的厚度。 4·如申請專利範圍第1項所述之陣列基板,其中上述部分嗜 區塊係為階梯(step)狀。 口 5.如申請專利範圍第丨項所述之陣列基板,其中上述部分該 區塊具有斜邊(bevel edge)。 6·如申請專利範圍第1項所述之陣列基板,其中上述部分該 區塊之厚度為1至1.5微米。 7·如申請專利範圍第1項所述之陣列基板,更包含一導電 層,形成於該矩陣及該些色阻上。 8·如申請專利範圍第7項所述之陣列基板,更包含一配向膜 層,形成於該導電層上。 19 200831959 9·如申請專利範圍第1項所述之陣列基板,其中該些色阻係 包括一紅色色阻、一綠色色阻以及一藍色色阻。 10·如申請專利範圍第9項所述之陣列基板,其中該紅色色 阻之厚度係為1至2. 5微米。 11·如申請專利範圍第9項所述之陣列基板,其中該綠色色 阻之厚度係為1至2. 5微米。 # I2·如申請專利範圍第g項所述之陣列基板,其中該藍色色 阻之厚度係為1至2. 5微米。 13·如申請專利範圍第1項所述之陣列基板,更包含一調整 層’位於該色阻以及該基底之間。 !4·如申請專利範圍第13項所述之陣列基板,其中該調整層 之材料係包含氧化銦錫、氧化錮鋅、Ti〇2、GZ〇、Za〇、ZN〇 或上述組合。 H =申喷專利範圍第a項所述之陣列基板,其中該矩陣係 至少部分覆蓋該調整層。 16·如申請專利範圍第13項所述之陣列基板,其中該矩陣係 興5亥调整層接觸。 明專利細第13項所述之陣列基板,其中該矩陣之 4为區塊係位於該調整層上。 队如中請專利翻第丨項所述之陣列基板,其中每一該區 鬼之兩端分別被不同之該色阻所覆蓋。 20 200831959 19. 一種液晶顯示面板,包括·· 如申凊專利範圍第1至18項中之任一項所述陣 -對向基板,係與該陣列基板對向設置;以及陣職板 一液晶層’設置於該陣列基板以及該對向基板之間。 20· —種陣列基板的製造方法,包括: 提供一基底; 幵1 於"亥基底丄表面’該矩陣係由複數個區塊組 w少部份該區塊之兩端具有不同的厚度;以及 形=個色阻於該基底上,每一該色阻係形成於兩相鄰 以區塊間,且分別覆蓋上述兩相鄰該區塊之至少一 21·如申响專利範圍帛20項所述之陣列基板的製造方法,更 包含形成一主動元件陣列於該基底上。 22·如申請專利範圍帛2〇項所述之陣列基板的製造方法,其 中上述形成该矩陣於該基底上表面之步驟,係包括下列 驟: 塗佈一材料層於該基底上; 塗佈一光阻層於該材料層上表面;及 使用一光罩對該材料層進行微影蝕刻程序,而形成該些區 塊。 23·如申請專利範圍第22項所述之陣列基板的製造方法,其 中上,之該光罩係為一半色調光罩([^“ -tone mask),使 部份該區塊之兩端具有不同的厚度。 24.如申請專利範圍第22項所述之陣列基板的製造方法,其 21 200831959 中上述之該光罩係為一多灰階光罩切此脆冰),使 部份該區塊之兩端具有不同的厚度。 25·如申請專利範圍第20項所述之陣列基板的製造方法,其 中上述形成該矩陣於該基底上表面之步驟,係包括下列步 驟: 形成一^苐一次區塊於該基底上表面;及 形成一弟二次區塊於該第一次區塊之上表面,其中上述該 區塊係由該第一次區塊與該第二次區塊所組成。 26·如申請專利範圍第25項所述之陣列基板的製造方法,其 中該弟一次區塊之厚度為1至1· 3微米。 27·如申請專利範圍第25或26項所述之陣列基板的製造方 法,其中該區塊之厚度為1·1至丨· 5微米。 28·如申請專利範圍第26項所述之陣列基板的製造方法,其 中上述ά玄苐一次區塊之大小係小於該第一次區塊之大小。 29·如申請專利範圍第25項所述之陣列基板的製造方法,其 中上述形成該第二次區塊之步驟後,更包括形成一第彡农 區塊於该第一次區塊之上表面,其中上述該區塊係由該第 一次區塊、該第二次區塊及該第三次區塊所組成。 30·如申請專利範圍第29項所述之陣列基板的製造方法,其 中上述忒第二次區塊之大小係小於該第一次區塊之大小。 31·如申請專利範圍第19項所述之陣列基板的製造方法,其 中該矩陣的材料係由Cr、CrO、Ni、暗色有機材料、樹脂 及原料(Pigment)所組成的族群中選出。 22 200831959 32·如申請專利範圍第2〇項所述之陣列基板的製造方法,其 中上述形成複數個色阻於該基底上之步驟後,更包括形成 一導電層於該矩陣及該些色阻上。 33·如申請專利範圍第32項所述之陣列基板的製造方法,其 中上述形成該導電層之步驟後,更包括形成一配向膜層於 该導電層上。 34. —液晶顯示面板,包括·· 一陣列基板,包括 一第一基底; 一矩陣,形成於該第一基底上,該矩陣係由複數個區塊 組成,且部分該區塊之兩端具有不同的厚度;以及 複數個色阻,設置於該第一基底上,且每一該色阻形成 於兩相鄰之該區塊間,並分別覆蓋上述兩相鄰該區塊 之一端,其中每一該區塊之兩端分別被不同之該色阻 所覆蓋; 一主動元件陣列基板,相對設置於該陣列基板,包括 一第二基底; 一主動元件陣列,設置於該第二基底上;及 弟—導電層’形成於该主動兀件陣列上;以及 一液晶層,被填充於該主動元件陣列基板及該陣列基板之 間。 35·如申請專利範圍第34項所述之顯示面板,其中被同一該 色阻所覆蓋之相鄰該區塊之兩該端具有相等的厚度。 36·如申請專利範圍第35項所述之顯示面板,其中該些色阻 具有不同的體積,對於膜厚相等之該些色阻,體積&大的 23 200831959 該色阻所覆蓋之相鄰該區塊之兩該端具有愈小的厚度。 37·如申請專利範圍第34項所述之顯示面板,其中上述部分 之該區塊係為階梯(step)狀。 38·如申請專利範圍第34項所述之顯示面板,其中上述部分 之該區塊具有斜邊(bevel edge)。 39·如申請專利範圍第34項所述之顯示面板,其中該區塊之 厚度為1微米至1.5微米。 40·如申請專利範圍第34項所述之顯示面板,其中該矩陣的 材料係由(^、(:也州卜暗色有機材料〜樹脂及原料⑦丨驯部士) 所組成的族群中選出。 41·如申請專利範圍帛34項所述之顯示面板,其中該陣列基 板更包括一第一導電層,形成於該矩陣及該些色阻上表面。 42·如申請專利範圍第41項所述之顯示面板,其中該陣列基 板更包括一配向膜層,形成於該第一導電層上。 24200831959 X. Patent application scope: 1. An array substrate comprising: a substrate; a matrix is composed of a plurality of blocks, and. The two ends of the block have different thick combat color resists, are disposed on the substrate, and the $= between the blocks' and respectively cover the two adjacent blocks, and further include an active element. An array of array substrate members as described in the scope of claim 2 is formed on the substrate. 3. The array substrate of claim i, wherein the two ends of the adjacent block covered by the same color resist have equal thicknesses. 4. The array substrate according to claim 1, wherein the partial block is stepped. 5. The array substrate of claim 2, wherein the portion of the block has a bevel edge. 6. The array substrate of claim 1, wherein the portion of the block has a thickness of from 1 to 1.5 microns. 7. The array substrate of claim 1, further comprising a conductive layer formed on the matrix and the color resists. 8. The array substrate of claim 7, further comprising an alignment film layer formed on the conductive layer. The array substrate of claim 1, wherein the color resists comprise a red color resist, a green color resist, and a blue color resist. 5微米。 The thickness of the red color resist is 1 to 2. 5 microns. 5微米。 The thickness of the green color resist is 1 to 2. 5 microns. 5微米。 The thickness of the blue color resist is 1 to 2. 5 microns. 13. The array substrate of claim 1, further comprising an adjustment layer disposed between the color resist and the substrate. The array substrate according to claim 13, wherein the material of the adjustment layer comprises indium tin oxide, antimony zinc oxide, Ti〇2, GZ〇, Za〇, ZN〇 or a combination thereof. H = The array substrate of claim a, wherein the matrix at least partially covers the adjustment layer. The array substrate of claim 13, wherein the matrix is in contact with the adjustment layer. The array substrate according to Item 13, wherein the matrix 4 is a block on the adjustment layer. The team, as claimed in the patent, flips the array substrate described in the above item, wherein each of the two sides of the ghost is covered by a different color resistance. 20 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 A layer ' is disposed between the array substrate and the opposite substrate. 20) A method for fabricating an array substrate, comprising: providing a substrate; 幵1 on a "Hai substrate'surface', the matrix is composed of a plurality of block groups, and a portion of the block has different thicknesses at both ends of the block; And a color resist is formed on the substrate, each of the color resists is formed between two adjacent blocks, and respectively covers at least one of the two adjacent blocks. 21 such as the scope of the patent application 帛20 items The method for fabricating the array substrate further includes forming an active device array on the substrate. The method of manufacturing an array substrate according to claim 2, wherein the step of forming the matrix on the upper surface of the substrate comprises the steps of: coating a material layer on the substrate; coating one The photoresist layer is on the upper surface of the material layer; and the material layer is subjected to a photolithography etching process using a photomask to form the blocks. The method of manufacturing an array substrate according to claim 22, wherein the mask is a halftone mask ([^"-tone mask), so that some of the blocks have 24. The method of fabricating an array substrate according to claim 22, wherein the photomask described in the above-mentioned method is a multi-gray mask to cut the brittle ice, and the portion is in the region. The method of manufacturing the array substrate according to claim 20, wherein the step of forming the matrix on the upper surface of the substrate comprises the steps of: forming a The block is on the upper surface of the substrate; and a second sub-block is formed on the upper surface of the first sub-block, wherein the block is composed of the first sub-block and the second sub-block. The method of manufacturing the array substrate according to claim 25, wherein the primary block has a thickness of 1 to 1.3 μm. 27. The array substrate according to claim 25 or 26 Manufacturing method, wherein the thickness of the block is 1.1 The method for manufacturing an array substrate according to claim 26, wherein the size of the primary block of the ά玄苐 is smaller than the size of the first block. The method of manufacturing the array substrate according to Item 25, wherein the step of forming the second sub-block further comprises forming a third agricultural block on a surface of the first sub-block, wherein the block is The method of manufacturing the array substrate according to claim 29, wherein the second sub-area is formed by the first sub-block, the second sub-block, and the third sub-block. The size of the block is smaller than the size of the first block. The method of manufacturing the array substrate according to claim 19, wherein the matrix material is Cr, CrO, Ni, dark organic material, resin And the method of manufacturing the array substrate according to the second aspect of the invention, wherein the step of forming the plurality of color resists on the substrate further includes Forming a conductive The method for fabricating an array substrate according to claim 32, wherein the step of forming the conductive layer further comprises forming an alignment film layer on the conductive layer. 34. A liquid crystal display panel comprising: an array substrate comprising a first substrate; a matrix formed on the first substrate, the matrix being composed of a plurality of blocks, and a portion of the two ends of the block Having different thicknesses; and a plurality of color resists disposed on the first substrate, and each of the color resists is formed between the two adjacent blocks, and respectively covering one of the two adjacent blocks, wherein Each of the two ends of the block is covered by the different color resists; an active device array substrate is disposed on the array substrate and includes a second substrate; an active device array is disposed on the second substrate; And a conductive layer is formed on the active element array; and a liquid crystal layer is filled between the active device array substrate and the array substrate. 35. The display panel of claim 34, wherein the two ends of the adjacent block covered by the same color resist have equal thicknesses. 36. The display panel of claim 35, wherein the color resists have different volumes, and for the color resists having the same film thickness, the volume & large 23 201331959 is adjacent to the color resist The two ends of the block have a smaller thickness. 37. The display panel of claim 34, wherein the portion of the portion is stepped. 38. The display panel of claim 34, wherein the block of the portion has a bevel edge. 39. The display panel of claim 34, wherein the block has a thickness of from 1 micron to 1.5 microns. 40. The display panel according to claim 34, wherein the material of the matrix is selected from the group consisting of (^, (: also a dark organic material ~ resin and a raw material). The display panel of claim 34, wherein the array substrate further comprises a first conductive layer formed on the matrix and the upper surfaces of the color resists. 42. The display panel, wherein the array substrate further comprises an alignment film layer formed on the first conductive layer.
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI407223B (en) * 2009-09-23 2013-09-01 Century Display Shenzhen Co Active device array substrate
TWI453832B (en) * 2010-09-21 2014-09-21

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI407223B (en) * 2009-09-23 2013-09-01 Century Display Shenzhen Co Active device array substrate
TWI453832B (en) * 2010-09-21 2014-09-21

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