200830980 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種風扇失效報警電路，特別係關於一 種電腦主機板上CPU風扇之失效報警電路。 【先前技術】 隨著電腦技術之快速發展，主機板之研發技術與應用 領域也日益廣泛。如何充分利用主機板之固有特性，最大 g限度之發揮主機板之控制優勢，增加主機板之附加價值， 成為各主機板廠商關注之焦點。用戶為了充分利用主機板 之超頻性能，提高主機之運行速度，要求中央處理器（CPU) 以超過常規之更快的速度工作，這將導致CPU消耗更大之 功耗，從而產生更大之熱能，致使CPU之溫度大大提高， 導致CPU之工作壽命縮短。而CPU是整個電腦系統之核 心元件，同時也是整個系統中最昂貴以及最重要之零件， 因此如何有效之保護CPU以及提高CPU之壽命至關重 • 要。為了延長CPU之使用壽命，要求大大降低CPU之工 作溫度，保持CPU表面之溫度為常溫。業界現在廣泛採用 風扇為緊貼CPU表面之散熱片降溫，然而當風扇失效時， 用戶未察覺而繼續運行電腦系統，會使CPU之溫度提高， 導致CPU之工作壽命縮短甚至燒壞CPU。 【發明内容】 鑒於以上内容，有必要提供一種簡易之風扇失效報警 電路，在風扇停轉時及時報警。 一種風扇失效報警電路，包括：一第一積分電路，該 200830980 筹一積分電路包括-輸人端和—輸出端，該第一積分電路 之輸入端同-風扇之轉速訊號輸出端相連，該第一積分電 路之輸^端輸出直流電壓訊號；一開關電路，該開關電路 包括-第-電晶體、一第二電晶體及一二極體，該第一電 晶體之，極分別同該第二電晶體之基極和-第—電源： 連，該第二電晶體之集極也連接到該第—電源，該第—電 晶體之基極連接到該二極體之陰極，該二極體之陽極連^ 至’卜第二電源’該二極體陽極作為該開關電路之輪入端， 二弟一積分電路輸出端相連並接收第—積分電路輪出之直 電壓訊號，該第-雷s * 弟—電B曰體集極作為該開關電路之輸出 t風^^f工作時，開關電路之輸出端輸出第—訊號， 開關電路之輸出端輸出第二訊號;一輸入 珣控制态，包括一輸入端和一輸出^，n 哭 铷出糕，該輸入輸出控制 ::==開關電路之輸出端相連，輸入輸出控制器在 =電路輸出之第二訊號後輸出報警訊號；及一報 輪出f該！警器之輸入端與輸入輸出控制 f 11 目 該報警态在接收到輸入輸出栌制哭f出 報警訊號時報警。 制出控制器輸出 出端失效報在風扇失效時令該_電路之輸 2輸出該開關控制訊號給該輸入輸幹 號給該報警器，從-動= 。獒醒用戶及時檢查和更換失效之風扇。 【實施方式】 h考圖1’本發明風扇失效報警電路較佳實施例包 200830980 括一連接第一風扇110之第一積分電路200、一連接第二 風扇120之第二積分電路220、一第一隔離二極體D11、 一第二隔離二極體D12、一開關電路260、一輸入輸出控 制器U11及一報警器270。 該第一積分電路200包括一電阻R11和一電容C11， 該電阻R11 —端同該第一風扇110之轉速訊號輸出端相 連，另一端同該電容C11 一端相連，該電容C11另一端接 • 地。該第二積分電路220包括一電阻R12和一電容C12， 該電阻R12 —端同該第二風扇120之轉速訊號輸出端相 連，另一端同該電容C12 —端相連，該電容C12另一端接 地。該電阻R11和電容C11之間之連接節點連接至該第一 隔離二極體D11之陰極，該電阻R12和電容C12之間之連 接節點連接至該第二隔離二極體D12之陰極。該開關電路 260包括一第一電晶體Q11、——第二電晶體Q12及一二極 體D13，該第一電晶體Q11之集極同該第二電晶體Q12之 • 基極相連，該第一電晶體Q11之集極還透過一電阻R14連 接到一 12V電源，該第二電晶體Q12之集極透過一電阻 R15連接到該12V電源，該第一電晶體Q11之基極連接到 二極體D13之陰極，該二極體D13之陽極同該第一隔離二 極體D11和第二隔離二極體D12之陽極相連，該二極體 D13之陽極還透過一電阻R13連接到一 5V電源，該第二 電晶體Q12之集極還連接到該輸入輸出控制器U11之輸入 .端。該報警器270包括一電晶體Q13和一蜂鳴器LSI，該 電晶體Q13之基極同該輸入輸出控制器1111之輸出端相 200830980 _，該電晶體Q13之基極還透過一電阻R17連接到一 5V 電源，該電晶體Q13之射極接地，該電晶體Q13之集極透 過該蜂鳴器LSI同一電阻R16 —端相連，該電阻R16另一 端連接該5V電源。 當第一風扇110和第二風扇120均正常工作時，兩風 扇之轉速訊號輸出端輸出正常之轉速脈波訊號，該第一隔 離二極體D11和第二隔離二極體D12均截止，第一電晶體 _ Q11之基極電位被5V電源拉高從而導通，第二電晶體Q12 之基極為低電位而截止，該開關電路260輸出之高電平經 輸入輸出控制器U11後輸出低電平，該報警器270中之電 晶體Q13截止，蜂鳴器LSI不會報警。 當第一風扇110和第二風扇120中之任意一個失效 時，假設第一風扇110失效，第二風扇120仍正常工作， 第一風扇110之轉速訊號輸出端無轉速脈波訊號輸出，第 二風扇120之轉速訊號輸出端則輸出正常之轉速脈波訊 • 號。此時第一隔離二極體D11導通，第二隔離二極體D12 截止，第一隔離二極體D11拉低第一電晶體Q11之基極電 位使其截止，第二電晶體Q12之基極電位被拉高而導通， 第二電晶體Q12之集極輸出低電平訊號，該低電平訊號透 過該輸入輸出控制器U11後輸出高電平訊號促使該報警器 270中之電晶體Q13導通，蜂鳴器LSI報警。 該風扇失效報警電路在風扇失效時令該開關電路260 之輸出端輸出該低電平開關控制訊號給輸入輸出控制器 U11，該輸入輸出控制器U11再輸出該高電平報警訊號給 200830980 報警器270,從而實現風扇失效報警之功能。該二極體D13 可抵消在風扇停轉時隔離二極體D11和D12所抬高之電 壓，防止電晶體Q11之誤導通。 綜上所述，本發明符合發明專利要件，爰依法提出專利 申請。惟，以上所述者僅為本發明之較佳實施例，舉凡熟悉 本案技藝之人士，在爰依本發明精神所作之等效修飾或變 化，皆應涵蓋於以下之申請專利範圍内。 0 【圖式簡單說明】 圖1係本發明之風扇失效報警電路之較佳實施方式之 示意圖。 【主要元件符號說明】 第一風扇 110 第一隔離二極體 D11 第二風扇 120 第二隔離二極體 D12 第一積分電路 200 二極體 D13 弟二積分電路 220 第一電晶體 Q11 控制電路 220 第二電晶體 Q12 開關電路 260 電晶體 Q13 報警器 270 輸入輸出控制器 U11 電阻 R11 〜R17 蜂鳴器 LSI 電容 Cll 、 C12 11200830980 IX. Description of the Invention: [Technical Field] The present invention relates to a fan failure alarm circuit, and more particularly to a failure alarm circuit for a CPU fan on a computer motherboard. [Prior Art] With the rapid development of computer technology, the research and development technology and application fields of motherboards are also becoming more and more extensive. How to make full use of the inherent characteristics of the motherboard, the maximum g limit to play the control advantages of the motherboard, increase the added value of the motherboard, has become the focus of attention of the motherboard manufacturers. In order to make full use of the overclocking performance of the motherboard and increase the running speed of the host, the user is required to operate at a faster speed than the conventional one, which will cause the CPU to consume more power and generate more heat. As a result, the temperature of the CPU is greatly increased, resulting in a shortened working life of the CPU. The CPU is the core component of the entire computer system and the most expensive and important part of the entire system, so how to effectively protect the CPU and improve the life of the CPU is critical. In order to prolong the service life of the CPU, it is required to greatly reduce the working temperature of the CPU and keep the temperature of the CPU surface at normal temperature. Fans are widely used in the industry to cool the heat sink against the surface of the CPU. However, when the fan fails, the user does not notice and continue to run the computer system, which will increase the temperature of the CPU, resulting in shortened working life of the CPU or even burning the CPU. SUMMARY OF THE INVENTION In view of the above, it is necessary to provide an easy fan failure alarm circuit to promptly alarm when the fan is stopped. A fan failure alarm circuit includes: a first integration circuit, the 200830980 integrator circuit includes an input terminal and an output terminal, and an input end of the first integration circuit is connected to a speed signal output end of the fan, the first An output circuit of the integrating circuit outputs a DC voltage signal; a switching circuit comprising: a first transistor, a second transistor and a diode, wherein the first transistor has the same polarity as the second a base of the transistor and a -first power source: the collector of the second transistor is also connected to the first power source, and a base of the first transistor is connected to a cathode of the diode, the diode The anode is connected to the second power source of the diode as the wheel-in terminal of the switch circuit, and the output terminal of the second-integral circuit is connected and receives the direct voltage signal of the first-integrated circuit, the first-ray s * Brother - electric B body collector as the output of the switch circuit t ^ ^ f work, the output of the switch circuit outputs the first signal, the output of the switch circuit outputs the second signal; an input 珣 control state, Including an input and an output ^, n Crying 铷 铷, the input and output control ::== The output of the switch circuit is connected, the input and output controller outputs the alarm signal after the second signal of the = circuit output; and a report rounds out f! Input and output control of the alarm device f 11 This alarm state alarms when receiving the input and output and cries out the alarm signal. The controller output output failure report causes the output of the _ circuit to output the switch control signal to the input dry signal to the alarm when the fan fails, and the slave-action =. Wake up the user to check and replace the failed fan in time. [Embodiment] h FIG. 1 'The preferred embodiment of the fan failure alarm circuit of the present invention includes a first integration circuit 200 for connecting the first fan 110, a second integration circuit 220 for connecting the second fan 120, and a first embodiment. An isolation diode D11, a second isolation diode D12, a switching circuit 260, an input and output controller U11 and an alarm 270. The first integrating circuit 200 includes a resistor R11 and a capacitor C11. The resistor R11 is connected to the output end of the first fan 110, and the other end is connected to one end of the capacitor C11. The other end of the capacitor C11 is connected to the ground. . The second integrating circuit 220 includes a resistor R12 and a capacitor C12. The resistor R12 is connected to the output end of the second fan 120, and the other end is connected to the end of the capacitor C12. The other end of the capacitor C12 is grounded. A connection node between the resistor R11 and the capacitor C11 is connected to the cathode of the first isolation diode D11, and a connection node between the resistor R12 and the capacitor C12 is connected to the cathode of the second isolation diode D12. The switch circuit 260 includes a first transistor Q11, a second transistor Q12, and a diode D13. The collector of the first transistor Q11 is connected to the base of the second transistor Q12. The collector of a transistor Q11 is also connected to a 12V power supply through a resistor R14. The collector of the second transistor Q12 is connected to the 12V power supply through a resistor R15. The base of the first transistor Q11 is connected to the diode. The cathode of the body D13, the anode of the diode D13 is connected to the anodes of the first isolation diode D11 and the second isolation diode D12, and the anode of the diode D13 is also connected to a 5V power supply through a resistor R13. The collector of the second transistor Q12 is also connected to the input terminal of the input/output controller U11. The alarm 270 includes a transistor Q13 and a buzzer LSI. The base of the transistor Q13 is connected to the output end of the input/output controller 1111. The base of the transistor Q13 is also connected through a resistor R17. To the 5V power supply, the emitter of the transistor Q13 is grounded, and the collector of the transistor Q13 is connected through the same resistor R16 end of the buzzer LSI, and the other end of the resistor R16 is connected to the 5V power supply. When both the first fan 110 and the second fan 120 are working normally, the speed signal output ends of the two fans output a normal speed pulse signal, and the first isolation diode D11 and the second isolation diode D12 are both cut off. The base potential of a transistor _ Q11 is pulled high by the 5V power supply to be turned on, and the base of the second transistor Q12 is turned off at a very low potential. The high level of the output of the switch circuit 260 is outputted to the low level via the input/output controller U11. The transistor Q13 in the alarm 270 is turned off, and the buzzer LSI does not alarm. When any one of the first fan 110 and the second fan 120 fails, it is assumed that the first fan 110 fails, the second fan 120 still works normally, and the speed signal output end of the first fan 110 has no speed pulse signal output, and the second The speed signal output end of the fan 120 outputs a normal speed pulse signal. At this time, the first isolation diode D11 is turned on, the second isolation diode D12 is turned off, and the first isolation diode D11 is pulled low to turn off the base potential of the first transistor Q11, and the base of the second transistor Q12 is turned off. The potential is pulled high and turned on, and the collector of the second transistor Q12 outputs a low level signal, and the low level signal outputs a high level signal through the input/output controller U11 to cause the transistor Q13 in the alarm 270 to be turned on. , buzzer LSI alarm. The fan failure alarm circuit outputs the low level switch control signal to the input/output controller U11 when the fan fails, and the input/output controller U11 outputs the high level alarm signal to the 200830980 alarm device. 270, thereby implementing the function of the fan failure alarm. The diode D13 can counteract the voltage raised by the diodes D11 and D12 when the fan is stopped, and prevent the transistor Q11 from being turned on. In summary, the present invention complies with the requirements of the invention patent and submits a patent application according to law. However, the above description is only the preferred embodiment of the present invention, and equivalent modifications or variations made by those skilled in the art of the present invention should be included in the following claims. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic view showing a preferred embodiment of a fan failure alarm circuit of the present invention. [Main component symbol description] First fan 110 first isolation diode D11 second fan 120 second isolation diode D12 first integration circuit 200 diode D13 second integration circuit 220 first transistor Q11 control circuit 220 Second transistor Q12 Switch circuit 260 Transistor Q13 Alarm 270 I/O controller U11 Resistor R11 ~ R17 Buzzer LSI Capacitor Cll, C12 11