TW200828778A - High precision oscillator with self-calibration functions and method of calibration thereof - Google Patents

Abstract

The present invention provides a high precision oscillator with self-calibration functions and a method of calibration thereof. The present invention is used to set N bit control word sets of a digital control oscillation device to generate a time sequence signal. The self-calibration method comprises performing circuit initialization for the oscillator; setting (N-1)th bit of N bit control word sets to 1; comparing the time sequence signal with the frequency of a frequency reference signal, setting the (N-1)th bit of N bit control word sets to 0 when the frequency of the time sequence signal is smaller than the frequency of the frequency reference signal, or setting the (N-1)th bit of N bit control word sets to 1 when the frequency of the time sequence signal is not smaller than the frequency of the frequency reference signal; and repeating the above-mentioned steps to sequentially setting the (N-2) bit to the 0th bit of the N bit control word sets.

Description

200828778 IX. Description of the Invention: [Technical Field] The present invention relates to the technical field of oscillators, and more particularly to a high-precision oscillator and a calibration method having a self-calibration function. [Prior Art]

10 15 The conventional oscillator circuit is external to the integrated circuit of the package oscillator, and the additional resistor and capacitor are used to adjust the oscillation frequency of the oscillator circuit. The use of external resistors and capacitors can achieve better vibrating frequency, but the added resistors and capacitors increase the footprint of the integrated circuit package (PA^D), the area of the vibrating circuit, and The cost of resistors and capacitors increases the cost of the entire post-resonance circuit. In order to solve the problem of increasing the cost of external resistors and capacitors, another technique is to use the resistors and capacitors in the same way as the vibrating (Qi (10) coffee). However, this method will be affected by the semiconductor process. The wafers in different places on the wafer (four) will produce different = frequency, and the frequency is easy to change with temperature, causing the vibrator to be corpse: the difficulty It can be seen that the conventional oscillator device and the oscillator device standard method still have many defects and are necessary for improvement. SUMMARY OF THE INVENTION One object of the present invention is to provide a high-precision vibration state and a weighting method with self-aligning functions, which can solve the same wafer. On the different places of the crystal ¥ 20 200828778 ! f = the same problem of the vibration frequency, and can avoid the problem that the oscillation frequency is easy to change the temperature. The purpose of production is to provide a high-month and quasi-method with self-calibration function to effectively improve the accuracy of the device. According to the present invention, the present invention proposes a south precision oscillator having a self-powered moon, which has a calibration mode and a work = a frequency detection device, a logic control device, The younger brothers are in contact with the bus, one flute and one TT 4. The first of the frequency detecting devices: a digital control to vibrate the bean... The input terminal receives a frequency reference signal, and the input end receives the frequency signal, and the frequency side device compares the frequency # test frequency signal and the division The frequency of the frequency signal No. 1: wherein the indication signal has a -first state and - the second logic control device has an N-bit output port, and is connected to the frequency detection piercing 1 logic control device according to the indication signal The first switch (4) is connected to the data stream bus for transmitting the first data sink (four) number, and the first switch (4) is connected to the bit data output line. Alternatively, the digital (4) oscillating device is coupled to the first bit switch via the first switch and the first data bus, and the digitally controlled oscillating device is configured according to the sigmoid Outputting a value of 埠^ to generate a timing signal; wherein, when the high-precision oscillator 2 is in the calibration mode, the first switch is in an on state for transmitting the first-bay material bus signal, the digital control The vibration device is based on the device The value of the input = 埠 is used to generate the timing signal, and the frequency detecting device compares the frequency of the 29-chat tea test frequency signal and the frequency-divided signal to generate the indication signal 20 200828778, the logic control device sequentially The value of the (N-1)th to the third bit of the output port is respectively set according to the indication signal. According to another feature of the present invention, the present invention provides a high precision vibration

The k-method is used to set the N 5 bit control block of the digitally controlled oscillating device, and the digital control oscillating device controls the block according to the 1 ^ bit to generate a - timing signal The self-calibration method includes: (4) performing circuit initialization of the vibrator to initialize each bit of the N-bit control block to (B) setting the f of the miscellaneous control block (N_〇 bit is i (6) comparing the frequency of the timing signal generated by the digitally controlled oscillating device with a frequency reference signal ·), '(D), when the frequency of the timing signal is less than the frequency of the frequency reference signal, setting the number of the N-bit control block The (called) bit is 〇. When the timing «frequency is not less than the frequency of the frequency reference signal, the (Ν-1) bit of the block is controlled by the ν bit! (8) Repeat steps (8) through (9) to sequentially set the (N_2)th to the third bit of the N-bit control block. 15 [Embodiment]

1 is a schematic diagram of a high-precision vibrator of the present invention having a self-calibration function, wherein the high-precision oscillator has a calibration mode and an operation mode, and the calibration mode is configured to calibrate an output signal of the oscillator. The frequency of clk〇ut. The vibration includes a frequency device 11G, a logic control east (1), a - data bus 12G, a _-switch 125, a one-touch control device 130, a frequency dividing device 135, a second switch (6), one: the memory device 145, a second data bus 15 〇, a third switching cry, a fourth switch 160, and - working mode selection device 170 / 20 200828778 the frequency detecting device U0 The first input terminal U1 receives a frequency reference signal REF_CLK 'the second input terminal thereof! ! 2 Receive a de-frequency signal cIk-div. The frequency debt measuring device 11 compares the frequency of the frequency reference signal ref_clk and the frequency of the frequency dividing signal clk_div to generate an indication signal Indicator, wherein the indication signal Indicat〇r has a first state (〇) and a second state (1), the first state (9) is used to indicate that the frequency of the frequency-divided signal elk-div is less than the frequency of the frequency reference signal ref_clk, the u

10 15 Two states (1) The heart (4) The frequency of the de-interference signal elk_div is not less than the frequency of the reference signal REF_CLK.逻辑, the logic control device 115 has an N-bit wheel 埠U5i to rotate the NAND element, and is connected to the frequency 装置 device m. The logic control device 115 sets the value of the output 埠11$1 according to the indication signal Indicat〇r. When the indication signal Indicat〇r is in the first state (9), indicating that the frequency of the frequency-divided signal elk_d1V is less than the second rate of the frequency reference signal, the i-th bit of the N-bit control block is set to Q. When the indication signal culvert (10) sinks to the second state (1), it indicates that the frequency of the frequency-divided signal Clk dlv is not less than the frequency of the frequency reference signal REF_CLK, and the i-th bit of the control bit group is set. Why? Among them, 1 is an integer of 〇~(Nq)^ When the high precision is reduced by 1 pure material, the file is set to U5 output-low potential (9) ❿ kiss signal. When the high-precision vibrator is in the working mode, the logic control device 115 outputs -

Ready signal. 20 200828778 Λ 资料 资料 ’ 瓜 瓜 瓜 瓜 瓜 瓜 瓜 Ν Ν Ν Ν Ν Ν Ν Ν Ν Ν Ν Ν Ν Ν Ν Ν Ν Ν Ν Ν Ν Ν Ν Ν Ν 埠 埠 埠 埠 埠 埠 埠 埠 埠 埠 埠 埠 埠 埠The first switch 125 is coupled to the first data bus 12 for transmitting or blocking the signal of the first data bus 120 to the digital control oscillator 30. The digital camera 13 is lightly connected to the first switch 125, and is connected to the output port 51 via the switch 220 and the first data bus 120. The digitally controlled oscillating device 13 controls the value of the block according to the 枓 bit of the 枓 bit to generate a timing signal clock. The frequency dividing device 135 is coupled to the digitally controlled oscillating device 13A to divide the frequency of the clock signal clock to generate the frequency dividing signal clk_div. When the 咼 precision oscillator is in the calibration mode, the first switch 125 is in an on state for transmitting the first data bus 12 signal. The digit 15 controls the oscillating device 130 to control the value of the block according to the N bit to generate the timing signal clock. The frequency detecting device 110 compares the frequency of the frequency reference signal _ REF-CLK and the frequency-dividing signal elk-div to generate the indication signal.

Indicators, the logic control device 115 respectively sets the values of the (N-i)th to the third bits of the control block according to the indication signal Indicat〇r. When the 咼 precision oscillator is in the working mode, the first switch 125 is in an off state for blocking the transmission of the first data bus 12 signal to the digitally controlled oscillating device 130. The second switch 165 is coupled to the first data bus 12 〇 for transmitting or blocking the signal of the first data bus m to the memory device H5. The memory device 145 is coupled to the first The second switch 丨65. When the high precision oscillator is in the calibration mode, the second switch 165 is in the on state' sequentially (8) bits of the control block to the first. It is good to write a memory device 145 towel. When the high-precision oscillator is in the mode, the switch 165 is turned off to block the signal of the first bus bar 120 from being written into the memory device 145. The second data bus 15 is coupled to the digitally controlled oscillating device (10) and f. Between the body & 145. The third switch i is coupled to the memory device 145 for transmitting or blocking the output signal of the memory device 145 to the alpha-digital control vibration device 130. 10

When the high-precision vibrator is in the calibration mode, the third switch 14 is turned off, so that the output signal blocking the memory device 145 is transmitted to the digital control record via the second lean pool. Device 13G. When the high-precision oscillator is in the active mode, the third switch 140 is turned on to transmit the output signal of the memory device 145 to the digitally controlled oscillating device 13 via the second data bus 150. The first input of the master mode selection device 170 is coupled to the logic control device! 15. The second input of the Readyfi device that receives the output of the logic control (four) 115 outputs a mode selection signal MODE. When the high-precision vibrator is in the calibration mode, the Ready signal output by the logic control unit 115 and the mode selection signal m〇_ are low (9)', so that the fourth switch (10) is in the off state. When the high-precision oscillator 20 200828778 is in the active mode, when the Ready signal output by the logic control device 115 or the mode selection signal MODE is high (1), the fourth switch 160 is in an on state. The fourth switch 160 is coupled to the digitally controlled oscillating device 130 for transmitting or blocking the timing signal clock of the digitally controlled oscillating device 130. When the high-precision oscillator is in the calibration mode, the fourth switch 160 is in an off state to block the output of the timing signal clock output by the digitally controlled oscillating device 130 to the output signal φ CLKOUT 〇10 of the high-precision oscillator. When the high-precision oscillator is in the operating mode, the fourth switch 160 is turned on, and the timing signal clock output by the digital-controlled oscillator 130 is transmitted to the output signal CLKOUT of the high-precision oscillator. When the high precision oscillator is in the calibration mode, the logic control device 115 outputs a Ready signal of low potential (0), and a mode selection signal MODE 15 is low (0). At this time, the first switch 125 and the second switch 165 are in an on state, and the third switch 140 and the fourth switch 160 are in an off state. φ ′ When the high-precision oscillator is in the operation mode, the logic control unit 115 outputs the Ready signal of the high potential (1) and the mode selection signal MODE is high (1). At this time, the first switch 125 and the second switch 165 are in the off state 20, and the third switch 140 and the fourth switch 160 are in the on state. Fig. 2 is a calibration flow chart of the high precision oscillator with self-calibration function of the present invention. It is used to set a N-bit control block of a digitally controlled oscillating device, and the digital control oscillating device controls the block according to the N-bit to generate a timing signal. First, in step S210, the circuit of the oscillator is initially initialized π 200828778 to initialize each bit of the N-bit control block to 〇. In step S220, the number of executions is set to Ν-1. In step S230, the third bit of the unit control word group is set to 1. In step S240, the frequency of the timing signal No. 5 clock and the frequency reference signal REF_CLK generated by the digitally controlled oscillating device is compared. When the timing signal clock frequency is less than the frequency of the frequency reference signal REF_CLK, step S260 is performed; otherwise, step S250 is performed.

In step S260, when it is determined that the timing signal clock frequency is less than the frequency of the frequency_reference signal REF_CLK, the K10th bit of the N-bit control block is set to 〇. In step S250, when it is determined that the timing signal clock frequency is not less than the frequency of the frequency reference signal REF_CLK, the (N-1)th bit of the N-bit control block is set to 1. In step S270, the number of executions K is decremented by one. In step S280, it is judged whether or not the number of executions K is less than 0. If so, it indicates that the setting of the N-bit control word 15 group has been completed, and therefore step S290 is executed. If no, step S230 is performed. By this, step S230 to step S280 are repeated to sequentially set the N-2th to 0th bits of the N-bit control word φ group. In step S290, the N-bit control block is stored. Fig. 3 is a schematic diagram showing the frequency 20 rate adjustment of the high precision oscillator with self-calibration function of the present invention. The frequency reference signal REF_CLK has a frequency of 6 MHz, the range is set to (-30%)~(+30%), and the N-bit control block is 8-bit, and the digit controls the frequency step of the oscillating device 130 ( Frequency Step) is 0_028MHZ (=6Mx60%/128). That is, as long as the number of bits of the N bit 12 200828778 兀 control block is adjusted, the frequency step of the digitally controlled oscillating device 13 即可 can be adjusted to obtain a high-precision oscillator. As can be seen from the above description, the present invention uses the progressive method to gradually find the N-bit control block. By using the technique of the present invention, the digital-controlled oscillating device 130 can be adjusted by adjusting the number of N-bit control 5-bit bits. The frequency step 'and obtain a high-precision oscillator' can also solve the problem that the wafers in different places on the same wafer will have different oscillation frequencies, and the vibration frequency can be easily changed with temperature. The present invention is exemplified for the convenience of the description, and the scope of the claims of the present invention is determined by the scope of the patent application, and is not limited to the above embodiments. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is an equation diagram of a south precision oscillator having a self-calibrating platform and a 15 block diagram of the present invention. FIG. 2 is a high precision of the self-calibration function of the present invention. The flow diagram 3 of the vibrating device is a schematic diagram of the phase rate adjustment of the invention with the self-calibrating Λ 玄 玄 仪 仪 功 功 功 功 功 功 功 功 功 功 。 。 。 。 。 。 。 Frequency of 1 [Description of main component symbols] Frequency detecting device UQ First data bus ι2〇25 Digitally controlled oscillating device 130 Logic control device First switcher frequency dividing device 115 125 135 13 200828778 Second switch 165 Memory Body device 145 second data bus 150 150th switch 140 fourth switch 160 working mode selection device 170 first input terminal 111 second input terminal 112

Claims (1)

200828778 X. Patent application scope: 1 _ A high-precision oscillator with self-calibration function, having a calibration mode and an operation mode, the high-precision oscillator includes: a frequency detecting device having a first input terminal The frequency detecting means compares the frequency reference frequency signal and the frequency of the frequency-divided signal to generate an indication signal, and the second input terminal is configured to receive a frequency-dividing signal. The indication signal has a first state and a second state; a logic control device has an N-bit output port and is connected to the frequency 10 detecting device, and the logic control device sets the output according to the indication signal. One bit value; a first data bus, coupled to the N bit output port; a first switch coupled to a first data bus for transmitting or blocking the first data sink And a 15-digit control oscillating device coupled to the first switch, coupled to the bit output through the first switch and the first data bus该 'The digitally controlled oscillating device generates a timing signal according to the value of the N-bit output ;; wherein, when the high-precision oscillator is in the calibration mode, the 20th switch is set to an on state for Transmitting the signal of the first data sink ^, the digital control oscillating device outputs a value according to the N-bit output: the timing signal is generated, and the frequency detecting device compares the frequency reference frequency signal with the frequency of the frequency-divided signal, And generating the indication signal: the logic control 15 200828778 device according to the first state and the second state of the indication signal, and further setting the (]SM) bit to the second bit of the round value. 2. The high-precision oscillator as claimed in claim </ RTI> wherein the logic control device outputs a ready signal, and when the high-precision vibrating device is in the calibration mode, the logic (4) device has a low potential The aforementioned preparation signal. For example, in the high-precision oscillator described in claim 2, when the precision vibrator is in the aforementioned operation mode, the logic control device outputs the aforementioned preparation signal having a high potential. 10 15 20 (According to the high-precision vibration described in item 3 of the patent application scope: /, text: frequency-dividing device' is connected to the digital-controlled oscillating device, which is used to divide the frequency signal and generate The high-frequency cone according to the third item of the patent scope includes: , and a second switch, which is lightly connected to the first data bus, and is used to transmit or block the a first data bus signal; and a memory device coupled to the second switch; - Zhongtian the precision vibration_ is in the open state of the second switch, relying on &amp;, eight inches The value of 0 to the 0th bit is written into the memory device.) Contains the high-precision vibrator as described in item 5 of the patent application, and further 16 200828778 a second data bus, coupled to The digitally controlled oscillating device; and a third switch coupled to the memory device, the output signal of the memory device; the transmission wheel or the resistor therein, when the high precision oscillator is in the calibration mode. The #2 switch is in a closed state, and the input for blocking the memory device is transmitted to the digitally controlled oscillating device via the second data bus. 7. The high-precision oscillator as described in claim 6 of the patent specification ffi, comprising: ', text 10 15 •, a fourth switching state coupled to the digitally controlled oscillating device for transmitting or blocking the digit Controlling the timing signal of the oscillating device; ', wherein, when the high-precision oscillator is in the calibration mode, the μ-four switch is in a closed state to block the digital control vibration: the timing signal. %出出8. The high-precision oscillator according to item 7 of the patent application scope, when the high-precision vibrating mu is in the aforementioned working mode, the fourth switch is in an open state to transmit the digitally controlled oscillating device The timing signal is output. 9. The high-precision oscillator 〇= according to item 6 of the patent scope, when the high-precision oscillator is in the foregoing working mode, the third switch is turned on to output the output of the memory device. The digital control oscillating device is transmitted to the digital data bus. The high-precision vibrator described in claim 5, wherein when the high-precision oscillator is in the foregoing working mode, the second switch 17 200828778 is turned off to block the first data. The bus signal is written to the memory device. The high-precision oscillator of claim 5, wherein when the high-precision oscillator is in the foregoing working mode, the first switching device is in a closed state to block the first data bus The signal is transmitted to the digitally controlled oscillating device. The high-precision oscillator of claim 8, further comprising: • a mode selection device, wherein the first input terminal is connected to the logic control device 10 to receive the logic control device output The preparation signal of the second input terminal receives a mode selection signal. When the high precision device is in the aforementioned 2 quasi mode, the preparation signal output by the logic control device and the mode selection signal are both low. Used to close the fourth switch. 13) The high-precision oscillator according to claim 12, wherein the preparation signal or the mode selection signal output by the logic control device is high when the high-precision vibrating is in the foregoing working mode. , use φ to turn on the fourth switch. A self-calibration method for a high-precision oscillator is used to set a trace control word set of a digital control oscillator, and the digital control shake-up device 20 controls a block according to the N-bit to generate a timing signal. The self-calibration method includes: (A) performing circuit initialization of the oscillator to initialize each bit of the n-bit control subgroup to 〇; (B) setting the N-bit control block (N_〇位为丨; 18 200828778 (C) Compare the frequency of the timing signal generated by the digitally controlled oscillating device with a frequency reference signal; (D) when the frequency of the timing signal is less than the frequency of the frequency reference signal When the (N4)th bit of the N-bit control block is set to 〇, otherwise, 'the fifth (N-1)th bit of the N-bit control block is set to 〖; and (6) the repeating step (B) to (D), which are used to sequentially set the (N-2)th to the third bit of the n-bit control block. 15. As described in claim 14, The self-calibration includes: , and ° (F) stores the N-bit control block.