200828334 1 t 九、發明說明： 【發明所屬之技術領域】 本案係有關於一種記憶體儲存裝置，特別是指一種可 t主機接收到寫入資料命令時，會視目的及功能優先將該 資料寫至SLC結構之快閃記憶體晶片或MLC結構之快閃記 憶體晶片中之記憶體儲存裝置。 【先前技術】 按一般記憶體儲存裝置，尤其是包含快閃記憶體之儲 存^置，其快閃記憶體可為單準位胞元(Single Level Cell， _ 下稱SLC)結構或多準位胞元Level Cell，下稱MLC) 結構:其中，SLC結構之快閃記憶體係以一個胞元代表一 個，元’其具單位容量成本較MLC高且重複寫入次數可達 、百萬次之優點，而MLC結構之快閃記憶體係以一個胞元代 位元，例如但不限於2個位元或4個位元等，其具 容^高之優點，但其單位容量成本較SLC低且重複寫入次 數車$低，例如2個位元之MLC結構之快閃記憶體其重複寫 入次，可達十萬次，但4個位元之MLC結構之快閃記憶體 _ ^重複寫入次數則只可達千次。因此，一般應用上可將較 ❿^更改之資料儲存於SLC結構之快閃記憶體，以及將較少 更改之資料儲存於MLC結構之快閃記憶體，以使SLC結 構之快閃記憶體及MLC結構之快閃記憶體之應用達到最 佳化配置之目的。 此外，一般快閃記憶體之控制器僅具有寫入SLC結構 之快閃記憶體或MLC結構之快閃記憶體之能力，亦即，一 記憶體儲存裝置中不是全為SLC結構之快閃記憶 ，就是全為MLC結構之快閃記憶體，而不具混合寫入之能 力，因此，應用上甚為不便，誠屬美中不足之處。 5 200828334 1 t 【發明内容】 诊本發明之主要目的係提一種記憶體儲存裝置，其控 ，器具混合寫入SLC結構之快閃記憶體及MLC結構之; 奋己t思體之能力。 。本發明之另一目的係提供一種記憶體儲存裝置，其控 制器會視目的及功能優先將該資料寫至SLC結構之快 憶體晶片或IVlLC結構之快閃記憶體晶片。 " 口本發明之另一目的係提供一種記憶體儲存裝置，其控 制器將一檔案寫入該第二儲存區域時，會優先至該择 籲映表中檢查，若該檔案被更改之次數大於一臨界值 該檔案改寫至該第一儲存區域。 、 為達上述之目的，本發明之記憶體儲存裝置，其包括： 一印刷電路板，用以承載下列元件；一記憶體模組，係置 於該印刷電路板上，其具有一第一儲存區域及一第二健存 區域；一對映表；以及一控制器，係置於該印刷電路板上 且摩禺接至該記憶體模組及該對映表，且該控制器會將該第 一儲存區域及/或該第二儲存區域中每一區塊被存取之次 數記錄於該對映表中；俾該控制器由一主機接收一寫入資 # 料命令時’會視目的及功能優先將該資料寫至該第一儲;^ 區域或該第二儲存區域。 為達上述之目的，本發明之記憶體儲存裝置，其包括： 一印刷電路板，用以承載下列元件；一記憶體模組，係置 於該印刷電路板上，其具有一第一儲存區域及一第二儲存 區域；一檔案對映表；以及一控制器，係置於該印刷電路 板上且耦接至該記憶體模組及該檔案對映表，且該控制器 會將寫入至該第一儲存區域及/或該第二健存區域中檔^ 之檔案名稱記錄於該檔案對映表中；俾該控制器將一標^ 6 200828334 ^入該第二儲存區域時，會優先至該職對絲中檢查， 若該稽案被寫人之缝大於_臨界值，騎雜案改寫至 該弟^一儲存區域。 ° 【實施方式】 請一併參照圖1及圖2,其中圖彳繪示本案一較佳實施例 之記憶體儲存裝置之分解示意圖；圖2繪示本案一較佳實施 例之記憶體儲存裝置之方塊示意圖。如圖所示，本明之 §己憶體儲存裝置1，其具有：一殼體1〇 ; 一印刷電路板2〇 ; 一記憶體模組30 ;—對映表40 ;以及一控制器5〇所組合而 • 成。 其中，該殽體10係以絕緣材料，例如但不限於塑膠材 料所製f，其具有一上殼體11及一下殼體12，且該上殼體 11及下殼體12可互相蓋合形成一容置空間彳3以容納該印 刷電路板20。 、該印刷電路板20係可容納於該容置空間13中，用以承 载該記憶體模組30以及控制器50元件。 該$己憶體拉組30係置於該印刷電路板20上，其例如但 不，於為一快閃記憶體模組，且具有一第一儲存區域31及 • 一第二儲存區域32，其中，該第一儲存區域31例如但不限 於為一SLC結構之快閃記憶體晶片，該第二儲存區域32則 例如但不限於為一MLC結構之快閃記憶體晶片，該第一儲 存區域31及第二儲存區域32皆耦接至該控制器50，以接受 其控制。 該對映表(Mapping Table)40係耦接至該控制器50，其 各量不定，可視該第一儲存區域31及第二儲存區域32之容 量大小而改變，該控制器50於寫入資料時會將該第一儲存 區域31及/或該第二儲存區域32中每一區塊(block，圖未示) 7 200828334 之次數記錄於該對映表―，其中每-區塊之大小 例如但不限於為512位元組。 f立麟器5〇係、置於該印刷電路板20上且祕至該記 且f及該對映表40，且該控制器50可將該第一儲存 區域31及/或該第二儲存區域32中每一區塊被存取之次數 該對映表40巾；其中，#該控含一記憶體 時，該對映表40可放置該控制器50之記憶體中， 或f备該控制器50未内含一記憶體時，該對映表4〇可放置 該第一儲存區域31中。此外，該控制器5〇具有一資料匯流 排（Data Bus)51及一信號控制匯流排（s丨gna丨c〇ntr〇|200828334 1 t IX. Description of the invention: [Technical field to which the invention pertains] The present invention relates to a memory storage device, and particularly to a device that can receive a write data command when it is received by the host, and will write the data preferentially according to the purpose and function. A memory storage device in a flash memory chip of an SLC structure or a flash memory chip of an MLC structure. [Prior Art] According to the general memory storage device, especially the storage device including the flash memory, the flash memory can be a single level cell (Single Level Cell, hereinafter referred to as SLC) structure or multi-level. Cell Level Cell, hereinafter referred to as MLC) structure: Among them, the flash memory system of SLC structure represents one cell, and its cost per unit capacity is higher than MLC and the number of repeated writes is up to one million. The flash memory system of the MLC structure is a cell meta-command, such as but not limited to 2 bits or 4 bits, etc., which has the advantage of high capacitance, but its unit capacity cost is lower than SLC and repeated writing The number of times the car is low, for example, the flash memory of the MLC structure of 2 bits is repeatedly written to the number of times, up to 100,000 times, but the flash memory of the MLC structure of 4 bits _ ^ the number of repeated writes It can only be as many as a thousand times. Therefore, in general, the changed data can be stored in the flash memory of the SLC structure, and the less changed data can be stored in the flash memory of the MLC structure, so that the flash memory of the SLC structure and The application of the flash memory of the MLC structure achieves the purpose of optimal configuration. In addition, the controller of the general flash memory only has the ability to write the flash memory of the SLC structure or the flash memory of the MLC structure, that is, the flash memory of the SLC structure is not included in a memory storage device. It is a flash memory that is all MLC structure, and does not have the ability to mix and write. Therefore, it is inconvenient to apply, and it is a flaw in the United States. 5 200828334 1 t [Summary of the Invention] The main purpose of the present invention is to provide a memory storage device in which the control and the appliance are mixed and written into the flash memory and the MLC structure of the SLC structure; . Another object of the present invention is to provide a memory storage device in which the controller preferentially writes the material to the flash memory chip of the SLC structure or the flash memory chip of the IVLC structure, depending on the purpose and function. Another object of the present invention is to provide a memory storage device, wherein when a controller writes a file into the second storage area, it will preferentially check the selection table, if the file is changed The file is overwritten to the first storage area by more than a threshold. For the above purposes, the memory storage device of the present invention comprises: a printed circuit board for carrying the following components; a memory module disposed on the printed circuit board having a first storage a region and a second storage area; a pair of maps; and a controller disposed on the printed circuit board and coupled to the memory module and the mapping table, and the controller The number of times each block in the first storage area and/or the second storage area is accessed is recorded in the mapping table; when the controller receives a write command from a host, the purpose is And the function first writes the data to the first storage area; or the second storage area. For the above purposes, the memory storage device of the present invention comprises: a printed circuit board for carrying the following components; a memory module disposed on the printed circuit board having a first storage area And a second storage area; a file mapping table; and a controller disposed on the printed circuit board and coupled to the memory module and the file mapping table, and the controller will write The file name of the file in the first storage area and/or the second storage area is recorded in the file mapping table; when the controller enters the second storage area with a standard ^ 6 200828334 Priority is given to the inspection of the job. If the account is written by the person whose seam is greater than the _threshold value, the riding case is rewritten to the storage area of the younger brother. [Embodiment] Please refer to FIG. 1 and FIG. 2 together, which illustrate an exploded view of a memory storage device according to a preferred embodiment of the present invention; FIG. 2 illustrates a memory storage device according to a preferred embodiment of the present invention. Block diagram. As shown in the figure, the § memory storage device 1 of the present invention has: a casing 1 〇; a printed circuit board 2 〇; a memory module 30; a mapping table 40; and a controller 5 Combined and integrated. The confusing body 10 is made of an insulating material such as, but not limited to, a plastic material, which has an upper casing 11 and a lower casing 12, and the upper casing 11 and the lower casing 12 are covered with each other. A space 彳3 is accommodated to accommodate the printed circuit board 20. The printed circuit board 20 can be received in the accommodating space 13 for carrying the memory module 30 and the controller 50 components. The EMI group 30 is placed on the printed circuit board 20, which is, for example, but not a flash memory module, and has a first storage area 31 and a second storage area 32. The first storage area 31 is, for example but not limited to, a flash memory chip of an SLC structure, and the second storage area 32 is, for example but not limited to, a flash memory chip of an MLC structure, the first storage area. Both the 31 and the second storage area 32 are coupled to the controller 50 to accept control thereof. The mapping table 40 is coupled to the controller 50, and the amount thereof is variable, and can be changed according to the capacity of the first storage area 31 and the second storage area 32. The controller 50 writes data. The number of times each block (block, not shown) 7 200828334 in the first storage area 31 and/or the second storage area 32 is recorded in the mapping table, wherein the size of each block is, for example, But not limited to 512 bytes. The lining device 5 is placed on the printed circuit board 20 and is secreted to the register and the display table 40, and the controller 50 can store the first storage area 31 and/or the second storage The number of times each block in the area 32 is accessed is the mapping table 40; wherein, when the control includes a memory, the mapping table 40 can be placed in the memory of the controller 50, or When the controller 50 does not include a memory, the mapping table 4 can be placed in the first storage area 31. In addition, the controller 5 has a data bus (Data Bus) 51 and a signal control bus bar (s丨gna丨c〇ntr〇|
Bus)52，經由該信號控制匯流排52可知悉該第一儲存區域 31以及該第二儲存區域32係為SLc結構之快閃記憶體晶片 或者MLC結構之快閃記憶體晶片。 此外’本發明之記憶體儲存裝置1進一步具有一第一介 面60 ’其搞接至該控制器5〇，藉由該第一介面6〇可將該記 憶體健存裝置連接至一主機80。其中，該笫一介面60，例 如但不限於為一USB介面或其相容之介面，以供連接至該 七機80。其中，該主機8〇可為一個人電腦、個人數位助理 器:數位相機或可攜式影像播放器，其具有一連接介面(圖 未示），例如但不限於為一USB介面或其相容之介面。 此外’本發明之記憶體儲存裝置1進一步具有一第二介 面70及一第二介面控制器75，其中該第二介面7〇係耦接至 該第二介面控制器75，且該第二介面70例如但不限於為一The bus 52 is controlled by the signal control bus bar 52 to know that the first storage area 31 and the second storage area 32 are flash memory chips of the SLc structure or flash memory chips of the MLC structure. In addition, the memory storage device 1 of the present invention further has a first interface 60' that is coupled to the controller 5, and the first interface 6 can connect the memory storage device to a host 80. The interface 60 is, for example but not limited to, a USB interface or a compatible interface for connection to the seven machines 80. The host computer 8 can be a personal computer, a personal digital assistant: a digital camera or a portable video player, which has a connection interface (not shown), such as but not limited to being a USB interface or compatible with it. interface. In addition, the memory storage device 1 of the present invention further has a second interface 70 and a second interface controller 75, wherein the second interface 7 is coupled to the second interface controller 75, and the second interface 70 for example but not limited to one
SmartMedia > CompactFlash - MMC > Security Digital (SD)、Memory Stick'Memory Stick Pro、xD 或 Microdrive、 Memory Stick Duo或Memory Stick Pro Duo等記憶卡之介 面；而該第二介面控制器75則例如但不限於為該第二介面 200828334 70相對應之控制器。 、此夕ty本發明之記憶體儲存裝置1進一步具有一應用程 式(爾未示，Application Program)，其可供安裝於該主機 80中，以便藉由該應用程式可設定該記憶體儲存裝置係執 行於一正常存取模式或一最佳化配置模式。其中，當使用 者藉由該應用程式設定本發明之記憶體儲存裝置]工作於 f常存取模式時，該控制器50將視該第一儲存區域31及該 第二y存區域32為相同結構，亦即資料將會以隨機順序寫 入該第一儲存區域31及該第二儲存區域32中；使用者可視 目的及功能藉由該應用程式決定要將該資料優先寫至該第 -健存區域31或該第二儲存區域32，當使用者藉由該應用 程式設定本發明之記憶體儲存裝置！工作於最佳化配置模 式且根據其目的及功能，例如但不限於區塊或檔案，決^ 要將該負料優先寫至例如但不限於該第一儲存區域％(在 本貝加例中係以區塊考量為要，因此優先寫至該第一儲存 區域31為例加以說明，但並不以此為限)時，該控制器5〇 將會優先將該資料寫至該第一儲存區域31中，待寫滿後才 寫入至該第二儲存區域32中。或者，當使用者藉由該岸 發明之記憶麵裝置_ 式且根據其目的及功能，例如以檔案考量為要， 至該ί二儲存區域32時，該控制器5〇將 曰優先將該貝料寫至該第二健存區域32中，待耷、、孟诒士 入至該第-儲存輯31中，使用上非常具有=滿後才寫 此外，當本發明之記憶體儲存裝置1工作於最佳化 ^式時，需藉由該細程式設定若干參數供該控制 記憶f之最佳化配置可正常執行。其中'該: 參數耩包括·一第一啟動值、一第一預設範圍、一第二i 200828334 1 Τ 動值及一第二預設範圍等。其中，該第一啟動值例如但不 限於為1000次’該第一預設範圍例如但不限於為〇〜次,· 該第二啟動值例如但不限於為500次，該第二預設範圍例如 但不限於為400〜500次，其詳細運作情形請參照下述之說 明。 請參照圖3，其繪示本案之記憶體儲存裝置工作於最 佳化配置模式時且欲將資料寫至該第一儲存區域31之動 作流程示意圖。如圖所示，當本發明之記憶體儲存裝置巧 執行於該最佳化配置模式且根據其目的及功能，例如以區 ，考量為要，因此決定要將該資料優先寫至該第一儲存區 ，31時，當該控制器50於接收到該主機8〇之寫入料 ::tf(麵1)，會先至該對映表40中檢查該第一儲存區 Hi是否有某一區塊之存取次數到達第一啟動值(例如 ，000次)(步驟2)，·若是，則會將該第一儲存區域31中 存=次數低於一第一預設範圍(例如為〇〜5〇次)間之區 =料優先寫至該第二儲存區域32巾(㈣3);再將新資 入至該搬移後之該第一儲存區域31之區塊中（步驟 絲’其繪示本案之記㈣儲存裝置工作於最 時2將資料寫至該第二儲存區域32之動 二圖獅，料資齡被*至該第二儲存 ΐϋ/-時步驟1);該控制器50會先至該對映表4〇中 -^值中某一區塊之存取次數是否高於一第 第中， 7龙崎將該弟二儲存區域32中存取次數高於該 200828334 * t 第例t為400〜500二欠)之區塊中資料寫至該第 -儲存區域31之空_塊中(步驟3);然後， ，該第二贿輯32 +(步驟4)。如此，可麵本發明^ 記憶體儲存裝置1工作於最佳化配置模式且根據复^ =ίίϊί?ί料2?寫至該第一儲存區域3:時會優 ,區域31(即SLC結構之快閃記憶 ::么^忒一^?1!*31 *滿時再將資料寫至該第 G敝娜義糾，以兼顧其 請參照圖5，其緣示本案另一較佳實施例之記儲 =置工餅最佳化配置赋時且欲將資料寫至該g 一館 j區域31之動作流程示意圖。如圖所示，當本發明之記 f儲=裝置1執行^該最佳化配置模式且根據其目的。 月b，例如以區塊考量為要，決定要將該資料優先詨 -，區域31時且該控制器5〇於接收到該主》寫8〇 驟目1L檢查該第—儲存區域31是否已Ϊ ^步驟2)，右疋，則會將該第一儲存區域&中存取次 ίΐίίϊ預列ί為0〜5〇次)間之區塊中之資料優 ίϊ中(步驟3);再將新資料寫入至 該搬移後之該第一儲存區域31之區塊中(步驟4)。 本案之δ己憶體館存裝置亦可根據寫人至該第二 ssmf之次數進行資料之最佳化配置。請 又一較佳實施例之記憶體儲存裝置 映表之不思圖°如圖所示’本實施例係檔案考量 為要’因歧冑人該帛二儲存輯32巾紐先， 根據齡名稱之次數進行資料之最佳化配ϋ必二 有-檔案對映表90扣記錄寫域第二儲魏域32中^ 200828334 Ί ’另一個則為寫入次數 可位於該控制器50、該 中例如但不限於具有兩個SmartMedia > CompactFlash - MMC > Security Digital (SD), Memory Stick's Memory Stick Pro, xD or Microdrive, Memory Stick Duo or Memory Stick Pro Duo interface; and the second interface controller 75 It is not limited to the controller corresponding to the second interface 200828334 70. The memory storage device 1 of the present invention further has an application program (Application Program) that can be installed in the host 80 so that the memory storage device can be set by the application. Performed in a normal access mode or an optimized configuration mode. When the user sets the memory storage device of the present invention by the application to operate in the f-access mode, the controller 50 will treat the first storage area 31 and the second y storage area 32 as the same. The structure, that is, the data will be written into the first storage area 31 and the second storage area 32 in a random order; the user can decide to write the data to the first health priority by the application according to the purpose and function. The storage area 31 or the second storage area 32, when the user sets the memory storage device of the present invention by the application! Working in an optimized configuration mode and depending on its purpose and function, such as but not limited to a block or archive, it is desirable to write the negative material preferentially to, for example, but not limited to, the first storage area % (in the case of Benbega) The block is considered as a block, so the priority is written to the first storage area 31 as an example, but not limited thereto. The controller 5 will preferentially write the data to the first storage. In the area 31, it is written into the second storage area 32 after being filled. Alternatively, when the user uses the memory device device invented by the bank and according to its purpose and function, for example, by file consideration, the controller 5 will preferentially prioritize the bay. The material is written into the second storage area 32, and the memory is stored in the first storage unit 31, and the memory storage device 1 of the present invention is operated when the usage is very high. In the optimization mode, a certain parameter is set by the program for the optimal configuration of the control memory f to be executed normally. Wherein: the parameter 耩 includes a first starting value, a first preset range, a second i 200828334 1 Τ value, and a second preset range. The first starting value is, for example but not limited to, 1000 times. The first preset range is, for example, but not limited to, 〇~ times. The second starting value is, for example, but not limited to, 500 times. The second preset range is For example, but not limited to 400 to 500 times, please refer to the following for detailed operation. Please refer to FIG. 3, which is a flow chart showing the operation of the memory storage device of the present invention when it is in the optimal configuration mode and the data is to be written to the first storage area 31. As shown in the figure, when the memory storage device of the present invention is executed in the optimized configuration mode and according to its purpose and function, for example, by area, it is decided that the data is preferentially written to the first storage. In the area, at 31 o'clock, when the controller 50 receives the write material of the host 8::tf (face 1), it first checks whether the first storage area Hi has a certain area in the mapping table 40. The number of accesses of the block reaches the first activation value (for example, 000 times) (step 2), and if so, the number of times stored in the first storage area 31 is lower than a first predetermined range (for example, 〇~ 5 )) zone = material priority write to the second storage area 32 towel ((4) 3); then new funds into the block of the first storage area 31 after the move (step silk ' it shows In the case of the case (4) the storage device works at the latest 2 to write the data to the second storage area 32, the second lion, the material age is * to the second storage ΐϋ / - step 1); the controller 50 will Whether the number of accesses of a certain block in the -^ value of the mapping table 4 is higher than that of the first, the number of accesses in the second storage area 32 is higher. 200828334 * t The data in the block of the example t is 400~500 owes) is written to the empty_block of the first-storage area 31 (step 3); then, the second bribe 32 + (step 4) . Thus, the memory storage device 1 of the present invention operates in an optimized configuration mode and is written to the first storage area 3 according to a plurality of times: the area 31 (ie, the SLC structure) Flash memory:: 么^忒一^?1!*31 * When the time is full, the data will be written to the first G 敝 义 纠, to take care of it, please refer to FIG. 5, which shows another preferred embodiment of the present invention. The storage flow chart of the optimized storage configuration time and the data to be written to the g area 31 of the building is as shown in the figure. When the storage of the present invention is performed, the device 1 performs the best. The configuration mode is based on its purpose. Month b, for example, based on the block considerations, decides to prioritize the data -, when the area is 31, and the controller 5 receives the main "write 8" Whether the first storage area 31 has been Ϊ ^Step 2), right 疋, the data in the first storage area & access time ίΐίίϊ pre-column is 0~5 times) In the middle of the step (step 3); the new data is written into the block of the first storage area 31 after the moving (step 4). The δ 忆 体 馆 馆 馆 馆 本 本 本 本 本 本 本 本 本 本 本 本 本 。 。 。 。 。 。 。 。 。 。 Please note that the memory storage device of another preferred embodiment does not reflect the figure. As shown in the figure, 'this embodiment is a file considered to be a 'because of the ambiguity of the second storage series 32 towel New Zealand, according to the age name The number of times to optimize the data distribution must be two - file mapping table 90 deduction record writing domain second storage Wei domain 32 ^ 200828334 Ί 'Another is the number of writes can be located in the controller 50, the middle For example but not limited to having two
案名稱之次數。該檔案對映表90中 攔位’其中一個為播案名稱；_位91 ，位92。其中，該檔案對映表9〇 1 第一儲存區域31或該第二儲存區知 於步驟1中，以檔案考量為要時，該控制器5〇寫入一 篇案時，可寫入該該弟一健存區域31或第二儲存區域32 中’在本實施例中係以優先寫入檔案至該第二儲存區域％ 為例加以說明，但並不以此為限。 於步驟2中’該檔案對映表90之結構及說明請參照上 述圖6之相關說明。 於步驟3中，若該檔案被更改之次數大於一臨界值； 其中，該臨界值例如但不限於可為3〜1〇次，可根據需要 藉由執行該應用程式設定。 此外，該應用程式進一步可供設定一寫入上限值，當 寫入至該第二儲存區域32之檔案名稱次數超過該寫入上 限值時，該應用程式會將該第二儲存區域32變成唯讀功 能’以避免寫入壽命較短之第二儲存區域32因檔案寫入次 數過多而損壞。其中，該寫入上限值可為例如但不限於 12 200828334 1000〜10000 次 具有可混合ίί 裝^與習知技術相較，確 快閃記憶趙晶片寫i=L=sLc結構之 截晶片，以兼顧其成；又==結憶 善習知記憶體儲存裝置之缺點。 ·、、、 確可改 —ίΐϊ揭示者，乃較佳實施例’舉凡局部之變更· 該項技藝之人所易於= tins要件，懇請責審查委員明察，並祈早f 賜予專利，俾希惠社會，實感德便。 【圖式簡單說明】 milium 儲圈其繪示本案'較佳實施例之記憶韹 齡^為^^^其?ί本案一較佳實施例之記憶體 式時之動作流程示意圖。 圖4為-不意圖，其繪示本案之記憶體 =佳化配置模式時魏將資料寫至該第二=^之】 作流程示意圖。 圖5為-示意圖，其繪示本案另一較佳實施例之記憶 200828334 罐織軸至該第The number of cases. The file in the mapping table 90 is blocked by one of the 'names of the broadcast case; _ bit 91, bit 92. Wherein, the file mapping table 9.11 the first storage area 31 or the second storage area is known in step 1, and when the file consideration is required, the controller 5 can write the file when writing a case The parent-storage area 31 or the second storage area 32 is described as an example of preferentially writing a file to the second storage area % in this embodiment, but is not limited thereto. For the structure and description of the file mapping table 90 in step 2, please refer to the related description of FIG. 6 above. In step 3, if the number of times the file is changed is greater than a threshold value, wherein the threshold value is, for example but not limited to, 3 to 1 times, the application setting may be performed as needed. In addition, the application is further configured to set a write upper limit value, and when the number of file names written to the second storage area 32 exceeds the write upper limit, the application stores the second storage area 32. The read-only function 'to avoid the second storage area 32 with a short write life is damaged due to too many file writes. Wherein, the upper writing limit value may be, for example, but not limited to, 12 200828334 1000~10000 times, and has a mixable ίί device. Compared with the conventional technology, the flash memory Zhao chip writes the i=L=sLc structure of the sliced wafer. To take into account its own; and == Jie Yi good knowledge of the memory storage device's shortcomings. ·,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, Society, real sense of virtue. BRIEF DESCRIPTION OF THE DRAWINGS The milium storage ring shows the memory flow of the preferred embodiment of the present invention as a memory flow diagram of a preferred embodiment of the present invention. Figure 4 is - not intended, which shows the memory of the case = when the configuration mode is optimized, the data is written to the second = ^. Figure 5 is a schematic view showing the memory of another preferred embodiment of the present invention.
為-示_，其繪示本案又-較佳實施例之記憶 體儲存裝置之檔案對映表之示意圖。 ί—示意®，其繪示本案另—較佳實施例之記憶 體，存裝£玉作於最佳化配麗式時且峨鱗量為要時 之動作流程不意圖。 【圖式元件標號說明】 記憶體儲存裝置1 上殼體11 容置空間13 記憶體模組30 第二儲存區域32 控制器50 信號控制匯流排52 第二介面70 主機80 檔案名稱攔位91 殼體10 下殼體12 印刷電路板20 弟^^儲存區域31 對映表40 資料匯流排51 第一介面60 第二介面控制器75 檔案對映表90 寫入次數搁位92Illustrated is a schematic diagram of a file mapping table of the memory storage device of the preferred embodiment of the present invention. ί—Illustrated®, which illustrates the memory of the preferred embodiment of the present invention, which is not intended to be used when the stencil is optimized for the accompaniment. [Description of the components of the drawing] Memory storage device 1 Upper casing 11 accommodating space 13 Memory module 30 Second storage area 32 Controller 50 Signal control bus 52 Second interface 70 Host 80 File name block 91 Shell Body 10 Lower case 12 Printed circuit board 20 Brother storage area 31 Mapping table 40 Data bus 51 First interface 60 Second interface controller 75 File mapping table 90 Number of writes 92