200818313 九、發明說明 【發明所屬之技術領域】 本發明係有關於一種使用電漿藉由蝕刻通過由鈾刻遮 罩所界定的結構而在半導體晶圓上獲得一結構的方法。 【先前技術】 在半導體電漿飩刻應用中，電漿蝕刻器通常用於將光 阻遮罩圖案轉印至Si晶圓上之電路和所欲薄膜及/或膜 堆疊（導體或介電絕緣體）之線圖案。此藉由触刻離開在 遮罩圖案之開啓區域中的光阻遮罩下方之膜（和膜堆疊） 而達成。此鈾刻作用藉由化學作用物種和激發在真空封閉 體（亦稱爲反應器室）中所包含的反應劑混合物中之放電 所產生之電荷粒子（離子）而初始化。此外，離子亦藉由 在氣體混合物和晶圓材料之間所產生的電場而朝晶圓材料 加速，沿著離子軌道的方向以稱爲非等向性飩刻的方式， 產生蝕刻材料的方向性移除。在飩刻程序完成時，遮罩材 料藉由將其剝除而被移除，在該處留下該原始預期遮罩圖 案之橫向圖案的複製物。在蝕刻製程期間，遮罩材料通常 於圖案轉印之交換時被腐蝕及/或損害。因此，一些損害 及腐鈾亦可被轉印至下部層，留下此非所欲之圖案損毀， 例如條紋、CD放大等等。 因此，飩刻方法之目的包括減低光阻遮罩腐蝕，以提 高從光阻遮罩圖案的圖案轉印之精確度。 在介電蝕刻中，縱橫比（AR )被定義爲特徵深度（dBACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of obtaining a structure on a semiconductor wafer by etching through a structure defined by an uranium engraved mask using plasma. [Prior Art] In semiconductor plasma engraving applications, plasma etchers are commonly used to transfer photoresist mask patterns to circuits on Si wafers and to desired film and/or film stacks (conductors or dielectric insulators) ) line pattern. This is achieved by etching away the film (and film stack) under the photoresist mask in the open area of the mask pattern. This uranium engraving is initiated by the chemical species and the charge particles (ions) generated by the discharge in the reactant mixture contained in the vacuum enclosure (also known as the reactor chamber). In addition, the ions are accelerated toward the wafer material by an electric field generated between the gas mixture and the wafer material, and the directionality of the etching material is generated in a direction called an anisotropic engraving along the direction of the ion orbit. Remove. Upon completion of the engraving process, the mask material is removed by stripping it, leaving a replica of the transverse pattern of the original intended mask pattern. During the etching process, the mask material is typically corroded and/or damaged during the exchange of pattern transfer. As a result, some damage and uranium can also be transferred to the lower layer, leaving the unwanted pattern damaged, such as streaks, CD magnification, and so on. Therefore, the purpose of the etching method is to reduce the photoresist mask corrosion to improve the accuracy of pattern transfer from the photoresist mask pattern. In dielectric etching, the aspect ratio (AR) is defined as the feature depth (d
200818313 )和寬度（W1 )之間的比例，如第9圖所示， 化矽阻障層910上方之介電層908上的光阻益 電層9 0 8亦被蝕刻形成特徵9 1 6，其具有弓_ 縱橫比（H AR )之介電蝕刻中，其中AR大於 合數個條件之一者： 介電層和遮罩層之間的高蝕刻選擇性 垂直直立特徵剖面 臨界尺寸（CD)的控制 在整個飩刻製程期間，需要較高飩刻選捐 遮罩圖案，以及避免在蝕刻剖面之非所欲的7 條紋）。垂直直立特徵剖面是保持裝置產量戶J 數個自垂直直立剖面引起偏差的機制：弓彎， 之上中間部分變寬（在第9圖中，w2>wl) 爲接近特徵之上部縮減（在第1 〇圖中，w4 < 化（tapering )，係爲朝特徵之底部縮減（w2 及扭曲，係爲在特徵之底部上的位置和方向5 或底部形狀的歪曲，導致與下部作用裝置無S 深度dB係顯示爲其中發生如圖所示之弓彎的 特徵尺寸持續在縮減，CD控制已變成與曰遽 往往，從遮罩中界定的値縮減或減少CD必須 期間達成。 第1 〇圖係爲使用習知技術所執行的另 特徵1 〇 1 6的槪要圖。在此例中，在發生弓 度w2之前，發生頸形以形成特徵寬度W4。 其顯示在氮 罩9 0 4。介 側壁。在筒 1 0，必須符 丨性來保存該 :規則偏差（ :需的。存有 係爲在特徵 ;頸形，係 w 1 ):錐狀 > w3);以 :隨機偏差， ^對準。弓彎 f深度。由於 :增的關鍵。 在HAR鈾刻 •蝕刻以形成 〖形成特徵寬 -6- 200818313 在習知技藝中已花費許多努力去解決這些問題。最具 挑戰性的問題之一在於弓彎防護，或減低垂直剖面弓彎。 常見的習知方法在於使用聚合化的碳化氟化學物質，以在 電漿飩刻期間使特徵側壁鈍化。然而，此方法受限於複雜 的化學物質其中之一，以及弓彎防護和蝕刻停止之間的交 換。當縱橫比進一步增加時，此習知方法已變爲不適用於 弓彎防護。當餽刻已發展時側壁鈍化（沈積）中的變化， 例如：在蝕刻步驟期間提供鈍化添加劑，在電漿蝕刻期間 增加聚合化之傾向，導致增強之側壁鈍化和弓彎防護。然 而，蝕刻化學物質變得又更爲複雜，且因此更容易受到例 如鈾刻停止之交換限制的影響。 【發明內容】 爲了要達成前述以及根據本發明之目的，係提供一種 用於在一介電層中飩刻特徵的方法。在該介電層上形成一 遮罩。在該遮罩的暴露表面上形成一保護性含矽塗層。將 該些特徵蝕刻穿過該遮罩和保護性含矽塗層。 在本發明的另一形式中，係提供一種用於在一介電層 中飩刻特徵的方法。在一介電層上形成一遮罩。將特徵局 部地蝕刻至該介電層。在該些已局部地鈾刻的特徵之側壁 上形成一保護性含矽塗層。完全地飩刻該些特徵。 在本發明的另一形式中，係提供一種用於在配置於一 遮罩下方的一介電層中形成特徵的裝置。提供一電漿處理 室，包含··一室壁，形成一電漿處理室封閉體；一基板支 200818313 承體，用於支承在該電漿處理室封閉體中的一基板；一壓 力調整器，用於調整該電漿處理室封閉體中的該壓力；至 少一電極，用於提供電力至該電漿處理室封閉體，以維持 一電漿；一氣體入口，用於將氣體提供至該電漿處理室封 閉體；以及一氣體出口，用於將氣體從電漿處理室封閉體 排出。一氣體源與該氣體入口作流體連接，其中該氣體源 包含一含矽沈積氣體源和一蝕刻氣體源。一控制器可控制 地連接至該氣體源和該至少一電極，且包含：至少一處理 器和電腦可讀取媒體。該電腦可讀取媒體包含：用於在該 遮罩的暴露表面上形成一含矽塗層的電腦可讀取碼，其包 含·’用於提供來自該含矽氣體源的一含矽沈積氣體之電腦 可讀取碼；用於將該含矽沈積氣體形成爲一電漿之電腦可 讀取碼；用於將來自該電漿的一含矽層沈積在該遮罩的暴 露表面上之電腦可讀取碼；以及用於中止該提供來自該含 矽氣體源的該含矽沈積氣體之電腦可讀取碼。該電腦可讀 取媒體更包含_·用於將特徵蝕刻穿過該遮罩和保護性含矽 層之電腦可讀取碼，其包含：用於提供來自該蝕刻氣體源 的一蝕刻氣體之電腦可讀取碼；用於將該飩刻氣體形成爲 飩刻特徵至該介電層之一電漿之電腦可讀取碼；以及用於 中止該提供來自該飩刻氣體源的該蝕刻氣體之電腦可讀取 碼。 本發明的這些與其他特點將在以下本發明實施方式中 配合以下圖式而詳細說明。 200818313 【實施方式】 以下將參照附圖並以若干較佳實施例詳細說明本發明 。爲使本發明可徹底地被了解，以下敘述中係提出許多特 定細節。但對熟習此項技藝者而言，本發明顯然可略過某 些或所有特定細節而加以實行。其他情況中，爲了不使不 必要的細節混淆本發明，故未敘述已爲人所熟知之製程步 驟及/或結構。 φ 本發明提供具有一非蝕刻步驟的蝕刻，其中沈積一含 矽層，用於允許改善之遮罩以提供介電鈾刻選擇性及/或 減低弓彎以提供更多垂直剖面。尤其，本發明提供高蝕刻 選擇性，用於除了垂直直立的特徵剖面（側壁）以及臨界 尺寸（CD )的控制以外，允許具有高於10:1的特徵深度 對特徵寬度之比的介電層中之高縱橫比（H AR )特徵的蝕 刻。較佳地，垂直側壁係爲從底部至頂部與該些特徵之底 部呈88°至90°之間的角度之側壁。 • 較高選擇性保護該遮罩，以提供用於改進解析度的較 薄的遮罩圖案，並且避免在蝕刻剖面圖中非所欲之不規則 偏差（條紋）。 新式鈾刻製程可藉由各種實施例加以實施。爲了有助 於理解，第1圖是高階流程圖，其可使用於本發明的一些 實施例中。將遮罩設於待被蝕刻的層上（步驟104)。第 2Α圖顯示位於基板上方的遮罩204，其已被形成於待被蝕 刻的介電層208上，其位於氮化矽阻障層210上方。將基 板置放於處理室（步驟1〇6 )。 -9- 200818313 第3圖係爲可使用於本發明較佳實施例中的處理室 300之槪要圖。在此實施例中，電漿處理室300包含限制 環3 02、上電極3 04、下電極3 08、氣體源310、和排出幫 浦320。氣體源310包含沈積氣體源312、飩刻劑氣體源 3 1 4、和額外氣體源3 1 6。在電漿處理室3 00內，基板晶圓 380係設於下電極308上。下電極308包含用於支承基板 晶圓3 80的合適之基板夾置機構（例如：靜電、機械夾合 、或其他）。反應器蓋328包含緊鄰配置於下電極3 08對 面的上電極3 04。上電極3 04、下電極3 0 8、和限制環302 界定侷限電漿容室3 40。氣體藉由氣體源310經過氣體入 口 3 43而被提供侷限電漿容室，以及藉由排出幫浦320經 過限制環302和排出埠而從侷限電漿容室排出。排出幫浦 3 20形成電漿處理室的氣體出口。第一 RF源344電連接 至上電極304。第二RF源348電連接至下電極308。室壁 352界定配置有限制環302、上電極3 04、和下電極308之 電漿封閉體。第一 RF源344與第二RF源348皆可包含 60 MHz功率源、27 MHz功率源和2 MHz功率源。連接 RF功率至電極的不同組合是可行的。由美國加州費蒙特 的泛林公司（Lam Reseach Coopration)所製造之 3 00mm Flex45前端介電触刻器可使用於本發明的較佳實施例中。 控制器3 3 5可控制地連接至第一 RF源3 44、第二RF源 3 48、排出幫浦320、連接至沈積氣體源312的第一控制閥 3 3 7、連接至蝕刻劑氣體源3 1 4的第二控制閥3 3 4、以及連 接至額外氣體源316的第三控制閥341。氣體入口 343將 -10- 200818313 來自氣體源3 1 2、3 1 4、3 1 6的氣體提供至氣體處理封閉體 。噴氣頭可連接至氣體入口 343。氣體入口 343可爲各氣 體源的單一入口、或各氣體源的不同入口、或是各氣體源 的複數個入口、或其他可能的組合。 第4A和4B圖說明電腦系統400，其適於用來作爲控 制器3 3 5。第4 A圖顯示可使用於控制器3 3 5的一電腦系 統之可行實體形式。當然，電腦系統可具有數個實體形式 ，其範圍從積體電路、印刷電路板、和小型手持裝置，上 至大型超級電腦。電腦系統400包括監視器402、顯示器 404、殼體406、磁碟機408、鍵盤410、和滑鼠412。磁 碟4 1 4係用於將資料傳送至電腦系統4 0 0和將資料自電腦 系統400傳送之電腦可讀取媒體。 第4 B圖係爲電腦系統4 0 0之方塊圖的範例。各種子 系統附接至系統匯流排420。處理器422 (亦稱爲中央處 理單元、或CPU)耦接至包括記憶體424的儲存裝置。記 憶體424包括隨機存取記憶體（RAM)和唯讀記憶體（ ROM )。如此技藝中所熟知的，ROM作爲將資料和指令 單向地傳送至CPU，而RAM則通常用於將資料和指令以 雙向方式傳送。這些類型的記憶體皆包括下述之任何合適 的電腦可讀取媒體。固定式磁碟42 6亦雙向耦接至cpu 422，其提供額外資料儲存容量，且亦可包括下述之任何 合適的電腦可讀取媒體。固定式磁碟426可用於儲存程式 、資料、和其他，且通常爲較主要儲存裝置更慢的輔助儲 存媒體（例如：硬碟），在適當的例子中，其可以標準方 200818313 式合倂爲記憶體4 2 4中之虛擬記憶體。可移除磁碟4 1 4可 採用下述之任何合適的電腦可讀取媒體之形式。 CPU 422亦耦接至各種輸入/輸出裝置，例如：顯示 器404、鍵盤410、滑鼠412、和喇叭430。一般而言，輸 入/輸出裝置可爲以下任意者：影像顯示器、軌跡球、滑 鼠、鍵盤、麥克風、觸控顯示器、轉換卡讀取器、磁性和 紙帶讀取器、手寫板、尖筆、聲音或手寫辨識器、生物特 徵讀取器、或其他電腦。可選擇地，CPU 422可使用網路 介面440而耦接至其他電腦或電信網路。藉由此一網路介 面，預期在執行上述方法步驟的過程中，CPU可能從網路 接收資訊，或可能將資訊輸出至網路。再者，本發明的方 法實施例可單獨地在CPU 422上執行，或可在與遠端CPU 連接之網路（例如：網際網路）上執行，而該遠端CPU 共用一部分之處理。 再者，本發明的實施例更有關於具有電腦可讀取媒體 的電腦儲存產品，而該電腦可讀取媒體具有位於其上用於 執行各種電腦施行之操作的電腦碼。媒體和電腦碼可爲特 別針對本發明之目的所設計和建構，或是具有電腦軟體技 藝之技術人士已知或可得的各個種類。電腦可讀取媒體的 例子包括但不限制於：磁性媒體（例如：硬碟、軟碟、和 磁帶）、光學媒體（例如：CD-ROM和全像式裝置）、磁 光媒體（例如：光讀碟片）、特別用於儲存和執行程式碼 的硬體裝置（例如：特殊應用積體電路ASIC、可程式化 邏輯裝置PLD )、和ROM與RAM裝置。電腦碼的例子包 -12- 200818313 括：機器碼（例如：由編譯器所產生）、和含有較高階碼 並可使用解譯器而由電腦執行的檔案。電腦可讀取媒體亦 可爲藉由電腦資料信號（內嵌於載波中）所傳送且表示可 由處理器所執行的一序列指令之電腦碼。 保護性含矽層212形成於遮罩204上，如第2B圖所 示（步驟108 )。保護性含矽層212較佳係使用包含SiF4 的矽前驅氣體來形成。未被理論所侷限，S iF4提供矽和氟 ，其中矽係沈積爲含矽保護層，氟係提供該矽層的一些剖 面成型，並避免在待被飩刻之特徵底部上的蝕刻停止。沈 積較佳係爲非對稱的，使得優先在遮罩材料和特徵側壁上 所形成的沈積量係多於在已蝕刻介電特徵之底部上所形成 的沈積量。如可由第2B圖中所見，相較於在特徵之底部 上的介電表面，在遮罩2 04之頂部上係形成較厚的保護性 矽層21 2。較佳地，如第2B圖所示，氟移除特徵之底部 上的矽。在較佳實施例中，沈積係使用化學氣相沈積（ CVD)製程而在蝕刻室中之原處完成，其亦沈積薄保護層 在遮罩之側壁上。較佳地，沈積使用一些離子能，以允許 此沈積的選擇性。當完成沈積時，可停止沈積氣體流。 在其他實施例中，可改變處理條件，以變動矽保護層 的厚度和空間分佈。舉例而言，當飩刻進行得較深時，可 希望在蝕刻結構的側壁上形成較厚塗層，以便保護蝕刻結 構不受後續蝕刻而進一步扭曲或弓彎。可針對此提供處理 條件的變化。由於沈積保護性矽層和餽刻係爲個別步驟， 可針對此結果來最佳化用於沈積保護性含矽層的處理條件 -13- 200818313 ，而不需與飩刻製程相干擾。 可使用於含矽保護層的CVD沈積之沈積化學物質的 範例可爲（但不限於）SiF4、Si(CH3)4、SiH(CH3)3、 SiH2(CH3)2、SiH3(CH3)、Si(C2H5)4、SiH4，以及其他有機 矽化合物，例如·· Si(OC2H5)4。這些化學製品較佳具有不 大於4 : 1之鹵素對矽比。S i F 4是最佳的前驅物’由於它 是非易燃的且是半導體生產實驗室中輕易地取得/存有的 • 。爲了要針對沈積從SiF4釋放矽，可加入氟清除劑（例如 :氫H2 )在沈積電漿中。針對SiF4沈積，需要適當量的 氫H2。H2對SiF4流率之比係在0.5〜5的範圍中，且較佳 範圍是1 .5至2.5。亦可加入含碳前驅物（例如，CH4及/ 或CF4 )，以改變膜組成。針對遮罩和弓彎防護，該沈積 在遮罩和特徵側壁上方必須爲保角的。在此同時，爲了避 免鈾刻停止，必須在特徵之底部上禁止或阻礙該沈積。再 者，該沈積在整體晶圓表面上方必須爲均勻的。 • 已沈積之保護層係爲遮罩上方之含非晶矽（或多晶矽 )層。矽保護層係隨著部分F、C和Η成份之存在而調整 。F的存在會在不同材料表面上引起選擇性之作用，使得 沈積優先發生在某些表面，而非其他表面上。舉例而言， 沈積係較爲優先在遮罩表面上和已蝕刻特徵之側壁上，多 於已蝕刻之介電特徵的底部上。在遮罩表面上之優先沈積 導致遮罩保護以及改善飩刻選擇性。在已飩刻之特徵的側 壁上之優先沈積禁止側向蝕刻，因此最小化已蝕刻特徵的 弓彎。 -14-The ratio between the width and the width (W1), as shown in FIG. 9, the photoresist layer 808 on the dielectric layer 908 above the plutonium barrier layer 910 is also etched to form the features 9 1 6 . It has a bow-to-aspect ratio (H AR ) dielectric etch where AR is greater than one of the combined conditions: high etch selectivity between the dielectric layer and the mask layer vertical vertical feature profile critical dimension (CD) The control requires a higher engraving of the mask pattern during the entire engraving process and avoids unwanted 7 stripes in the etched profile. The vertical upright feature profile is a mechanism for maintaining the device yield J from a vertical upright profile: the bow bend, the upper middle portion is widened (in Fig. 9, w2 > wl) is near the top of the feature reduction (in the first 1 In the figure, w4 <tapering is reduced toward the bottom of the feature (w2 and distortion, which is the distortion of the position and direction 5 or the bottom shape on the bottom of the feature, resulting in no S with the lower acting device The depth dB is shown as the feature size in which the bow bend as shown in the figure continues to decrease, and the CD control has become a constant with the 値 defined by the mask, which is achieved during the reduction or reduction of the CD. A schematic diagram of another feature 1 〇1 6 performed using conventional techniques. In this example, a neck shape occurs to form a feature width W4 before the bowing w2 occurs. It is shown in the nitrogen mask 094. Side wall. In the cylinder 10, it must be conserved to preserve the: rule deviation (: required. exists in the feature; neck shape, system w 1): cone shape >w3); to: random deviation, ^ Align. Bow bend f depth. Because: the key to increase. In the HAR uranium engraving • Etching to form the formation feature width -6 - 200818313 Many efforts have been made to solve these problems in the prior art. One of the most challenging problems is bow bending protection, or reducing vertical section bow bending. Common knowledge The method consists in using a polymerized fluorochemical chemistry to passivate the characteristic sidewalls during plasma engraving. However, this method is limited by one of the complex chemistries and the exchange between bow bend protection and etch stop. When the aspect ratio is further increased, this conventional method has become unsuitable for bow bending protection. Changes in sidewall passivation (deposition) when the feed has been developed, for example, providing a passivation additive during the etching step, in plasma etching The tendency to increase the polymerization during the period leads to enhanced sidewall passivation and bow bend protection. However, the etch chemistry becomes more complicated and therefore more susceptible to restrictions such as the exchange restriction of uranium etch stop. Achieving the foregoing and in accordance with the purpose of the present invention is to provide a method for engraving features in a dielectric layer. Forming a mask thereon. A protective ruthenium-containing coating is formed on the exposed surface of the mask. The features are etched through the mask and the protective ruthenium-containing coating. In another form of the invention, A method for engraving features in a dielectric layer is provided. A mask is formed over a dielectric layer. Features are locally etched to the dielectric layer. Features of the partially uranium engraved features Forming a protective ruthenium-containing coating on the sidewall to completely engrave the features. In another form of the invention, a device for forming features in a dielectric layer disposed under a mask is provided Providing a plasma processing chamber comprising: a chamber wall to form a plasma processing chamber enclosure; a substrate support 200818313 carrier for supporting a substrate in the plasma processing chamber enclosure; a pressure adjustment And for adjusting the pressure in the plasma processing chamber enclosure; at least one electrode for supplying power to the plasma processing chamber enclosure to maintain a plasma; and a gas inlet for supplying gas to The plasma processing chamber enclosure; and a gas An outlet for exhausting gas from the plasma processing chamber enclosure. A gas source is fluidly coupled to the gas inlet, wherein the gas source comprises a source of ruthenium-containing deposition gas and a source of etch gas. A controller is controllably coupled to the gas source and the at least one electrode and includes: at least one processor and computer readable medium. The computer readable medium includes: a computer readable code for forming a ruthenium-containing coating on the exposed surface of the mask, comprising 'for providing a cerium-containing deposition gas from the cerium-containing gas source Computer readable code; computer readable code for forming the bismuth-containing deposition gas into a plasma; computer for depositing a ruthenium-containing layer from the plasma on the exposed surface of the mask a readable code; and a computer readable code for terminating the bismuth-containing deposition gas from the krypton-containing gas source. The computer readable medium further includes a computer readable code for etching features through the mask and the protective enamel layer, the computer comprising: a computer for providing an etch gas from the etch gas source a readable code; a computer readable code for forming the etched gas into a plasma to one of the dielectric layers; and for discontinuing the supply of the etch gas from the etch gas source The computer can read the code. These and other features of the present invention will be described in detail in the following embodiments of the present invention in conjunction with the following drawings. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. In order to make the present invention fully understandable, numerous specific details are set forth in the following description. However, it will be apparent to those skilled in the art that the present invention may be practiced with some or all of the specific details. In other instances, well-known process steps and/or structures have not been described in order not to obscure the invention. φ The present invention provides an etch having a non-etching step in which a germanium-containing layer is deposited for allowing improved masking to provide dielectric uranium selectivity and/or to reduce bowing to provide more vertical profile. In particular, the present invention provides high etch selectivity for dielectric layers having a ratio of feature depth to feature width greater than 10:1 in addition to vertical upright feature profiles (sidewalls) and critical dimension (CD) control Etching of high aspect ratio (H AR ) features. Preferably, the vertical side walls are side walls that are at an angle of between 88 and 90 degrees from the bottom to the top and the bottom of the features. • Higher selectivity to protect the mask to provide a thinner mask pattern for improved resolution and to avoid undesired irregularities (stripes) in the etched profile. The new uranium engraving process can be implemented by various embodiments. To facilitate understanding, Figure 1 is a high level flow diagram that can be used in some embodiments of the present invention. A mask is placed over the layer to be etched (step 104). The second drawing shows a mask 204 over the substrate that has been formed over the dielectric layer 208 to be etched, which is over the tantalum nitride barrier layer 210. The substrate is placed in the processing chamber (steps 1〇6). -9- 200818313 Figure 3 is a schematic view of a processing chamber 300 that can be used in a preferred embodiment of the present invention. In this embodiment, the plasma processing chamber 300 includes a confinement ring 302, an upper electrode 304, a lower electrode 308, a gas source 310, and a discharge pump 320. Gas source 310 includes a deposition gas source 312, a smear gas source 314, and an additional gas source 316. In the plasma processing chamber 300, the substrate wafer 380 is attached to the lower electrode 308. The lower electrode 308 includes a suitable substrate clamping mechanism (e.g., electrostatic, mechanically clamped, or otherwise) for supporting the substrate wafer 380. The reactor cover 328 includes an upper electrode 304 disposed adjacent the lower electrode 308. The upper electrode 3 04, the lower electrode 308, and the confinement ring 302 define a localized plasma chamber 340. The gas is supplied to the localized plasma chamber by the gas source 310 through the gas inlet 3 43 and is discharged from the confined plasma chamber by the discharge pump 320 through the confinement ring 302 and the discharge port. The discharge pump 3 20 forms a gas outlet for the plasma processing chamber. The first RF source 344 is electrically coupled to the upper electrode 304. The second RF source 348 is electrically coupled to the lower electrode 308. The chamber wall 352 defines a plasma enclosure that is configured with a confinement ring 302, an upper electrode 310, and a lower electrode 308. Both the first RF source 344 and the second RF source 348 can include a 60 MHz power source, a 27 MHz power source, and a 2 MHz power source. Different combinations of connecting RF power to the electrodes are possible. A 300 mm Flex45 front end dielectric etcher manufactured by Lam Reseach Coopration, Fremont, CA, can be used in the preferred embodiment of the present invention. The controller 335 is controllably coupled to the first RF source 3 44, the second RF source 3 48, the discharge pump 320, the first control valve 333 connected to the deposition gas source 312, and the etchant gas source A third control valve 3 3 4 of 3 1 4, and a third control valve 341 connected to the additional gas source 316. The gas inlet 343 supplies -10- 200818313 gas from the gas source 3 1 2, 3 1 4, 3 16 to the gas treatment enclosure. The jet head can be connected to a gas inlet 343. Gas inlet 343 can be a single inlet for each gas source, or a different inlet for each gas source, or multiple inlets for each gas source, or other possible combination. Figures 4A and 4B illustrate a computer system 400 that is suitable for use as a controller 335. Figure 4A shows a possible physical form of a computer system that can be used for controller 335. Of course, a computer system can have several physical forms ranging from integrated circuits, printed circuit boards, and small handheld devices to large supercomputers. The computer system 400 includes a monitor 402, a display 404, a housing 406, a disk drive 408, a keyboard 410, and a mouse 412. Disk 4 1 4 is a computer readable medium for transferring data to computer system 400 and transferring data from computer system 400. Figure 4B is an example of a block diagram of a computer system 400. Various subsystems are attached to system bus 420. A processor 422 (also referred to as a central processing unit, or CPU) is coupled to the storage device including memory 424. The memory 424 includes random access memory (RAM) and read only memory (ROM). As is well known in the art, ROM is used to transfer data and instructions unidirectionally to the CPU, while RAM is typically used to transfer data and instructions in a bidirectional manner. These types of memory include any suitable computer readable medium as described below. The fixed disk 42 6 is also coupled bi-directionally to the cpu 422, which provides additional data storage capacity and may also include any suitable computer readable medium as described below. The fixed disk 426 can be used to store programs, data, and other, and is typically a secondary storage medium (eg, a hard disk) that is slower than the primary storage device. In a suitable example, the standard can be combined with the 200818313 standard. Virtual memory in memory 4 2 4 . The removable disk 4 1 4 can be in the form of any suitable computer readable medium as described below. The CPU 422 is also coupled to various input/output devices such as a display 404, a keyboard 410, a mouse 412, and a speaker 430. In general, the input/output device can be any of the following: image display, trackball, mouse, keyboard, microphone, touch display, conversion card reader, magnetic and tape reader, tablet, stylus, Sound or handwriting recognizer, biometric reader, or other computer. Alternatively, CPU 422 can be coupled to other computers or telecommunications networks using network interface 440. With this network interface, it is expected that during the execution of the above method steps, the CPU may receive information from the network or may output information to the network. Furthermore, the method embodiments of the present invention may be performed separately on the CPU 422, or may be performed on a network (e.g., the Internet) that is connected to the remote CPU, and the remote CPU shares a portion of the processing. Moreover, embodiments of the present invention are more directed to computer storage products having computer readable media having computer code located thereon for performing various computer operations. The media and computer code can be designed and constructed specifically for the purposes of the present invention, or various types known or available to those skilled in the art of computer software. Examples of computer readable media include, but are not limited to, magnetic media (eg, hard drives, floppy disks, and tape), optical media (eg, CD-ROM and holographic devices), magneto-optical media (eg, light) Read discs, hardware devices that are used to store and execute code (eg, special application integrated circuit ASICs, programmable logic devices PLD), and ROM and RAM devices. An example of a computer code package -12- 200818313 includes: a machine code (for example, generated by a compiler), and a file containing a higher order code and executable by a computer using an interpreter. The computer readable medium can also be a computer code transmitted by a computer data signal (embedded in a carrier wave) and representing a sequence of instructions executable by the processor. A protective ruthenium containing layer 212 is formed on the mask 204 as shown in Figure 2B (step 108). The protective germanium containing layer 212 is preferably formed using a germanium precursor gas comprising SiF4. Without being bound by theory, S iF4 provides ruthenium and fluorine, wherein the lanthanide is deposited as a ruthenium-containing protective layer, and the fluorine system provides some profile formation of the ruthenium layer and avoids etch stop on the bottom of the feature to be etched. The deposition is preferably asymmetrical such that the deposition amount preferentially formed on the sidewalls of the mask material and features is greater than the deposition amount formed on the bottom of the etched dielectric features. As can be seen in Figure 2B, a thicker protective layer 21 2 is formed on top of the mask 206 as compared to the dielectric surface on the bottom of the feature. Preferably, as shown in Figure 2B, the fluorine is removed from the bottom of the feature. In a preferred embodiment, the deposition is performed in a etch chamber using a chemical vapor deposition (CVD) process, which also deposits a thin protective layer on the sidewalls of the mask. Preferably, the deposition uses some ionic energy to allow for the selectivity of this deposition. When the deposition is completed, the deposition gas flow can be stopped. In other embodiments, the processing conditions can be varied to vary the thickness and spatial distribution of the protective layer. For example, when engraving proceeds deeper, it may be desirable to form a thicker coating on the sidewalls of the etched structure to protect the etched structure from further distorting or bowing without subsequent etching. Changes in processing conditions can be provided for this. Since the deposition of the protective ruthenium layer and the feed-through system are individual steps, the processing conditions for depositing the protective ruthenium-containing layer can be optimized for this result - 13-200818313 without interfering with the engraving process. Examples of deposition chemistries that can be used for CVD deposition of a germanium-containing protective layer can be, but are not limited to, SiF4, Si(CH3)4, SiH(CH3)3, SiH2(CH3)2, SiH3(CH3), Si ( C2H5)4, SiH4, and other organic germanium compounds, such as Si(OC2H5)4. These chemicals preferably have a halogen to rhodium ratio of no more than 4:1. S i F 4 is the best precursor' because it is non-flammable and is easily obtained/existing in semiconductor manufacturing laboratories. In order to release ruthenium from SiF4 for deposition, a fluorine scavenger (e.g., hydrogen H2) may be added to the deposited plasma. For SiF4 deposition, an appropriate amount of hydrogen H2 is required. The ratio of H2 to SiF4 flow rate is in the range of 0.5 to 5, and preferably in the range of 1.5 to 2.5. Carbonaceous precursors (eg, CH4 and/or CF4) may also be added to alter the film composition. For mask and bow protection, the deposit must be conformal above the mask and feature sidewalls. At the same time, in order to avoid the uranium engraving stop, the deposit must be prohibited or hindered on the bottom of the feature. Again, the deposition must be uniform over the surface of the overall wafer. • The deposited protective layer is a layer containing amorphous germanium (or polysilicon) above the mask. The 矽 protective layer is adjusted with the presence of some of the F, C and bismuth components. The presence of F causes selectivity on the surface of different materials, so that deposition occurs preferentially on certain surfaces rather than on other surfaces. For example, the deposition system is preferentially on the mask surface and on the sidewalls of the etched features, more on the bottom of the etched dielectric features. Preferential deposition on the surface of the mask results in mask protection and improved engraving selectivity. The preferential deposition on the side walls of the engraved features inhibits lateral etching, thus minimizing bowing of the etched features. -14-
200818313 含矽保護層之沈積是蝕刻製程中之單獨的步驟，其 針對不同的材料之不同的蝕刻應用而包括不同的沈積氣 組合，其中該沈積使用可行的多步驟氣體轉換程序，提 在鈾刻特徵周圍的含矽保護塗層，其包括遮罩特徵。爲 完成此步驟，控制器3 3 5可致使第一控制閥3 3 7允許來 沈積氣體源312之含SiF4的沈積氣體進入處理室300， 及致使第二控制閥3 3 9避免來自飩刻劑氣體源3 1 4的鈾 氣體進入處理室。控制器3 3 5亦可控制由第一和第二 源344、3 48所提供的功率以及排出幫浦320。控制器亦 用於控制晶圓區壓力、後側He冷卻壓力、基板上的偏 、以及各種溫度。 之後，透過遮罩204而蝕刻介電層208，以形成特 2 1 6，如第2 C圖所示。蝕刻應用可包括（但非限制）介 元件鈾刻、介電接觸飩刻（高縱橫比接觸HARC或波紋 、導體溝槽触刻（淺或深）、自對準接觸鈾刻、閘極遮 開飩刻、接觸蝕刻、通孔介電蝕刻、雙波紋通孔蝕刻、 波紋溝槽蝕刻、導體閘極蝕刻、導體深溝槽蝕刻、導體 溝槽絕緣蝕刻、以及硬遮罩開啓。較佳地’該蝕刻使用 離子能，以提供方向性蝕刻。如圖所示，該蝕刻可移除 分的保護性含矽層212。可移除在部分該些表面上的所 保護層。在此例中，已移除在遮罩204上形成側壁之保 層。保護性含矽層的其他部分可僅被局部地移除。在此 中，在遮罩204之頂表面上僅部分之保護性含矽層212 被移除。在其他實施例中，可局部地蝕刻或完全地蝕亥丨 可 體 供 了 自 以 刻 RF 可 置 徵 電 ) 罩 雙 淺 局 部 有 護 例 已 保 -15- 200818313 護層的其他部分。爲了完成此步驟，控制器3 3 5可致使第 一控制閥3 3 7停止來自沈積氣體源3 1 2的沈積氣體流入至 處理室300，以及致使第二控制閥3 3 9允許來自飩刻劑氣 體源3 1 4的蝕刻氣體流入至處理室。控制器3 3 5可改變由 第一和第二RF源344、3 48所提供的功率，以及改變排出 幫浦320之設定，以調整該触刻。控制器亦可使用於改變 晶圓區壓力、後側壓力、和各種溫度，以調整該餽刻製程 〇 在至少局部地蝕刻該特徵之後，決定是否飩刻更多（ 步驟Π 6 )。此可藉由設定製法或藉由採取量測而完成。 假如需要更多飩刻，則該製程循環回到步驟1 08，其中沈 積額外的矽保護層218在該遮罩上，如第2D圖所示。在 此例中，舊保護層的其餘部分變爲新矽保護層2 1 8的部分 。在此步驟中，控制器3 3 5再次開啓第一控制閥3 3 7以提 供沈積氣體，以及關閉第二控制閥3 3 9以停止飩刻氣體流 。控制器3 3 5亦可改變其他參數，以調整該沈積。 該特徵接著透過遮罩而進一步蝕刻（步驟112)，提 供一較深特徵216，如第2E圖所示。在此步驟中，控制 器3 3 5再次關閉第一控制閥3 3 7以停止沈積氣體，以及開 啓第二控制閥3 3 9以允許蝕刻氣體流。控制器3 3 5亦可改 變其他參數，以調整該蝕刻。 較佳地，此提供交替的沈積和餽刻步驟之循環或迴圈 係重複多於一次。較佳地，此循環重複多於三次。較佳地 ，此循環重複至少五次。此循環可重複數十次。亦可希望 -16- 200818313 重複此循環100次。 在其他實施例中，可在步驟1 08之前增加蝕刻步驟， 用於將矽保護層沈積在遮罩上。 較佳地’該鈾刻以及該沈積保護層係在相同室中完成 ’然而亦可在不同室中完成。由於沈積和蝕刻係在相同室 中完成，可快速地完成沈積和鈾刻之間的循環。 較佳地’該遮罩係爲有機材料，其中有機材料係定義 爲光阻、聚合物、或非晶碳。亦可使用無機材料作爲遮罩 。用於介電蝕刻的無機材料遮罩之範例包括多矽遮罩和金 屬氧化物遮罩。用於有機材料遮罩之材料的範例可包括（ 但不限於）較新一代的光阻，例如，深UV光阻、1 93 nm 光阻、157 nm光阻、EUV光阻、e-光束光阻、和x光光 阻、以及其他非微影遮罩，例如非晶碳。較舊一代的光阻 聚合物材料係設計爲含有未飽和C-C鍵，例如C-C雙鍵， 以及偶數C-C三鍵，以提供所需之高抗蝕刻性，亦即，對 触刻氣體混合物的化學惰性。這些鍵是強的且需要高活化 能以破壞’且因此，由於離子能相對低，較舊一代光阻可 明顯地顯示對蝕刻氣體混合物之低蝕刻率。較新一代的光 阻（包括193 nm和157 nm)並未包含這些未飽和鍵，因 爲這些未飽和鍵在微影曝光波長上吸收，而導致較低之光 阻抗蝕刻性。在蝕刻階段期間，藉由提供在光阻上含矽保 護塗層，即使是在高離子撞擊能，光阻的抗飩刻性仍會大 爲改善。高離子撞撃能（本發明可以其改善該遮罩之抗蝕 刻性）可爲 5 0〜2 0 0 0 e V。更佳地，離子撞撃能可爲 -17- 200818313 200〜1 5 00 eV。最佳地，離子撞擊能是500〜1 000 eV。 在此實施例中，在蝕刻進行期間，原處電漿化學製程 係用於增強及/或修補該遮罩，以及蝕刻特徵之垂直側壁 。在此實施例中，電漿化學沈積製程係在該晶圓曝光至鈾 刻電漿所欲的時間之前及/或之後開始一段短時間。以矽 薄膜係形成在遮罩圖案上，以保護該遮罩不受之後的蝕刻 侵蝕之方式選定沈積製程。此改變遮罩圖案的表面組成， 使得遮罩作用如同虛擬硬遮罩，其具有矽硬遮罩的某些有 益飩刻特性。 單一蝕刻沈積蝕刻循環 第5圖係爲本發明另一實施例的高階流程圖。在此實 施例中，光阻遮罩係設於待被蝕刻的層上（步驟5 04 )。 第6A圖顯示在基板上的光阻遮罩604，其已設於待被蝕 刻的介電層608上，其位於氮化矽阻障層6 1 0上方。將該 基板置於處理室中（步驟506 )。處理室可爲如第3圖所 示的處理室3 00、或其他處理室。特徵被蝕刻至弓彎深度 (dB)(步驟508 )，如第9圖所示。弓彎深度（dB)係 爲針對所欲之特徵/膜堆疊在整體蝕刻製程已完成之後發 生的弓彎之深度。弓彎深度（dB )可藉由（例如）橫剖面 掃描電子顯微鏡（SEM )來判斷。在一範例中，弓彎深度 係達到介於0.2至0.5 μιη。然而，弓彎深度係與膜堆疊的 類型、蝕刻深度、和飩刻時間有關，且因此弓彎深度依據 不同條件而改變。 -18- 200818313 沈積保護性含矽層618 (步驟512)，如第6C圖所示 。在較佳實施例中，藉由提供包含SiF4之沈積氣體來形成 保護矽層6 1 8。電漿係從沈積氣體形成。電漿沈積保護性 含矽層618。如先前實施例所述，可調整電漿參數，以選 擇性地將矽沈積在該遮罩的頂表面上，而在該遮罩的頂表 面上形成最厚層。電漿可接著較低選擇性地沈積在特徵之 側壁上，以在特徵之側壁上方形成較薄層。該電漿最低選 擇性地沈積在特徵之底部上。如前所述，使用SiF4和適當 的電漿參數可使不沈積在特徵616之底部上，如圖所示。 接著完成特徵之蝕刻（步驟5 1 6 )，如第5 D圖所示。剝 除該遮罩（步驟520)。 單一沈積飩刻循環 第7圖係爲本發明另一實施例的高階流程圖。在此實 施例中，遮罩設於待被蝕刻的層上（步驟704 )。第8A 圖顯不在基板上的遮罩804，其已設於待被鈾刻的介電層 808上，其位於氮化矽阻障層81〇上方。將基板置於處理 室中（步驟706 )。處理室可爲如第3圖所示的處理室 300、或其他處理室。沈積保護性含矽層818 (步驟708 ) ，如第8B圖所示。如先前實施例所述，可調整電漿參數 ，以選擇性地將矽沈積在該遮罩的頂表面上，而在該遮罩 的頂表面上形成最厚層。電漿可接著較低選擇性地沈積在 遮罩之側壁上，以在遮罩之側壁上方形成較薄層。該電漿 最低選擇性地沈積在該介電層之頂表面上。如前所述，使 -19- 200818313 用SiF4和適當的電漿參數可使矽不沈積在介電層80之頂 表面上，如圖所示。在此實施例中，其中特徵尙未被鈾刻 至介電層中，特徵之底部係爲遮罩特徵之底部，其係爲介 電層之頂表面。 在此實施例中，單一主要蝕刻可用於完全地蝕刻一特 徵8 1 6 (步驟7 1 2 )至阻障層8 1 0，如第8C圖所示。接著 剝除遮罩（步驟7 1 6 )，如第8D圖所示。 • 在此實施例中，保護性含矽層係用於保護該遮罩，而 非用於側壁剖面保護。 益處 在習知PECVD中，基板係置於接地托架上，並被加 熱至數百°C。沈積電漿藉由提供RF電力給上電極、或藉 由使用感應耦合電漿（ICP )來維持。此習知PECVD方法 並不適用於一般反應性離子鈾刻（RIE )類型的電漿鈾刻 器，其中晶圓係置於RF供電的下電極之上，且上電極係 通常接地或藉由個別頻率而驅動。再者，由於主動裝置熱 預算和危險考量，晶圓電極加熱一般限制於1 〇〇t以下。 以SiF4爲基的PECVD暗示111£模式電漿將不提供適當沈 積，由於該膜係藉由同步鈾刻和濺鍍而連續地移除。已非 預期地發現，在最佳條件之下，利用RIE模式電漿以適當 速率可沈積堅固之膜。再者，增加RF偏壓功率之最理想 量（例如，2 MHz或其他低頻功率，其中低頻功率係界定 爲5 MHz以下）可改善沈積非均勻性和膜堅固性。最理想 -20- 200818313 的2 MHz功率較佳爲〇〜looo w、或更佳爲5〜500 W。可 使用提供低偏壓能量的其他方法。待被蝕刻的該層可爲介 電層（例如氧化矽）、或導電層（例如，金屬和矽或其他 類型的半導體）、或硬遮罩層（例如，氮化矽和氧氮化砍 )。爲了要飩刻導體層，可在蝕刻步驟中使用鹵素，例如 :氯、氟、或溴。 一些實施例的其他益處在於避免蝕刻錐狀化和蝕刻停 止。 已非預期地發現到，將H2添加至包含SiF4之保護層 氣體允許控制沈積製程。 在本發明較佳實施例中，由於一些混合減低了具有個 別沈積和蝕刻製程的效能，希望有一些沈積氣體之成份不 會與蝕刻氣體之成份混合。因此，控制器應對氣體流計時 ，使得在添加另一氣體之前耗盡一氣體。在上述實施例中 ，並未在蝕刻期間提供SiF4。 • 在蝕刻和沈積期間，可使用氬以外的其他惰性氣體作 爲載體氣體。另一惰性氣體之範例可爲氨、氖、及/或氙 〇 在較佳實施例中，在介電蝕刻期間，並不需要重聚合 化學物質。低聚合鈾刻化學物質幫助避免錐狀化和鈾刻停 止。 在較佳實施例中，可使用典型HAR氟化碳蝕刻化學 物質，而不加入個別重聚合成份，例如CH3F或CH2F2。 -21 - 200818313 測試結果 執行以下測試：200818313 The deposition of a germanium-containing protective layer is a separate step in the etching process that includes different deposition gas combinations for different etching applications of different materials, wherein the deposition uses a viable multi-step gas conversion procedure for uranium engraving A ruthenium-containing protective coating around the feature that includes a mask feature. To accomplish this step, the controller 335 may cause the first control valve 373 to allow the deposition of the SiF4-containing deposition gas of the gas source 312 into the processing chamber 300, and cause the second control valve 339 to avoid the etchant The uranium gas from the gas source 3 14 enters the processing chamber. The controller 335 can also control the power provided by the first and second sources 344, 3 48 and the discharge pump 320. The controller is also used to control the wafer zone pressure, the back He cooling pressure, the bias on the substrate, and various temperatures. Thereafter, the dielectric layer 208 is etched through the mask 204 to form a feature 210 as shown in FIG. 2C. Etching applications may include, but are not limited to, uranium engraving, dielectric contact engraving (high aspect ratio contact HARC or corrugation, conductor trench engraving (light or deep), self-aligned contact uranium engraving, gate occlusion Etching, contact etching, via dielectric etching, double-ripple via etching, corrugated trench etching, conductor gate etching, conductor deep trench etching, conductor trench isolation etching, and hard mask opening. Preferably The etch uses ion energy to provide a directional etch. As shown, the etch can remove the protective ruthenium containing layer 212. The protected layer on portions of the surface can be removed. In this example, The protective layer forming the sidewalls on the mask 204 is removed. Other portions of the protective germanium containing layer may be removed only partially. In this case, only a portion of the protective germanium containing layer 212 on the top surface of the mask 204. It is removed. In other embodiments, it can be partially etched or completely etched. The RF can be self-engraved. The cover is double shallow and has a protective cover. -15- 200818313 Others of the sheath section. In order to complete this step, the controller 335 may cause the first control valve 373 to stop the deposition of the deposition gas from the deposition gas source 31 to the process chamber 300, and cause the second control valve 339 to permit the etchant The etching gas of the gas source 3 14 flows into the processing chamber. The controller 335 can vary the power provided by the first and second RF sources 344, 348, and change the setting of the bleed pump 320 to adjust the singulation. The controller can also be used to vary the wafer zone pressure, backside pressure, and various temperatures to adjust the feed process 〇 After at least partially etching the feature, it is determined whether or not to etch more (step Π 6). This can be done by setting the method or by taking measurements. If more engraving is required, the process loops back to step 108 where an additional barrier layer 218 is deposited over the mask as shown in Figure 2D. In this example, the rest of the old protective layer becomes part of the new protective layer 2 1 8 . In this step, the controller 335 opens the first control valve 3 3 7 again to supply the deposition gas, and closes the second control valve 339 to stop the entrained gas flow. Controller 335 can also change other parameters to adjust the deposit. The feature is then further etched through the mask (step 112) to provide a deeper feature 216, as shown in Figure 2E. In this step, the controller 3 3 5 closes the first control valve 3 3 7 again to stop the deposition of gas, and opens the second control valve 3 3 9 to allow the flow of the etching gas. Controller 335 can also change other parameters to adjust the etch. Preferably, this provides a repeating cycle of deposition and feed steps or loops repeated more than once. Preferably, this cycle is repeated more than three times. Preferably, this cycle is repeated at least five times. This cycle can be repeated dozens of times. It is also hoped that -16- 200818313 repeat this cycle 100 times. In other embodiments, an etching step may be added prior to step 108 to deposit a tantalum protective layer on the mask. Preferably, the uranium engraving and the deposition protection layer are completed in the same chamber. However, it can also be done in different chambers. Since the deposition and etching are done in the same chamber, the cycle between deposition and uranium engraving can be accomplished quickly. Preferably, the mask is an organic material, wherein the organic material is defined as a photoresist, a polymer, or an amorphous carbon. Inorganic materials can also be used as masks. Examples of inorganic material masks for dielectric etching include multi-turn masks and metal oxide masks. Examples of materials for organic material masks may include, but are not limited to, newer generations of photoresist, such as deep UV photoresist, 193 nm photoresist, 157 nm photoresist, EUV photoresist, e-beam light Resistance, and x-ray photoresist, as well as other non-lithographic masks, such as amorphous carbon. Older generations of photoresist polymer materials are designed to contain unsaturated CC bonds, such as CC double bonds, and even CC triple bonds to provide the desired high etch resistance, ie, chemically inert to the etched gas mixture. . These bonds are strong and require high activation energy to destroy' and therefore, due to the relatively low ion energy, older generation photoresists can clearly exhibit a low etch rate for the etching gas mixture. The newer generation of photoresists (including 193 nm and 157 nm) do not contain these unsaturated bonds because these unsaturated bonds absorb at the lithographic exposure wavelength, resulting in lower optical impedance etch. During the etch phase, by providing a ruthenium-containing protective coating on the photoresist, the resist resistance of the photoresist is greatly improved even at high ion impact energy. The high ion impact energy (which can improve the etch resistance of the mask) can be 50 to 200 volts. More preferably, the ion impact energy can be -17-200818313 200~1 5 00 eV. Optimally, the ion impact energy is 500 to 1 000 eV. In this embodiment, the in-situ plasma chemistry process is used to enhance and/or repair the mask during etching as well as to etch the vertical sidewalls of the features. In this embodiment, the plasma chemical deposition process begins a short period of time before and/or after the desired time for the wafer to be exposed to uranium plasma. The deposition process is selected in such a manner that the film is formed on the mask pattern to protect the mask from subsequent etching. This changes the surface composition of the mask pattern such that the mask acts like a virtual hard mask with some beneficial engraving characteristics of the hard mask. Single Etch Deposition Etch Cycle Figure 5 is a high level flow diagram of another embodiment of the present invention. In this embodiment, the photoresist mask is applied to the layer to be etched (step 504). Figure 6A shows a photoresist mask 604 on the substrate that has been placed over the dielectric layer 608 to be etched over the tantalum nitride barrier layer 61. The substrate is placed in a processing chamber (step 506). The processing chamber may be a processing chamber 300 as shown in Figure 3, or another processing chamber. The feature is etched to the bow depth (dB) (step 508) as shown in FIG. The bow bend depth (dB) is the depth of the bow bend that occurs after the desired etch process has been completed for the desired feature/film stack. The bow bending depth (dB) can be judged by, for example, a cross-sectional scanning electron microscope (SEM). In one example, the bow depth is between 0.2 and 0.5 μηη. However, the bowing depth is related to the type of film stack, the etching depth, and the engraving time, and thus the bowing depth varies depending on different conditions. -18- 200818313 Deposit a protective ruthenium containing layer 618 (step 512) as shown in Figure 6C. In a preferred embodiment, the protective germanium layer 168 is formed by providing a deposition gas comprising SiF4. The plasma is formed from a deposition gas. Plasma deposition protective yttrium-containing layer 618. As described in the previous embodiments, the plasma parameters can be adjusted to selectively deposit germanium on the top surface of the mask to form the thickest layer on the top surface of the mask. The plasma can then be deposited on the sidewalls of the features with a lower selectivity to form a thinner layer over the sidewalls of the features. The plasma is deposited selectively on the bottom of the feature. As previously mentioned, the use of SiF4 and appropriate plasma parameters can be deposited on the bottom of feature 616 as shown. The etching of the features is then completed (step 5 16) as shown in Figure 5D. The mask is stripped (step 520). Single deposition engraving cycle Figure 7 is a high level flow diagram of another embodiment of the present invention. In this embodiment, the mask is disposed on the layer to be etched (step 704). Figure 8A shows a mask 804 not on the substrate that has been placed over the dielectric layer 808 to be etched by uranium, which is located above the tantalum nitride barrier layer 81. The substrate is placed in the processing chamber (step 706). The processing chamber may be a processing chamber 300 as shown in Fig. 3, or another processing chamber. A protective ruthenium containing layer 818 is deposited (step 708) as shown in Figure 8B. As described in previous embodiments, the plasma parameters can be adjusted to selectively deposit germanium on the top surface of the mask while forming the thickest layer on the top surface of the mask. The plasma can then be deposited on the sidewalls of the mask with a lower selectivity to form a thinner layer over the sidewalls of the mask. The plasma is deposited minimally selectively on the top surface of the dielectric layer. As previously mentioned, -19-200818313 can be deposited on the top surface of dielectric layer 80 using SiF4 and appropriate plasma parameters, as shown. In this embodiment, wherein the feature 尙 is not engraved into the dielectric layer, the bottom of the feature is the bottom of the mask feature, which is the top surface of the dielectric layer. In this embodiment, a single primary etch can be used to completely etch a feature 8 1 6 (step 7 1 2 ) to the barrier layer 810, as shown in Figure 8C. The mask is then stripped (step 7 16) as shown in Figure 8D. • In this embodiment, a protective enamel layer is used to protect the mask, not for sidewall profile protection. Benefits In conventional PECVD, the substrate is placed on a grounded bracket and heated to hundreds of °C. The deposited plasma is maintained by providing RF power to the upper electrode or by using inductively coupled plasma (ICP). This conventional PECVD method is not suitable for a general reactive ion uranium engraving (RIE) type plasma uranium engraver in which the wafer is placed on the RF powered lower electrode and the upper electrode is typically grounded or by individual Driven by frequency. Furthermore, wafer electrode heating is typically limited to less than 1 〇〇t due to active thermal budget and hazard considerations. SiF4-based PECVD suggests that the 111 £ mode plasma will not provide adequate deposition as the film is continuously removed by simultaneous uranium engraving and sputtering. It has been unexpectedly discovered that under optimal conditions, a robust film can be deposited at a suitable rate using RIE mode plasma. Furthermore, increasing the optimal amount of RF bias power (e.g., 2 MHz or other low frequency power, where the low frequency power is defined below 5 MHz) improves deposition non-uniformity and film robustness. Ideally -20- 200818313 The 2 MHz power is preferably 〇~looo w, or better 5~500 W. Other methods of providing low bias energy can be used. The layer to be etched may be a dielectric layer (eg, hafnium oxide), or a conductive layer (eg, metal and germanium or other type of semiconductor), or a hard mask layer (eg, tantalum nitride and oxynitride) . In order to etch the conductor layer, a halogen such as chlorine, fluorine, or bromine may be used in the etching step. Other benefits of some embodiments are avoiding etch taper and etch stop. It has been unexpectedly discovered that the addition of H2 to the protective layer gas comprising SiF4 allows control of the deposition process. In a preferred embodiment of the invention, it is desirable that some of the components of the deposition gas will not mix with the components of the etching gas as some mixing reduces the effectiveness of the individual deposition and etching processes. Therefore, the controller should time the gas flow so that a gas is depleted before adding another gas. In the above embodiment, SiF4 was not provided during the etching. • An inert gas other than argon may be used as a carrier gas during etching and deposition. An example of another inert gas can be ammonia, ruthenium, and/or ruthenium. In the preferred embodiment, no repolymerization of the chemical is required during the dielectric etch. Low-polymerization uranium engraving chemicals help to avoid coneing and uranium engraving. In a preferred embodiment, a typical HAR fluorinated carbon etch chemistry can be used without the addition of individual repolymerized components, such as CH3F or CH2F2. -21 - 200818313 Test Results Perform the following tests:
測試1 :整體矽晶圓沈積和鈾刻特徵化 此測試說明使用SiF4以將含矽膜沈積在裸矽晶圓上之 方法。在此例中，將使用以下製程條件：晶圓區壓力（ WAP ) 100 mTorr、5 0 0 W 的 6 0 MHz RF、100 seem 的 SiF4 、190 seem的H2、225 seem的Ar、饋送氣體分佈70 %中 心重量、下電極溫度60 °C、上電極溫度1〇〇 °C、針對內部 和外部區域的後側氦壓力30 Torr、以及處理時間180秒 。已沈積膜以KLA F5X的橢圓計描繪其特性。此測試提 供具有143.3 nm的平均厚度、47.8 nm/m in平均沈積速率 、以及 11.3%的3-σ均勻度之矽層沈積，在具有19.7 nm 範圍（13.7%)之整體晶圓上方（16·1 nm)。已沈積膜接 著經歷60秒的典型HAR氧化物蝕刻製程。已鈾刻晶圓接 著以新膜模式之KLA F5X的橢圓計描繪其特性。因此， 砂層具有57.111111/11^11的平均餓刻速率、以及36.5%的3-〇 均勻度，在具有27.1 nm/min範圍（47.6%)之整體晶圓 (20.8 nm/min)上方。 測試2 :以2 MHz RF偏壓的沈積製程之比較 在此測試中，所有製程條件係與測試1中的製程條件 相同，除了同時施加200 w的2 MHz之RF偏壓功率以外 。此測試係提供具有133·3 nm的平均厚度、44.43 nm/min -22- 200818313 平均沈積速率、以及6.6%的3-σ均勻度之矽層沈積 有1 0 · 4 nm的範圍（7.8 % )之整體晶圓上方（8 · 7 已沈積膜接著經歷6 0秒的典型H AR氧化物飩刻製 蝕刻晶圓接著以新膜模式之KLA F5X的橢圓計描 性。因此，矽層具有46.4 nm/min的平均蝕刻速率 7.5%的3-〇均勻度，在具有5.6 11111/11^11範圍（12· 整體晶圓（3.5 nm/min)上方。增加2 MHz的RF 著地改善沈積均勻度（在3-σ上46%之減低）以及 氧化物蝕刻的抗飩刻性（蝕刻率減低23 % )。 測試3 :在局部蝕刻之圖案化晶圓上的沈積 在此測試中，對於已由典型HAR氧化物蝕刻 3 00秒蝕刻的晶圓，施加如同測試2般相同的沈 1 20秒。測試3的橫剖面掃描電子顯微鏡（SEM ) 果係如以下表1所給定。爲了比較，亦分析僅餽刻 之樣品（比較範例3 a)並摘要於表1中。該資料顯 CD之劇烈縮減（44% )而沒有任何收縮或底部插接 上，非預期地發現到在SiF4沈積製程的期間，孔深 伸爲152 nm。此證明以SiF4爲基的沈積製程是斥 遮罩CD而不在高縱橫比孔洞中致使蝕刻停止的有Test 1: Overall 矽 Wafer Deposition and Uranium Characterization This test illustrates the method of using SiF4 to deposit a ruthenium-containing film on a bare ruthenium wafer. In this example, the following process conditions will be used: wafer area pressure ( WAP) 100 mTorr, 500 W 60 MHz RF, 100 seem SiF4, 190 seem H2, 225 seem Ar, feed gas distribution 70 % center weight, lower electrode temperature 60 °C, upper electrode temperature 1 ° ° C, back side helium pressure 30 Torr for internal and external areas, and processing time 180 seconds. The deposited film is characterized by an ellipsometer of KLA F5X. This test provides a bismuth layer deposition with an average thickness of 143.3 nm, an average deposition rate of 47.8 nm/m in , and a 3-σ uniformity of 11.3% over the entire wafer with a 19.7 nm range (13.7%). 1 nm). The deposited film is then subjected to a typical HAR oxide etch process for 60 seconds. The uranium engraved wafers are characterized by an ellipsometer of the KLA F5X in a new film mode. Therefore, the sand layer has an average starvation rate of 57.111111/11^11 and a 3-〇 uniformity of 36.5% over the entire wafer (20.8 nm/min) having a range of 27.1 nm/min (47.6%). Test 2: Comparison of deposition processes with 2 MHz RF bias In this test, all process conditions were the same as those in Test 1, except that 200 W of 2 MHz RF bias power was applied simultaneously. This test provides an average thickness of 133·3 nm, an average deposition rate of 44.43 nm/min -22-200818313, and a 6.7% 3-σ uniformity of 矽 layer deposition in the range of 10 · 4 nm (7.8 %) Above the bulk wafer (8 · 7 deposited film followed by a typical H AR oxide etched wafer for 60 seconds followed by the ellipsometry of the new film mode KLA F5X. Therefore, the germanium layer has 46.4 nm The average etch rate of /min is 7.5% 3-〇 uniformity, with a range of 5.6 11111/11^11 (12. over the entire wafer (3.5 nm/min). Increasing the RF grounding of 2 MHz improves the deposition uniformity ( 46% reduction on 3-σ) and etch resistance of the oxide etch (etch rate reduced by 23%). Test 3: Deposition on locally etched patterned wafers in this test, for The HAR oxide etched the 300 sec etched wafer and applied the same as the test 2 for 20 seconds. The cross-sectional scanning electron microscope (SEM) of Test 3 is given as shown in Table 1. For comparison, analysis is also performed. Samples that were only engraved (Comparative Example 3 a) and summarized in Table 1. This data shows a dramatic reduction in CD (44 %) without any shrinkage or bottom plugging, it was unexpectedly found that the hole depth was 152 nm during the SiF4 deposition process. This proves that the SiF4-based deposition process is masked CD instead of high aspect ratio. There is a hole in the hole that causes the etching to stop.
:，在具 nm ) 〇 :程。已 繪其特 :、以及 0 % )之 功率顯 對HAR 電漿的 積製程 分析結 3 00秒 示上部 。事實 度被延 以縮減 效方法 -23- 200818313 表1 :局部蝕刻圖案化晶圓之沈積 比較範例3a : 以300秒的HAR 鈾刻之樣品 範例3 : 以300秒的HAR蝕刻之樣品 後，在120秒的SiF4沈積 上部CD(mn)(橫剖面SEM) 190 106 鈾刻前方和停止層之間的距 離（nm)(橫剖面SEM) 337 225 測試4 :圖案化晶圓的後沈積蝕刻 在此測試中，來自測試3的晶圓以相同典型HAR氧 化物蝕刻電漿來進一步蝕刻1 〇〇秒，以完成整體飩刻製程 。該樣品接著以氧灰化電漿來處理，以移除遮罩層，以及 針對SEM橫剖面化。結果（範例4 )係在以下表2中給定 。爲了比較，範例4a顯示樣品經歷2步驟蝕刻（3 00秒加 上100秒）之HAR蝕刻而沒有SiF4沈積步驟的結果。如 表中所示，在第二樣品（蝕刻-沈積-蝕刻）中幾乎是完全 地消除弓彎。氧灰化電漿從二樣品移除有機遮罩。相對照 之下，無機含矽鈍化層存有氧灰化電漿，且在第二樣品的 SEM中是清楚可見的。這是SiF4沈積製程係自遮罩保角 地沈積一含矽膜薄層之直接證據’其往下地深入已飩刻之 孔洞。以矽爲基的側壁鈍化膜對非所欲之橫向蝕刻具有更 高的抗鈾性，因此使剖面之弓彎最小化。此範例顯示在局 部飩刻之後施加SiF4沈積是一種有效的弓彎防護方法。 -24- 200818313 表2 :圖案化晶圓的後沈積蝕刻 比較範例4a: 以300秒的HAR蝕 刻加上100秒的 HAR鈾刻之樣品 範例4: 以300秒的HAR蝕刻、 120秒的SiF4沈積、100 秒的HAR蝕刻之樣品 上部CD wl(nm)(橫剖面SEM) 117 122 弓彎CD(nm)(橫剖面SEM) 156 127 測試5 :連續蝕刻-沈積-鈾刻製程 在此測試中，該晶圓以單一製法中的下列程序來連續 地處理：200秒之典型HAR蝕刻、60秒之SiF4沈積、和 200秒之典型HAR飩刻。經處理之晶圓接著經歷〇2灰化 電漿、和針對SEM橫剖面化。結果如以下表3所示（範 例5 )。在4 0 0秒之連續蝕刻（範例5 a )之比較範例中， 由於嚴重的條紋導致上部CD被弓彎爲148 nm。嚴重的條 紋係爲遮罩層之毀害和扭曲之結果。相對照之下，範例5 之由上而下的SEM顯示在鈾刻完成之後HAR之圓形開口 沒有條紋。表3亦顯示在蝕刻期間，施加SiF4沈積步驟時 ，在鈾刻之後會餘留較多遮罩。除了上部條紋以外，參見 第1 〇圖，比較範例5a顯示介於上部和弓彎深度之間的 12 9nm之頸形（縮減）CD (第10圖中之w4)。相對照之 下，在蝕刻期間未施加SiF4沈積的樣品中並未觀察到頸形 。此範例顯示在HAR飩刻製程之間施加SiF4沈積不僅可 以縮減弓彎，亦可以保護遮罩層，因此減低條紋、上部 CD弓彎、和頸形。 -25- 200818313 表3 :連續飩刻-於 b積-蝕刻製程 比較範例5a : 以400秒連續 HAR鈾刻之樣品 範例5 : 以200秒之HAR蝕刻、60秒 之SiF4沈積、接著20秒之 HAR鈾刻(連續處理)之樣品 上部CD wl(mn)(橫剖面SEM) 148 127 弓彎CD w2(nm)(橫剖面SEM) 155 142 在蝕刻之後餘留的遮罩(nm)( 橫剖面SEM) 201 247 上部CD(mnX由上而下SEM) 168 140 測試6 :上部CD縮減的後沈積 在此測試中，晶圓以單一製法中首先以30秒的SiF4 沈積來處理，接著400秒的典型HAR氧化物蝕刻。結果 如表4所示。爲了比較，來自直接蝕刻而沒有SiF4預先沈 積的資料（比較範例5a )亦被列入表4中。如表中所示， 在鈾刻之前施加30秒的SiF4的沈積達成36 nm的上部 CD縮減。再者，在預蝕刻SiF4沈積處理之樣品中會餘留 較多遮罩。此顯示在蝕刻期間，SiF4預沈積保護遮罩層。 表4 :上部CD縮減的後沈積 比較範例5a : 沒有SiF4預處理 (400秒的HAR蝕刻 )之樣品 範例ό : 以30秒的SiF4沈積之 樣品之後，400秒的 HAR蝕刻之樣品 上部CD(nmX由上而下SEM) 168 132 在蝕刻之後餘留的遮罩(nm)(橫 剖面SEM) 201 256 -26- 200818313 第11圖係爲使用本發明的實施例之一所鈾刻之特徵 1116的槪要圖。如圖所示，特徵1116並不具有弓彎，然 而具有垂直剖面。 雖然係以較佳實施例敘述本發明，但對其加以修改、 變更及各種等效之取代仍不脫離本發明之範圍。亦應注意 本發明之方法及裝置可以許多其他方式加以實行。因此， 以下所附之申請專利範圍係刻意解讀爲包含所有修改、變 更及各種等效之取代而不脫離本發明之精神與範圍。 【圖式簡單說明】 本發明藉由範例而描述如下，而非用以限制本發明之 範_，在伴隨附圖之圖式中，其中相似元件符號係參照相 似元件，且其中·· 第1圖係爲一新式蝕刻製程的流程圖。 第2A至2F圖係爲使用該新式製程來形成一特徵的槪 要圖。 第3圖係爲可用於實施本發明的一系統之槪要圖。 第4A至4B圖係爲可用於實施本發明的一電腦系統之 槪要圖。 第5圖係爲本發明的另一實施例。 第6A至6D圖係爲使用該新式製程來形成一特徵的 槪要圖。 第7圖係爲本發明另一^實施例之更具體的流程圖。 第8A至8D圖係爲使用該新式製程來形成一特徵的 -27- 200818313 槪要圖。 第9圖係爲使用導致弓彎的製程之習知技藝中已飩刻 的一特徵之槪要橫剖面圖。 第1 0圖係爲使用導致弓彎的製程之習知技藝中已飩 刻的另一特徵之槪要橫剖面圖。 第1 1圖係爲使用本發明一實施例之已蝕刻的一特徵 之槪要橫剖面圖。 【主要元件符號說明】 204 :遮罩 2 0 8 :介電層 2 1 0 :阻障層 2 1 2 :保護性含矽層 2 1 6 :特徵 2 1 8 :矽保護層 # 300 :處理室 3 02 :限制環 304 :上電極 3 〇 8 :下電極 3 1 0 :氣體源 3 1 2 :排出幫浦 3 1 4 :蝕刻劑氣體源 3 1 6 :額外氣體源 320 :排出幫浦 -28- 200818313 :反應器蓋 :控制器 :第一控制閥 :第二控制閥 :電漿容室 :第三控制閥 :氣體入口 :第一 RF源 :第二RF源 :室壁 :基板晶圓 :電腦系統 :監視器 :顯不器 :殼體 :硬碟機 :鍵盤 ’·滑鼠 :磁碟 =系統匯流排 :處理器 :記憶體 =固定式磁碟 4 3 0 :喇叭 200818313 :網路介面 :光阻遮罩 :介電層 :阻障層 :特徵 :保護性含矽層 :遮罩 :介電層 :阻障層 =特徵 :保護性含矽層 :光阻遮罩 :介電層 z阻障層 =特徵 6 :特徵 6 :特徵 -30:, with nm) 〇 : Cheng. The power has been plotted: and 0%). The power of the HAR plasma is analyzed. The knot is 300 seconds. The fact is extended by the reduction method -23- 200818313 Table 1: Deposition of locally etched patterned wafers Comparative Example 3a: Samples with 300 sec HAR uranium engraving Example 3: After 300 sec HAR etching samples, 120 second SiF4 deposition upper CD (mn) (cross-sectional SEM) 190 106 distance between uranium engraved front and stop layers (nm) (cross-sectional SEM) 337 225 Test 4: Post-deposition etching of patterned wafers In the test, the wafer from Test 3 was further etched with the same typical HAR oxide etch plasma for 1 sec to complete the overall etch process. The sample was then treated with an oxygen ashing plasma to remove the mask layer and cross-section for SEM. The results (Example 4) are given in Table 2 below. For comparison, Example 4a shows the results of a HAR etch of the sample subjected to a 2-step etch (300 sec plus 100 sec) without the SiF4 deposition step. As shown in the table, the bow bend is almost completely eliminated in the second sample (etch-deposit-etch). The oxygenated ashing plasma removes the organic mask from the two samples. In contrast, the inorganic ruthenium-containing passivation layer contained oxygenated ashing plasma and was clearly visible in the SEM of the second sample. This is the direct evidence that the SiF4 deposition process deposits a thin layer of tantalum film from the mask conformal depth, which goes deeper into the hole that has been engraved. The germanium-based sidewall passivation film has a higher uranium resistance for undesired lateral etching, thus minimizing bowing of the profile. This example shows that applying SiF4 deposition after local engraving is an effective bow-bending protection method. -24- 200818313 Table 2: Post-deposition Etching of Patterned Wafers Comparative Example 4a: Samples with a 300 sec HAR etch plus 100 sec HAR uranium samples Example 4: 300 sec HAR etching, 120 sec SiF4 deposition 100 second HAR etched sample upper CD wl (nm) (cross-sectional SEM) 117 122 bow bend CD (nm) (cross-sectional SEM) 156 127 test 5: continuous etching-deposition-uranium engraving process in this test, The wafer was processed continuously in the following procedure in a single process: a typical HAR etch of 200 seconds, a SiF4 deposit of 60 seconds, and a typical HAR etch of 200 seconds. The treated wafer is then subjected to 〇2 ashing plasma and cross-sectioning for SEM. The results are shown in Table 3 below (Example 5). In the comparative example of continuous etching (Example 5a) of 400 seconds, the upper CD was bowed to 148 nm due to severe streaks. Severe streaks are the result of the destruction and distortion of the mask layer. In contrast, the top-down SEM of Example 5 shows that the circular opening of the HAR has no streaks after the uranium engraving is completed. Table 3 also shows that during the etching process, when the SiF4 deposition step is applied, more mask remains after the uranium engraving. In addition to the upper stripe, see Figure 1, Comparative Example 5a shows a 12 9 nm neck (reduced) CD (w4 in Figure 10) between the upper and bower depths. In contrast, no neck shape was observed in the sample in which SiF4 deposition was not applied during the etching. This example shows that the application of SiF4 deposition between the HAR engraving processes not only reduces bowing but also protects the mask layer, thus reducing streaks, upper CD bows, and neck shapes. -25- 200818313 Table 3: Continuous engraving-to-b-etching process comparison Example 5a: Sample with continuous HAR uranium engraving in 400 seconds Example 5: etched with 200 seconds of HAR, 60 seconds of SiF4 deposition, followed by 20 seconds HAR etched (continuously processed) sample upper CD wl (mn) (cross-sectional SEM) 148 127 bow bend CD w2 (nm) (cross-sectional SEM) 155 142 mask remaining after etching (nm) (cross section) SEM) 201 247 Upper CD (mnX top down SEM) 168 140 Test 6: Post deposition of upper CD reduction In this test, the wafer was first treated in a single process with 30 seconds of SiF4 deposition, followed by 400 seconds. Typical HAR oxide etch. The results are shown in Table 4. For comparison, data from direct etching without prior deposition of SiF4 (Comparative Example 5a) is also listed in Table 4. As shown in the table, the deposition of SiF4 applied for 30 seconds prior to uranium engraving achieved an upper CD reduction of 36 nm. Furthermore, more mask remains in the pre-etched SiF4 deposition treated sample. This shows that during etching, SiF4 pre-deposits the protective mask layer. Table 4: Post-deposition of the upper CD reduction Comparative Example 5a: Sample sample without SiF4 pretreatment (400 sec HAR etch) ό: Sample of the 400 sec HAR etched sample CD (nmX) after 30 seconds of SiF4 deposition of the sample From top to bottom SEM) 168 132 Mask (nm) (cross-sectional SEM) remaining after etching 201 256 -26- 200818313 Figure 11 is a feature of the uranium engraved feature 1116 using one of the embodiments of the present invention I want to map. As shown, feature 1116 does not have a bow, but has a vertical profile. Although the present invention has been described in its preferred embodiments, it is to be understood that modifications, modifications and various equivalents may be made without departing from the scope of the invention. It should also be noted that the method and apparatus of the present invention can be implemented in many other ways. Therefore, the scope of the appended claims is intended to be construed as a BRIEF DESCRIPTION OF THE DRAWINGS The present invention is described by way of example only, and is not intended to limit the scope of the invention. The diagram is a flow chart of a new etching process. Figures 2A through 2F are diagrams of the use of this new process to form a feature. Figure 3 is a schematic diagram of a system that can be used to practice the invention. Figures 4A through 4B are schematic diagrams of a computer system that can be used to implement the present invention. Figure 5 is another embodiment of the present invention. Figures 6A through 6D are schematic views of the use of this new process to form a feature. Figure 7 is a more detailed flow chart of another embodiment of the present invention. Figures 8A through 8D are schematic diagrams of the use of the new process to form a feature -27-200818313. Figure 9 is a cross-sectional view of a feature that has been engraved in the prior art of using the process leading to bow bending. Figure 10 is a cross-sectional view of another feature that has been engraved in the prior art of using the process leading to bowing. Fig. 1 is a schematic cross-sectional view showing a etched feature of an embodiment of the present invention. [Main component symbol description] 204: mask 2 0 8 : dielectric layer 2 1 0 : barrier layer 2 1 2 : protective germanium layer 2 1 6 : feature 2 1 8 : germanium protective layer # 300 : processing chamber 3 02 : Restriction ring 304 : Upper electrode 3 〇 8 : Lower electrode 3 1 0 : Gas source 3 1 2 : Discharge pump 3 1 4 : Etchant gas source 3 1 6 : Extra gas source 320 : Exhaust pump -28 - 200818313 : Reactor cover: Controller: First control valve: Second control valve: Plasma chamber: Third control valve: Gas inlet: First RF source: Second RF source: Chamber wall: Substrate wafer: Computer system: monitor: display device: housing: hard disk drive: keyboard '·mouse: disk = system bus: processor: memory = fixed disk 4 3 0: speaker 200818313: network interface : photoresist mask: dielectric layer: barrier layer: features: protective layer containing germanium: mask: dielectric layer: barrier layer = features: protective layer containing germanium: photoresist mask: dielectric layer z Barrier Layer = Feature 6: Feature 6: Feature -30