TW200814531A - A low-loss frequency divider circuit - Google Patents

Abstract

The present invention discloses a low-power- consumption frequency divider circuit. It mainly comprises a signal source; a signal injection circuit; and a resonant circuit. The low-power consumption frequency divider circuit according to the present invention mainly uses the configuration of current reused circuit to form the common current path for reducing the power loss in the disclosed frequency divider circuit.

Description

200814531 IX. Inventive description: [Technical field of invention] % ^ There are 11 kinds of frequency divisions 11 in the Ming system, and more specifically about the circuit structure of 4 kinds of current reuse to achieve the low power loss frequency division of the oscillation path. Circuit. Using a [prior art] button, in the communication system towel, the local vibrator (_ 〇sc out a (four) is used to provide - the mixed signal for the low-frequency modulation signal of the transmission end · · or for receiving signals Down conversion makes it demodulate. Many of the ratios of power consumption (4) fall in the RF carrier and local oscillator. To avoid consuming too much invalid power, low power and fully integrated frequency synthesizers are needed. In the frequency synthesizer, the main power loss lies in the voltage controlled oscillator and the frequency divider. The RF phase-locked loop has been widely used in wireless or wired applications, such as frequency synthesizers and clock generators. High-frequency frequency divider is used in this circuit. There are several ways to implement high-frequency frequency divider. (1) Common mode logic type (common mode 1〇gic (7), static logic form except frequency_1) (3), dynamic logic (dynamic logic); (4), Miller frequency divider (miuer (four) and (5), injection lock frequency divider (injecti〇n 1〇 called divider). Modular logic form dividers and Miller frequency dividers can work at higher Frequency, but the disadvantage is that f is very high

SAT-P060058-TW 200814531 Power loss. The dynamic logic frequency divider only requires very little power loss', but its disadvantage is that the maximum operating frequency is low. The injection lock frequency is high, and the power loss is smaller than the common mode logic form divider and Miller frequency divider. Therefore, the injection lock frequency divider is a good choice for designing high frequency phase-locked loop. At present, the injection-locked frequency divider is used to implement the injection-locked frequency divider circuit by using an inductor-capacitor cavity as a basic oscillator. Inductive-capacitor-slot resonator oscillators are used to implement injection-locking. The private-path can be divided into direct injection type injection-locked frequency divider and sub-harmonic injection-locked frequency divider. The direct injection lock frequency divider is to inject an oscillation source signal into the inductor_capacitor slot and the oscillator cavity oscillator through a switch circuit, thereby affecting the oscillation frequency of the oscillator. The structure of the device is a traditional differential inductor _ capacitor slot cross-coupled pair oscillator, both the oscillator and the balanced differential oscillator use a parallel connection, but there are two ways of differential parallel connection. The current path makes the power loss of the circuit large. Known techniques can be found in U.S. Patent No. 4,8,6,872

Cowley et al., entitled "Frequency modulation receiver employing frequency divider", reveals the use of injection locking (111 knows (^〇1_1(^1^ sentence divider production frequency) Modulated receivers. However, in the prior art, the oscillators used more current paths, thus causing a large power loss.

SAT-P060058-TW 200814531 In order to solve the above problems, there is a need to overcome the shortcomings of the prior art. Job type:: Frequency tester electric power test and research, and cut the power of low power loss current utilization, and take the spirit, finally researched the power consumption of the reduced component.疋n road, can be large [invention content] • In the issue of Γ=Γ technology, the main purpose of the present invention is to have a low power loss divider circuit, mainly to facilitate the circuit to achieve the common current path of the oscillator , using the power loss of the low component. The rate is up to two; the main purpose is that the invention provides a low power. The second one is an electric circuit, which includes a signal source; a signal source: ' and an oscillating circuit. The signal source provides an RF signal; the signal source injection circuit is connected to the signal source; and the oscillation circuit # is connected to the signal source injection circuit. The signal source circuit is mainly for providing injection signal injection into the LC tank oscillator circuit to form a complete injection lock elimination frequency; and the vibration circuit is configured to provide 50% oscillation close to the signal source injection circuit. frequency. According to one aspect of the present invention, the signal source injection circuit further includes a plurality of resistors; a plurality of capacitors; and - a transistor is coupled to the plurality of resistors and the plurality of capacitors. According to the characteristics of this month, the number of the oscillating circuits is

SAT-P060058-TW 200814531 decided to have a low power loss. According to one feature of the present invention, the injection locking mode of the frequency divider trunk is 1 m ^ U ^ /, and the plurality of inductors - the Lei Xuan slot # Zhen pen system is composed of a plurality of N * "and effects" The vibrating circuit is continuously vibrated. According to a feature of the present invention, the signal source is composed of one N-type gold-oxygen half field effect transistor. The path is _ _ ^ , θ according to the present invention. The oscillating circuit is an alternating-coupled 5-vibrator, a (four) device structure in the Armstrong oscillating group, and a test-band sub-vibration μ& composition according to the present invention, wherein the low power loss The frequency division|§ circuit utilizes the circuit architecture of the Rebecca 5 m to reuse the oscillations. The shared power & path 'heart reduces the power loss of the component. To make the above and other objects, features, and advantages of the present invention. The following is a detailed description of several preferred embodiments, and is described in detail below with reference to the accompanying drawings. [Embodiment] Although the present invention can be embodied in different forms, the embodiment Nothing and the following description are preferred for the present invention. Embodiment, disclosed herein alkylene learn by considerations based paradigm one embodiment of the present invention, and is not intended to limit the invention to the illustrated and / or described in the specific embodiment.

SAT-P060058-TW 200814531 The main idea of the present invention is to provide a 籀 σ _ 仏 具有 具有 具有 具有 具有 具有 具有 具有 具有 具有 具有 具有 具有 具有 具有 具有 & & & & & & & & & & & & & & & & & & & & & & & & & & & & & The frequency converter circuit 100 can effectively reduce the power loss of the entire circuit. Therefore, please refer to the first month of the month, brother 1 map, which shows the hair

The block diagram of the structure. The division (four) circuit _ having a low power loss includes a signal source 30; a signal source injection circuit 2A; and an oscillation circuit 10. The signal source 30 provides an RF signal; the signal source injection circuit 20 is coupled to the signal source 30; and the oscillating circuit 忉 is coupled to the signal source injection circuit 20. The signal source injection circuit 2 is configured to receive the RF signal from the signal source 30; and the oscillation circuit 10 is configured to provide an oscillation frequency close to the signal source injection circuit. The signal source injection circuit 2 includes a plurality of resistors (214) (215); a plurality of capacitors (212) (213); - an N-type gold oxide half field effect transistor (211) is connected to the plurality A resistor (214) (21 5) and the plurality of capacitors (212) (213) are configured to receive the RF signal from the signal source. The plurality of resistors (214) (215) and the plurality of capacitors (212) (213) are connected in series with each other for stabilizing the voltage of the signal source injection circuit 20. The oscillating circuit 10 includes a plurality of inductor-capacitor tank resonant circuits (101) (102) for providing a 50% oscillating frequency close to the signal source injection circuit 20. The plurality of inductor-capacitor tank resonant circuits (101) (102) are composed of a plurality of N-type gold oxide half field effect transistors

SAT-P060058-TW 200814531 (111) (112) produces a negative resistance effect for the oscillation circuit 1() to continuously oscillate. The value of the plurality of inductor-capacitor tank resonant circuits (1〇1) (1〇2) determines the frequency of the injection lock of the frequency divider circuit 1 with low power loss. In addition, the signal source injection circuit 2 () is composed of a minimum of one N-type metal oxide half field effect transistor (211); the oscillation circuit 10 is an interactive coupled oscillator, an Armstrong oscillator and a tester An oscillator structure of the group consisting of oscillators; consisting of at least one N-type MOS field-effect transistor (111) (112). In operation, when the injection signal (f〇) is injected by the signal source 3 and the natural oscillation frequency (ffree) of the oscillation circuit 10 is close to half (1/2) of the injection signal (f〇), then A (f〇/2) signal output is obtained by injecting a locked frequency divider. However, if the natural oscillation frequency of the oscillation circuit is too large with the frequency (f〇/2), the injection lock frequency divider cannot be locked. Therefore, the signal of the (f〇/2) frequency cannot be output. The calculation method of the ratio of the injection locking target (Locking-Range%) is “the highest input and the frequency that can be locked (f〇H), minus the frequency of the lowest input and can be locked (fOL), and then Divide the value by twice the slot oscillation. The natural oscillation frequency (ffree) of the device is (L〇cking_Range A [(f〇H - f〇L)/( 2* ffree)])". In circuit design, it is expected that the larger the ratio of the injection locking range, the better. Fig. 2 shows a detailed circuit diagram of the first embodiment of the present invention. In the circuit, the oscillating circuit 1 is electrically coupled by a pair of sized metal oxide half field effect transistors (111) (112) to generate a negative resistance.

SAT-P060058-TW 10 200814531 Circuit, whose main function is to generate a negative impedance to cancel the equivalent parasitic impedance generated by the capacitive inductance in the resonant cavity, so that the oscillation circuit 1〇 can maintain the condition of oscillation. The N-type gold-oxygen half-field effect transistor (m) (ii2) has a structure in which they are stacked one on another, so that there is only one current path, thereby reducing the power loss of the overall circuit. The plurality of inductor-capacitor tank resonant circuits (101) (102) of the oscillating circuit 1 are composed of two inductors (113) (114) and two varactors (115) (116) 'due to the use of current The way of reuse causes the potentials of the end point a and the end point b to be inconsistent, so that the gate bias of the transistor (111) (112) is different. Therefore, an additional capacitor (119) (12 〇) and a resistor (121) (122) are added to the circuit, the function of the capacitor is a DC blocking, the resistance is an AC blocking, and the transmitting resistor can re-given a new DC potential, so that The polarity of the transistor (m) (112) and the source (Vds), the gate and the source (d is the relative operating bias of the d; the other end of the terminal ^ and the end point d potential is not the same will also cause The problem of inconsistent point bias at both ends of the variable capacitor (115) (116). Adding additional capacitors (117) (118) and resistors (123) (124) can improve the mutual interference of the upper and lower circuits, so join The capacitor (125) filters and removes unnecessary noise, and the capacitor (126) (127) is a DC blocking output capacitor, so that the difference (four) μ signal has the same DC level and the wheel (four) RF signal is transmitted to The next stage circuit. The drain of the N-type gold oxygen half field effect crystal (211) The sfl source injection circuit 20 is composed of a transistor (211).

S AT-P060058-TW 11 200814531 is connected to the source terminal a and the terminal b respectively. However, in order to solve the problem that the terminal a and the terminal b are inconsistent. The resistor (214) (, 2 and the private valley (212) (213) can be added to solve the problem. The MOSFET and the source of the MOSFET are connected between the capacitor and the resistor, that is, End point e and end point f. The gate of the metal oxide half field effect transistor (211) is where the signal source 30 is injected, when an RF signal source 30 (f〇) is used by the gold oxide half field effect transistor (211) The gate of the metal oxide half-field effect transistor (211) is switched with the amplitude of the signal source % signal. When the signal source 3〇 amplitude is at a high potential %, the end point a is turned on with the end point b, then the gate of the MOS field transistor (111) (112) is short-circuited, and the injection signal will affect the operating frequency of the oscillating packet 10; conversely, when When the amplitude of the injected signal source is at a low potential, the drain and source of the gold-oxygen half-field effect transistor (211) are turned off, that is, the gate of the gold-oxygen half-field effect transistor (111) (112) is extremely open. Therefore, when injected When the signal source 3〇 is injected into the gate of the gold/oxygen half-effect transistor (211) at a frequency (f〇), the resonant cavity of the oscillation circuit 1〇 is also The two ends are short-circuited or open. Therefore, the natural resonant frequency (ffree) of the oscillating circuit 1 将 will be affected by the injection source signal (heart) if the natural resonant frequency (ffree) of the oscillating circuit 10 is close (f〇/2 ), and falling within the frequency range of the injection lock, the oscillating circuit 10 will output an output signal having a frequency of (f 〇 / 2). In addition, the plurality of inductor _ capacitor slot resonant circuit (100 (1 〇 2) The variable capacitor (115) (116) in addition to the function of the resonant capacitor, the function of the variable capacitance value can be changed.

12 S AT-P060058-TW 200814531 The operating frequency of the number of inductor-capacitor tank resonant circuits α,) = the locking of the frequency divider circuit with low power loss _, the second * tea photo 3®, * is the second embodiment of the invention:; two-way diagram. The circuit architecture is different from the first embodiment of the present invention. KNOW: The basic structure is a balanced inductor/capacitor slot 2 (10) chest to form the oscillator | It consists of a basic two-two type gold-oxygen half-field effect transistor (311) and two inductors (13) (314) and a variable capacitor (1)7), an Armstrong oscillator, which is variable. The gate (ie, terminal c) and the capacitor (3) of the capacitor (3 (7) is connected to the N-type gold-oxygen half field effect transistor (5)) form an inductor-capacitor tank resonant circuit (101). The N-type gold-oxygen half-field effect transistor (312) and the inductor (315) (316) and the variable capacitor (318) constitute another set of inductors_capacitor slot residual circuit (1G2), and are connected in series to the gold-oxygen half-field power The source of the crystal (311), the capacitor (322) is connected at the end point a and the end point b in order to combine the signals of the plurality of inductor-capacitor channel spectral circuits (101) (102) to generate a differential The output of the signal, this architecture is the so-called balanced differential oscillator. Similarly, the use of the % machine reuse method will cause the potentials of the end point a and the end point b to be inconsistent, resulting in a different gate bias voltage of the N-type metal oxide field effect transistor (311) (312). . Therefore, an additional resistor (329) (33 〇) is added to the circuit to make the pole and source (vDS), gate and source (Vgs) of the N-type MOS field-effect transistor (311) (312). The ancestors are consistent with the work bias; =

13 SAT-P060058-TW 200814531 The difference in DC potential between the outer terminal C and the terminal d also causes the inconsistency of the bias voltage of the variable capacitor (317) (318). Adding additional capacitors (319) (320) and resistors (327) (328) improves. In order to avoid mutual interference between the upper and lower circuits, a filter capacitor (321) is added to filter unnecessary noise, and the capacitor (3.25) (326) is a DC blocking output capacitor, so that the differential output signals have the same The DC level is transmitted and the output RF signal is transmitted to the next stage circuit. Please refer to Fig. 4, which shows a detailed circuit diagram of a third embodiment of the present invention. The basic structure is substantially the same as the second embodiment of the present invention, except that the variable capacitor (317) (318) circuit in the second embodiment is connected to the N-type MOS field-effect transistor (311) ( End point c and endpoint d of 312). Referring to Figure 5, there is shown a detailed circuit diagram of a fourth embodiment of the present invention. The basic architecture is balanced by the plurality of inductor-capacitor tank resonant circuits (101) (102) to form the oscillator circuit 10 for current reuse. The oscillating circuit 10 is different from the first embodiment in that the plurality of inductor-capacitor tank resonant circuits (101) (102) of the oscillating circuit 10 are controlled by Colbitz ((: 〇1? also 3) oscillator In the operation method, the third and fourth embodiments are substantially the same as the first embodiment. Referring to Fig. 6, there is shown a characteristic diagram of the first embodiment of the present invention. A measurement map with an injection-locked frequency range in which each V-shaped curve represents a different Vtune voltage

14 SAT-P060058-TW 200814531 Value. As the Vtune voltage value changes, the equivalent capacitance value of the variable capacitor (丨15) (116) changes, so the operating frequency of the frequency divider circuit 100 with low power loss also changes. In summary, unlike the prior art, more current paths are used so that k becomes a larger power loss. The present invention provides a frequency divider circuit 具有00 with low power loss, which mainly utilizes a circuit architecture for current reuse to achieve a common current path of the oscillator, which can reduce the power loss of the component. Although the present invention has been disclosed in the foregoing preferred embodiments, it is not intended to limit the invention, and various modifications and changes can be made without departing from the spirit and scope of the invention. As explained above, modifications and variations of the various types can be made without detracting from the spirit of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.

15 SAT-P060058-TW 200814531 BRIEF DESCRIPTION OF THE DRAWINGS [0012] The objects, features, and advantages of the embodiments are set forth in conjunction with the accompanying claims. The detailed description is as follows: = Figure is the structural block of the w circuit according to the present invention f = system display? It is a detailed circuit diagram of the first embodiment of the present invention. The figure 3 shows the details of the embodiment of the present invention. The fourth figure shows the detailed circuit diagram of the embodiment of the inventor's juice road map and the second month of Zhiyue. Fig. 5 is a detailed circuit diagram showing an embodiment of the fourth embodiment of the present invention. Fig. 6 is a characteristic diagram showing the first embodiment of the present invention. [Explanation of main component symbols] 10 Oscillation circuit 20 · Signal source injection circuit 30 Signal source 100 Demodulation circuit with low power loss (101) (102) Inductor-capacitor slot resonance circuit (111) (112) (211) (311) (312) N-type MOS half-field effect transistor (113) (114) (313) (314) (315) (316) Inductance (115) (116) (317) (318) Variable capacitor (117) ) (118) (119) (120) (125) (126) (127) (319) (320)

SAT-P060058-TW 16 200814531 (321) (322) (323) (324) (325) (326) Capacitors (121) (122) (123) (124) (327) (328) (329) (330) resistance

17 SAT-P060058-TW

Claims (1)

200814531 X. Patent application scope: 1 · A frequency divider circuit with low power loss, comprising: a signal source for providing an RF signal; a signal source injection circuit electrically connected to the signal source, Receiving and amplifying the RF signal from the signal source; and a vibration circuit ' electrically connected to the signal source injection circuit, receiving the RF signal from the signal source injection circuit, and using φ k for close to The oscillation frequency of the RF signal is 50%; wherein the oscillation circuit further comprises: a plurality of inductor-capacitor tank resonant circuits, and is configured to provide the oscillation frequency close to 50% of the RF signal; wherein the plurality of inductors The number of capacitor-slot resonant circuits determines the injection locking range of the divider circuit with low power loss. 2. The frequency divider circuit of claim 4, wherein the signal source injection circuit further comprises: a plurality of resistors; a plurality of capacitors; and the two books aa body are electrically connected to each other The plurality of resistors and the plurality of resistors are: for receiving the signal from the signal source; ;: the plurality of resistors and the plurality of capacitors are connected in series to each other to stabilize the signal source injection The voltage of the circuit. SAT-P060058-TW 18 200814531 3. If you apply for a patent range! The frequency divider circuit with low power loss, wherein the plurality of inductor-capacitor channel vibration circuits generate a negative resistance effect by a plurality of N-type gold-oxygen half field effect transistors for making the oscillation circuit Continue to oscillate. 4. The de-frequencying circuit with low power loss as described in claim i, wherein the signal source injection circuit is composed of at least one N-type MOS field-effect transistor. 5. The circuit of claim 1 having low power loss, wherein the vibrating circuit is composed of a minimum of one Ν type oxo field effect transistor. 6. The second low-power loss described in the first paragraph of the patent scope is: 2. The vibrational circuit is an interactive coupling of the vibrating two-mesh oscillator and the Cochlear oscillator. An oscillator structure. SAT-P060058-TW 19