TW200814279A - Power/ground stripe of an integrated circuit and layout method - Google Patents

Power/ground stripe of an integrated circuit and layout method Download PDF

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Publication number
TW200814279A
TW200814279A TW95132881A TW95132881A TW200814279A TW 200814279 A TW200814279 A TW 200814279A TW 95132881 A TW95132881 A TW 95132881A TW 95132881 A TW95132881 A TW 95132881A TW 200814279 A TW200814279 A TW 200814279A
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line
power
metal
horizontal
standard
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TW95132881A
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TWI308791B (en
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Shane Chen
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Via Tech Inc
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Abstract

A layout method of a power/ground stripe of an integrated circuit is disclosed. Standard cells of the integrated circuit are horizontally arranged. The power/ground stripe includes a plurality of horizontal metal lines formed on a metal layer and a plurality of vertical metal lines formed on another second metal layer. The horizontal metal lines include a horizontal power metal line and a horizontal ground metal line. The vertical metal lines include a vertical power metal line and a vertical ground metal line. The vertical power metal line is coupled to the horizontal power metal line and only covered with a power line of the standard cell. The vertical ground metal line is coupled to the horizontal ground metal line and covered with a ground line of the standard cell.

Description

200814279 九、發明說明: 【發明所屬之技術領域】 本發明係有關於一種積體電路,特別是有關於一種積 體電路的電源地網路及其佈置方法。 【先前技#?】BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrated circuit, and more particularly to a power ground network of an integrated circuit and a method of arranging the same. [Previous technology #?]

積體電路技術快速發展,電路的規模越來越大,速度 越來越快,同時,電路中電路單元的數量也越來越多。積 體電路需要有可靠的電源供應才能確保工作良好。電路規 模的擴大需要使用越來越多的電路單元,為了有效地控制 晶片的面積’電路單元多採用層疊結構來實現,於是,如 何供電給這些電路單元是一個重要的問題。通常,根據封 裝方式的不同,有兩種不同的供電方式,一種稱為頂上供. 電方式,常用於倒裝晶片(Flip Chip)封裝方式,另一種 稱為線結合(Bonding )。兩者相比較,頂上彳丘電方 式更加好一些。 積體電路中的電元件本身就是層疊結構的,再力口上 上面所說的,為了有效控制晶片的面積,電路單元也p _ 層疊結構,於是,這樣的結構給供電帶來了一 為了解決倒裝晶片(Flip Chip )封裝方式的供 定的困難。 電問題,採 用電源地網路(Power/Ground stripe)來供電給各個電广 元。也就是將各種功能的電路單元的電源線和接地、線八別 連接到電源地網路的電源線和接地線上,電源地 接到外部的電源,從而實現供電。The integrated circuit technology has developed rapidly, the scale of the circuit is getting larger and larger, and the speed is getting faster and faster. At the same time, the number of circuit units in the circuit is increasing. Integrated circuits require a reliable power supply to ensure good operation. The expansion of the circuit scale requires the use of more and more circuit units. In order to effectively control the area of the wafer, the circuit elements are mostly implemented in a stacked structure, so how to supply power to these circuit units is an important problem. Generally, there are two different power supply methods depending on the package method. One is called top-on power supply, which is often used for Flip Chip package, and the other is called Bonding. Compared with the two, the top of the Qiuqiu electric method is better. The electrical components in the integrated circuit itself are of a laminated structure, and the above-mentioned ones are mentioned above. In order to effectively control the area of the wafer, the circuit unit is also p _ laminated structure, so that such a structure brings a power supply to solve the problem. Difficulty in the provision of a Flip Chip package. For electrical problems, Power/Ground Stripe is used to supply power to each TV. That is, the power line and the ground and the line of the circuit unit of various functions are connected to the power line and the ground line of the power ground network, and the power source is connected to the external power source to supply power.

Client’s Docket N〇.:S3U05-0050-TW TT’s Docket No:0608-A40992-TW/Final /Joanne 5 200814279 為方便說明,在後面的描述中,無論實現什麼功能的 電路單元都將被簡化為具有電源線和地線的電路單元,稱 之為“標準單元”,同時,所有的標準單元都具有相同的 高度,而電路單元的寬度設計可以不同。此處,將這個統 一的標準單元的高度稱之為“標準高度”。 在目前的大型積體電路設計中’由於電路的規模越來 越大,速度越來越快,儘管採用多層金屬佈線,但互連線 資源(即電源地網路資源)還是相對短缺。為了得到更多 • 的互連線資源,不得不擴大晶片面積。然而又會帶來成本, 時序,歐姆壓降(IR-drop)等問題。 目前大型積體電路的電源地網路設計中’都不考慮標 準單元及其電源及接地線的尺寸,如第1A圖所示。第1A 圖是電源地網路的一種佈局方式,其中的“標準單元”被 省去,僅僅採用其電源線Vdd和接地線Vss表示。此處需 要說明,第1A圖所示的Vdd和Vss是間隔排列,Vdd和 Vss之間的間隔就是“標準高度”,正好放置一個“標準 _ 單元”,相鄰的兩個“標準單元”是反向排列,兩者公用 同一個Vdd或是Vss。當然,對於本領域的技術人員來說, 其他的排列方式也是可能的,同樣,應用本發明的技術方 案時只需要適當改動即可,以下面的說明都講結合第1A 圖採用的這種比較常見的方式進行。通常而言,將標準單 元的仔列(row)方向稱為水平方向(需要說明,“垂直”和 水平方向是指平行於晶片表面的面上的佈線方向’標 準單元的佇列(row)方向稱為水平方向,與之垂直的方向稱Client's Docket N〇.:S3U05-0050-TW TT's Docket No:0608-A40992-TW/Final /Joanne 5 200814279 For convenience of explanation, in the following description, the circuit unit regardless of what function is implemented will be simplified to have power The circuit elements of the line and ground are called "standard cells". At the same time, all standard cells have the same height, and the width of the circuit cells can be designed differently. Here, the height of this unified standard unit is referred to as "standard height". In the current large-scale integrated circuit design, the size of the circuit is getting larger and faster, and the speed of the circuit is increasing. Although the multi-layer metal wiring is used, the interconnection resources (that is, the power supply network resources) are relatively short. In order to get more of the interconnect resources, the wafer area has to be expanded. However, it will bring problems such as cost, timing, and IR-drop. At present, the power grid design of a large integrated circuit does not consider the size of the standard unit and its power supply and grounding wire, as shown in Figure 1A. Figure 1A shows a layout of the power ground network in which the "standard unit" is omitted, using only its power line Vdd and ground line Vss. It should be noted here that the Vdd and Vss shown in Figure 1A are spaced, and the interval between Vdd and Vss is the "standard height", just placing a "standard_unit", and the two adjacent "standard cells" are Reversed, both share the same Vdd or Vss. Of course, other arrangements are also possible for those skilled in the art. Similarly, only the appropriate modification is needed when applying the technical solution of the present invention, and the comparison described in conjunction with FIG. 1A is described in the following description. The common way is to proceed. In general, the row direction of a standard cell is referred to as a horizontal direction (it is to be noted that "vertical" and horizontal directions refer to the direction of the wiring parallel to the surface of the wafer surface" of the standard cell's row direction. It is called the horizontal direction, and the direction perpendicular to it is called

Client’s Docket N〇.:S3U05-0050-TW TT^s Docket No:0608-A40992-TW/Final /Joanne 6 200814279 為垂直方向),一般的電源地網路設計水平方向使用高層 金屬線,垂直方向使用低層的金屬線,繼續參考第1A圖, 現有技術中,金屬線的寬度沒有經過計算,所以通常都會 比2倍的標準高度更寬,因而造成在一個金屬線的寬度覆 蓋範圍内,會同時涉及到標準單元的電源線Vdd和地線 Vss,因此,必須使用比標準單元的電源線vdd或者地線 Vss高η層的金屬層作為垂直金屬線ιοιρ和i〇1G,高n+l 層的金屬層作為水平金屬線102P和102G,(第1A圖中 的視圖角度是從下往上,因此首先看到的是Vdd和Vss, 而垂直金屬線101P和101G和水平金屬線i〇2P和l〇2G的 部分會被擋住)這樣做的原因是,可以確保所有的標準單 元的電源線Vdd或者地線Vss都可以連接到垂直的金屬線 上,根據第1A圖所示,Vdd和Vss透過通孔(Via)llO連接 到101G和101P。由於標準單元的電源線Vdd和地線Vss 是水平佈置,它們和垂直方向的金屬線將會相連接,而為 了不造成電源地短路,垂直方向的金屬線必須是低層金 屬’水平方向的金屬線是高層金屬。 如果高層金屬線是垂直的,低層金屬線是水平的,即 使用比標準單元的電源線Vdd或者地線Vss高η層的金屬 層作為水平金屬線,高η+1層的金屬層作為垂直金屬線, 比如第1Β圖中所示的情況。此時,標準單元的電源線vdd 或地線Vss就可能有部分區域因為低層水平的電源地網路 線所阻擋,無法和高層垂直的電源地網路線連接,造成歐 姆壓降或其他問題。參考第1B圖(同樣,第圖中的視Client's Docket N〇.:S3U05-0050-TW TT^s Docket No:0608-A40992-TW/Final /Joanne 6 200814279 for vertical direction), general power ground network design uses high-rise metal wires in the horizontal direction, vertical direction For the lower metal wire, refer to FIG. 1A. In the prior art, the width of the metal wire is not calculated, so it is usually wider than the standard height of 2 times, so that it is involved in the width coverage of one metal wire. To the power supply line Vdd and the ground line Vss of the standard unit, therefore, it is necessary to use a metal layer higher than the power supply line vdd of the standard unit or the ground line Vss as the vertical metal lines ιοιρ and i〇1G, the metal of the high n+l layer The layers serve as horizontal metal lines 102P and 102G (the view angle in Fig. 1A is from bottom to top, so Vdd and Vss are first seen, while vertical metal lines 101P and 101G and horizontal metal lines i〇2P and l〇) The 2G part will be blocked. The reason for this is to ensure that all standard unit power lines Vdd or ground line Vss can be connected to the vertical metal line. According to Figure 1A, Vdd and Vss pass through. Via llO is connected to 101G and 101P. Since the power supply line Vdd and the ground line Vss of the standard unit are horizontally arranged, they will be connected to the vertical metal wire, and in order not to cause a short circuit of the power supply, the vertical metal wire must be a low-level metal 'horizontal metal wire. It is a high-rise metal. If the upper metal wire is vertical, the lower metal wire is horizontal, that is, a metal layer higher than the standard cell power supply line Vdd or the ground line Vss is used as the horizontal metal line, and the high n+1 layer metal layer is used as the vertical metal. Line, such as the one shown in Figure 1. At this time, the power line vdd or the ground line Vss of the standard unit may have some areas blocked by the low-level power supply ground network, and cannot be connected to the vertical power ground network route, causing an ohm pressure drop or other problems. Refer to Figure 1B (again, the view in the figure)

Clienfs Docket N〇.:S3U05-0050-TW TT^s Docket No:0608-A40992-TW/Final /Joanne 7 200814279 圖角度也是從下往上),比標準單元的電源線Vdd或者地 線Vss高n+l層金屬線103P和103G是垂直的,比標準單 元的電源線Vdd或者地線Vss高η層金屬線104P和104G 是水平的,這時,比如在諸如區域105的地方,由於低層 金屬線104Ρ和104G擋住了高層的金屬線103Ρ或103G, 使得標準單元無法將其電源線Vdd或地線Vss分別連接到 高層的金屬線103P或103G ’造成歐姆壓降或其他問題。 因為這個原因,目前設計中如果晶片採用2n層金屬製造工 ⑩ 藝,又採用Flip Chip封裝,則是把第2n-l層金屬設定為 電源地網路的水平方向,第2n-2層金屬和上面叠加的第2n 層金屬作為垂直方向的電源地線,即有兩層垂直方向的電 源地線,以消除如第1B圖所示的重疊狀況的出現。但這 樣做會佔用過多的佈線資源。 透過上面的分析可知,目前造成佈線資源使用情況不 合理,代價較高的一個主要原因是電源地網路的設計欠合 理,沒有很好地考慮金屬線的佈局,造成了資源的不合理 _ 使用,於是,就需要一種佈局更加合理的電源地網路來適 應晶片設計的需求。 【發明内容】 本發明的目的在於提供一種新的電源地網路的佈置方 案,透過更加合理地佈置電源地網路來適應越來越多的電 路單元的需求。 根據本發明的目的,提供一種積體電路的電源地網 路,其中積體電路的標準單元佇列呈水平方向排列,所述Clienfs Docket N〇.:S3U05-0050-TW TT^s Docket No:0608-A40992-TW/Final /Joanne 7 200814279 The figure angle is also from bottom to top), higher than the standard unit's power line Vdd or ground line Vss The +1 layer metal lines 103P and 103G are vertical, and the n-layer metal lines 104P and 104G are horizontal than the power line Vdd or the ground line Vss of the standard cell, at this time, for example, at a region such as the region 105, due to the low-level metal line 104Ρ And 104G blocks the upper metal wire 103Ρ or 103G, so that the standard unit cannot connect its power line Vdd or ground line Vss to the upper metal wire 103P or 103G' respectively, causing ohmic voltage drop or other problems. For this reason, in the current design, if the chip uses a 2n-layer metal fabrication process and a Flip Chip package, the 2n-1 layer metal is set to the horizontal direction of the power ground network, and the 2n-2 layer metal and The 2n-th layer metal superposed above is used as the power ground line in the vertical direction, that is, there are two layers of power ground lines in the vertical direction to eliminate the occurrence of the overlap condition as shown in FIG. 1B. However, this will take up too much wiring resources. Through the above analysis, it is known that the current use of wiring resources is unreasonable. One of the main reasons for the high cost is that the design of the power ground network is not reasonable. The layout of the metal wires is not well considered, resulting in unreasonable resources. Therefore, a more reasonable layout of the power ground network is needed to adapt to the needs of the chip design. SUMMARY OF THE INVENTION It is an object of the present invention to provide a new power ground network arrangement that accommodates the needs of more and more circuit units by more rationally arranging power ground networks. According to an object of the present invention, there is provided a power supply ground circuit of an integrated circuit, wherein a standard unit array of integrated circuits is arranged in a horizontal direction,

Client’s Docket N〇.:S3U05-0050-TW TT's Docket No:0608-A40992-TW/Final /Joanne ζ 200814279 電源地網路包括佈置在不同金屬層中的水平金屬線和垂直 金屬線,水平金屬線包括水平電源金屬線和水平地金屬 線,垂直金屬線包括垂直電源金屬線和垂直地金屬線,所 述水平金屬線和垂直金屬線中的電源線和地線分別互相連 通;所述電源地網路的水平金屬線的寬度使得水平電源金 屬線僅覆蓋所述標準單元佇列的電源線並與之連通、水平 地金屬線僅覆蓋所述標準單元彳宁列的地線並與之連通。 根據本發明的電源地網路,所述水平金屬線的寬度小 ® 於標準單元的標準高度的2倍。根據一實施例,所述水平 金屬線的寬度不大於:2x標準高度-lx標準單元線寬度-2x 線間間隔;其中,標準單元線寬度為標準單元電源線、標 準單元地線的寬度,標準單元電源線和標準單元地線的寬 度相同;線間間隔為水平金屬線和標準單元電源線或者標 準單元地線之間需保留的間隔距離。其中,所述金屬線的 寬度和線間間隔基於下述因素中的至少一個計算而得:歐 姆壓降、功耗、雜訊、積體電路設計規則、標準單元佇列 *的重複性。 當有兩條水平金屬線相鄰時,所述水平金屬線的寬度 不大於:1.5x標準高度-0.5X金屬線線間間隔-0·5χ標準單元 線寬度-lx線間間隔;其中,金屬線線間間隔為兩條水平金 屬線之間需保留的間隔距離。所述金屬線的寬度和線間間 隔基於下述因素中的至少一個計算而得:歐姆壓降、功耗、 雜訊、積體電路設計規則、標準單元佇列的重複性。 根據本發明的電源地網路,所述垂直金屬線使用比水Client's Docket N〇.:S3U05-0050-TW TT's Docket No:0608-A40992-TW/Final /Joanne ζ 200814279 The power ground network consists of horizontal metal wires and vertical metal wires arranged in different metal layers. Horizontal metal wires include a horizontal power supply line and a horizontal metal line, the vertical metal line includes a vertical power supply line and a vertical metal line, wherein the horizontal and vertical lines of the power line and the ground line are respectively connected to each other; The width of the horizontal metal wire is such that the horizontal power supply metal wire only covers and is in communication with the power supply line of the standard unit, and the horizontal metal wire only covers and is in communication with the ground line of the standard unit. According to the power ground network of the present invention, the width of the horizontal metal wire is small by 2 times the standard height of the standard cell. According to an embodiment, the width of the horizontal metal line is not more than: 2x standard height - lx standard unit line width - 2 x line spacing; wherein the standard unit line width is the standard unit power line, the standard unit ground line width, standard The unit power line and the standard unit ground line have the same width; the line spacing is the separation distance between the horizontal metal line and the standard unit power line or the standard unit ground line. Wherein the width and interline spacing of the metal lines are calculated based on at least one of the following factors: ohmic voltage drop, power consumption, noise, integrated circuit design rules, and repeatability of the standard cell array. When two horizontal metal lines are adjacent, the width of the horizontal metal line is not greater than: 1.5x standard height - 0.5X metal line spacing - 0 · 5 χ standard unit line width - lx line spacing; wherein, metal The spacing between lines is the separation distance between two horizontal metal lines. The width and interline spacing of the metal lines are calculated based on at least one of the following factors: ohmic voltage drop, power consumption, noise, integrated circuit design rules, and repeatability of the standard cell array. According to the power ground network of the present invention, the vertical metal wire uses a specific water

Clients Docket N〇.:S3U05-0050-TW TT^ Docket No:0608-A40992-TW/Final /Joanne 200814279 平金屬線高一層或者低一層的金屬層。 根據本發明的電源地網路,其特徵在於,所述電源地 網路中水平金屬線和垂直金屬線的密度基於下述因素中的 至少一個計算而得:歐姆壓降、功耗、雜訊、積體電路設 計規則、標準單元佇列的重複性。 根據一實施例,所述水平金屬線和垂直金屬線中的電 源線和地線的分別連通、以及所述垂直金屬線和標準單元 的電源線和地線的分別連通都通過通孔實現。 ® 本發明另提供一種積體電路的電源地網路的佈置方 法,其中積體電路的標準單元佇列呈水平方向排列,所述 方法包括:在不同金屬層中佈置水平金屬線和垂直金屬 線,其中水平金屬線包括水平電源金屬線和水平地金屬 線,垂直金屬線包括垂直電源金屬線和垂直地金屬線;分 別連通所述水平金屬線和垂直金屬線中的電源線和地線; 以及連通垂直電源金屬線和標準單元佇列的電源線、垂直 地金屬線與標準單元仔列的地線;其中,所述佈置水平金 ^ 屬線和垂直金屬線的步驟包括設定所述電源地網路的水平 金屬線的寬度使得水平電源金屬線僅覆蓋所述標準單元佇 列的電源線、水平地金屬線僅覆蓋所述標準單元佇列的地 線。 根據本發明的方法,設定所述水平金屬線的寬度不大 於標準單元的標準高度的2倍。根據一實施例,設定所述 水平金屬線的寬度不大於:2x標準高度-lx標準單元線寬度 -2x線間間隔;其中,標準單元線寬度為標準單元電源線、Clients Docket N〇.:S3U05-0050-TW TT^ Docket No:0608-A40992-TW/Final /Joanne 200814279 Flat metal wire is one layer higher or lower metal layer. The power ground network according to the present invention is characterized in that the density of the horizontal metal lines and the vertical metal lines in the power ground network is calculated based on at least one of the following factors: ohmic voltage drop, power consumption, and noise. , integrated circuit design rules, repeatability of standard cell arrays. According to an embodiment, the respective communication of the power line and the ground line in the horizontal metal line and the vertical metal line, and the respective communication of the vertical metal line and the power line and the ground line of the standard unit are achieved through the through holes. The present invention further provides a method for arranging a power ground network of an integrated circuit, wherein the standard cell array of the integrated circuit is arranged in a horizontal direction, the method comprising: arranging horizontal metal lines and vertical metal lines in different metal layers Wherein the horizontal metal line comprises a horizontal power supply metal line and a horizontal metal line, the vertical metal line comprises a vertical power supply metal line and a vertical ground metal line; respectively connecting the power supply line and the ground line in the horizontal metal line and the vertical metal line; a power line connecting the vertical power supply metal line and the standard unit, a vertical ground metal line, and a ground line of the standard unit; wherein the step of arranging the horizontal metal line and the vertical metal line includes setting the power ground network The width of the horizontal metal lines of the road is such that the horizontal power supply metal lines only cover the power supply lines of the standard unit array, and the horizontal metal lines only cover the ground lines of the standard unit array. According to the method of the present invention, the width of the horizontal metal wire is set to be not more than twice the standard height of the standard cell. According to an embodiment, the width of the horizontal metal line is set to be no greater than: 2x standard height - lx standard cell line width - 2 x line spacing; wherein the standard cell line width is a standard cell power line,

Client’s Docket N〇.:S3U05-0050-TW TT^ Docket No:0608-A40992-TW/Final /Joanne 10 200814279 標準單元地線的寬度’標準單元電源線和梯準單元地線的 寬度相同;線間間隔為水平金屬線和標準單元電源線或者 標準單元地線之間需保留的間隔距離。其中,,還包括基於 下述因素中的至少一個計算所述線間間隔:歐姆壓降、功 耗、雜訊、積體電路設計規則、標準單元佇列的重複性。 當有兩條水平金屬線相鄰時,設定所述水平金屬線的 寬度不大於:1·5χ標準高度_〇·5χ金屬線線間間隔-〇·5χ標準 單元線寬度-lx線間間隔;其中,金屬線線間間隔為兩條水 ⑩平金屬線之間需保留的間隔距離。該方法還包括基於下述 因素中的至少一個計算所述金屬線線間間隔:歐姆壓降、 功耗、雜訊、積體電路設計規則、標準單元佇列的重複性。 根據本發明的方法,在高於或者低於所述水平金屬線 使用的金屬層一層的金屬層中佈置垂直金廣線。 根據本發明的方法,還包括:基於下述因素中的至少 一個計算電源地網路中水平金屬線和垂直金屬線的密度: 歐姆壓降、功耗、雜訊、積體電路設計規則、標準單元佇 w 列的重複性。 根據本發明的方法,還包括:架設通孔使所述水平金 屬線和垂直金屬線中的電源線和地線的分別連通以及所述 垂直金屬線和標準單元的電源線和地線的分別連通。 根據本發明的第三方面,提供一種積體電路結構,包 括標準單元佇列和電源地網路,其中標準單元佇列呈水平 方向排列,電源地網路包括佈置在不同金屬層中的水平金 屬線和垂直金屬線,水平金屬線包括水平電源金屬線和水Client's Docket N〇.:S3U05-0050-TW TT^ Docket No:0608-A40992-TW/Final /Joanne 10 200814279 Standard unit ground wire width 'Standard unit power line and step unit ground line have the same width; line room The interval is the separation distance between the horizontal metal line and the standard unit power line or the standard unit ground line. Wherein, the method further comprises calculating the inter-line spacing based on at least one of the following factors: ohmic voltage drop, power consumption, noise, integrated circuit design rules, and repeatability of the standard cell array. When two horizontal metal lines are adjacent to each other, the width of the horizontal metal line is set to be not greater than: 1. 5 χ standard height _ 〇 · 5 χ metal line spacing - 〇 · 5 χ standard unit line width - lx line spacing; Wherein, the spacing between the metal wires is the separation distance between the two water and 10 flat metal wires. The method also includes calculating the spacing of the metal lines based on at least one of the following factors: ohmic voltage drop, power consumption, noise, integrated circuit design rules, repeatability of the standard cell array. In accordance with the method of the present invention, a vertical gold polyline is disposed in a metal layer that is higher or lower than a layer of a metal layer used for the horizontal metal line. The method according to the present invention further comprises: calculating a density of horizontal metal lines and vertical metal lines in the power ground network based on at least one of the following factors: ohmic voltage drop, power consumption, noise, integrated circuit design rules, standards The repeatability of the unit 伫w column. According to the method of the present invention, the method further includes: erecting a through hole to respectively connect the power line and the ground line of the horizontal metal line and the vertical metal line, and respectively connecting the vertical metal line and the power line and the ground line of the standard unit . According to a third aspect of the present invention, there is provided an integrated circuit structure comprising a standard cell array and a power ground network, wherein the standard cell arrays are arranged in a horizontal direction, and the power ground network comprises horizontal metals arranged in different metal layers Line and vertical metal lines, horizontal metal lines including horizontal power lines and water

Client’s Docket No.:S3U05-0050-TW TT^ Docket No:0608-A40992-TW/Final /Joanne 200814279 平地金屬線,垂直金屬線包括垂直電源金屬線和垂直地金 屬線,所述水平金屬線和垂直金屬線中的電源線和地線分 別互相連通;所述電源地網路的水平金屬線的寬度使得水 平電源金屬線僅覆蓋所述標準單元佇列的電源線、水平地 金屬線僅覆蓋所述標準單元符列的地線。 根據本發明,所述水平金屬線的寬度不大於標準單元 的標準高度的2倍。根據一實施例,所述水平金屬線的寬 度不大於:2x標準高度-lx標準單元線寬度-2x線間間隔; • 其中,標準單元線寬度為標準單元電源線、標準單元地線 的寬度,標準單元電源線和標準單元地線的寬度相同;線 間間隔為水平金屬線和標準單元電源線或者標準單元地線 之間需保留的間隔距離。其中,所述線間間隔基於下述因 素中的至少一個計算而得:歐姆壓降、功耗、雜訊、積體 電路設計規則、標準早元符列的重複性。 當有兩條水平金屬線相鄰時,所述水平金屬線的寬度 小於:1·5χ標準高度-0.5x金屬線線間間隔_0·5χ標準單元線 ® 寬度-lx線間間隔;其中,金屬線線間間隔為兩條水平金屬 線之間需保留的間隔距離。其中,所述金屬線線間間隔基 於下述因素中的至少一個計算而得:歐姆壓降、功耗、雜 訊、積體電路設計規則、標準單元仔列的重複性。 根據本發明,所述垂直金屬線可以任意使用比水平金 屬線高一層或者低一層的金屬層。 根據本發明,所述電源地網路中水平金屬線和垂直金 屬線的密度基於下述因素中的至少一個計算而得:歐姆壓Client's Docket No.:S3U05-0050-TW TT^ Docket No:0608-A40992-TW/Final /Joanne 200814279 Flat metal wire, vertical metal wire including vertical power metal wire and vertical metal wire, horizontal metal wire and vertical The power line and the ground line in the metal line are respectively connected to each other; the width of the horizontal metal line of the power ground network is such that the horizontal power supply metal line only covers the power line of the standard unit array, and the horizontal metal line only covers the The ground line of the standard unit column. According to the invention, the width of the horizontal metal wire is not more than twice the standard height of the standard unit. According to an embodiment, the width of the horizontal metal line is not more than: 2x standard height - lx standard unit line width - 2 x line spacing; • wherein the standard unit line width is the width of the standard unit power line, the standard unit ground line, The standard unit power line and the standard unit ground line have the same width; the line spacing is the separation distance between the horizontal metal line and the standard unit power line or the standard unit ground line. Wherein the line spacing is calculated based on at least one of the following factors: ohmic voltage drop, power consumption, noise, integrated circuit design rules, and repeatability of a standard early element sequence. When two horizontal metal lines are adjacent, the width of the horizontal metal line is less than: 1. 5 χ standard height - 0.5 x metal line spacing _0 · 5 χ standard unit line о width - lx line spacing; The spacing between the wires is the separation distance between the two horizontal wires. Wherein, the inter-wire spacing is calculated based on at least one of the following factors: ohmic voltage drop, power consumption, noise, integrated circuit design rules, and repeatability of standard cell trains. According to the present invention, the vertical metal wire can be arbitrarily used with a metal layer one layer higher or lower than the horizontal metal wire. According to the present invention, the density of the horizontal metal lines and the vertical metal lines in the power ground network is calculated based on at least one of the following factors: ohmic voltage

Client’s Docket No」S3U05-0050-TW TT^ Docket No:0608-A40992-TW/Final /Joanne 12 200814279 降、功耗、雜訊、積體電路設計規則、標準單元佇列的重 複性。 根據本叙明,所述水平金屬線和垂直金屬線中的電源 線和地、、泉的为別連通' 以及所述垂直金屬線和標準單元的 電源線和地線的分別連通都通過通孔實現。 採用本發明的技術方案,在符合歐姆壓降、功耗、雜 訊的條件下,重新佈置電源地網路,根據積體電路的設計 規則和單元佇列的重複性確定金屬線的寬度,減少由於重 疊和線寬不合適造成的性能缺陷和佈線資源的浪費,以適 應成功5又5十晶片的需求。 為讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂,下文特舉出較佳實施例,並配合所附圖式,作詳 細說明如下: 【實施方式】 、本餐明的主要目的是提供一種電源地網路的新的佈置 方式,其中積體電路的標準單元佇列呈水平方向排列,電 源地網路包括佈置在不同金屬層中的水平金屬線和垂直金 屬線,水平金屬線包括水平電源金屬線和水平地金屬線, 垂直金屬線包括垂直電源金屬線和垂直地金屬線,水平金 屬線和垂直金屬線中的電源線和地線分別互相連通。本發 明的佈置方式的主要改進在於,電源地網路的水平金屬線 的I度使得水平電源金屬線僅覆蓋標準單元仵列的電源 線、水平地金屬線僅覆蓋標準單元佇列的地線。通過如此 的設計,可以大大減小傳統技術中存在的佈線重疊導致佈Client's Docket No"S3U05-0050-TW TT^ Docket No:0608-A40992-TW/Final /Joanne 12 200814279 Regression, power consumption, noise, integrated circuit design rules, repeatability of standard cell arrays. According to the present description, the power lines of the horizontal metal lines and the vertical metal lines and the ground, the springs are connected to each other, and the vertical lines and the power lines and the ground lines of the standard unit are respectively communicated through the through holes. achieve. By adopting the technical scheme of the invention, under the condition of ohmic voltage drop, power consumption and noise, the power ground network is rearranged, and the width of the metal line is determined according to the design rule of the integrated circuit and the repeatability of the unit array, and the width is reduced. Performance defects and waste of routing resources due to improper overlap and line width to accommodate the success of 5 and 50 wafers. The above and other objects, features, and advantages of the present invention will become more apparent and understood. The main purpose is to provide a new arrangement of the power ground network, in which the standard unit arrays of the integrated circuits are arranged in a horizontal direction, and the power ground network includes horizontal metal lines and vertical metal lines arranged in different metal layers, horizontal The metal wire includes a horizontal power metal wire and a horizontal metal wire, and the vertical metal wire includes a vertical power metal wire and a vertical metal wire, and the power wire and the ground wire in the horizontal metal wire and the vertical metal wire are respectively connected to each other. A major improvement in the arrangement of the present invention is that the level of the horizontal metal lines of the power ground network is such that the horizontal power supply lines only cover the power lines of the standard cell array, and the horizontal metal lines only cover the ground lines of the standard cell array. With such a design, the wiring overlap existing in the conventional technology can be greatly reduced.

Client’s Docket No. :S3U05-0050-TW TT^ Docket No:0608-A40992-TW/Final /Joanne 13 200814279 線資源浪費的缺陷。 在本發明的佈置方式中,水平金屬線的寬度小於標準 單元的標準高度的2倍。其中,對於不相鄰的水平金屬線, 其寬度應該符合不大於: 2x標準高度-lx標準單元線寬度-2x線間間隔 其中,標準單元線寬度為標準單元電源線、標準單元 地線的寬度,標準單元電源線和標準單元地線的寬度相 同;線間間隔為水平金屬線和標準單元電源線或者標準單 ® 元地線之間需保留的間隔距離。 而對於有兩條水平金屬線相鄰時,水平金屬線的寬度 應該符合不大於: 1.5x標準高度-0.5x金屬線線間間隔-0.5x標準單元線寬 度-lx線間間隔 其中,金屬線線間間隔為兩條水平金屬線之間需保留 的間隔距離。 上述的線間間隔以及金屬線線間間隔都是基於下述因 ⑩ 素中的至少一個計算而得:歐姆壓降、功耗、雜訊、積體 電路設計規則、標準單元佇列的重複性。 積體電路的電源地網路 首先,根據本發明的目的,提供一種積體電路的電源 地網路,其中積體電路的標準單元佇列呈水平方向排列, 電源地網路包括佈置在不同金屬層中的水平金屬線和垂直 金屬線,水平金屬線包括水平電源金屬線和水平地金屬Client’s Docket No. :S3U05-0050-TW TT^ Docket No:0608-A40992-TW/Final /Joanne 13 200814279 Defects in the waste of line resources. In the arrangement of the invention, the width of the horizontal metal wire is less than twice the standard height of the standard unit. Wherein, for non-adjacent horizontal metal lines, the width should conform to no more than: 2x standard height - lx standard unit line width - 2 x line spacing, where the standard unit line width is the width of the standard unit power line, standard unit ground line The standard unit power line and the standard unit ground line have the same width; the line spacing is the separation distance between the horizontal metal line and the standard unit power line or the standard single meter ground. For two horizontal metal lines adjacent, the width of the horizontal metal line should meet no more than: 1.5x standard height - 0.5x metal line spacing - 0.5x standard unit line width - lx line spacing, where the metal line The line spacing is the separation distance between two horizontal metal lines. The above-mentioned inter-line spacing and inter-wire spacing are calculated based on at least one of the following factors: ohmic voltage drop, power consumption, noise, integrated circuit design rules, and repeatability of standard cell arrays. . Power Ground Network of Integrated Circuit First, according to the purpose of the present invention, a power ground network of an integrated circuit is provided, wherein standard cell arrays of integrated circuits are arranged in a horizontal direction, and power ground networks are arranged in different metals. Horizontal metal lines and vertical metal lines in the layer, horizontal metal lines including horizontal power supply lines and horizontal metal

Clients Docket N〇.:S3U05-0050-TW TT^s Docket No:0608-A40992-TW/Final /Joanne 200814279 線,垂直金屬線包括垂直電源金屬線和垂直地金屬線,水 平金屬線和垂直金屬線中的電源線和地線分別互相連通; 電源地網路的水平金屬線的寬度使得水平電源金屬線僅覆 蓋所述標準單元佇列的電源線、水平地金屬線僅覆蓋所述 標準單元佇列的地線。 對於電源地網路中的金屬線來說,線的寬度越寬,供 電能力越好,因此,在其他條件允許的情況下,選取盡可 能寬的金屬線寬度是較佳的。但是,在傳統技術中,參考 _ 第1A圖或者第1B圖所示,由於沒有經過計算,金屬線的 寬度比較隨意,當金屬線的寬度寬到會同時覆蓋標準單元 的電源線Vdd和地線Vss時(大於標準高度2倍時),就 會影響到部分Vdd或者是Vss的連接,使得必須要有其他 的電源線(地線)來供這些Vdd或者是Vss連接,這就會 佔據更多的佈線資源,從而使整個佈線資源的使用率降低。 因此,本發明提出,水平金屬線中的水平電源金屬線 只覆蓋標準單元的電源線,而水平地金屬線只覆蓋標準單 元的地線’互相不重豐,這樣’就能夠避免傳統技術中由 於金屬線過寬而影響標準單元的電源線或地線的連接的問 題。此時,研究標準單元的結構和基本排列方式,參考第 2圖所示,圖中的每一條標準單元地線Vss和標準單元電 源線Vdd之間的距離是一個標準單元的高度,即標準高度 hs (需要說明,如果考慮Vss和Vdd的寬度的話,標準高 度hs是從Vdd的中線至Vss中線的距離)。任何一條水平 金屬線(水平電源金屬線或者水平地金屬線)能夠達到不Clients Docket N〇.:S3U05-0050-TW TT^s Docket No:0608-A40992-TW/Final /Joanne 200814279 Line, vertical metal wire including vertical power metal wire and vertical metal wire, horizontal metal wire and vertical metal wire The power line and the ground line are respectively connected to each other; the width of the horizontal metal line of the power ground network is such that the horizontal power supply metal line only covers the power line of the standard unit array, and the horizontal metal line only covers the standard unit array Ground wire. For metal wires in a power ground network, the wider the wire width, the better the power supply capability. Therefore, it is preferable to select the width of the metal wire as wide as possible, if other conditions permit. However, in the conventional technology, as shown in FIG. 1A or FIG. 1B, since the calculation is not performed, the width of the metal wire is relatively random, and when the width of the metal wire is wide enough to cover the power line Vdd and the ground of the standard cell at the same time. When Vss (more than 2 times the standard height), it will affect the connection of some Vdd or Vss, so that there must be other power lines (ground) for these Vdd or Vss connections, which will take up more The routing resources, so that the utilization of the entire routing resources is reduced. Therefore, the present invention proposes that the horizontal power supply metal line in the horizontal metal line only covers the power supply line of the standard unit, and the horizontal metal line only covers the ground line of the standard unit, which is not heavy, so that the conventional technology can be avoided. The problem that the metal wire is too wide to affect the connection of the power line or ground of the standard unit. At this time, the structure and basic arrangement of the standard cell are studied. Referring to FIG. 2, the distance between each standard cell ground line Vss and the standard cell power line Vdd in the figure is the height of a standard cell, that is, the standard height. Hs (Note that if considering the width of Vss and Vdd, the standard height hs is the distance from the center line of Vdd to the center line of Vss). Any horizontal metal wire (horizontal power metal wire or horizontal metal wire) can achieve

Client’s Docket N〇.:S3U05-0050-TW TT5s Docket No:0608-A40992-TW/Final /Joanne 15 200814279 產生重疊情況的最大寬度是2hs,即標準高度的2倍。 在實際的應用中,Vss和Vdd自身的寬度是需要考慮 的,此時,對於兩侧沒有其他相鄰金屬線的金屬線來說, 它的寬度應該是不大於: 2hs-Ws-2Sp,即,2x標準高度-lx標準單元線寬度-2x 線間間隔; 其中,標準單元線寬度Ws為標準單元電源線Vdd和 標準單元地Vdd線的寬度,其中標準單元電源線Vdd和標 ⑩ 準單元地線Vss的寬度相同;線間間隔Sp為水平金屬線和 標準單元電源線或者標準單元地線之間需保留的間隔距 保留線間間隔是為了符合積體電路的設計要求’包括 歐姆壓降、功耗、雜訊、積體電路設計規則、標準單元佇 列的重複性。因此,線間間隔Sp是基於下述因素中的至少 一個計算而得:歐姆壓降、功耗、雜訊、積體電路設計規 則、標準單元佇列的重複性。 ® 第2圖顯示出了兩侧沒有其他相鄰金屬線的實施例的 結構圖(同樣,第2圖中的視圖角度也是從下往上),其 中無論是水平電源金屬線202P還是水平地金屬線202G的 兩侧都沒有其他相鄰的金屬線,因此它們的寬度最大可以 至2hs-Ws-2Sp。當然,根據歐姆壓降、功耗、雜訊、積體 電路設計規則、標準單元佇列的重複性等等的因素,具體 佈置是可以採用比上述寬度小的金屬線。 還有一種情況,就是水平金屬線是相鄰連排列的,就Client’s Docket N〇.:S3U05-0050-TW TT5s Docket No:0608-A40992-TW/Final /Joanne 15 200814279 The maximum width for the overlap is 2hs, which is 2 times the standard height. In practical applications, the width of Vss and Vdd itself needs to be considered. In this case, for a metal wire without other adjacent metal wires on both sides, its width should be no more than: 2hs-Ws-2Sp, ie , 2x standard height - lx standard cell line width - 2x line spacing; wherein, the standard cell line width Ws is the width of the standard cell power line Vdd and the standard cell ground Vdd line, wherein the standard cell power line Vdd and the standard 10 cell The width of the line Vss is the same; the spacing between the lines Sp is the spacing between the horizontal metal line and the standard unit power line or the standard unit ground line. The spacing between the lines is reserved to meet the design requirements of the integrated circuit 'including ohmic voltage drop, Power consumption, noise, integrated circuit design rules, repeatability of standard cell arrays. Therefore, the line spacing Sp is calculated based on at least one of the following factors: ohmic voltage drop, power consumption, noise, integrated circuit design rules, and repeatability of the standard cell array. ® Figure 2 shows a block diagram of an embodiment with no other adjacent wires on each side (again, the view angle in Figure 2 is also from bottom to top), where either the horizontal power supply line 202P or the horizontal metal There are no other adjacent metal lines on either side of the line 202G, so their width can be up to 2hs-Ws-2Sp. Of course, depending on factors such as ohmic voltage drop, power consumption, noise, integrated circuit design rules, repeatability of the standard cell array, and the like, the specific arrangement may be a metal wire having a smaller width than the above. There is also a case where the horizontal metal wires are arranged adjacent to each other.

Client’s Docket No.:S3U05-0050-TW TT^ Docket No:0608-A40992-TW/Final /Joame 16 200814279 比如第3圖所示的實施例,第3圖顯示數條水平金屬線, 它們和Vdd和Vss —樣,同樣是水平電源金屬線和水平地 金屬線相間隔地依次排列,此時,很明顯,如果希望水平 地金屬線和水平電源金屬線具有相近似的寬度,它們的最 大寬度就應該為如下: 當有兩條水平金屬線相鄰時,水平金屬線的寬度不大 於: hs-Smp,即1·5χ標準高度-0.5x金屬線線間間隔-0.5x標 _ 準單元線寬度-lx線間間隔; 其中,金屬線線間間隔為兩條水平金屬線之間需保留 的間隔距離。 同樣,保留金屬線線間間隔是為了符合積體電路的設 計要求,包括歐姆壓降、功耗、雜訊、積體電路設計規則、 標準單元佇列的重複性,因此金屬線線間間隔一樣是基於 下述因素中的至少一個計算而得:歐姆壓降、功耗、雜訊、 積體電路設計規則、標準單元佇列的重複性。 _ 上述的最大寬度適用於要求水平電源金屬線和水平地 金屬線等寬的應用中,這是對於獲得根據一實施例積體電 路性能有利的選擇,如果水平電源金屬線和水平地金屬線 不等寬,在縮小其中一條線的寬度時,另一條金屬線的寬 度可以增加,但是最寬也不會超過2hs-Ws-2Sp。 第3圖顯示兩側有相鄰金屬線的實施例的結構圖(同 樣,第3圖中的視圖角度也是從下往上),並且其中每一 條水平金屬線,包括水平電源金屬線302P和水平地金屬線Client's Docket No.: S3U05-0050-TW TT^ Docket No: 0608-A40992-TW/Final /Joame 16 200814279 For example, in the embodiment shown in Figure 3, Figure 3 shows several horizontal metal lines, which are combined with Vdd and Vss - Similarly, the horizontal power supply metal wire and the horizontal metal wire are arranged at intervals. In this case, it is obvious that if the horizontal metal wire and the horizontal power supply metal wire have a similar width, their maximum width should be As follows: When there are two horizontal metal lines adjacent, the width of the horizontal metal line is not greater than: hs-Smp, that is, 1·5χ standard height-0.5x metal line spacing -0.5x standard _ quasi-unit line width- Lx line spacing; where the spacing between metal lines is the separation distance between two horizontal metal lines. Similarly, the spacing between the metal lines is reserved to meet the design requirements of the integrated circuit, including ohmic voltage drop, power consumption, noise, integrated circuit design rules, and repeatability of the standard cell array, so the spacing between the metal lines is the same. It is calculated based on at least one of the following factors: ohmic voltage drop, power consumption, noise, integrated circuit design rules, and repeatability of standard cell arrays. The maximum width described above is suitable for applications requiring horizontal power lines and horizontal metal lines, which is an advantageous choice for obtaining integrated circuit performance according to an embodiment, if horizontal power lines and horizontal metal lines are not The width is equal. When the width of one of the lines is reduced, the width of the other line can be increased, but the width is not more than 2hs-Ws-2Sp. Figure 3 shows a block diagram of an embodiment with adjacent metal lines on both sides (again, the view angle in Figure 3 is also from bottom to top), and each of the horizontal metal lines, including the horizontal power supply line 302P and level Ground wire

Client’s Docket N〇.:S3U05-0050-TW TT^s Docket No:0608-A40992-TW/Final /Joanne 17 200814279 302G都是等寬的,它們的寬度最大可以至2hs-Ws-2Sp。 當然’根據歐姆壓降、功耗、雜訊、積體電路設計規則、 標準單元佇列的重複性等等的因素,具體佈置是可以採用 比上述寬度小的金屬線。 上面討論了本發明的電源地網路中水平金屬線的佈 置’在佈置了水平金屬線之後,本發明在佈置垂直金屬線 可以任意使用比水平金屬線高一層或者低一層的金屬層。 上面描述了,水平金屬線和垂直金屬線中的電源線和 ⑩ 地線分別連通、以及垂直金屬線和標準單元的電源線和地 線也分別連通’根據本發明的實施例,這些連通都透過通 孔貫現,比如參考第4圖(同樣,第4圖中的視圖角度也 疋攸下在上)’弟4圖是根據本發明的實施例的標準單元 電源地線與電源地網路的連通結構的示意圖,圖中可見, 本發明使用不同金屬層之間的通孔來使得上述的金屬線相 互連通’包括連接垂直金屬線和標準單元線的通孔4〇2、 以及連接水平金屬線和垂直金屬線的通孔4〇6。 • 本發明的電源地網路中水平金屬線和垂直金屬線的密 度(即電源地網路的網格密度)基於下述因素中的至少一 個計算而得:歐姆壓降、功耗、雜訊、積體電路設計規則、 標準早元彳宁列的重複性。 積體電路的結煃 在上述電源地網路的基礎上,本發明還提供一種積體 電路結構’包括標準單元符列和電源地網路,其中標準單Client’s Docket N〇.:S3U05-0050-TW TT^s Docket No:0608-A40992-TW/Final /Joanne 17 200814279 302G are all equal width, and their width can be up to 2hs-Ws-2Sp. Of course, according to factors such as ohmic voltage drop, power consumption, noise, integrated circuit design rules, repeatability of standard cell arrays, and the like, a specific arrangement may be a metal wire having a smaller width than the above. The arrangement of the horizontal metal lines in the power ground network of the present invention has been discussed above. After the horizontal metal lines are disposed, the present invention can arbitrarily use a metal layer one layer higher or lower than the horizontal metal lines in arranging the vertical metal lines. As described above, the power supply line and the 10 ground line in the horizontal metal line and the vertical metal line are respectively connected, and the power supply line and the ground line of the vertical metal line and the standard unit are also respectively connected. According to the embodiment of the present invention, these connections are transmitted through The through hole is continuous, for example, referring to FIG. 4 (again, the view angle in FIG. 4 is also on the top). FIG. 4 is a standard unit power ground and power ground network according to an embodiment of the present invention. Schematic diagram of the connected structure, it can be seen that the present invention uses the through holes between the different metal layers to make the above-mentioned metal lines communicate with each other 'including the through holes 4 〇 2 connecting the vertical metal lines and the standard unit lines, and connecting the horizontal metal lines And the through hole 4〇6 of the vertical metal wire. • The density of horizontal and vertical metal lines (ie, the grid density of the power ground network) in the power ground network of the present invention is calculated based on at least one of the following factors: ohmic voltage drop, power consumption, noise , the integrated circuit design rules, the standard early Yuan Weining column repeatability. The structure of the integrated circuit is based on the above-mentioned power ground network, and the present invention also provides an integrated circuit structure 'including a standard unit string and a power ground network, where the standard sheet

Client’s Docket N〇.:S3U05-0050-TW TT^ Docket No:0608-A40992-TW/Final /Joanne 18 200814279 元符列呈水平方向排列,電源地網路包括佈置在不同金屬 層中的水平金屬線和垂直金層線,水平金屬線包拉水平% 源金屬線和水平地金屬線,垂直金屬線包括垂直電源金屬 線和垂直地金屬線,水平金屬線和垂直金屬線中的電源線 和地線分別互相連通;電源地網路的水平金屬線的見度使 得水平電源金屬線僅覆蓋所述標準單元佇列的電源線、水 平地金屬線僅覆蓋所述標準單元佇列的地線。 類似與前面的說明,本發明的積體電路結構中的電源 ⑩地網路的水平金屬線中的水平電源金屬線只覆蓋楳準單元 的電源線,而水平地金屬線只覆蓋標準單元的地線,互相 不重疊,這樣,就能夠避免傳統技術中由於金屬線過寬而 影響標準單元的電源線或地線的連接的問題。同檬參考第 2圖所示,第2圖中的每一條標準單元地線vss和標準單 元電源線Vdd之間的距離是一個標準單元的高度,即標準 尚度hs (需要說明,如果考慮Vss和Vdd的寬度的話,標 準高度hs是從Vdd的中線至Vss中線的距離)。任何一條 _水平金屬線(水平電源金屬線或者水平地金屬線)能夠達 到不產生重疊情況的最大寬度是2hs,即標準高度的2倍。 在實際的應用中,Vss和Vdd自身的寬度是需要考慮 的,此時,對於兩侧沒有其他相鄰金屬線的金屬線來說, 它的寬度應該是不大於: 2hs-Ws-2Sp,即,2χ標準高度-ΐχ標準單元線寬度_2χ 線間間隔; 其中’標準單元線寬度Ws為標準單元電源線vdd和Client's Docket N〇.:S3U05-0050-TW TT^ Docket No:0608-A40992-TW/Final /Joanne 18 200814279 The symbol array is arranged horizontally, and the power ground network includes horizontal metal wires arranged in different metal layers. And vertical gold layer lines, horizontal metal wire package horizontal level source metal wire and horizontal ground wire, vertical metal wire including vertical power metal wire and vertical metal wire, horizontal metal wire and vertical metal wire power cable and ground wire They are connected to each other; the visibility of the horizontal metal lines of the power ground network is such that the horizontal power supply lines only cover the power lines of the standard unit array, and the horizontal metal lines only cover the ground lines of the standard unit array. Similar to the foregoing description, the horizontal power supply line in the horizontal metal line of the network of the power source 10 in the integrated circuit structure of the present invention covers only the power supply line of the reference unit, and the horizontal metal line covers only the ground of the standard unit. The lines do not overlap each other, so that the problem of the connection of the power line or the ground line of the standard unit due to the excessive width of the metal line in the conventional art can be avoided. Referring to Figure 2, the distance between each standard cell ground wire vss and the standard cell power line Vdd in Figure 2 is the height of a standard cell, that is, the standard grace hs (requires that if Vss is considered) With the width of Vdd, the standard height hs is the distance from the center line of Vdd to the center line of Vss). The maximum width of any _ horizontal metal wire (horizontal power metal wire or horizontal metal wire) that can achieve no overlap is 2hs, which is 2 times the standard height. In practical applications, the width of Vss and Vdd itself needs to be considered. In this case, for a metal wire without other adjacent metal wires on both sides, its width should be no more than: 2hs-Ws-2Sp, ie , 2χ standard height - ΐχ standard unit line width _2 线 line spacing; where 'standard unit line width Ws is standard unit power line vdd and

Clienfs Docket N〇.:S3U05-0050-TW TT5s Docket No:0608-A40992-TW/Final /Joanne 19 200814279 * 標準單元地Vdd線的寬度,其中標準單元電源線Vdd和標 準單元地線Vss的寬度相同;線間間隔Sp為水平金屬線和 標準單元電源線或者標準單元地線之間需保留的間隔距 離。 同樣,對於積體電路結構來說,在電源地網路中保留 線間間隔是為了符合積體電路的設計要求’包括歐姆壓 降、功耗、雜訊、積體電路設計規則、標準單元佇列的重 複性。因此,線間間隔Sp是基於下述因素中的至少一個計 ⑩ 算而得:歐姆壓降、功耗、雜訊、積體電路設計規則、標 準單元佇列的重複性。 第2圖顯示兩侧沒有其他相鄰金屬線的實施例的結構 圖,其中無論是水平電源金屬線202P還是水平地金屬線 202G的兩侧都沒有其他相鄰的金屬線,因此它們的寬度最 大可以至2hs-Ws-2Sp。當然,根據歐姆壓降、功耗、雜訊、 積體電路設計規則、標準單元佇列的重複性等等的因素, 具體佈置是可以採用比上述寬度小的金屬線。 _ 還有一種情況,就是在有一些電源地網路中水平金屬 線是相鄰連排列的,就比如第3圖所示的實施例,第3圖 中顯示數條水平金屬線,它們和Vdd和Vss —樣,同樣是 水平電源金屬線和水平地金屬線相間隔地依次排列,此 時,很明顯,如果希望水平地金屬線和水平電源金屬線具 有相近似的寬度,它們的最大寬度就應該為如下: 當有兩條水平金屬線相鄰時,水平金屬線的寬度不大 於:Clienfs Docket N〇.:S3U05-0050-TW TT5s Docket No:0608-A40992-TW/Final /Joanne 19 200814279 * The width of the standard unit Vdd line, where the standard unit power line Vdd and the standard unit ground line Vss have the same width The line spacing Sp is the separation distance between the horizontal metal line and the standard unit power line or the standard unit ground line. Similarly, for the integrated circuit structure, the line spacing is reserved in the power ground network to meet the design requirements of the integrated circuit' including ohmic voltage drop, power consumption, noise, integrated circuit design rules, and standard cells. The repeatability of the column. Therefore, the line spacing Sp is calculated based on at least one of the following factors: ohmic voltage drop, power consumption, noise, integrated circuit design rules, and repeatability of the standard cell array. Fig. 2 is a structural view showing an embodiment in which there are no other adjacent metal wires on both sides, in which either the horizontal power supply line 202P or the horizontal metal line 202G has no adjacent metal lines on both sides, so that they have the largest width. Can be up to 2hs-Ws-2Sp. Of course, according to factors such as ohmic voltage drop, power consumption, noise, integrated circuit design rules, repeatability of standard cell arrays, and the like, the specific arrangement may be a metal wire having a smaller width than the above. _ There is also a case where the horizontal metal lines are arranged adjacently in some power ground networks, as shown in the embodiment shown in Fig. 3. In Fig. 3, several horizontal metal lines are shown, and they are connected to Vdd. As with Vss, the horizontal power supply wires and the horizontal metal wires are arranged at intervals. In this case, it is obvious that if the horizontal metal wires and the horizontal power supply wires have similar widths, their maximum width is It should be as follows: When there are two horizontal metal lines adjacent, the width of the horizontal metal line is not greater than:

Client’s Docket N〇.:S3U05-0050-TW TT^s Docket No:0608-A40992-TW/Final /Joanne 20 200814279 Μ hs-Smp,即1,5χ標準高度-0.5χ金屬線線間間隔-0.5χ標 準單元線寬度_lx線間間隔; 其中,金屬線線間間隔為兩條水平金屬線之間需保留 的間隔距離。 同樣,在電源地網路中保留金屬線線間間隔是為了符 合積體電路的設計要求,包括歐姆壓降、功耗、雜訊、積 體電路設計規則、標準單元佇列的重複性,因此金屬線線 間間隔一樣是基於下述因素中的至少一個計算而得:歐姆 • 壓降、功耗、雜訊、積體電路設計規則、標準單元佇列的 重複性。 上述的最大寬度適用於要求水平電源金屬線和水平地 金屬線等寬的應用中,這是對於獲得根據一實施例積體電 路性能有利的選擇,如果水平電源金屬線和水平地金屬線 不等寬,在縮小其中一條線的寬度時,另一條金屬線的寬 度可以增加,但是最寬也不會超過2hs-Ws-2Sp。 第3圖示出了兩侧有相鄰金屬線的實施例的結構圖, • 並且其中每一條水平金屬線,包括水平電源金屬線302P 和水平地金屬線302G都是等寬的,它們的寬度最大可以 至2hs-Ws-2Sp。當然,根據歐姆壓降、功耗、雜訊、積體 電路設計規則、標準單元佇列的重複性等等的因素,具體 佈置是可以採用比上述寬度小的金屬線。 對於積體電路結構來說,在佈置了水平金屬線之後, 還需要考慮佈置垂直金屬線,本發明在佈置垂直金屬線時 可以任意使用比水平金屬線高一層或者低一層的金屬層。Client's Docket N〇.:S3U05-0050-TW TT^s Docket No:0608-A40992-TW/Final /Joanne 20 200814279 Μ hs-Smp, ie 1,5χ standard height -0.5χMetal line spacing -0.5χ Standard cell line width _lx line spacing; where the metal line spacing is the separation distance between two horizontal metal lines. Similarly, the spacing between the wires in the power ground network is to meet the design requirements of the integrated circuit, including ohmic voltage drop, power consumption, noise, integrated circuit design rules, and repeatability of the standard cell array. The spacing between metal lines is calculated based on at least one of the following factors: ohmic voltage drop, power consumption, noise, integrated circuit design rules, and repeatability of standard cell arrays. The maximum width described above is suitable for applications requiring horizontal power lines and horizontal metal lines, which are advantageous for obtaining integrated circuit performance according to an embodiment, if horizontal power lines and horizontal metal lines are not equal. Width, when reducing the width of one of the lines, the width of the other line can be increased, but the width should not exceed 2hs-Ws-2Sp. Figure 3 shows a structural view of an embodiment with adjacent metal lines on both sides, and each of the horizontal metal lines, including the horizontal power supply line 302P and the horizontal ground line 302G, are of equal width and their width The maximum can be up to 2hs-Ws-2Sp. Of course, depending on factors such as ohmic voltage drop, power consumption, noise, integrated circuit design rules, repeatability of the standard cell array, and the like, the specific arrangement may be a metal wire having a smaller width than the above. For the integrated circuit structure, after the horizontal metal lines are arranged, it is also necessary to consider the arrangement of the vertical metal lines. The present invention can arbitrarily use a metal layer one layer higher or lower than the horizontal metal lines when arranging the vertical metal lines.

Client’s Docket No.:S3U05-0050-TW TT5s Docket No:0608-A40992-TW/Final /Joanne 21 200814279 同樣,在積體電路結構中,水平金屬線和垂直金屬線 中的電源線和地線分別連通、以及垂直金屬線和標準單元 的電源線和地線也分別連通,根據本發明的實施例,這些 連通都透過通孔實現,如參考第4圖,第4圖是根據本發 明的實施例的標準單元電源地線與電源地網路的連通結構 的不意圖,如圖所示,本發明使用不同金屬層之間的通孔 來使得上述的金屬線相互連通,包括連接垂直金屬線和標 準單元線的通孔402、以及連接水平金屬線和垂直金屬線 ^ 的通孔406。 本發明的積體電路結構中的電源地網路中水平金屬線 和垂直金屬線的密度(即電源地網路的網格密度)基於下 述因素中的至少一個計算而得:歐姆壓降、功耗、雜訊、 積體電路設計規則、標準單元佇列的重複性。 1源地網路的佈晉方法 根據本發明的目的,還提供一種積體電路的電源地網 • 路的佈置方法,其中積體電路的標準單元佇列呈水平方向 排列,第5圖是根據本發明的實施例的電源地網路的佈置 方法的流程圖。 首先,在不同金屬層中佈置水平金屬線和垂直金屬線 (S510),其中水平金屬線包括水平電源金屬線和水平地金 屬線,垂直金屬線包括垂直電源金屬線和垂直地金屬線’ 其中,佈置水平金屬線和垂直金屬線的步驟(S510)包括設 定所述電源地網路的水平金屬線的寬度使得水平電源金廣Client's Docket No.:S3U05-0050-TW TT5s Docket No:0608-A40992-TW/Final /Joanne 21 200814279 Similarly, in the integrated circuit structure, the power line and the ground line in the horizontal metal line and the vertical metal line are respectively connected. And the power line and the ground line of the vertical metal line and the standard unit are also respectively connected. According to an embodiment of the present invention, the communication is realized through the through hole, as shown in FIG. 4, which is a diagram according to an embodiment of the present invention. The connection between the standard unit power ground and the power ground network is not intended. As shown, the present invention uses through holes between different metal layers to interconnect the metal wires, including connecting vertical metal lines and standard cells. A through hole 402 of the wire, and a through hole 406 connecting the horizontal metal wire and the vertical metal wire ^. The density of the horizontal metal lines and the vertical metal lines in the power ground network in the integrated circuit structure of the present invention (ie, the mesh density of the power ground network) is calculated based on at least one of the following factors: ohmic voltage drop, Power consumption, noise, integrated circuit design rules, repeatability of standard cell arrays. According to the object of the present invention, a method for arranging a power ground network and a road of an integrated circuit is provided, wherein the standard unit array of the integrated circuit is arranged in a horizontal direction, and FIG. 5 is based on A flowchart of a method of arranging a power ground network of an embodiment of the present invention. First, horizontal metal lines and vertical metal lines (S510) are arranged in different metal layers, wherein the horizontal metal lines include horizontal power supply lines and horizontal metal lines, and the vertical metal lines include vertical power supply lines and vertical metal lines 'where The step of arranging the horizontal metal line and the vertical metal line (S510) includes setting a width of the horizontal metal line of the power ground network so that the horizontal power supply is wide

Client^ Docket N〇.:S3U05-0050-TW TT^ Docket No:0608-A40992-TW/Final /Joanne 22 200814279 線僅覆蓋所述標準單元佇列的電源線、水平地金屬線僅覆 蓋所述標準單元佇列的地線。 接著,分別連通所述水平金屬線和垂直金屬線中的電 源線和地線(S520)。然後,連通垂直電源金屬線和標準單 元佇列的電源線、垂直地金屬線與標準單元佇列的地線 (S530)。 同樣,參考上面的分析可知,根據本發明,設定水平 金屬線的寬度小於標準單元的標準高度的2倍,即小於 , 2hs 〇 對於兩侧沒有其他相鄰金屬線的情況,設定水平金屬 線的寬度不大於: 2hs-Ws-2Sp,即,2x標準高度-lx標準單元線寬度-2x 線間間隔; 其中,標準單元線寬度Ws為標準單元電源線Vdd和 標準單元地Vdd線的寬度,其中標準單元電源線Vdd和標 準單元地線Vss的寬度相同;線間間隔Sp為水平金屬線和 • 標準單元電源線或者標準單元地線之間需保留的間隔距 離。 保留線間間隔是為了符合積體電路的設計要求,包括 歐姆壓降、功耗、雜訊、積體電路設計規則、標準單元佇 列的重複性。因此,線間間隔Sp是基於下述因素中的至少 一個計算而得:歐姆壓降、功耗、雜訊、積體電路設計規 則、標準單元佇列的重複性。 當有兩條水平金屬線相鄰時,設定水平金屬線的寬度Client^ Docket N〇.:S3U05-0050-TW TT^ Docket No:0608-A40992-TW/Final /Joanne 22 200814279 The line only covers the power line of the standard unit array, and the horizontal metal line only covers the standard. The ground line of the unit queue. Next, the power line and the ground line in the horizontal metal line and the vertical metal line are respectively connected (S520). Then, the power line connecting the vertical power supply line and the standard unit, the vertical ground line, and the ground line of the standard unit are connected (S530). Similarly, referring to the above analysis, according to the present invention, the width of the horizontal metal line is set to be less than 2 times the standard height of the standard unit, that is, less than 2hs. For the case where there are no other adjacent metal lines on both sides, the horizontal metal line is set. The width is not more than: 2hs-Ws-2Sp, that is, 2x standard height - lx standard cell line width - 2x line spacing; wherein, the standard cell line width Ws is the width of the standard cell power line Vdd and the standard cell ground Vdd line, wherein The standard unit power supply line Vdd and the standard unit ground line Vss have the same width; the line spacing Sp is the separation distance between the horizontal metal line and the standard unit power line or the standard unit ground line. The inter-line spacing is reserved to meet the design requirements of the integrated circuit, including ohmic drop, power consumption, noise, integrated circuit design rules, and repeatability of the standard cell array. Therefore, the line spacing Sp is calculated based on at least one of the following factors: ohmic voltage drop, power consumption, noise, integrated circuit design rules, and repeatability of the standard cell array. Set the width of the horizontal metal line when there are two horizontal metal lines adjacent

Clienfs Docket N〇.:S3U05-0050-TW TT5s Docket No:0608-A40992-TW/Final /Joanne 23 200814279 不大於: hs-Smp,即1.5x標準高度-0.5x金屬線線間間隔-0.5x標 準單元線寬度-lx線間間隔; 其中,金屬線線間間隔為兩條水平金屬線之間需保留 的間隔距離。 同樣,保留金屬線線間間隔是為了符合積體電路的設 計要求,包括歐姆壓降、功耗、雜訊、積體電路設計規則、 標準單元佇列的重複性,因此金屬線線間間隔一樣是基於 ⑩ 下述因素中的至少一個計算而得:歐姆壓降、功耗、雜訊、 積體電路設計規則·、標準皁元狩列的重複性。 上述的最大寬度適用於要求水平電源金屬線和水平地 金屬線等寬的應用中,這是對於獲得較佳的積體電路性能 有利的選擇,如果水平電源金屬線和水平地金屬線不等 寬,在縮小其中一條線的寬度時,另一條金屬線的寬度可 以增加,但是最寬也不會超過2hs-Ws-2Sp。 此外,繼續參考圖5所示的實施例,本發明的方法還 _ 包括如下的步驟: 在高於或者低於水平金屬線使用的金屬層一層的金屬 層中佈置垂直金屬線; 基於下述因素中的至少一個計算電源地網路中水平金 屬線和垂直金屬線的密度(S540):歐姆壓降、功耗、雜訊、 積體電路設計規則、標準單元佇列的重複性。 架設通孔使水平金屬線和垂直金屬線中的電源線和地 線的分別連通以及垂直金屬線和標準單元的電源線和地線Clienfs Docket N〇.:S3U05-0050-TW TT5s Docket No:0608-A40992-TW/Final /Joanne 23 200814279 Not greater than: hs-Smp, ie 1.5x standard height -0.5x wire spacing -0.5x standard Cell line width - lx line spacing; where the metal line spacing is the separation distance between two horizontal metal lines. Similarly, the spacing between the metal lines is reserved to meet the design requirements of the integrated circuit, including ohmic voltage drop, power consumption, noise, integrated circuit design rules, and repeatability of the standard cell array, so the spacing between the metal lines is the same. It is calculated based on at least one of the following factors: ohmic voltage drop, power consumption, noise, integrated circuit design rules, and repeatability of the standard soap element. The maximum width described above is suitable for applications requiring horizontal power lines and horizontal metal lines, which is an advantageous choice for obtaining better integrated circuit performance if horizontal power lines and horizontal metal lines are not equal width. When the width of one of the lines is reduced, the width of the other metal line can be increased, but the widest width does not exceed 2hs-Ws-2Sp. Further, with continued reference to the embodiment illustrated in FIG. 5, the method of the present invention further includes the steps of: arranging vertical metal lines in a metal layer above or below a metal layer used for horizontal metal lines; based on the following factors At least one of the calculations determines the density of the horizontal and vertical metal lines in the power ground network (S540): ohmic voltage drop, power consumption, noise, integrated circuit design rules, and repeatability of the standard cell array. A through hole is provided to connect the power line and the ground line in the horizontal metal line and the vertical metal line, and the power line and the ground line of the vertical metal line and the standard unit.

Clienfs Docket N〇.:S3U05-0050-TW TT^ Docket No:0608-A40992-TW/Final /Joanne 24 200814279 的分別連通,參考第4圖,可見包括連接垂直金屬線和標 準單元線的通孔402、以及連接水平金屬線和垂直金屬線 的通孔406。 採用本發明的技術方案,在符合歐姆壓降、功耗、雜 訊的條件下,重新佈置電源地網路’根據積體電路的設計 規則和單元佇列的重複性確定金屬線的寬度,減少由於重 疊和線寬不合適造成的性能缺陷和佈線資源的浪費,以適 應越來越多的電路單元的需求。 • 雖然本發明已以較佳實施例揭露如上,然其並非用以 限定本發明,任何所屬技術領域中具有通常知識者,在不 脫離本發明之精神和範圍内,當可作些許之更動與潤飾, 因此本發明之保護範圍當視後附之申請專利範圍所界定者 為準。 【圖式簡單說明】 第1A圖是現有技術中的一種電源地網路的佈置結構 圖, 第1B圖是現有技術中的另一種電源地網路的佈置結 構圖; 第2圖是根據本發明的實施例的一種電源地網路的佈 置結構圖; 第3圖是根據本發明的實施例的另一種電源地網路的 佈置結構圖; 第4圖是根據本發明的實施例的標準單元電源地線與 電源地網路的連通結構的示意圖;Clienfs Docket N〇.:S3U05-0050-TW TT^ Docket No:0608-A40992-TW/Final /Joanne 24 200814279 separate connection, refer to Figure 4, it can be seen that the through hole 402 connecting the vertical metal line and the standard unit line And a through hole 406 connecting the horizontal metal wire and the vertical metal wire. By adopting the technical scheme of the invention, under the condition of ohmic voltage drop, power consumption and noise, the network of the power source is rearranged. 'The width of the metal line is determined according to the design rule of the integrated circuit and the repeatability of the unit array, and the width is reduced. Performance defects and waste of routing resources due to improper overlap and line width are accommodated by the increasing demand for circuit units. The present invention has been disclosed in the above preferred embodiments, and is not intended to limit the scope of the present invention, and may be modified by those skilled in the art without departing from the spirit and scope of the invention. The scope of protection of the present invention is therefore defined by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A is an arrangement diagram of a power ground network in the prior art, and FIG. 1B is an arrangement structure diagram of another power ground network in the prior art; FIG. 2 is a diagram according to the present invention. FIG. 3 is an arrangement diagram of another power ground network according to an embodiment of the present invention; FIG. 4 is a standard unit power supply according to an embodiment of the present invention; Schematic diagram of the connection structure between the ground line and the power ground network;

Clienfs Docket No.:S3U05-0050-TW ΤΤ58 Docket No:0608-A40992-TW/Final /Joanne 25 200814279 第5圖是根據本發明的實施例的電源地網路的佈置方 法的流程圖。 【主要元件符號說明】Clienfs Docket No.: S3U05-0050-TW ΤΤ 58 Docket No: 0608-A40992-TW/Final / Joanne 25 200814279 Fig. 5 is a flow chart showing a method of arranging a power supply network according to an embodiment of the present invention. [Main component symbol description]

Vdd ··電源線;Vdd ··Power cord;

Vss :地線; 101P、101G、102P、102G、103P、103G、104P、104G、 202G、202P、302G、302P、P、G :金屬線; φ 110、120、402、406、404 :通孑L ; 105 :區域; hs :標準高度;Vss : ground line; 101P, 101G, 102P, 102G, 103P, 103G, 104P, 104G, 202G, 202P, 302G, 302P, P, G: metal line; φ 110, 120, 402, 406, 404: overnight L 105: area; hs: standard height;

Ws :標準單元線寬度;Ws: standard unit line width;

Sp :線間間隔; S510〜S540 :步驟。Sp : line spacing; S510 ~ S540: steps.

Client’s Docket N〇.:S3U05-0050-TW TT5s Docket No:0608-A40992-TW/Final /Joanne 26Client’s Docket N〇.:S3U05-0050-TW TT5s Docket No:0608-A40992-TW/Final /Joanne 26

Claims (1)

200814279 十、申請專利範圍: 1. 一種積體電路的電源地網路,其中積體電路的標準 單元佇列呈水平方向排列,上述電源地網路包括佈置在不 同金屬層中的水平金屬線和垂直金屬線,水平金屬線包括 水平電源金屬線和水平地金屬線,垂直金屬線包括垂直電 源金屬線和垂直地金屬線,上述水平金屬線和垂直金屬線 中的電源線和地線分別互相連通, 其特徵在於,上述電源地網路的水平金屬線的寬度使 • 得水平電源金屬線僅覆蓋所述標準單元佇列的電源線、水 平地金屬線僅覆蓋上述標準單元符列的地線。 2. 如申請專利範圍第1項所述的電源地網路,其特徵 在於,上述水平金屬線的寬度小於標準單元的標準高度的 2倍。 3. 如申請專利範圍第2項所述的電源地網路,其特徵 在於,上述水平金屬線的寬度小於: 2χ標準高度-lx標準單元線寬度-2χ線間間隔; • 其中,標準單元線寬度為標準單元電源線、標準單元 地線的寬度,標準單元電源線和標準單元地線的寬度相 同;線間間隔為水平金屬線和標準單元電源線或者標準單 元地線之間需保留的間隔距離。 4. 如申請專利範圍第3項所述的電源地網路,其特徵 在於,上述線間間隔基於下述因素中的至少一個計算而 得:歐姆壓降、功耗、雜訊、積體電路設計規則、標準單 元佇列的重複性。 Clients Docket No.:S3U05-0050-TW TT^s Docket No:0608-A40992-TW/Fmal /Joanne 27 200814279 5. 如申請專利範圍第2項所述的電源地網路,其特徵 在於,當有兩條水平金屬線相鄰時,上述水平金屬線的寬 度小於: 1.5Χ標準高度-0.5x金屬線線間間隔-0.5Χ標準單元線寬 度-lx線間間距; 其中,金屬線線間間隔為兩條水平金屬線之間需保留 的間隔距離。 6. 如申請專利範圍第5項所述的電源地網路^其特徵 _ 在於,上述金屬線線間間隔基於下述因素中的至少一個計 算而得:歐姆壓降、功耗、雜訊、積體電路設計規則、標 準單元佇列的重複性。 7. 如申請專利範圍第1至6項中任一項所述的電源地 網路,其特徵在於,上述垂直金屬線使用比水平金屬線更 接近標準單元線的金屬層。 8. 如申請專利範圍第7項所述的電源地網路,其特徵 在於,上述垂直金屬線使用比水平金屬線高一層或者低一 層的金屬層。 9. 如申請專利範圍第7所述的電源地網路,其特徵在 於,上述電源地網路中水平金屬線和垂直金屬線的密度基 於下述因素中的至少一個計算而得:歐姆壓降、功耗、雜 訊、積體電路設計規則、標準單元佇列的重複性。 10. 如申請專利範圍第7項所述的電源地網路,其特徵 在於,上述水平金屬線和垂直金屬線中的電源線和地線的 分別連通、上述水平金屬線和標準單元的電源線和地線的 Clienfs Docket N〇.:S3U05-0050-TW TT5s Docket No:0608-A40992-TW/Final /Joanne 28 200814279 分別連通、以及上述垂直金屬線和標準單元的電源線和地 線的分別連通都通過通孔實現。 11. 一種積體電路的電源地網路的佈置方法,其中積 體電路的標準單元佇列呈水平方向排列,所述方法包括: 在不同金屬層中佈置水平金屬線和垂直金屬線,其中 水平金屬線包括水平電源金屬線和水平地金屬線,垂直金 屬線包括垂直電源金屬線和垂直地金屬線; 分別連通上述水平金屬線和垂直金屬線中的電源線和 ⑩地線;以及 連通垂直電源金屬線和標準單元佇列的電源線、垂直 地金屬線與標準單元佇列的地線; 其中,上述佈置水平金屬線和垂直金屬線的步驟包括 設定上述電源地網路的水平金屬線的寬度使得水平電源金 屬線僅覆蓋上述標準單元佇列的電源線、水平地金屬線僅 覆蓋上述標準單元佇列的地線。 12. 如申請專利範圍第11項所述的佈置方法,其特徵 _ 在於,設定上述水平金屬線的寬度小於標準單元的標準高 度的2倍。 13. 如申請專利範圍第12項所述的佈置方法,其特徵 在於,設定上述水平金屬線的寬度小於: 2x標準高度-lx標準單元線寬度-2x線間間隔 其中,標準單元線寬度為標準單元電源線、標準單元 地線的寬度,標準單元電源線和標準單元地線的寬度相 同;線間間隔為水平金屬線和標準單元電源線或者標準單 Clienfs Docket N〇.:S3U05-0050-TW TT^ Docket No:0608-A40992-TW/Final /Joanne 29 200814279 元地線之間需保留的間隔距離。 14. 如申請專利範圍第13項所述的佈置方法,其特徵 在於’逛包括: 基於下述因素中的至少一個計算所述線間間隔:歐姆 壓降、功耗、雜訊、積體電路設計規則、標準單元佇列的 重複性。 15. 如申請專利範圍第12項所述的佈置方法,其特徵 在於,當有兩條水平金屬線相鄰時,設定上述水平金屬線 ⑩ 的寬度小於: 1.5χ標準高度-〇.5χ金屬線線間間隔-0.5χ標準單元線寬 度-1χ線間間距 其中,金屬線線間間隔為兩條水平金屬線之間需保留 的間隔距離。 16. 如申請專利範圍第15項所述的佈置方法,其特徵 在於,退包括: 基於下述因素中的至少一個計算所述金屬線線間間 _ 隔:歐姆壓降、功耗、雜訊、積體電路設計規則、標準單 元佇列的重複性。 17. 如申請專利範圍第16項所述的佈置方法,其特徵 在於,在高於或者低於上述水平金屬線使用的金屬層一層 的金屬層中佈置垂直金屬線。 18. 如申請專利範圍第16項所述的佈置方法,其特徵 在於,還包括: 基於下述因素中的至少一個計算電源地網路中水平金 Client’s Docket N〇.:S3U05-0050-TW TT^s Docket No:0608-A40992-TW/Final /Joanne 30 200814279 ¥ 屬線和垂直金屬線的密度:歐姆壓降、功耗、雜訊、積體 電路設計規則、標準單元佇列的重複性。 19. 如申請專利範圍第16項所述的佈置方法,其特徵 在於,還包括: 架設通孔使上述水平金屬線和垂直金屬線中的電源線 和地線的分別連通、以及上述垂直金屬線和標準單元的電 源線和地線的分別連通。 20. —種積體電路結構,包括標準單元佇列和電源地網 _ 路5其中標準草元符列呈水平方向排列’電源地網路包括 佈置在不同金屬層中的水平金屬線和垂直金屬線,水平金 屬線包括水平電源金屬線和水平地金屬線,垂直金屬線包 括垂直電源金屬線和垂直地金屬線,上述水平金屬線和垂 直金屬線中的電源線和地線分別互相連通; 其特徵在於,上述電源地網路的水平金屬線的寬度使 得水平電源金屬線僅覆蓋所述標準單元佇列的電源線、水 平地金屬線僅覆蓋所述標準單元佇列的地線。 _ 21.如申請專利範圍第20項所述的積體電路結構,其 特徵在於,上述水平金屬線的寬度小於標準單元的標準高 度的2倍。 22.如申請專利範圍第21項所述的積體電路結構,其 特徵在於,上述水平金屬線的寬度小於: 2x標準高度-lx標準單元線寬度-2χ線間間隔; 其中,標準單元線寬度為標準單元電源線、標準單元 地線的寬度,標準單元電源線和標準單元地線的寬度相 Client’s Docket N〇.:S3U05-0050-TW TT^s Docket No:0608-A40992-TW/Final /Joanne 31 200814279 同;線間間隔為水平金屬線和標準單元電源線或者標準單 元地線之間需保留的間隔距離。 23. 如申請專利範圍第22項所述的積體電路結構,其 特徵在於,上述線間間隔基於下述因素中的至少一個計算 而得:歐姆壓降、功耗、雜訊、積體電路設計規則、標準 單元仵列的重複性。 24. 如申請專利範圍第20項所述的積體電路結構,其 特徵在於,當有兩條水平金屬線相鄰時,上述水平金屬線 ⑩ 的寬度小於: 1.5X標準高度-0.5X金屬線線間間隔-0.5X標準單元線寬 度_1χ線間間距 其中,金屬線線間間隔為兩條水平金屬線之間需保留 的間隔距離。 25. 如申請專利範圍第24項所述的積體電路結構,其 特徵在於,上述金屬線線間間隔基於下述因素中的至少一 個計算而得:歐姆壓降、功耗、雜訊、積體電路設計規則、 • 標準單元佇列的重複性。 26. 如申請專利範圍第20項所述的積體電路結構,其 特徵在於,上述垂直金屬線可以任意使用比水平金屬線高 一層或者低一層的金屬層。 27. 如申請專利範圍第26項所述的積體電路結構,其 特徵在於,上述電源地網路中水平金屬線和垂直金屬線的 密度基於下述因素中的至少一個計算而得:歐姆壓降、功 耗、雜訊、積體電路設計規則、標準單元佇列的重複性。 Clienfs Docket N〇.:S3U05-0050-TW TT5s Docket No:0608-A40992-TW/Final /Joanne 32 200814279 28.如申請專利範圍第26項所述的積體電路結構,其 特徵在於,上述水平金屬線和垂直金屬線中的電源線和地 線的分別連通、以及上述垂直金屬線和標準單元的電源線 和地線的分別連通都透過通孔實現。200814279 X. Patent application scope: 1. A power ground network of an integrated circuit in which standard cell arrays of integrated circuits are arranged in a horizontal direction, and the power ground network includes horizontal metal wires arranged in different metal layers and The vertical metal wire includes a horizontal power metal wire and a horizontal metal wire, and the vertical metal wire includes a vertical power metal wire and a vertical metal wire, and the power wire and the ground wire of the horizontal metal wire and the vertical metal wire are respectively connected to each other. The width of the horizontal metal wire of the power ground network is such that the horizontal power supply metal wire only covers the power supply line of the standard cell array, and the horizontal metal wire only covers the ground line of the standard cell line. 2. The power ground network of claim 1, wherein the horizontal metal wire has a width less than twice the standard height of the standard unit. 3. The power ground network of claim 2, wherein the width of the horizontal metal line is less than: 2χ standard height - lx standard unit line width - 2 line spacing; • wherein, standard unit line The width is the width of the standard unit power line, the standard unit ground line, the standard unit power line and the standard unit ground line have the same width; the line spacing is the interval between the horizontal metal line and the standard unit power line or the standard unit ground line. distance. 4. The power ground network according to claim 3, wherein the line spacing is calculated based on at least one of the following factors: ohmic voltage drop, power consumption, noise, integrated circuit Design rules, repeatability of standard cell arrays. Clients Docket No.:S3U05-0050-TW TT^s Docket No:0608-A40992-TW/Fmal /Joanne 27 200814279 5. The power ground network as described in claim 2, characterized in that When two horizontal metal lines are adjacent, the width of the horizontal metal line is less than: 1.5 Χ standard height - 0.5 x metal line spacing - 0.5 Χ standard unit line width - lx line spacing; wherein, the metal line spacing is The separation distance between two horizontal metal lines. 6. The power ground network according to claim 5, wherein the metal line spacing is calculated based on at least one of the following factors: ohmic voltage drop, power consumption, noise, The integrated circuit design rules and the repeatability of the standard unit array. 7. The power ground network of any of claims 1 to 6, wherein the vertical metal line uses a metal layer that is closer to the standard cell line than the horizontal metal line. 8. The power ground network of claim 7, wherein the vertical metal line uses a metal layer one layer higher or lower than the horizontal metal line. 9. The power ground network of claim 7, wherein the density of the horizontal metal lines and the vertical metal lines in the power ground network is calculated based on at least one of the following factors: an ohmic voltage drop. , power consumption, noise, integrated circuit design rules, repeatability of standard cell arrays. 10. The power ground network according to claim 7, wherein the horizontal wire and the vertical wire are respectively connected to the power wire and the ground wire, and the horizontal wire and the power cable of the standard unit are respectively connected. Clienfs Docket N〇.:S3U05-0050-TW TT5s Docket No:0608-A40992-TW/Final /Joanne 28 200814279 Connected separately and the power and ground wires of the above vertical metal wire and standard unit Both are realized through through holes. 11. A method of arranging a power ground network of an integrated circuit, wherein a standard cell array of the integrated circuit is arranged in a horizontal direction, the method comprising: arranging horizontal metal lines and vertical metal lines in different metal layers, wherein the level The metal wire includes a horizontal power metal wire and a horizontal metal wire, and the vertical metal wire includes a vertical power supply metal wire and a vertical metal wire; respectively connect the power supply wire and the 10 ground wire among the horizontal metal wire and the vertical metal wire; and connect the vertical power supply The power line of the metal line and the standard unit, the vertical ground line and the ground line of the standard unit; wherein the step of arranging the horizontal metal line and the vertical metal line includes setting a width of the horizontal metal line of the power ground network The horizontal power supply metal wire only covers the power supply line of the above-mentioned standard unit array, and the horizontal metal wire only covers the ground line of the above-mentioned standard unit array. 12. The arrangement method according to claim 11, wherein the width of the horizontal metal wire is set to be less than twice the standard height of the standard cell. 13. The method according to claim 12, wherein the width of the horizontal metal line is set to be less than: 2x standard height - lx standard unit line width - 2 x line spacing, wherein the standard unit line width is standard The width of the unit power line, the standard unit ground line, the standard unit power line and the standard unit ground line are the same; the line spacing is horizontal metal line and standard unit power line or standard single Clienfs Docket N〇.:S3U05-0050-TW TT^ Docket No:0608-A40992-TW/Final /Joanne 29 200814279 The distance to be reserved between the ground lines. 14. The method according to claim 13, wherein the method comprises: calculating the line spacing based on at least one of the following factors: ohmic voltage drop, power consumption, noise, integrated circuit Design rules, repeatability of standard cell arrays. 15. The method according to claim 12, wherein when the two horizontal metal lines are adjacent, the width of the horizontal metal line 10 is set to be less than: 1.5 χ standard height - 〇.5 χ metal line Inter-line spacing - 0.5 χ standard cell line width - 1 χ line spacing. The spacing between metal lines is the separation distance between two horizontal metal lines. 16. The method according to claim 15, wherein the retreating comprises: calculating the inter-line spacing of the metal lines based on at least one of the following factors: ohmic voltage drop, power consumption, noise , integrated circuit design rules, repeatability of standard cell arrays. 17. The method of arranging according to claim 16, wherein the vertical metal line is disposed in a metal layer higher than or lower than a layer of the metal layer used for the horizontal metal line. 18. The method according to claim 16, further comprising: calculating a level of gold in the network of the power source based on at least one of the following factors: Client Ss Docket N〇.: S3U05-0050-TW TT ^s Docket No:0608-A40992-TW/Final /Joanne 30 200814279 ¥ Density of genre and vertical wires: ohmic drop, power consumption, noise, integrated circuit design rules, repeatability of standard cell arrays. 19. The method according to claim 16, further comprising: erecting a through hole to respectively connect the power line and the ground line in the horizontal metal line and the vertical metal line, and the vertical metal line It is connected to the power line and ground of the standard unit respectively. 20. - Integral circuit structure, including standard cell array and power ground network _ Road 5 where the standard grass element array is arranged horizontally 'Power ground network includes horizontal metal lines and vertical metals arranged in different metal layers The horizontal metal wire includes a horizontal power metal wire and a horizontal metal wire, and the vertical metal wire includes a vertical power metal wire and a vertical metal wire, and the power wire and the ground wire in the horizontal metal wire and the vertical metal wire are respectively connected to each other; The feature is that the width of the horizontal metal line of the power ground network is such that the horizontal power supply metal line only covers the power supply line of the standard unit array, and the horizontal metal line covers only the ground line of the standard unit array. The integrated circuit structure according to claim 20, wherein the horizontal metal wire has a width smaller than twice the standard height of the standard cell. 22. The integrated circuit structure according to claim 21, wherein the width of the horizontal metal line is less than: 2x standard height - lx standard unit line width - 2 line spacing; wherein, standard unit line width The width of the standard unit power cord, the standard unit ground, the width of the standard unit power cord and the standard unit ground. Client's Docket N〇.:S3U05-0050-TW TT^s Docket No:0608-A40992-TW/Final / Joanne 31 200814279 Same; the line spacing is the separation distance between the horizontal metal line and the standard unit power line or standard unit ground. 23. The integrated circuit structure according to claim 22, wherein the line spacing is calculated based on at least one of the following factors: ohmic voltage drop, power consumption, noise, integrated circuit Design rules, repeatability of standard cell arrays. 24. The integrated circuit structure according to claim 20, wherein when the two horizontal metal lines are adjacent, the width of the horizontal metal line 10 is less than: 1.5X standard height - 0.5X metal line Interline spacing - 0.5X standard cell line width _1 χ line spacing. The spacing between metal lines is the separation distance between two horizontal metal lines. 25. The integrated circuit structure according to claim 24, wherein the metal line spacing is calculated based on at least one of the following factors: ohmic voltage drop, power consumption, noise, and product. Body circuit design rules, • Repeatability of standard cell arrays. 26. The integrated circuit structure according to claim 20, wherein the vertical metal wire can be arbitrarily used with a metal layer one layer higher or lower than the horizontal metal wire. 27. The integrated circuit structure of claim 26, wherein the density of the horizontal metal line and the vertical metal line in the power ground network is calculated based on at least one of the following factors: ohmic pressure Drop, power consumption, noise, integrated circuit design rules, repeatability of standard cell arrays. Clienfs Docket N〇.: S3U05-0050-TW TT5s Docket No: 0608-A40992-TW/Final / Joanne 32 200814279 28. The integrated circuit structure according to claim 26, characterized in that the horizontal metal The respective communication of the power line and the ground line in the line and the vertical metal line, and the respective communication between the vertical metal line and the power line and the ground line of the standard unit are respectively realized through the through hole. Clienf s Docket N〇.:S3U05-0050-TW TT5s Docket No:0608-A40992-TW/Final /JoanneClienf s Docket N〇.:S3U05-0050-TW TT5s Docket No:0608-A40992-TW/Final /Joanne
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Cited By (1)

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Publication number Priority date Publication date Assignee Title
CN114388450A (en) * 2022-03-24 2022-04-22 上海燧原科技有限公司 Integrated circuit device structure and integrated chip

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114388450A (en) * 2022-03-24 2022-04-22 上海燧原科技有限公司 Integrated circuit device structure and integrated chip

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