TW200745937A - Command controller and prefetch buffer applied in an embedded system and control method thereof - Google Patents

Command controller and prefetch buffer applied in an embedded system and control method thereof

Info

Publication number
TW200745937A
TW200745937A TW096107502A TW96107502A TW200745937A TW 200745937 A TW200745937 A TW 200745937A TW 096107502 A TW096107502 A TW 096107502A TW 96107502 A TW96107502 A TW 96107502A TW 200745937 A TW200745937 A TW 200745937A
Authority
TW
Taiwan
Prior art keywords
prefetch buffer
embedded system
command controller
control method
serial flash
Prior art date
Application number
TW096107502A
Other languages
English (en)
Other versions
TWI334989B (en
Inventor
Chung-Hung Tsai
Ming-Shiang Lai
Original Assignee
Mediatek Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mediatek Inc filed Critical Mediatek Inc
Publication of TW200745937A publication Critical patent/TW200745937A/zh
Application granted granted Critical
Publication of TWI334989B publication Critical patent/TWI334989B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1004—Compatibility, e.g. with legacy hardware
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1016—Performance improvement
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/20—Employing a main memory using a specific memory technology
    • G06F2212/202—Non-volatile memory
    • G06F2212/2022—Flash memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60—Details of cache memory
    • G06F2212/6022—Using a prefetch buffer or dedicated prefetch cache

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Memory System (AREA)
TW096107502A 2006-03-09 2007-03-05 Command controller and prefetch buffer applied in an embedded system and control method thereof TWI334989B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/371,423 US7743202B2 (en) 2006-03-09 2006-03-09 Command controller, prefetch buffer and methods for accessing a serial flash in an embedded system

Publications (2)

Publication Number Publication Date
TW200745937A true TW200745937A (en) 2007-12-16
TWI334989B TWI334989B (en) 2010-12-21

Family

ID=38474608

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096107502A TWI334989B (en) 2006-03-09 2007-03-05 Command controller and prefetch buffer applied in an embedded system and control method thereof

Country Status (4)

Country Link
US (1) US7743202B2 (zh)
CN (2) CN101477453B (zh)
TW (1) TWI334989B (zh)
WO (1) WO2007101407A1 (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI463310B (zh) * 2009-07-28 2014-12-01 Mediatek Inc 嵌入式系統及其管理方法
TWI473014B (zh) * 2008-07-23 2015-02-11 Microchip Tech Inc 增強型微處理器或微控制器

Families Citing this family (45)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8996784B2 (en) * 2006-03-09 2015-03-31 Mediatek Inc. Command controller, prefetch buffer and methods for accessing a serial flash in an embedded system
US8959307B1 (en) 2007-11-16 2015-02-17 Bitmicro Networks, Inc. Reduced latency memory read transactions in storage devices
TWI405215B (zh) * 2009-04-15 2013-08-11 Macronix Int Co Ltd 位址訊號傳輸方法及記憶體系統
US8688893B2 (en) * 2009-06-23 2014-04-01 Intel Mobile Communications GmbH Memory device and memory interface
US9135190B1 (en) 2009-09-04 2015-09-15 Bitmicro Networks, Inc. Multi-profile memory controller for computing devices
US8665601B1 (en) 2009-09-04 2014-03-04 Bitmicro Networks, Inc. Solid state drive with improved enclosure assembly
US8447908B2 (en) 2009-09-07 2013-05-21 Bitmicro Networks, Inc. Multilevel memory bus system for solid-state mass storage
US8560804B2 (en) * 2009-09-14 2013-10-15 Bitmicro Networks, Inc. Reducing erase cycles in an electronic storage device that uses at least one erase-limited memory device
US8310880B2 (en) * 2010-03-05 2012-11-13 248 Solid State, Inc. Virtual channel support in a nonvolatile memory controller
US9372755B1 (en) 2011-10-05 2016-06-21 Bitmicro Networks, Inc. Adaptive power cycle sequences for data recovery
US9606746B2 (en) 2011-10-27 2017-03-28 Hewlett Packard Enterprise Development Lp Shiftable memory supporting in-memory data structures
WO2013062596A1 (en) * 2011-10-28 2013-05-02 Hewlett-Packard Development Company, L.P. Row shifting shiftable memory
US9043669B1 (en) 2012-05-18 2015-05-26 Bitmicro Networks, Inc. Distributed ECC engine for storage media
KR101986355B1 (ko) 2012-09-14 2019-06-05 삼성전자주식회사 임베디드 멀티미디어 카드, 상기 임베디드 멀티미디어 카드를 포함하는 임베디드 멀티미디어 카드 시스템 및 상기 임베디드 멀티미디어 카드의 동작 방법
US9423457B2 (en) 2013-03-14 2016-08-23 Bitmicro Networks, Inc. Self-test solution for delay locked loops
US9934045B1 (en) 2013-03-15 2018-04-03 Bitmicro Networks, Inc. Embedded system boot from a storage device
US9916213B1 (en) 2013-03-15 2018-03-13 Bitmicro Networks, Inc. Bus arbitration with routing and failover mechanism
US9842024B1 (en) 2013-03-15 2017-12-12 Bitmicro Networks, Inc. Flash electronic disk with RAID controller
US9720603B1 (en) 2013-03-15 2017-08-01 Bitmicro Networks, Inc. IOC to IOC distributed caching architecture
US9858084B2 (en) 2013-03-15 2018-01-02 Bitmicro Networks, Inc. Copying of power-on reset sequencer descriptor from nonvolatile memory to random access memory
US9430386B2 (en) 2013-03-15 2016-08-30 Bitmicro Networks, Inc. Multi-leveled cache management in a hybrid storage system
US9971524B1 (en) 2013-03-15 2018-05-15 Bitmicro Networks, Inc. Scatter-gather approach for parallel data transfer in a mass storage system
US9400617B2 (en) 2013-03-15 2016-07-26 Bitmicro Networks, Inc. Hardware-assisted DMA transfer with dependency table configured to permit-in parallel-data drain from cache without processor intervention when filled or drained
US9734067B1 (en) 2013-03-15 2017-08-15 Bitmicro Networks, Inc. Write buffering
US9672178B1 (en) 2013-03-15 2017-06-06 Bitmicro Networks, Inc. Bit-mapped DMA transfer with dependency table configured to monitor status so that a processor is not rendered as a bottleneck in a system
US10489318B1 (en) 2013-03-15 2019-11-26 Bitmicro Networks, Inc. Scatter-gather approach for parallel data transfer in a mass storage system
US9875205B1 (en) 2013-03-15 2018-01-23 Bitmicro Networks, Inc. Network of memory systems
US9798688B1 (en) 2013-03-15 2017-10-24 Bitmicro Networks, Inc. Bus arbitration with routing and failover mechanism
US9501436B1 (en) 2013-03-15 2016-11-22 Bitmicro Networks, Inc. Multi-level message passing descriptor
US9563551B2 (en) 2013-06-20 2017-02-07 Silicon Motion, Inc. Data storage device and data fetching method for flash memory
CN103955440A (zh) * 2013-12-18 2014-07-30 记忆科技(深圳)有限公司 一种非易失存储设备及其进行数据操作的方法
US10078604B1 (en) 2014-04-17 2018-09-18 Bitmicro Networks, Inc. Interrupt coalescing
US9811461B1 (en) 2014-04-17 2017-11-07 Bitmicro Networks, Inc. Data storage system
US9952991B1 (en) 2014-04-17 2018-04-24 Bitmicro Networks, Inc. Systematic method on queuing of descriptors for multiple flash intelligent DMA engine operation
US10055150B1 (en) 2014-04-17 2018-08-21 Bitmicro Networks, Inc. Writing volatile scattered memory metadata to flash device
US10042792B1 (en) 2014-04-17 2018-08-07 Bitmicro Networks, Inc. Method for transferring and receiving frames across PCI express bus for SSD device
US10025736B1 (en) 2014-04-17 2018-07-17 Bitmicro Networks, Inc. Exchange message protocol message transmission between two devices
CN105573933B (zh) * 2014-10-17 2018-10-09 瑞昱半导体股份有限公司 处理器及存取存储器的方法
CN105139890B (zh) * 2015-09-21 2019-02-12 北京联想核芯科技有限公司 一种信息处理方法及固态硬盘
KR20170094815A (ko) 2016-02-11 2017-08-22 삼성전자주식회사 비휘발성 메모리, 그것을 포함하는 컴퓨팅 시스템, 및 그것의 읽기 방법
US10866897B2 (en) * 2016-09-26 2020-12-15 Samsung Electronics Co., Ltd. Byte-addressable flash-based memory module with prefetch mode that is adjusted based on feedback from prefetch accuracy that is calculated by comparing first decoded address and second decoded address, where the first decoded address is sent to memory controller, and the second decoded address is sent to prefetch buffer
CN107958679B (zh) * 2016-10-14 2023-05-23 三星电子株式会社 存储器模块和用于存储器模块的处理数据缓冲器
CN108170367B (zh) * 2016-12-07 2021-04-20 瑞昱半导体股份有限公司 内存控制电路及其方法
US10552050B1 (en) 2017-04-07 2020-02-04 Bitmicro Llc Multi-dimensional computer storage system
US11169737B2 (en) * 2019-08-13 2021-11-09 Micron Technology, Inc. Speculation in memory

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5671390A (en) * 1995-05-23 1997-09-23 International Business Machines Corporation Log structured array storage subsystem using LSA directory and LSA sub-directory stored in different storage media
US7272703B2 (en) * 1997-08-01 2007-09-18 Micron Technology, Inc. Program controlled embedded-DRAM-DSP architecture and methods
JPH11110139A (ja) * 1997-09-26 1999-04-23 Internatl Business Mach Corp <Ibm> データ読み取り方法及びデータ読み取り装置
US20020056027A1 (en) * 1998-10-29 2002-05-09 Hiroki Kanai Information processing system
US6317811B1 (en) * 1999-08-26 2001-11-13 International Business Machines Corporation Method and system for reissuing load requests in a multi-stream prefetch design
US6684294B1 (en) * 2000-03-31 2004-01-27 Intel Corporation Using an access log for disk drive transactions
US6714993B1 (en) * 2000-05-22 2004-03-30 Legerity, Inc. Programmable memory based control for generating optimal timing to access serial flash devices
US6798696B2 (en) * 2001-12-04 2004-09-28 Renesas Technology Corp. Method of controlling the operation of non-volatile semiconductor memory chips
US20030204675A1 (en) * 2002-04-29 2003-10-30 Dover Lance W. Method and system to retrieve information from a storage device
KR100493884B1 (ko) * 2003-01-09 2005-06-10 삼성전자주식회사 시리얼 플래시 메모리에서의 현지 실행을 위한 제어 장치및 그 방법, 이를 이용한 플래시 메모리 칩
US7308524B2 (en) * 2003-01-13 2007-12-11 Silicon Pipe, Inc Memory chain
TWI242718B (en) * 2003-05-29 2005-11-01 Mediatek Inc Method for dynamically arranging an operating speed of a microprocessor
US7062615B2 (en) * 2003-08-29 2006-06-13 Emulex Design & Manufacturing Corporation Multi-channel memory access arbitration method and system
US7370152B2 (en) * 2004-06-29 2008-05-06 Rambus Inc. Memory controller with prefetching capability
US20070005902A1 (en) * 2004-12-07 2007-01-04 Ocz Technology Group, Inc. Integrated sram cache for a memory module and method therefor
US20060248267A1 (en) * 2005-04-29 2006-11-02 Programmable Microelectronics Corporation Flash memory having configurable sector size and flexible protection scheme

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI473014B (zh) * 2008-07-23 2015-02-11 Microchip Tech Inc 增強型微處理器或微控制器
TWI463310B (zh) * 2009-07-28 2014-12-01 Mediatek Inc 嵌入式系統及其管理方法

Also Published As

Publication number Publication date
WO2007101407A1 (en) 2007-09-13
US20070214324A1 (en) 2007-09-13
CN101477453B (zh) 2012-04-18
US7743202B2 (en) 2010-06-22
CN101477453A (zh) 2009-07-08
CN101034382A (zh) 2007-09-12
CN100470526C (zh) 2009-03-18
TWI334989B (en) 2010-12-21

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