MX2007002367A - Metodo y aparato para transmitir comandos de pre-carga de memoria en un enlace. - Google Patents

Metodo y aparato para transmitir comandos de pre-carga de memoria en un enlace.

Info

Publication number
MX2007002367A
MX2007002367A MX2007002367A MX2007002367A MX2007002367A MX 2007002367 A MX2007002367 A MX 2007002367A MX 2007002367 A MX2007002367 A MX 2007002367A MX 2007002367 A MX2007002367 A MX 2007002367A MX 2007002367 A MX2007002367 A MX 2007002367A
Authority
MX
Mexico
Prior art keywords
bus
data
memory pre
memory
transmitting memory
Prior art date
Application number
MX2007002367A
Other languages
English (en)
Inventor
Richard Gerard Hofmann
Mark Michael Schaffer
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of MX2007002367A publication Critical patent/MX2007002367A/es

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0215—Addressing or allocation; Relocation with look ahead addressing means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/161—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter

Abstract

Se describe un sistema de procesamiento y metodo en donde un procesador puede ser configurado para predecir una direccion de memoria de la cual se necesitaran datos, transmitir a un controlador de memoria un comando de pre-carga para los datos en la direccion pronosticada de la memoria, y transmitir al controlador de memoria una solicitud de lectura para los datos en la direccion pronosticada de la memoria en caso que se requieran los datos.
MX2007002367A 2004-08-27 2005-08-26 Metodo y aparato para transmitir comandos de pre-carga de memoria en un enlace. MX2007002367A (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/929,127 US8028143B2 (en) 2004-08-27 2004-08-27 Method and apparatus for transmitting memory pre-fetch commands on a bus
PCT/US2005/030403 WO2006026428A1 (en) 2004-08-27 2005-08-26 Method and apparatus for transmitting memory pre-fetch commands on a bus

Publications (1)

Publication Number Publication Date
MX2007002367A true MX2007002367A (es) 2007-05-11

Family

ID=35517148

Family Applications (1)

Application Number Title Priority Date Filing Date
MX2007002367A MX2007002367A (es) 2004-08-27 2005-08-26 Metodo y aparato para transmitir comandos de pre-carga de memoria en un enlace.

Country Status (9)

Country Link
US (1) US8028143B2 (es)
EP (1) EP1784731A1 (es)
JP (2) JP2008511925A (es)
KR (1) KR100913279B1 (es)
CN (2) CN103034476B (es)
IL (1) IL181615A0 (es)
MX (1) MX2007002367A (es)
TW (1) TWI391819B (es)
WO (1) WO2006026428A1 (es)

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JP2008009702A (ja) * 2006-06-29 2008-01-17 Matsushita Electric Ind Co Ltd 演算処理システム
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JP5115548B2 (ja) * 2007-03-15 2013-01-09 日本電気株式会社 半導体集積回路装置
US8275946B1 (en) * 2007-04-19 2012-09-25 Marvell International Ltd. Channel tags in memory components for optimizing logical to physical address translations
KR101228934B1 (ko) * 2007-08-28 2013-02-01 삼성전자주식회사 컴퓨터 시스템, 그 제어 방법 및 데이터 처리 장치
JP4643667B2 (ja) * 2008-03-01 2011-03-02 株式会社東芝 メモリシステム
CN101464845B (zh) 2009-01-09 2012-09-05 威盛电子股份有限公司 用于总线系统的预取装置、预取系统及预取数据方法
US9720859B1 (en) * 2010-04-30 2017-08-01 Mentor Graphics Corporation System, method, and computer program product for conditionally eliminating a memory read request
CN102207916B (zh) * 2011-05-30 2013-10-30 西安电子科技大学 一种基于指令预取的多核共享存储器控制设备
KR101480420B1 (ko) * 2013-02-15 2015-01-13 연세대학교 산학협력단 메모리-디스크 통합 시스템
CN105264501B (zh) * 2013-06-19 2018-06-08 英派尔科技开发有限公司 定位多核处理器中的被高速缓存的数据的方法和装置
US9563551B2 (en) * 2013-06-20 2017-02-07 Silicon Motion, Inc. Data storage device and data fetching method for flash memory
KR101985157B1 (ko) * 2013-12-26 2019-05-31 인텔 코포레이션 멀티칩 패키지 링크
KR102507219B1 (ko) * 2016-02-02 2023-03-09 에스케이하이닉스 주식회사 시스템 및 시스템의 동작 방법
CN106383926A (zh) * 2016-08-29 2017-02-08 北京中电华大电子设计有限责任公司 一种基于Cortex‑M系列处理器的指令预取方法及电路
US10394706B2 (en) * 2017-11-02 2019-08-27 Western Digital Technologies, Inc. Non-volatile storage with adaptive command prediction
US10649776B2 (en) 2018-06-29 2020-05-12 Western Digital Technologies, Inc. System and method for prediction of multiple read commands directed to non-sequential data
US10642502B2 (en) 2018-06-29 2020-05-05 Western Digital Technologies, Inc. System and method for prediction of read commands to non-sequential data
US10846226B2 (en) 2019-01-28 2020-11-24 Western Digital Technologies, Inc. System and method for prediction of random read commands in virtualized multi-queue memory systems
US10896131B2 (en) 2019-01-28 2021-01-19 Western Digital Technologies, Inc. System and method for configuring a storage device based on prediction of host source
US10719445B1 (en) 2019-02-28 2020-07-21 Western Digital Technologies, Inc. System and method for scaling a historical pattern matching data structure in a memory device
US10725781B1 (en) 2019-02-28 2020-07-28 Western Digital Technologies, Inc. System and method for chain prediction of multiple read commands
US11010299B2 (en) 2019-05-20 2021-05-18 Western Digital Technologies, Inc. System and method for performing discriminative predictive read
CN111459857B (zh) * 2020-03-31 2022-04-19 西安微电子技术研究所 一种tcm控制器及数据缓存读取方法
US11416263B1 (en) 2021-02-12 2022-08-16 Western Digital Technologies, Inc. Boosted boot procedure by background re-arrangement of read patterns

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Also Published As

Publication number Publication date
JP5231612B2 (ja) 2013-07-10
JP2012009048A (ja) 2012-01-12
CN103034476B (zh) 2016-07-06
CN101048762B (zh) 2012-12-26
WO2006026428A1 (en) 2006-03-09
US8028143B2 (en) 2011-09-27
CN101048762A (zh) 2007-10-03
EP1784731A1 (en) 2007-05-16
KR100913279B1 (ko) 2009-08-21
TW200629064A (en) 2006-08-16
KR20070049676A (ko) 2007-05-11
US20060047914A1 (en) 2006-03-02
CN103034476A (zh) 2013-04-10
JP2008511925A (ja) 2008-04-17
TWI391819B (zh) 2013-04-01
IL181615A0 (en) 2007-07-04

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