TW200744019A - Adaptive tile depth filter - Google Patents
Adaptive tile depth filterInfo
- Publication number
- TW200744019A TW200744019A TW095118218A TW95118218A TW200744019A TW 200744019 A TW200744019 A TW 200744019A TW 095118218 A TW095118218 A TW 095118218A TW 95118218 A TW95118218 A TW 95118218A TW 200744019 A TW200744019 A TW 200744019A
- Authority
- TW
- Taiwan
- Prior art keywords
- occlusion
- tile
- fragment
- uncertain
- depth filter
- Prior art date
Links
- 230000003044 adaptive effect Effects 0.000 title abstract 2
- 239000012634 fragment Substances 0.000 abstract 5
- 238000000034 method Methods 0.000 abstract 3
- 208000006440 Open Bite Diseases 0.000 abstract 2
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T15/00—3D [Three Dimensional] image rendering
- G06T15/10—Geometric effects
- G06T15/40—Hidden part removal
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Geometry (AREA)
- Computer Graphics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Image Generation (AREA)
- Image Processing (AREA)
- Filters That Use Time-Delay Elements (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW095118218A TW200744019A (en) | 2006-05-23 | 2006-05-23 | Adaptive tile depth filter |
US11/512,398 US7683901B2 (en) | 2006-05-23 | 2006-08-30 | System and method for adaptive tile depth filter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW095118218A TW200744019A (en) | 2006-05-23 | 2006-05-23 | Adaptive tile depth filter |
Publications (1)
Publication Number | Publication Date |
---|---|
TW200744019A true TW200744019A (en) | 2007-12-01 |
Family
ID=38749095
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW095118218A TW200744019A (en) | 2006-05-23 | 2006-05-23 | Adaptive tile depth filter |
Country Status (2)
Country | Link |
---|---|
US (1) | US7683901B2 (zh) |
TW (1) | TW200744019A (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9019271B2 (en) | 2011-05-25 | 2015-04-28 | Via Technologies, Inc. | Z-culling method, three-dimensional graphics processing method and apparatus threrof |
TWI512593B (zh) * | 2013-11-26 | 2015-12-11 | Mstar Semiconductor Inc | 畫面繪製方法、畫面更新方法、與相關行動電子裝置 |
Families Citing this family (38)
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---|---|---|---|---|
US8732644B1 (en) | 2003-09-15 | 2014-05-20 | Nvidia Corporation | Micro electro mechanical switch system and method for testing and configuring semiconductor functional circuits |
US8775997B2 (en) | 2003-09-15 | 2014-07-08 | Nvidia Corporation | System and method for testing and configuring semiconductor functional circuits |
US8768642B2 (en) | 2003-09-15 | 2014-07-01 | Nvidia Corporation | System and method for remotely configuring semiconductor functional circuits |
US8711161B1 (en) | 2003-12-18 | 2014-04-29 | Nvidia Corporation | Functional component compensation reconfiguration system and method |
US8723231B1 (en) | 2004-09-15 | 2014-05-13 | Nvidia Corporation | Semiconductor die micro electro-mechanical switch management system and method |
US8711156B1 (en) | 2004-09-30 | 2014-04-29 | Nvidia Corporation | Method and system for remapping processing elements in a pipeline of a graphics processing unit |
US8427496B1 (en) | 2005-05-13 | 2013-04-23 | Nvidia Corporation | Method and system for implementing compression across a graphics bus interconnect |
US8698811B1 (en) | 2005-12-15 | 2014-04-15 | Nvidia Corporation | Nested boustrophedonic patterns for rasterization |
US9123173B2 (en) * | 2005-12-15 | 2015-09-01 | Nvidia Corporation | Method for rasterizing non-rectangular tile groups in a raster stage of a graphics pipeline |
US9117309B1 (en) | 2005-12-19 | 2015-08-25 | Nvidia Corporation | Method and system for rendering polygons with a bounding box in a graphics processor unit |
US8390645B1 (en) | 2005-12-19 | 2013-03-05 | Nvidia Corporation | Method and system for rendering connecting antialiased line segments |
US8928676B2 (en) | 2006-06-23 | 2015-01-06 | Nvidia Corporation | Method for parallel fine rasterization in a raster stage of a graphics pipeline |
US9070213B2 (en) * | 2006-07-26 | 2015-06-30 | Nvidia Corporation | Tile based precision rasterization in a graphics pipeline |
US8427487B1 (en) * | 2006-11-02 | 2013-04-23 | Nvidia Corporation | Multiple tile output using interface compression in a raster stage |
US8482567B1 (en) | 2006-11-03 | 2013-07-09 | Nvidia Corporation | Line rasterization techniques |
US7821524B2 (en) * | 2007-06-26 | 2010-10-26 | Microsoft Corporation | Adaptive contextual filtering |
US20090033671A1 (en) * | 2007-08-02 | 2009-02-05 | Ati Technologies Ulc | Multi-sample rendering of 2d vector images |
US8724483B2 (en) | 2007-10-22 | 2014-05-13 | Nvidia Corporation | Loopback configuration for bi-directional interfaces |
US8780123B2 (en) | 2007-12-17 | 2014-07-15 | Nvidia Corporation | Interrupt handling techniques in the rasterizer of a GPU |
US9064333B2 (en) | 2007-12-17 | 2015-06-23 | Nvidia Corporation | Interrupt handling techniques in the rasterizer of a GPU |
KR101344495B1 (ko) * | 2007-12-28 | 2013-12-24 | 삼성전자주식회사 | 렌더링 방법 및 장치 |
US8681861B2 (en) | 2008-05-01 | 2014-03-25 | Nvidia Corporation | Multistandard hardware video encoder |
US8923385B2 (en) | 2008-05-01 | 2014-12-30 | Nvidia Corporation | Rewind-enabled hardware encoder |
US9111395B2 (en) * | 2009-08-31 | 2015-08-18 | Intel Corporation | Automatic placement of shadow map partitions |
US20110063304A1 (en) | 2009-09-16 | 2011-03-17 | Nvidia Corporation | Co-processing synchronizing techniques on heterogeneous graphics processing units |
US9331869B2 (en) | 2010-03-04 | 2016-05-03 | Nvidia Corporation | Input/output request packet handling techniques by a device specific kernel mode driver |
US9171350B2 (en) | 2010-10-28 | 2015-10-27 | Nvidia Corporation | Adaptive resolution DGPU rendering to provide constant framerate with free IGPU scale up |
KR101782044B1 (ko) | 2011-02-22 | 2017-09-26 | 삼성전자주식회사 | 그래픽 프로세서 및 조기 가시성 테스트 방법 |
US10089774B2 (en) * | 2011-11-16 | 2018-10-02 | Qualcomm Incorporated | Tessellation in tile-based rendering |
US10803655B2 (en) * | 2012-06-08 | 2020-10-13 | Advanced Micro Devices, Inc. | Forward rendering pipeline with light culling |
US9591309B2 (en) | 2012-12-31 | 2017-03-07 | Nvidia Corporation | Progressive lossy memory compression |
US9607407B2 (en) | 2012-12-31 | 2017-03-28 | Nvidia Corporation | Variable-width differential memory compression |
US9710894B2 (en) | 2013-06-04 | 2017-07-18 | Nvidia Corporation | System and method for enhanced multi-sample anti-aliasing |
US9324180B2 (en) * | 2013-12-09 | 2016-04-26 | Intel Corporation | Culling using masked depths |
US9934604B2 (en) * | 2013-12-27 | 2018-04-03 | Intel Corporation | Culling using masked depths for MSAA |
US10002455B2 (en) | 2015-04-20 | 2018-06-19 | Intel Corporation | Optimized depth buffer cache apparatus and method |
US10380789B2 (en) * | 2016-09-16 | 2019-08-13 | Intel Corporation | Method and apparatus for efficient depth prepass |
CN107481307B (zh) * | 2017-07-05 | 2023-04-07 | 国网山东省电力公司泰安供电公司 | 一种快速渲染三维场景的方法 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6313839B1 (en) * | 1998-10-23 | 2001-11-06 | Hewlett-Packard Company | Method and apparatus for performing Z buffer depth comparison operations |
US6407736B1 (en) * | 1999-06-18 | 2002-06-18 | Interval Research Corporation | Deferred scanline conversion architecture |
US6999076B2 (en) | 2001-10-29 | 2006-02-14 | Ati Technologies, Inc. | System, method, and apparatus for early culling |
US7505036B1 (en) * | 2004-07-30 | 2009-03-17 | 3Dlabs Inc. Ltd. | Order-independent 3D graphics binning architecture |
-
2006
- 2006-05-23 TW TW095118218A patent/TW200744019A/zh unknown
- 2006-08-30 US US11/512,398 patent/US7683901B2/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9019271B2 (en) | 2011-05-25 | 2015-04-28 | Via Technologies, Inc. | Z-culling method, three-dimensional graphics processing method and apparatus threrof |
TWI512593B (zh) * | 2013-11-26 | 2015-12-11 | Mstar Semiconductor Inc | 畫面繪製方法、畫面更新方法、與相關行動電子裝置 |
Also Published As
Publication number | Publication date |
---|---|
US20070273689A1 (en) | 2007-11-29 |
US7683901B2 (en) | 2010-03-23 |
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