TW200742055A - Case for housing solid-state image sensing device and solid-state image pickup device - Google Patents

Case for housing solid-state image sensing device and solid-state image pickup device

Info

Publication number
TW200742055A
TW200742055A TW096109209A TW96109209A TW200742055A TW 200742055 A TW200742055 A TW 200742055A TW 096109209 A TW096109209 A TW 096109209A TW 96109209 A TW96109209 A TW 96109209A TW 200742055 A TW200742055 A TW 200742055A
Authority
TW
Taiwan
Prior art keywords
state image
solid
case
outer leads
housing
Prior art date
Application number
TW096109209A
Other languages
Chinese (zh)
Inventor
Mitsuo Maeda
Yasuo Matsumi
Takuji Yoshida
Junichi Ide
Original Assignee
Sumitomo Chemical Co
Toshiba Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Chemical Co, Toshiba Kk filed Critical Sumitomo Chemical Co
Publication of TW200742055A publication Critical patent/TW200742055A/en

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00Cameras or camera modules comprising electronic image sensors; Control thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

To provide a case for housing a solid-state image sensing device capable of reducing a stress occurring in the case, and a solid-state image pickup device. Outer leads 2b1 each have a bent portion 2b10. The bent portion 2b10 is asymmetrical to the longitudinal center line Z0 of the outer leads 2b1. Since the outer leads 2b1 each have the bent portion 2b10 asymmetrical to the center line Z0 in this manner, if distal portions A of the outer leads 2b1 move along the longitudinal direction X of a case body 1a with the thermal expansion of a wiring board 20, the stress concentrates on the bent portions 2b10, causing the bent portions 2b10 to bend slightly. Therefore, the stress to the case body 1a which is connected to the outer leads 2b1 is alleviated, thus making it possible to reduce the stress occurring in the case.
TW096109209A 2006-03-17 2007-03-16 Case for housing solid-state image sensing device and solid-state image pickup device TW200742055A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006075354 2006-03-17

Publications (1)

Publication Number Publication Date
TW200742055A true TW200742055A (en) 2007-11-01

Family

ID=38688354

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096109209A TW200742055A (en) 2006-03-17 2007-03-16 Case for housing solid-state image sensing device and solid-state image pickup device

Country Status (3)

Country Link
KR (1) KR20070094559A (en)
CN (1) CN101038896A (en)
TW (1) TW200742055A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9088121B2 (en) 2012-11-16 2015-07-21 Delta Electronics (Shanghai) Co., Ltd. Package module, package terminal and manufacturing method thereof

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106601701B (en) * 2017-01-19 2023-03-28 贵州煜立电子科技有限公司 Three-dimensional packaging method and structure of high-power electronic component with two end surface lead-out pins

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9088121B2 (en) 2012-11-16 2015-07-21 Delta Electronics (Shanghai) Co., Ltd. Package module, package terminal and manufacturing method thereof
TWI497663B (en) * 2012-11-16 2015-08-21 Delta Electronics Shanghai Co Encapsulated module and encapsulated terminal and fabricating method thereof

Also Published As

Publication number Publication date
KR20070094559A (en) 2007-09-20
CN101038896A (en) 2007-09-19

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