TW200725855A - Fabricating method of solder bump and structure thereof - Google Patents

Fabricating method of solder bump and structure thereof

Info

Publication number
TW200725855A
TW200725855A TW094146557A TW94146557A TW200725855A TW 200725855 A TW200725855 A TW 200725855A TW 094146557 A TW094146557 A TW 094146557A TW 94146557 A TW94146557 A TW 94146557A TW 200725855 A TW200725855 A TW 200725855A
Authority
TW
Taiwan
Prior art keywords
layer
solder
solder bump
opening
fabricating method
Prior art date
Application number
TW094146557A
Other languages
Chinese (zh)
Other versions
TWI287285B (en
Inventor
Min-Lung Huang
Original Assignee
Advanced Semiconductor Eng
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Semiconductor Eng filed Critical Advanced Semiconductor Eng
Priority to TW094146557A priority Critical patent/TWI287285B/en
Publication of TW200725855A publication Critical patent/TW200725855A/en
Application granted granted Critical
Publication of TWI287285B publication Critical patent/TWI287285B/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/03—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

A fabricating method of solder bump and a structure thereof are provided. Firstly, a wafer had at least one solder pad is provided. Then an adhesive layer is formed on the full surface of the wafer. And a first barrier layer is formed on the full surface of the adhesive layer. After that, a patterned photoresist layer had a opening is formed on the wafer. The opening is against to the solder pad. Then a second barrier layer is electroplated into the opening. And a solder layer is electroplated into the opening. After that, the photoresist layer is removed. And the adhesive layer and the first barrier layer out of the solder layer are etched. Then the solder layer is reflowed to form a solder bump.
TW094146557A 2005-12-26 2005-12-26 Fabricating method of solder bump and structure thereof TWI287285B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW094146557A TWI287285B (en) 2005-12-26 2005-12-26 Fabricating method of solder bump and structure thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW094146557A TWI287285B (en) 2005-12-26 2005-12-26 Fabricating method of solder bump and structure thereof

Publications (2)

Publication Number Publication Date
TW200725855A true TW200725855A (en) 2007-07-01
TWI287285B TWI287285B (en) 2007-09-21

Family

ID=39460271

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094146557A TWI287285B (en) 2005-12-26 2005-12-26 Fabricating method of solder bump and structure thereof

Country Status (1)

Country Link
TW (1) TWI287285B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI559482B (en) * 2014-03-28 2016-11-21 Jenq Gong Duh Package structure and manufacturing method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI559482B (en) * 2014-03-28 2016-11-21 Jenq Gong Duh Package structure and manufacturing method thereof

Also Published As

Publication number Publication date
TWI287285B (en) 2007-09-21

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