TW200713601A - A verticle dual bit non-volatile flash memory cell - Google Patents
A verticle dual bit non-volatile flash memory cellInfo
- Publication number
- TW200713601A TW200713601A TW094132813A TW94132813A TW200713601A TW 200713601 A TW200713601 A TW 200713601A TW 094132813 A TW094132813 A TW 094132813A TW 94132813 A TW94132813 A TW 94132813A TW 200713601 A TW200713601 A TW 200713601A
- Authority
- TW
- Taiwan
- Prior art keywords
- dielectric layer
- drain region
- flash memory
- verticle
- memory cell
- Prior art date
Links
Landscapes
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
Abstract
Disclosed is a three-dimensional flash memory device of NOR type, which comprises a substrate section, a drain region, a first dielectric layer and two memory unit structures, wherein the drain region is implanted to the substantially center of the substrate section and the first dielectric layer is formed on the drain region. Also, the two memory unit structures are used for memorizing datas and are mirror images of each other flipped over the drain region and the first dielectric layer. Besides, each of the memory unit structures comprises a source region, a floating gate, a second dielectric layer, a third dielectric layer and a control gate, wherein the position of source region is lower than which of the drain region, the floating gate is formed on the first dielectric layer and the third dielectric layer covers the source region. Moreover, The control gate is separated from the floating gate by a second dielectric layer and is separated from the source region by a third dielectric layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW94132813A TWI283060B (en) | 2005-09-22 | 2005-09-22 | A vertical dual bit non-volatile flash memory cell |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW94132813A TWI283060B (en) | 2005-09-22 | 2005-09-22 | A vertical dual bit non-volatile flash memory cell |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200713601A true TW200713601A (en) | 2007-04-01 |
| TWI283060B TWI283060B (en) | 2007-06-21 |
Family
ID=38828986
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW94132813A TWI283060B (en) | 2005-09-22 | 2005-09-22 | A vertical dual bit non-volatile flash memory cell |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TWI283060B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI460827B (en) * | 2010-03-31 | 2014-11-11 | Taiwan Memory Company | Method of manufacturing flash memory cell |
-
2005
- 2005-09-22 TW TW94132813A patent/TWI283060B/en active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI460827B (en) * | 2010-03-31 | 2014-11-11 | Taiwan Memory Company | Method of manufacturing flash memory cell |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI283060B (en) | 2007-06-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI317947B (en) | Nand non-volatile storage device and methods of using and making the same | |
| AU2003261122A1 (en) | Differential floating gate nonvolatile memories | |
| TW200719442A (en) | Low hydrogen concentration charge-trapping layer structures for non-volatile memory and methods of forming the same | |
| TW200509318A (en) | A self aligned non-volatile memory cell and process for fabrication | |
| TW200739923A (en) | Vertical flash memory | |
| TWI264826B (en) | Semiconductor device with integrated flash memory and peripheral circuit and its manufacture method | |
| TW200633231A (en) | Non-volatile memory and manufacturing method and operating method thereof | |
| TW200505010A (en) | Nonvolatile memory cell with multiple floating gates formed after the select gate and having upward protrusions | |
| TW200701440A (en) | Non-volatile memory and manufacturing method and operating method thereof | |
| TW200605334A (en) | Single poly non-volatile memory | |
| TW200707660A (en) | FinFET split gate structure and method of its fabrication | |
| TW200623428A (en) | Non-volatile memory with erase gate on isolation zones | |
| TW200507248A (en) | Flash memory with trench select gate and fabrication process | |
| TW200605273A (en) | Nonvolatile memory and manufacturing method thereof | |
| WO2008004179A3 (en) | Non-volatile memory and-array and method for operating the game | |
| TW200715574A (en) | SONOS memory cell having high-K dielectric | |
| WO2008030796B1 (en) | Scalable electrically eraseable and programmable memory | |
| TW200723543A (en) | Non-volatile memory and manufacturing method and operating method thereof | |
| TW200717782A (en) | Split gate flash memory cell and fabrication method thereof | |
| TW200709395A (en) | Non-volatile memory and operatting method thereof | |
| WO2009122349A3 (en) | Vertical phase change memory cell | |
| TW200713601A (en) | A verticle dual bit non-volatile flash memory cell | |
| WO2006138086A3 (en) | Non-volatile two-transistor programmable logic cell and array layout | |
| TW200802816A (en) | Non-volatile memory and manufacturing method thereof | |
| TW200629482A (en) | Flash memory and fabricating method thereof |