TW200710850A - Associative memory system, method of controlling associative memory system, and data processing device - Google Patents
Associative memory system, method of controlling associative memory system, and data processing deviceInfo
- Publication number
- TW200710850A TW200710850A TW095125304A TW95125304A TW200710850A TW 200710850 A TW200710850 A TW 200710850A TW 095125304 A TW095125304 A TW 095125304A TW 95125304 A TW95125304 A TW 95125304A TW 200710850 A TW200710850 A TW 200710850A
- Authority
- TW
- Taiwan
- Prior art keywords
- memory system
- associative memory
- section
- controlling
- data processing
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
- G11C15/04—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
Landscapes
- Memory System Of A Hierarchy Structure (AREA)
Abstract
A V=0 preferential detecting section selects one empty entry based on information stored in a V-bit storage section when there is an empty entry at a CAM section. When write data for the CAM section is inputted, a GATE section performs writing control of the write data for an entry selected by the V=0 preferential detecting section. Consequently, an associative memory system for enhancing the processing rate of data registration can be provided.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005234806A JP2007048411A (en) | 2005-08-12 | 2005-08-12 | Content addressable memory system, method of controlling content adressable memory system, and data processor |
Publications (1)
Publication Number | Publication Date |
---|---|
TW200710850A true TW200710850A (en) | 2007-03-16 |
Family
ID=37757420
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW095125304A TW200710850A (en) | 2005-08-12 | 2006-07-11 | Associative memory system, method of controlling associative memory system, and data processing device |
Country Status (3)
Country | Link |
---|---|
JP (1) | JP2007048411A (en) |
TW (1) | TW200710850A (en) |
WO (1) | WO2007020751A1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009026437A (en) * | 2007-06-21 | 2009-02-05 | Nippon Telegr & Teleph Corp <Ntt> | Method of storing and retrieving don't care data in associative memory device |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2779114B2 (en) * | 1993-05-19 | 1998-07-23 | 川崎製鉄株式会社 | Associative memory |
JP3688018B2 (en) * | 1995-06-30 | 2005-08-24 | 沖電気工業株式会社 | Memory circuit of packet processing device |
JP3895314B2 (en) * | 2003-09-12 | 2007-03-22 | 独立行政法人科学技術振興機構 | Data processing apparatus, data processing program, and recording medium on which data processing program is recorded |
-
2005
- 2005-08-12 JP JP2005234806A patent/JP2007048411A/en active Pending
-
2006
- 2006-06-28 WO PCT/JP2006/312900 patent/WO2007020751A1/en active Application Filing
- 2006-07-11 TW TW095125304A patent/TW200710850A/en unknown
Also Published As
Publication number | Publication date |
---|---|
JP2007048411A (en) | 2007-02-22 |
WO2007020751A1 (en) | 2007-02-22 |
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