TW200641369A - Chip capable of testing itself and testing method thereof - Google Patents
Chip capable of testing itself and testing method thereofInfo
- Publication number
- TW200641369A TW200641369A TW094116179A TW94116179A TW200641369A TW 200641369 A TW200641369 A TW 200641369A TW 094116179 A TW094116179 A TW 094116179A TW 94116179 A TW94116179 A TW 94116179A TW 200641369 A TW200641369 A TW 200641369A
- Authority
- TW
- Taiwan
- Prior art keywords
- testing
- itself
- circuit
- result
- chip
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3187—Built-in tests
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
- G01R31/318385—Random or pseudo-random test pattern
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW094116179A TWI266065B (en) | 2005-05-18 | 2005-05-18 | Chip capable of testing itself and testing method thereof |
US11/274,780 US20060265632A1 (en) | 2005-05-18 | 2005-11-15 | Chip capable of testing itself and testing method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW094116179A TWI266065B (en) | 2005-05-18 | 2005-05-18 | Chip capable of testing itself and testing method thereof |
Publications (2)
Publication Number | Publication Date |
---|---|
TWI266065B TWI266065B (en) | 2006-11-11 |
TW200641369A true TW200641369A (en) | 2006-12-01 |
Family
ID=37449670
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW094116179A TWI266065B (en) | 2005-05-18 | 2005-05-18 | Chip capable of testing itself and testing method thereof |
Country Status (2)
Country | Link |
---|---|
US (1) | US20060265632A1 (zh) |
TW (1) | TWI266065B (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI679529B (zh) * | 2018-10-08 | 2019-12-11 | 新唐科技股份有限公司 | 自我檢測系統及其方法 |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI306951B (en) | 2006-12-19 | 2009-03-01 | Via Tech Inc | Chipset and chipset testing method |
US8484524B2 (en) * | 2007-08-21 | 2013-07-09 | Qualcomm Incorporated | Integrated circuit with self-test feature for validating functionality of external interfaces |
US8136001B2 (en) * | 2009-06-05 | 2012-03-13 | Freescale Semiconductor, Inc. | Technique for initializing data and instructions for core functional pattern generation in multi-core processor |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5485467A (en) * | 1993-09-24 | 1996-01-16 | Vlsi Technology, Inc. | Versatile reconfigurable matrix based built-in self-test processor for minimizing fault grading |
US6148425A (en) * | 1998-02-12 | 2000-11-14 | Lucent Technologies Inc. | Bist architecture for detecting path-delay faults in a sequential circuit |
US6247151B1 (en) * | 1998-06-30 | 2001-06-12 | Intel Corporation | Method and apparatus for verifying that data stored in a memory has not been corrupted |
US6463561B1 (en) * | 1999-09-29 | 2002-10-08 | Agere Systems Guardian Corp. | Almost full-scan BIST method and system having higher fault coverage and shorter test application time |
US6694451B2 (en) * | 2000-12-07 | 2004-02-17 | Hewlett-Packard Development Company, L.P. | Method for redundant suspend to RAM |
US6789220B1 (en) * | 2001-05-03 | 2004-09-07 | Xilinx, Inc. | Method and apparatus for vector processing |
US6966017B2 (en) * | 2001-06-20 | 2005-11-15 | Broadcom Corporation | Cache memory self test |
US6988232B2 (en) * | 2001-07-05 | 2006-01-17 | Intellitech Corporation | Method and apparatus for optimized parallel testing and access of electronic circuits |
US6950974B1 (en) * | 2001-09-07 | 2005-09-27 | Synopsys Inc. | Efficient compression and application of deterministic patterns in a logic BIST architecture |
EP1491906B1 (en) * | 2003-06-24 | 2007-05-16 | STMicroelectronics S.r.l. | An integrated device with an improved BIST circuit for executing a structured test |
-
2005
- 2005-05-18 TW TW094116179A patent/TWI266065B/zh active
- 2005-11-15 US US11/274,780 patent/US20060265632A1/en not_active Abandoned
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI679529B (zh) * | 2018-10-08 | 2019-12-11 | 新唐科技股份有限公司 | 自我檢測系統及其方法 |
Also Published As
Publication number | Publication date |
---|---|
US20060265632A1 (en) | 2006-11-23 |
TWI266065B (en) | 2006-11-11 |
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