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Priority claimed from US11/106,089external-prioritypatent/US7348654B2/en
Application filed by Taiwan Semiconductor Mfg Co LtdfiledCriticalTaiwan Semiconductor Mfg Co Ltd
Publication of TW200636824ApublicationCriticalpatent/TW200636824A/en
Design And Manufacture Of Integrated Circuits
(AREA)
Abstract
RF devices formed in integrated circuit devices include a top metal level overlying a substrate. The top metal level comprises pads and portions of planned RF devices and an RF metal level overlying the top metal level completes the RF devices, which may be an interconnected RF network that may include capacitors, inductors or both. Openings are formed in a passivation layer overlying the RF metal level to provide direct access to the RF devices. The interconnected RF network may include fuses enabling the network to be selectively altered by cutting relatively thin interconnect lines using a laser directed through the openings. The RF devices or portions of the RF network may be directly coupled to external devices and utilized in SOC (System On a Chip) and SIT (System In Package) technologies.
TW095113252A2005-04-142006-04-13Capacitor and inductor scheme with e-fuse application
TW200636824A
(en)
Multi-layer thick metallization structure for a microelectronic device, integrated circuit containing same, and method of manufacturing an integrated circuit containing same
Semiconductor constructions having interconnect structures, methods of forming interconnect structures, and methods of forming semiconductor constructions