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Application filed by United Microelectronics CorpfiledCriticalUnited Microelectronics Corp
Priority to TW94105615ApriorityCriticalpatent/TWI291759B/en
Publication of TW200631174ApublicationCriticalpatent/TW200631174A/en
Application grantedgrantedCritical
Publication of TWI291759BpublicationCriticalpatent/TWI291759B/en
A method for fabricating a capacitor is disclosed. First, a dielectric layer is disposed on a semiconductor substrate. Next, at least one dual damascene opening and at least one capacitor opening are formed in the dielectric layer. Next, a first conductive layer is disposed on the surface of the dielectric layer, the bottom and sidewall of the capacitor opening, and the dual damascene opening. Next, an insulating layer is formed on the first conductive layer and a second conductive layer is disposed on the insulating layer. Following that, a planarization process is performed to remove the second conductive layer, the insulating layer, and the first conductive layer on the dielectric surface for forming a capacitor and a dual damascene.
TW94105615A2005-02-242005-02-24Method for fabricating a metal-insulator-metal capacitor
TWI291759B
(en)