TW200627144A - System and method for dynamic sizing of cache sequential list - Google Patents

System and method for dynamic sizing of cache sequential list

Info

Publication number
TW200627144A
TW200627144A TW094133273A TW94133273A TW200627144A TW 200627144 A TW200627144 A TW 200627144A TW 094133273 A TW094133273 A TW 094133273A TW 94133273 A TW94133273 A TW 94133273A TW 200627144 A TW200627144 A TW 200627144A
Authority
TW
Taiwan
Prior art keywords
sequential list
cache
dynamic sizing
cache sequential
sizing
Prior art date
Application number
TW094133273A
Other languages
English (en)
Other versions
TWI393004B (zh
Inventor
Binm Sher Gill
Dharmendra Shantilal Modha
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of TW200627144A publication Critical patent/TW200627144A/zh
Application granted granted Critical
Publication of TWI393004B publication Critical patent/TWI393004B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G06F12/121—Replacement control using replacement algorithms
    • G06F12/123—Replacement control using replacement algorithms with age lists, e.g. queue, most recently used [MRU] list or least recently used [LRU] list
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
TW094133273A 2004-09-30 2005-09-26 用於動態改變快取記憶體順序清單大小之系統以及方法 TWI393004B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/954,937 US7464246B2 (en) 2004-09-30 2004-09-30 System and method for dynamic sizing of cache sequential list

Publications (2)

Publication Number Publication Date
TW200627144A true TW200627144A (en) 2006-08-01
TWI393004B TWI393004B (zh) 2013-04-11

Family

ID=36100559

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094133273A TWI393004B (zh) 2004-09-30 2005-09-26 用於動態改變快取記憶體順序清單大小之系統以及方法

Country Status (3)

Country Link
US (5) US7464246B2 (zh)
CN (1) CN100442249C (zh)
TW (1) TWI393004B (zh)

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US8095738B2 (en) * 2009-06-15 2012-01-10 International Business Machines Corporation Differential caching mechanism based on media I/O speed
US8510785B2 (en) * 2009-10-19 2013-08-13 Motorola Mobility Llc Adaptive media caching for video on demand
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CN101853218B (zh) * 2010-05-12 2015-05-20 中兴通讯股份有限公司 用于磁盘阵列的读取方法和系统
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US8590001B2 (en) * 2010-08-20 2013-11-19 Promise Technology, Inc. Network storage system with data prefetch and method of operation thereof
US8812788B2 (en) 2010-11-09 2014-08-19 Lsi Corporation Virtual cache window headers for long term access history
US8533393B1 (en) * 2010-12-14 2013-09-10 Expedia, Inc. Dynamic cache eviction
US8650354B2 (en) 2011-07-22 2014-02-11 International Business Machines Corporation Prefetching tracks using multiple caches
US8631190B2 (en) 2011-07-22 2014-01-14 International Business Machines Corporation Prefetching data tracks and parity data to use for destaging updated tracks
US8566530B2 (en) 2011-07-22 2013-10-22 International Business Machines Corporation Prefetching source tracks for destaging updated tracks in a copy relationship
US9069678B2 (en) 2011-07-26 2015-06-30 International Business Machines Corporation Adaptive record caching for solid state disks
CN102298508B (zh) * 2011-09-07 2014-08-06 记忆科技(深圳)有限公司 基于流的固态硬盘预读取的方法及装置
US9110810B2 (en) * 2011-12-06 2015-08-18 Nvidia Corporation Multi-level instruction cache prefetching
US10209768B1 (en) 2012-01-06 2019-02-19 Seagate Technology Llc File-aware priority driver
US9542324B1 (en) 2012-04-05 2017-01-10 Seagate Technology Llc File associated pinning
US9268692B1 (en) 2012-04-05 2016-02-23 Seagate Technology Llc User selectable caching
US10339069B2 (en) * 2012-09-28 2019-07-02 Oracle International Corporation Caching large objects in a computer system with mixed data warehousing and online transaction processing workload
CN103778069B (zh) * 2012-10-18 2017-09-08 深圳市中兴微电子技术有限公司 高速缓冲存储器的高速缓存块长度调整方法及装置
US9497489B2 (en) 2013-03-12 2016-11-15 Google Technology Holdings LLC System and method for stream fault tolerance through usage based duplication and shadow sessions
DE102013204469A1 (de) * 2013-03-14 2014-09-18 Robert Bosch Gmbh Mikroelektrochemischer Sensor und Verfahren zum Betreiben eines mikroelektrochemischen Sensors
US9652406B2 (en) * 2015-04-30 2017-05-16 International Business Machines Corporation MRU batching to reduce lock contention
US9996476B2 (en) 2015-09-03 2018-06-12 International Business Machines Corporation Management of cache lists via dynamic sizing of the cache lists
US20170116127A1 (en) * 2015-10-22 2017-04-27 Vormetric, Inc. File system adaptive read ahead
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KR20180097220A (ko) * 2017-02-23 2018-08-31 에스케이하이닉스 주식회사 데이터 저장 장치의 동작 방법
US10248577B2 (en) 2017-04-07 2019-04-02 International Business Machines Corporation Using a characteristic of a process input/output (I/O) activity and data subject to the I/O activity to determine whether the process is a suspicious process
US10282543B2 (en) 2017-05-03 2019-05-07 International Business Machines Corporation Determining whether to destage write data in cache to storage based on whether the write data has malicious data
US10445497B2 (en) 2017-05-03 2019-10-15 International Business Machines Corporation Offloading processing of writes to determine malicious data from a first storage system to a second storage system
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Also Published As

Publication number Publication date
US7533239B2 (en) 2009-05-12
US20080140939A1 (en) 2008-06-12
US7464246B2 (en) 2008-12-09
US20080183969A1 (en) 2008-07-31
US20080195834A1 (en) 2008-08-14
US20060069871A1 (en) 2006-03-30
CN100442249C (zh) 2008-12-10
US7509470B2 (en) 2009-03-24
US20080140940A1 (en) 2008-06-12
US7793065B2 (en) 2010-09-07
CN1755652A (zh) 2006-04-05
US7707382B2 (en) 2010-04-27
TWI393004B (zh) 2013-04-11

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