TW200625400A - Integrated passive devices - Google Patents

Integrated passive devices

Info

Publication number
TW200625400A
TW200625400A TW094113598A TW94113598A TW200625400A TW 200625400 A TW200625400 A TW 200625400A TW 094113598 A TW094113598 A TW 094113598A TW 94113598 A TW94113598 A TW 94113598A TW 200625400 A TW200625400 A TW 200625400A
Authority
TW
Taiwan
Prior art keywords
wafer
ipd
single crystal
polysilicon
integrated passive
Prior art date
Application number
TW094113598A
Other languages
Chinese (zh)
Inventor
Yinon Degani
Maureen Y Lau
King-Lien Tai
Original Assignee
Sychip Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sychip Inc filed Critical Sychip Inc
Publication of TW200625400A publication Critical patent/TW200625400A/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/01Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate comprising only passive thin-film or thick-film elements formed on a common insulating substrate
    • H01L27/016Thin-film circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/101Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including resistors or capacitors only
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/10Inductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/20Resistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

The specification describes an integrated passive device (IPD) that is formed on a polysilicon substrate. A method for making the IPD is disclosed wherein the polysilicon substrate is produced starting with a single crystal handle wafer, depositing a thick substrate layer of polysilicon on one or both sides of the starting wafer, forming the IPD on one of the polysilicon substrate layers, and removing the handle wafer. In a preferred embodiment the single crystal silicon handle wafer is a silicon wafer rejected from a single crystal silicon wafer production line.
TW094113598A 2004-04-29 2005-04-28 Integrated passive devices TW200625400A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/835,338 US7259077B2 (en) 2004-04-29 2004-04-29 Integrated passive devices

Publications (1)

Publication Number Publication Date
TW200625400A true TW200625400A (en) 2006-07-16

Family

ID=34941067

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094113598A TW200625400A (en) 2004-04-29 2005-04-28 Integrated passive devices

Country Status (6)

Country Link
US (3) US7259077B2 (en)
EP (1) EP1592047A3 (en)
JP (1) JP2005317979A (en)
KR (1) KR20060047662A (en)
CN (1) CN1776895B (en)
TW (1) TW200625400A (en)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7687327B2 (en) * 2005-07-08 2010-03-30 Kovio, Inc, Methods for manufacturing RFID tags and structures formed therefrom
US8158510B2 (en) 2009-11-19 2012-04-17 Stats Chippac, Ltd. Semiconductor device and method of forming IPD on molded substrate
US8409970B2 (en) 2005-10-29 2013-04-02 Stats Chippac, Ltd. Semiconductor device and method of making integrated passive devices
US8669637B2 (en) * 2005-10-29 2014-03-11 Stats Chippac Ltd. Integrated passive device system
US7851257B2 (en) * 2005-10-29 2010-12-14 Stats Chippac Ltd. Integrated circuit stacking system with integrated passive components
US8791006B2 (en) * 2005-10-29 2014-07-29 Stats Chippac, Ltd. Semiconductor device and method of forming an inductor on polymer matrix composite substrate
US7936043B2 (en) 2006-03-17 2011-05-03 Sychip Inc. Integrated passive device substrates
US8188590B2 (en) * 2006-03-30 2012-05-29 Stats Chippac Ltd. Integrated circuit package system with post-passivation interconnection and integration
EP2024990B1 (en) * 2006-05-18 2011-06-29 Ipdia Method of increasing the quality factor of an inductor in a semiconductor device
US8234773B2 (en) * 2006-06-05 2012-08-07 The United States Of America As Represented By The Secretary Of The Army Apparatus and method for forming electronic devices
US8124490B2 (en) * 2006-12-21 2012-02-28 Stats Chippac, Ltd. Semiconductor device and method of forming passive devices
US7935607B2 (en) * 2007-04-09 2011-05-03 Freescale Semiconductor, Inc. Integrated passive device with a high resistivity substrate and method for forming the same
US7790503B2 (en) * 2007-12-18 2010-09-07 Stats Chippac, Ltd. Semiconductor device and method of forming integrated passive device module
US7759212B2 (en) 2007-12-26 2010-07-20 Stats Chippac, Ltd. System-in-package having integrated passive devices and method therefor
US7749814B2 (en) * 2008-03-13 2010-07-06 Stats Chippac, Ltd. Semiconductor device with integrated passive circuit and method of making the same using sacrificial substrate
US8269308B2 (en) * 2008-03-19 2012-09-18 Stats Chippac, Ltd. Semiconductor device with cross-talk isolation using M-cap and method thereof
JP5279828B2 (en) * 2008-07-10 2013-09-04 Jx日鉱日石金属株式会社 Hybrid silicon wafer and manufacturing method thereof
US8106479B1 (en) * 2008-10-01 2012-01-31 Qualcomm Atheros, Inc. Patterned capacitor ground shield for inductor in an integrated circuit
US20100327406A1 (en) * 2009-06-26 2010-12-30 Stats Chippac, Ltd. Semiconductor Device and Method of Forming Inductor Over Insulating Material Filled Trench In Substrate
US8018027B2 (en) * 2009-10-30 2011-09-13 Murata Manufacturing Co., Ltd. Flip-bonded dual-substrate inductor, flip-bonded dual-substrate inductor, and integrated passive device including a flip-bonded dual-substrate inductor
KR101101490B1 (en) * 2009-11-24 2012-01-03 삼성전기주식회사 Wireless apparatus having shield function
KR101101686B1 (en) * 2010-01-07 2011-12-30 삼성전기주식회사 Rf semiconductor component and method of fabricating the same
US8252422B2 (en) 2010-07-08 2012-08-28 Jx Nippon Mining & Metals Corporation Hybrid silicon wafer and method of producing the same
US8647747B2 (en) * 2010-07-08 2014-02-11 Jx Nippon Mining & Metals Corporation Hybrid silicon wafer and method of producing the same
KR101101430B1 (en) 2010-08-19 2012-01-02 삼성전기주식회사 Power amplifier module with shared esd protect circuit
US8853819B2 (en) 2011-01-07 2014-10-07 Advanced Semiconductor Engineering, Inc. Semiconductor structure with passive element network and manufacturing method thereof
US9219059B2 (en) 2012-09-26 2015-12-22 International Business Machines Corporation Semiconductor structure with integrated passive structures
US10129979B2 (en) 2016-09-23 2018-11-13 Apple Inc. PCB assembly with molded matrix core
US11296190B2 (en) * 2020-01-15 2022-04-05 Globalfoundries U.S. Inc. Field effect transistors with back gate contact and buried high resistivity layer
CN112234143B (en) * 2020-12-14 2021-04-20 成都嘉纳海威科技有限责任公司 On-chip integrated IPD packaging structure, packaging method thereof and three-dimensional packaging structure

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4541035A (en) * 1984-07-30 1985-09-10 General Electric Company Low loss, multilevel silicon circuit board
JP3063143B2 (en) * 1990-10-29 2000-07-12 日本電気株式会社 Manufacturing method of Si substrate
US5091330A (en) * 1990-12-28 1992-02-25 Motorola, Inc. Method of fabricating a dielectric isolated area
JPH05144745A (en) * 1991-11-18 1993-06-11 Sanyo Electric Co Ltd Manufacture of semiconductor substrate
US5773151A (en) * 1995-06-30 1998-06-30 Harris Corporation Semi-insulating wafer
JP2917919B2 (en) * 1996-06-20 1999-07-12 日本電気株式会社 Semiconductor substrate, method of manufacturing the same, and semiconductor element
JPH1097960A (en) * 1996-09-19 1998-04-14 Toyo Tanso Kk Silicon carbide deposited dummy wafer
TW392392B (en) * 1997-04-03 2000-06-01 Lucent Technologies Inc High frequency apparatus including a low loss substrate
US6005197A (en) * 1997-08-25 1999-12-21 Lucent Technologies Inc. Embedded thin film passive components
US5920764A (en) * 1997-09-30 1999-07-06 International Business Machines Corporation Process for restoring rejected wafers in line for reuse as new
US6388290B1 (en) * 1998-06-10 2002-05-14 Agere Systems Guardian Corp. Single crystal silicon on polycrystalline silicon integrated circuits
US6794705B2 (en) * 2000-12-28 2004-09-21 Infineon Technologies Ag Multi-layer Pt electrode for DRAM and FRAM with high K dielectric materials
US7535100B2 (en) * 2002-07-12 2009-05-19 The United States Of America As Represented By The Secretary Of The Navy Wafer bonding of thinned electronic materials and circuits to high performance substrates
JP4102158B2 (en) * 2002-10-24 2008-06-18 富士通株式会社 Manufacturing method of microstructure

Also Published As

Publication number Publication date
US20070262418A1 (en) 2007-11-15
KR20060047662A (en) 2006-05-18
CN1776895B (en) 2010-11-03
EP1592047A3 (en) 2009-04-01
US7259077B2 (en) 2007-08-21
EP1592047A2 (en) 2005-11-02
CN1776895A (en) 2006-05-24
JP2005317979A (en) 2005-11-10
US20050253255A1 (en) 2005-11-17
US20090218655A1 (en) 2009-09-03

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