TW200623607A - Apparatus and method for receiving inputted signal - Google Patents

Apparatus and method for receiving inputted signal

Info

Publication number
TW200623607A
TW200623607A TW094118195A TW94118195A TW200623607A TW 200623607 A TW200623607 A TW 200623607A TW 094118195 A TW094118195 A TW 094118195A TW 94118195 A TW94118195 A TW 94118195A TW 200623607 A TW200623607 A TW 200623607A
Authority
TW
Taiwan
Prior art keywords
gain control
control signal
gain
inputted signal
receiving inputted
Prior art date
Application number
TW094118195A
Other languages
Chinese (zh)
Other versions
TWI308421B (en
Inventor
Kyung-Hoon Kim
Original Assignee
Hynix Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hynix Semiconductor Inc filed Critical Hynix Semiconductor Inc
Publication of TW200623607A publication Critical patent/TW200623607A/en
Application granted granted Critical
Publication of TWI308421B publication Critical patent/TWI308421B/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K21/00—Details of pulse counters or frequency dividers
    • H03K21/02—Input circuits
    • H03K21/026—Input circuits comprising logic circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G11C7/222—Clock generating, synchronizing or distributing circuits within memory device

Landscapes

  • Engineering & Computer Science (AREA)
  • Databases & Information Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Amplifiers (AREA)
  • Control Of Amplification And Gain Control (AREA)

Abstract

An input signal receiver of a semiconductor device includes a gain control unit for outputting a gain control signal and a variable gain amplifier for amplifying external clock in response to the gain control signal, wherein the gain control signal determines a gain of the variable gain amplifier. Further, the input signal receiver includes a buffer whose input terminal is connected to an output terminal of the variable gain amplifier and output terminal is connected to another element of the semiconductor device.
TW094118195A 2004-12-20 2005-06-02 Apparatus and method for receiving inputted signal TWI308421B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020040108543A KR100562649B1 (en) 2004-12-20 2004-12-20 Input signal reciever and input signal detection method

Publications (2)

Publication Number Publication Date
TW200623607A true TW200623607A (en) 2006-07-01
TWI308421B TWI308421B (en) 2009-04-01

Family

ID=36594921

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094118195A TWI308421B (en) 2004-12-20 2005-06-02 Apparatus and method for receiving inputted signal

Country Status (4)

Country Link
US (1) US7176761B2 (en)
KR (1) KR100562649B1 (en)
CN (1) CN100517503C (en)
TW (1) TWI308421B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010154020A (en) * 2008-12-24 2010-07-08 Elpida Memory Inc Semiconductor device, output circuit and method for controlling input/output buffer circuit in semiconductor device
US9124279B2 (en) 2012-09-03 2015-09-01 Tensorcom, Inc. Method and apparatus for an active negative-capacitor circuit to cancel the input capacitance of comparators
CN104718699A (en) * 2012-09-03 2015-06-17 张量通讯公司 Method and apparatus for an active negative-capacitor circuit

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06177780A (en) * 1992-12-07 1994-06-24 Uniden Corp Transmission output stabilizing circuit
JP3061126B2 (en) 1998-03-18 2000-07-10 日本電気株式会社 Input receiver circuit
WO2002003544A1 (en) * 2000-06-30 2002-01-10 Mitsubishi Denki Kabushiki Kaisha High-frequency amplifier
US6573779B2 (en) * 2001-05-25 2003-06-03 Rambus Inc. Duty cycle integrator with tracking common mode feedback control
KR100880065B1 (en) * 2001-07-06 2009-01-22 엔엑스피 비 브이 A communication system and arrangements comprising such a communication system
TW518819B (en) * 2002-03-22 2003-01-21 Via Tech Inc Automatic gain control circuit and method
KR100893593B1 (en) * 2003-04-29 2009-04-17 주식회사 하이닉스반도체 Input buffer

Also Published As

Publication number Publication date
CN1794353A (en) 2006-06-28
TWI308421B (en) 2009-04-01
KR100562649B1 (en) 2006-03-20
US7176761B2 (en) 2007-02-13
US20060132236A1 (en) 2006-06-22
CN100517503C (en) 2009-07-22

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees