TW200620538A - Semiconductor structure for isolating integrated circuits of various operating voltages - Google Patents

Semiconductor structure for isolating integrated circuits of various operating voltages

Info

Publication number
TW200620538A
TW200620538A TW094139587A TW94139587A TW200620538A TW 200620538 A TW200620538 A TW 200620538A TW 094139587 A TW094139587 A TW 094139587A TW 94139587 A TW94139587 A TW 94139587A TW 200620538 A TW200620538 A TW 200620538A
Authority
TW
Taiwan
Prior art keywords
circuits
various operating
operating voltages
buried layer
semiconductor structure
Prior art date
Application number
TW094139587A
Other languages
Chinese (zh)
Other versions
TWI294159B (en
Inventor
Vincent Liu
Jun-Xiu Liu
Chi-Hsuen Chang
Tzu-Chiang Sung
Chung-I Chen
R S Yeh
Original Assignee
Taiwan Semiconductor Mfg Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Semiconductor Mfg Co Ltd filed Critical Taiwan Semiconductor Mfg Co Ltd
Publication of TW200620538A publication Critical patent/TW200620538A/en
Application granted granted Critical
Publication of TWI294159B publication Critical patent/TWI294159B/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/761—PN junctions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823481—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate

Abstract

A semiconductor structure for isolating a first circuit and a second circuit of various operating voltages includes a first isolation ring surrounding the first and second circuits, on a semiconductor substrate. A buried layer continuously extending over the first and second circuits is formed in the semiconductor substrate, wherein the buried layer interfaces with the first isolation ring for isolating the first and second circuits from a backside bias of the semiconductor substrate. An ion enhanced isolation layer is interposed between the buried layer and well regions on which devices of the first and second circuits are formed, wherein the ion enhanced isolation layer is doped with impurities of a polarity type different from that of the buried layer for preventing punch through induced by the backside bias between the first and second circuits.
TW094139587A 2004-11-12 2005-11-11 Semiconductor structure for isolating integrated circuits of various operating voltages TWI294159B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US62748804P 2004-11-12 2004-11-12

Publications (2)

Publication Number Publication Date
TW200620538A true TW200620538A (en) 2006-06-16
TWI294159B TWI294159B (en) 2008-03-01

Family

ID=38572799

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094139587A TWI294159B (en) 2004-11-12 2005-11-11 Semiconductor structure for isolating integrated circuits of various operating voltages

Country Status (4)

Country Link
US (1) US7498653B2 (en)
JP (1) JP4806250B2 (en)
KR (1) KR100797896B1 (en)
TW (1) TWI294159B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI426567B (en) * 2010-03-03 2014-02-11 Himax Tech Ltd Method of fabricating semiconductor device

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5594407B2 (en) * 2013-07-24 2014-09-24 富士電機株式会社 Semiconductor device
JP6326858B2 (en) * 2014-02-24 2018-05-23 セイコーエプソン株式会社 Semiconductor device and manufacturing method thereof
JP6364898B2 (en) * 2014-04-07 2018-08-01 セイコーエプソン株式会社 Semiconductor device
TWI527241B (en) * 2014-06-11 2016-03-21 新唐科技股份有限公司 Semiconductor device
US10276657B2 (en) 2017-09-13 2019-04-30 Taiwan Semiconductor Manufacturing Co., Ltd. Isolation structure for active devices

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2655197B1 (en) * 1989-11-28 1995-03-17 Sgs Thomson Microelectronics INTEGRATED CIRCUIT COMPRISING MEMORIES AND ITS MANUFACTURING METHOD.
JP3252432B2 (en) * 1992-03-19 2002-02-04 松下電器産業株式会社 Semiconductor device and manufacturing method thereof
US5602051A (en) * 1995-10-06 1997-02-11 International Business Machines Corporation Method of making stacked electrical device having regions of electrical isolation and electrical connection on a given stack level
JPH09199680A (en) * 1996-01-17 1997-07-31 Nec Corp Semiconductor device and manufacture of the same
JPH1070243A (en) * 1996-05-30 1998-03-10 Toshiba Corp Semiconductor integrated circuit and method and apparatus for testing the same
US6255156B1 (en) * 1997-02-07 2001-07-03 Micron Technology, Inc. Method for forming porous silicon dioxide insulators and related structures
JPH11251447A (en) * 1998-02-27 1999-09-17 Nippon Foundry Inc Semiconductor device and its manufacture
US6093623A (en) * 1998-08-04 2000-07-25 Micron Technology, Inc. Methods for making silicon-on-insulator structures
JP2002093195A (en) * 2000-09-18 2002-03-29 Mitsubishi Electric Corp Semiconductor memory and test method therefor
JP3950294B2 (en) * 2000-11-16 2007-07-25 シャープ株式会社 Semiconductor device
KR20020044001A (en) * 2000-12-05 2002-06-14 윤종용 Method of manufacturing insulating layer filling gap between small patterns for semiconductor device
JP2004253499A (en) * 2003-02-19 2004-09-09 Hitachi Ltd Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI426567B (en) * 2010-03-03 2014-02-11 Himax Tech Ltd Method of fabricating semiconductor device

Also Published As

Publication number Publication date
TWI294159B (en) 2008-03-01
JP4806250B2 (en) 2011-11-02
JP2006140496A (en) 2006-06-01
US20070235831A1 (en) 2007-10-11
KR20060052630A (en) 2006-05-19
KR100797896B1 (en) 2008-01-24
US7498653B2 (en) 2009-03-03

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