TW200618221A - Semiconductor package having heat pipes - Google Patents
Semiconductor package having heat pipesInfo
- Publication number
- TW200618221A TW200618221A TW093136291A TW93136291A TW200618221A TW 200618221 A TW200618221 A TW 200618221A TW 093136291 A TW093136291 A TW 093136291A TW 93136291 A TW93136291 A TW 93136291A TW 200618221 A TW200618221 A TW 200618221A
- Authority
- TW
- Taiwan
- Prior art keywords
- substrate
- chip
- semiconductor package
- heat pipes
- back surface
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
A semiconductor package includes a substrate, a chip, a thermally conductive adhesive, a heat spreader and at least one heat pipe. The chip is disposed on the substrate and has an active surface and a back surface opposite to the active surface, wherein the active surface is electrically connected to the substrate. The thermally conductive adhesive is used for mounting the back surface of the chip to the substrate. The heat spreader is mounted on the substrate. The heat pipe is mounted on the substrate and has an evaporator end and a condenser end, wherein the evaporator end is thermally coupled to the back surface of the chip and the condenser end is connected to the heat spreader.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW093136291A TWI248667B (en) | 2004-11-25 | 2004-11-25 | Semiconductor package having heat pipes |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW093136291A TWI248667B (en) | 2004-11-25 | 2004-11-25 | Semiconductor package having heat pipes |
Publications (2)
Publication Number | Publication Date |
---|---|
TWI248667B TWI248667B (en) | 2006-02-01 |
TW200618221A true TW200618221A (en) | 2006-06-01 |
Family
ID=37429171
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW093136291A TWI248667B (en) | 2004-11-25 | 2004-11-25 | Semiconductor package having heat pipes |
Country Status (1)
Country | Link |
---|---|
TW (1) | TWI248667B (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11051431B2 (en) | 2018-06-29 | 2021-06-29 | Juniper Networks, Inc. | Thermal management with variable conductance heat pipe |
TWI751231B (en) * | 2016-12-09 | 2022-01-01 | 英商伊門勒汀斯有限公司 | Temperature control device |
-
2004
- 2004-11-25 TW TW093136291A patent/TWI248667B/en not_active IP Right Cessation
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI751231B (en) * | 2016-12-09 | 2022-01-01 | 英商伊門勒汀斯有限公司 | Temperature control device |
US11577251B2 (en) | 2016-12-09 | 2023-02-14 | Evonetix Ltd | Temperature control device |
US11051431B2 (en) | 2018-06-29 | 2021-06-29 | Juniper Networks, Inc. | Thermal management with variable conductance heat pipe |
US11653477B2 (en) | 2018-06-29 | 2023-05-16 | Juniper Networks, Inc. | Thermal management with variable conductance heat pipe |
Also Published As
Publication number | Publication date |
---|---|
TWI248667B (en) | 2006-02-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2008099554A1 (en) | Structure for mounting semiconductor package | |
SG122895A1 (en) | Hyper thermally enhanced semiconductor package system | |
TW200705621A (en) | Interposer and semiconductor device | |
TW200507212A (en) | Semiconductor package with heat dissipating structure | |
TW200611389A (en) | Integrated circuit package device and method for manufacturing the same | |
TW200733324A (en) | Microelectronic package having direct contact heat spreader and method of manufacturing same | |
TW200610016A (en) | Semiconductor device | |
TW200635009A (en) | Semiconductor packages and methods of manufacturing thereof | |
WO2005018291A3 (en) | Thermally enhanced electronic module with self-aligning heat sink | |
TW200620602A (en) | Heat stud for stacked chip package | |
TW200614465A (en) | Liquid metal thermal interface for an integrated circuit device | |
TW200614464A (en) | Bottom heat spreader | |
WO2010126255A3 (en) | Heat sink for a protrusion-type ic package | |
TW200635491A (en) | Heat dissipater module and electronic device having the same | |
JP2014099606A5 (en) | ||
TW200739841A (en) | Semiconductor device with a heat sink and method for fabricating the same | |
WO2009120977A3 (en) | Enhanced thermal dissipation ball grid array package | |
SG148987A1 (en) | Inter-connecting structure for semiconductor device package and method of the same | |
TW200703523A (en) | Semiconductor device with low CTE substrates | |
TW200742162A (en) | Semiconductor package mounting apparatus | |
TW200705582A (en) | Semiconductor device and manufacturing method therefor | |
EP2135281A4 (en) | Thermal dissipation in chip substrates | |
US20060207747A1 (en) | Isothermal plate heat-dissipating device | |
TW200618221A (en) | Semiconductor package having heat pipes | |
TW200701492A (en) | Semiconductor package structure |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |