TW200618209A - Semiconductor package and manufacturing for the same - Google Patents

Semiconductor package and manufacturing for the same

Info

Publication number
TW200618209A
TW200618209A TW093136292A TW93136292A TW200618209A TW 200618209 A TW200618209 A TW 200618209A TW 093136292 A TW093136292 A TW 093136292A TW 93136292 A TW93136292 A TW 93136292A TW 200618209 A TW200618209 A TW 200618209A
Authority
TW
Taiwan
Prior art keywords
chip
ring
shaped adhesive
cavity
manufacturing
Prior art date
Application number
TW093136292A
Other languages
Chinese (zh)
Other versions
TWI242272B (en
Inventor
Tong-Hong Wang
Chang-Chi Lee
Original Assignee
Advanced Semiconductor Eng
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Semiconductor Eng filed Critical Advanced Semiconductor Eng
Priority to TW093136292A priority Critical patent/TWI242272B/en
Application granted granted Critical
Publication of TWI242272B publication Critical patent/TWI242272B/en
Publication of TW200618209A publication Critical patent/TW200618209A/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

Abstract

A semiconductor includes a chip, a substrate, a ring-shaped adhesive, a thermal interface material and a heat spreader. The chip has an active surface and back surface opposite to the active surface. The substrate supports the chip and is electrically connected to the active surface of the chip. The ring-shaped adhesive is disposed the back surface of the chip and defines a cavity on the chip, wherein the ring-shaped adhesive has a cured property and is formed a cured dame after a cure process. The cavity is filled with the thermal interface material. The heat spreader covers the cavity and is disposed on the back surface of the chip by means of the ring-shaped adhesive.
TW093136292A 2004-11-25 2004-11-25 Semiconductor package and manufacturing for the same TWI242272B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW093136292A TWI242272B (en) 2004-11-25 2004-11-25 Semiconductor package and manufacturing for the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW093136292A TWI242272B (en) 2004-11-25 2004-11-25 Semiconductor package and manufacturing for the same

Publications (2)

Publication Number Publication Date
TWI242272B TWI242272B (en) 2005-10-21
TW200618209A true TW200618209A (en) 2006-06-01

Family

ID=37021518

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093136292A TWI242272B (en) 2004-11-25 2004-11-25 Semiconductor package and manufacturing for the same

Country Status (1)

Country Link
TW (1) TWI242272B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120188721A1 (en) * 2011-01-21 2012-07-26 Nxp B.V. Non-metal stiffener ring for fcbga

Also Published As

Publication number Publication date
TWI242272B (en) 2005-10-21

Similar Documents

Publication Publication Date Title
WO2009038984A3 (en) Microelectronic package and method of forming same
TW200733324A (en) Microelectronic package having direct contact heat spreader and method of manufacturing same
JP2010147153A5 (en)
TW200735307A (en) Semiconductor device and method for manufacturing semiconductor device
TW200746332A (en) Method of manufacturing a semiconductor device
TW200719446A (en) Semiconductor package and substrate structure thereof
TW200727461A (en) Semiconductor device and production method thereof
MY149770A (en) Semiconductor die package including embedded flip chip
WO2009022461A1 (en) Circuit device, circuit device manufacturing method and portable device
SG125168A1 (en) Multi-leadframe semiconductor package and method of manufacture
ATE517433T1 (en) METHOD FOR PACKAGING SEMICONDUCTOR CHIPS
WO2006132795A3 (en) A light-emitting device module with a substrate and methods of forming it
WO2006132794A3 (en) A light-emitting device module with flip-chip configuration on a heat-dissipating substrate
TW200627555A (en) Method for wafer level package
SG148987A1 (en) Inter-connecting structure for semiconductor device package and method of the same
SG113527A1 (en) Strip-fabricated flip chip in package and flip chip-system in package heat spreader assemblies and fabrication methods therefor
WO2007002689A3 (en) Semiconductor device having firmly secured heat spreader
WO2009051975A8 (en) Wafer level stacked die packaging
TW200737453A (en) Heat conductive bonding material, semiconductor package, heat spreader, semiconductor chip and bonding method of bonding semiconductor chip to heat spreader
SG134268A1 (en) Thermally enhanced semiconductor package and method of producing the same
WO2004070790A3 (en) Molded high density electronic packaging structure for high performance applications
TW200610114A (en) Chip package for fixing heat spreader and method for packaging the same
TW200618209A (en) Semiconductor package and manufacturing for the same
CN104810462A (en) ESOP8 lead frame of medium-and high-power LED driving chip
TW200611383A (en) Flip-chip ball grid array chip packaging structure and the manufacturing process for the same