TW200617776A - Command supply device - Google Patents

Command supply device

Info

Publication number
TW200617776A
TW200617776A TW094116304A TW94116304A TW200617776A TW 200617776 A TW200617776 A TW 200617776A TW 094116304 A TW094116304 A TW 094116304A TW 94116304 A TW94116304 A TW 94116304A TW 200617776 A TW200617776 A TW 200617776A
Authority
TW
Taiwan
Prior art keywords
command
cpu
section
command line
supplying
Prior art date
Application number
TW094116304A
Other languages
English (en)
Inventor
Satoshi Ogura
Original Assignee
Matsushita Electric Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Ind Co Ltd filed Critical Matsushita Electric Ind Co Ltd
Publication of TW200617776A publication Critical patent/TW200617776A/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3808—Instruction prefetching for instruction reuse, e.g. trace cache, branch target cache
    • G06F9/381—Loop buffering

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Record Information Processing For Printing (AREA)
TW094116304A 2004-11-25 2005-05-19 Command supply device TW200617776A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004340660 2004-11-25

Publications (1)

Publication Number Publication Date
TW200617776A true TW200617776A (en) 2006-06-01

Family

ID=36497830

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094116304A TW200617776A (en) 2004-11-25 2005-05-19 Command supply device

Country Status (6)

Country Link
US (1) US7822949B2 (zh)
EP (1) EP1826667A4 (zh)
JP (1) JP4086885B2 (zh)
CN (1) CN101065725A (zh)
TW (1) TW200617776A (zh)
WO (1) WO2006057084A1 (zh)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1962181A4 (en) * 2005-12-02 2010-05-26 Panasonic Corp BUFFER CONTROL UNIT AND BUFFER MEMORY
JP4690424B2 (ja) 2005-12-26 2011-06-01 パナソニック株式会社 コマンド処理装置、方法、及び集積回路装置
US9052910B2 (en) * 2007-10-25 2015-06-09 International Business Machines Corporation Efficiency of short loop instruction fetch
US9772851B2 (en) 2007-10-25 2017-09-26 International Business Machines Corporation Retrieving instructions of a single branch, backwards short loop from a local loop buffer or virtual loop buffer
CN101903868B (zh) * 2007-12-21 2012-07-04 松下电器产业株式会社 存储装置以及其控制方法
JPWO2010021119A1 (ja) * 2008-08-21 2012-01-26 パナソニック株式会社 命令制御装置
US9952869B2 (en) 2009-11-04 2018-04-24 Ceva D.S.P. Ltd. System and method for using a branch mis-prediction buffer
CN102480387A (zh) * 2010-11-30 2012-05-30 英业达股份有限公司 机架式服务器装置
US9377966B2 (en) 2013-10-09 2016-06-28 Samsung Electronics Co., Ltd. Method and apparatus for efficiently processing storage commands
KR102401271B1 (ko) * 2015-09-08 2022-05-24 삼성전자주식회사 메모리 시스템 및 그 동작 방법

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5952349A (ja) * 1982-09-17 1984-03-26 Nec Corp 命令先取制御装置
US4626988A (en) * 1983-03-07 1986-12-02 International Business Machines Corporation Instruction fetch look-aside buffer with loop mode control
JPS63314644A (ja) * 1987-06-17 1988-12-22 Nec Corp デ−タ処理装置
JP2690921B2 (ja) * 1987-12-25 1997-12-17 株式会社日立製作所 情報処理装置
EP1050804A1 (en) * 1999-05-03 2000-11-08 STMicroelectronics SA Execution of instruction loops
US6766444B1 (en) * 2000-11-02 2004-07-20 Intel Corporation Hardware loops
US6898693B1 (en) * 2000-11-02 2005-05-24 Intel Corporation Hardware loops
US6643755B2 (en) * 2001-02-20 2003-11-04 Koninklijke Philips Electronics N.V. Cyclically sequential memory prefetch
JP3656587B2 (ja) * 2001-10-01 2005-06-08 日本電気株式会社 並列演算プロセッサ、その演算制御方法及びプログラム
JP3804941B2 (ja) * 2002-06-28 2006-08-02 富士通株式会社 命令フェッチ制御装置

Also Published As

Publication number Publication date
EP1826667A4 (en) 2008-07-23
JP4086885B2 (ja) 2008-05-14
US20080086621A1 (en) 2008-04-10
EP1826667A1 (en) 2007-08-29
US7822949B2 (en) 2010-10-26
CN101065725A (zh) 2007-10-31
WO2006057084A1 (ja) 2006-06-01
JPWO2006057084A1 (ja) 2008-06-05

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