TW200614328A - Methods and apparatus for reducing an electronic device manufacturing tool footprint - Google Patents

Methods and apparatus for reducing an electronic device manufacturing tool footprint

Info

Publication number
TW200614328A
TW200614328A TW094123643A TW94123643A TW200614328A TW 200614328 A TW200614328 A TW 200614328A TW 094123643 A TW094123643 A TW 094123643A TW 94123643 A TW94123643 A TW 94123643A TW 200614328 A TW200614328 A TW 200614328A
Authority
TW
Taiwan
Prior art keywords
electronic device
device manufacturing
manufacturing tool
reducing
footprint
Prior art date
Application number
TW094123643A
Other languages
Chinese (zh)
Other versions
TWI297906B (en
Inventor
Janusz Jozwiak
Original Assignee
Applied Materials Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Materials Inc filed Critical Applied Materials Inc
Publication of TW200614328A publication Critical patent/TW200614328A/en
Application granted granted Critical
Publication of TWI297906B publication Critical patent/TWI297906B/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/6719—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the construction of the processing chambers, e.g. modular processing chambers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Supply And Installment Of Electrical Components (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Casings For Electric Apparatus (AREA)

Abstract

In at least one aspect, a method includes positioning a load lock of an electronic device manufacturing tool such that the load lock occupies a first floor area; and positioning a mainframe power supply in a second floor area, wherein a substantial portion of the second floor area is within the first floor area, thereby reducing the electronic device manufacturing tool footprint. Additionally, or alternatively, a mainframe controller may be placed so that the footprint thereof substantially overlaps the footprint of the load lock. Numerous other aspects are also provided.
TW094123643A 2004-07-12 2005-07-12 Methods and apparatus for reducing an electronic device manufacturing tool footprint TWI297906B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US58711004P 2004-07-12 2004-07-12

Publications (2)

Publication Number Publication Date
TW200614328A true TW200614328A (en) 2006-05-01
TWI297906B TWI297906B (en) 2008-06-11

Family

ID=35906106

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094123643A TWI297906B (en) 2004-07-12 2005-07-12 Methods and apparatus for reducing an electronic device manufacturing tool footprint

Country Status (5)

Country Link
US (1) US20060104799A1 (en)
JP (1) JP4567541B2 (en)
KR (1) KR100648321B1 (en)
CN (1) CN1802084B (en)
TW (1) TWI297906B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6463220B2 (en) * 2015-05-21 2019-01-30 東京エレクトロン株式会社 Processing system

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5855681A (en) * 1996-11-18 1999-01-05 Applied Materials, Inc. Ultra high throughput wafer vacuum processing system
US5838121A (en) * 1996-11-18 1998-11-17 Applied Materials, Inc. Dual blade robot
US5909994A (en) * 1996-11-18 1999-06-08 Applied Materials, Inc. Vertical dual loadlock chamber
US6059507A (en) * 1997-04-21 2000-05-09 Brooks Automation, Inc. Substrate processing apparatus with small batch load lock
JP3582330B2 (en) * 1997-11-14 2004-10-27 東京エレクトロン株式会社 Processing apparatus and processing system using the same
JP4316752B2 (en) * 1999-11-30 2009-08-19 キヤノンアネルバ株式会社 Vacuum transfer processing equipment
US6303906B1 (en) * 1999-11-30 2001-10-16 Wafermasters, Inc. Resistively heated single wafer furnace
US6860965B1 (en) * 2000-06-23 2005-03-01 Novellus Systems, Inc. High throughput architecture for semiconductor processing
WO2003012830A1 (en) * 2000-12-01 2003-02-13 Wafermasters, Incorporated Wafer processing system including a robot
JP2002343720A (en) * 2001-05-11 2002-11-29 Hitachi Kokusai Electric Inc Heat treatment system
JP2003017543A (en) * 2001-06-28 2003-01-17 Hitachi Kokusai Electric Inc Substrate processing apparatus, substrate processing method, semiconductor device manufacturing method, and conveying apparatus
JP2003092329A (en) * 2001-09-18 2003-03-28 Hitachi Kokusai Electric Inc Substrate processing system
JP2003133388A (en) * 2001-10-25 2003-05-09 Ulvac Japan Ltd Substrate-conveying apparatus
US20030213560A1 (en) * 2002-05-16 2003-11-20 Yaxin Wang Tandem wafer processing system and process
JP2004119401A (en) * 2002-09-20 2004-04-15 Foi:Kk Substrate processing system
US8798964B2 (en) * 2002-11-06 2014-08-05 Hewlett-Packard Development Company, L. P. Methods and apparatus for designing the racking and wiring configurations for pieces of hardware

Also Published As

Publication number Publication date
KR20060050063A (en) 2006-05-19
US20060104799A1 (en) 2006-05-18
CN1802084B (en) 2011-08-10
TWI297906B (en) 2008-06-11
KR100648321B1 (en) 2006-11-23
JP2006041509A (en) 2006-02-09
JP4567541B2 (en) 2010-10-20
CN1802084A (en) 2006-07-12

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees