TW200531311A - Electronic device contact structures - Google Patents

Electronic device contact structures Download PDF

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Publication number
TW200531311A
TW200531311A TW093137378A TW93137378A TW200531311A TW 200531311 A TW200531311 A TW 200531311A TW 093137378 A TW093137378 A TW 093137378A TW 93137378 A TW93137378 A TW 93137378A TW 200531311 A TW200531311 A TW 200531311A
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TW
Taiwan
Prior art keywords
layer
conductive
led
light
pattern
Prior art date
Application number
TW093137378A
Other languages
Chinese (zh)
Other versions
TWI371866B (en
Inventor
Alexei A Erchak
Eleftrios Lidorikis
John W Graff
Original Assignee
Luminus Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/735,498 external-priority patent/US7166871B2/en
Priority claimed from US10/794,244 external-priority patent/US20040259279A1/en
Priority claimed from US10/794,452 external-priority patent/US7074631B2/en
Priority claimed from US10/871,877 external-priority patent/US7105861B2/en
Application filed by Luminus Devices Inc filed Critical Luminus Devices Inc
Publication of TW200531311A publication Critical patent/TW200531311A/en
Application granted granted Critical
Publication of TWI371866B publication Critical patent/TWI371866B/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0083—Periodic patterns for optical field-shaping in or on the semiconductor body or semiconductor body package, e.g. photonic bandgap structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Led Device Packages (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

A device, comprising: a material body designed for use in an electronic device, the material body having a surface; and a contact structure supported by the surface of the material body, the contact structure comprising: a patterned conductive layer having an interior portion; and a patterned insulating layer having edges and being disposed between the interior portion of the patterned conductive layer and the surface of the material body, the insulating layer being patterned such that the conductive layer extends past all edges of the insulating layer to form an electrical contact to the material body.

Description

200531311 九、發明說明： 【發明所屬之技術領域】 本發明有關於一種電子裝置接觸結構。 【先前技術】 缺較於白熾燈或電燈（incandescent light source)及/或 赏光燈（fluorescent iight s〇urce)而言，發光二極體⑴咖 _ttlng d1〇de，LED)所提供之光線係可具有較高的效能。 此外，由於LEDs之相關設備係可提供相當高的電力效率 (power efficiency)，藉此已於各式各樣的照明設施之中取 代了傳統的光源（light s〇urces)。例如：LEDs係用以做為交 通用燈（trafflc lights)之使用、用以對於電話鍵盤（ceU ph〇ne keypads)與顯示器（displays)等進行照明。 身又而s，LED係由複數層結構（muitipie iayers)所形 成’其中’於複數層結構中之至少部分的層結構係由不同 的材料所製成，並且藉由這些層結構之材質、厚度決定了 LED所發出光線之波長（waveiength)。另一方面，經由對於 這二層構之化學成份（chemical composition)的選擇作用 下如此係可以對於其光動力（optical power)進行相當有效 能的收縮，並且對於所射出之電載子（electrical charge carriers)進行隔離，如此以避免其進入某些特定區域 (regions)(—般稱之為量子井（quantuin wells))。通常，於量 子井所生成位置之接面（juncti〇n)之一側邊的層結構上係摻 雜了給予體原子（donor atoms)，藉此以導致高電子濃度 1057-6715-PF 5 200531311 (electron COncentration)(通常稱這些層結構為n型層結構 (n-type layers))的產生；另外，於其相對側邊之層結構上係 摻雜了受體原子（acceptor at〇ms)，藉此以導致相當高的電 洞濃度（hole concentration)(通常稱這些層結構為p型層結 構（p-type layers))。 以下將針對LED之製作方式提出說明。於晶圓（wafer) 之製作過程中係形成了複數材料層。一般而言，這些層結 構係藉由屋晶沉積技術（epitaxial dep〇shi〇n technique)所 形成，例如：金屬有機化學氣相沉積（metal_〇rganic chemical vapor deP〇siti〇n (M0CVD)，於其成長基底（gr〇wt}i ㈣价价） 之上係已預先形成了沉積層結構。隨後，藉由各種蝕刻及 金屬化技術（etching and metallization techniques)對於這些 外路的層、纟σ構進彳于電流注入用之接觸墊（c〇ntact)之製作，200531311 IX. Description of the invention: [Technical field to which the invention belongs] The present invention relates to a contact structure for an electronic device. [Previous technology] Compared with incandescent or incandescent light source and / or fluorescent iight source, the light source provided by the light-emitting diode tttlng d10de (LED) Can have higher efficiency. In addition, the related equipment of LEDs can provide relatively high power efficiency, which has replaced traditional light sources in various lighting facilities. For example: LEDs are used as traffic lights, and are used to illuminate telephone keypads and displays. Body and s, LEDs are formed by multiple layer structures (muitipie iayers), where at least part of the layer structure in the multiple layer structure is made of different materials, and the material and thickness Determines the wavelength (waveiength) of the light emitted by the LED. On the other hand, through the selection of the chemical composition of the two-layer structure, it is possible to perform a quite effective energy contraction for its optical power, and for the emitted electrical charge. carriers), so as to prevent them from entering certain regions (generally called quantum wells). Usually, the layer structure on the side of one of the junctions (junctioon) where the quantum well is generated is doped with donor atoms, thereby resulting in a high electron concentration 1057-6715-PF 5 200531311 (electron COncentration) (usually called n-type layers); in addition, the layer structure on the opposite side is doped with acceptor at 0ms, This results in a relatively high hole concentration (these layer structures are often referred to as p-type layers). The following will describe the manufacturing method of LED. A plurality of material layers are formed during the fabrication of the wafer. Generally speaking, these layer structures are formed by an epitaxial depOshin technique, such as metal organic chemical vapor deposition (MOCVD). A deposition layer structure has been formed in advance on the growth substrate (gr0wt) i. Then, various external etching and metallization techniques are applied to these outer layers, 纟 σ Constructed into the manufacture of contact pads (conntact) for current injection,

Ik後便可對於晶圓進行切割以製作出個別LED晶片（LED chips)。通常，經切割後之個別led晶片係利用封裝技術 加以包覆。 ¥進行LED之操作時，一般係將電能（eieCfricai energy) 注入於LED之中，此電能隨後便可轉換為電磁輻射 (eleetfGmagnetic radiati〇n)(光線），部分的電磁輻射或光線 便可經由LED而被引出。 【發明内容】 本發明是有關於光學顯示系統及方法。 1057-6715-PF 6 200531311 本發明之目的在於提出一種光學顯示系統，包括—微 型顯不器與一發光裝置。微型顯示器具有一表面。發光裝 置包括一多材料疊層與一第一層。多材料疊層包括―： 產生區，第一層是由光產生區所支承，在對於第一層之— 表面之設計作用下，由光產生區所產生之光線是可經由第 -層之表面而自發光裝置進行發出。微型顯示器之表面之 一寬度深度比例與第-層之表面之—寬㈣度比例之—比 例是大約介於0.5至2。 本發明之另—目的在於提供—種光學顯示系統，包 括：一微型顯示器，具有一表面；一發光裝置；以及至少 -光學7C件，光學元件沿著自微型顯示器朝向於發光裝置 之-光徑而設置，#中，在對於微型顯示器、發光裝置、 光子兀件進仃疋位之下’於使用過程中係可使得光學顯示 糸統之一影像平面是不一 於之微型顯示器之—表面由發U置所射出且照射 於2:月之又—目的在於提供—種利用複數發光裝置對 於-她貝示器進行照射之方法，此 發光裝置進行活化牛驟 ^ LL y K k二 驟，如此使得這些發光裝置中之至少 ^ 化守間，活化時間是不同於這此發 光裝置中之其它這些發光裝置中之至少—發光 化時間。 ^尤犮置之一活 與顯的在於提供—種光學顯示系統，此 與一冷卻系統。在光學顯示系統 使 轾中，々部系統可用以調節LED之溫度。 1057-6715~pp 7 200531311 本务明之又一目的在於提供一種發光裝置，包括··一 夕材料豐層與一第一層，多材料疊層包括一光產生區，第 一層是由光產生區所支承，在對於第一層之一表面之設計 作用下’由光產生區所產生之光線是可經由第一層之表面 而自發光裝置進行發出，並且於第一層之表面具有一接觸 區在接觸區之設計作用下，於使用時之經由發光二極體 ’、、、射在彳政型顯示器上之一面積中之至多約200/。是包括了 複數暗點，這些暗點是由接觸區所形成。 本發明之又一目的在於提供一種光學顯示系統，包 括·複數發光二極體；一微型顯示器；至少一光學元件， 光學兀件沿著自微型顯示器朝向於發光裝置之一光徑而設 置；以及一光束聚集裝置，用以對於這些發光二極體所產 生之光線進行結合。 本發明之又一目的在於提供一種光學顯示系統，其 中’發光裝置包括一多材料疊層與一第一層，多材料疊層 包括-光產生區一層是由光產生； 一層之:表面之設計作用下，由光產生區所產生之光線I 可經由第-層之表面而自發光裝置進行發出。此外，發光 j置包括至少-電接觸件與一封裝結構。電接觸件是沿著 第-層之表面而設置。封裝結構包括一鑛層結構、複數栓 槽結構與複數銲線。發光裝置經由鑛層結構以提供電性接 觸知線係連接於鑛層結構與至少一電接觸件塾之間。 、毛月之目的在於提供一種裝置’包括··一材料體， 設計為在一電子裝置之中使用，材料體包括-表面，·以及After Ik, the wafer can be diced to make individual LED chips. Usually, the individual LED chips after dicing are covered with packaging technology. ¥ When operating LEDs, electrical energy (eieCfricai energy) is usually injected into the LEDs. This electrical energy can then be converted into electromagnetic radiation (light), and some electromagnetic radiation or light can pass through the LEDs. And was led. SUMMARY OF THE INVENTION The present invention relates to an optical display system and method. 1057-6715-PF 6 200531311 The object of the present invention is to provide an optical display system including a micro display and a light emitting device. The micro display has a surface. The light emitting device includes a multi-material stack and a first layer. The multi-material stack includes ―: the generation area, the first layer is supported by the light generation area, and under the design of the surface of the first layer, the light generated by the light generation area can pass through the surface of the first layer The self-luminous device emits light. The ratio of a width-to-depth ratio of the surface of the micro display to a width-to-width ratio of the surface of the first layer is about 0.5 to 2. Another object of the present invention is to provide an optical display system including: a micro-display with a surface; a light-emitting device; and at least-an optical 7C member, the optical element along the light path from the micro-display to the light-emitting device The setting, #, under the position of the micro-display, light-emitting device, and photon element, in the use process can make one of the optical display system's image plane is different from the micro-display-the surface is The hair is emitted by the U and is irradiated at 2: Yuezhi again-the purpose is to provide-a method for irradiating the-Shebe indicator using a plurality of light-emitting devices, this light-emitting device performs activation of two steps: LL y K k two steps, so Therefore, the activation time of at least one of these light-emitting devices is different from at least the light-emitting time of other light-emitting devices in this light-emitting device. ^ One of the most important features is the provision of an optical display system, and a cooling system. In the optical display system, the head system can be used to adjust the temperature of the LED. 1057-6715 ~ pp 7 200531311 Another object of the present invention is to provide a light-emitting device, which includes a material layer and a first layer. The multi-material stack includes a light generating region. The first layer is generated by light. Supported by the area, under the design of a surface of the first layer, the light generated by the light generating area can be emitted from the light-emitting device through the surface of the first layer, and has a contact on the surface of the first layer. Under the function of the design of the contact area, at most, about 200 / in an area shot on the government display via the light-emitting diodes during use. It includes a plurality of dark spots, which are formed by the contact area. Yet another object of the present invention is to provide an optical display system including a plurality of light emitting diodes; a micro display; at least one optical element, and an optical element arranged along a light path from the micro display toward one of the light emitting devices; and A beam focusing device is used to combine the light generated by these light-emitting diodes. Another object of the present invention is to provide an optical display system, in which the light-emitting device includes a multi-material stack and a first layer, and the multi-material stack includes a light-generating region. One layer is generated by light. One layer: design of the surface Under the action, the light I generated by the light generating region can be emitted from the light emitting device through the surface of the first layer. In addition, the light emitting device includes at least an electrical contact and a packaging structure. Electrical contacts are provided along the surface of the first layer. The package structure includes a ore layer structure, a plurality of pin-groove structures, and a plurality of bonding wires. The light-emitting device is connected between the mine structure and the at least one electrical contact 塾 through the mine layer structure to provide electrical contact. The purpose of Mao Yue is to provide a device ’including a material body designed to be used in an electronic device, the material body including a surface, and

1057-6715-PF 8 200531311 一接觸結構，由材料體之表面所支承。接觸結構包括：_ 圖樣導電層，具有一内部件；以及一圖樣絕緣層，具有複 數邊緣’圖樣絕緣層設置於圖樣導電層之内部件、材料體 之表面之間，經圖樣化之絕緣層使得導電層延伸通過了絕 緣層之所有這些邊緣，如此可將一電接觸形成至材料體。 本發明之另一目的在於提供一種裝置，包括··一半導 體晶粒，具有一表面層，表面層具有一第一側及一第二側， =二側是相反於第一側；一第一導電墊結構，沿著半導體 晶=之表面層之第_側而設置；—第二導電墊結構，沿著 半導體晶粒之表面層之第二侧而設置；複數導電接觸墊， 内部件、半導體晶粒之頂層之間。 電性接觸於第一導電墊結構與第二導電墊結構中之至少一 者，攻些導電接觸墊是由第一導電墊結構與第二導電墊結 構中之至少一者而延伸朝向於半導體晶粒之一中心區域； 以及一絕緣層，設置於至少一部分之這些導電接觸墊之一 本發明之又一目的在於提供一種裝置，包括：一矩形 發光二極體，具有一表面層，表面層具有一側；一導電墊 結構，沿著矩形發光二極體之表面層之一側而設置；另一 電墊結構，沿著矩形發光二極體之表面層之相對的另一側 而設置；複數導電接觸墊，電性接觸於至少一導電墊、纟士構， 這些導電接觸塾是由至少一導電墊結構而延伸朝向於：形 發光二極體之一中心區域。 疊層 本發明之又一目的在於提供—種裝置，包括：一材料 ，具有一表面；以及一接觸結構，設置於材料疊層之 1057-6715-PF 9 200531311 表面之上，結構包括：—圖樣導電層；以及一圖樣絕 緣層’設置於圖樣導電層與材料叠層之間’其中，在圖樣 導電層、圖樣絕緣層之設計，如此可使得通過圖樣 導電層時之所使用之—電壓降大約相等於複數段部，這些 段部是沿著圖樣導電層之長度進行設置。 本發明之又一目的在於提供_種裝置’包括：一材料 疊層，具有一表面；以及一接觸結構，設置於材料疊層之 表面之上。接觸結構包括：_圖樣導電層，在圖樣導電層 之設計作用下，如此可使得在操作過程中之圖樣導電層^ 一熱產生大約相等於複數段部之熱產生，這些段部是=著 圖樣導電層之長度進行設置。 本發明之各實施例具有以下之至少一優點。 於特定實施例中，發光系統包括一LED及/或一相對大 型led晶片，此相對大型LED晶片可呈現出相對高光引出 量。 於部分實施例中，發光系統包括一LED及/或一相對大 型LED晶片，此相對大型LED晶片可呈現出相對高表面亮 度、相對高平均表面亮度、相對較少之散熱需求或相對高 散熱率、相對低源音域及/或相對高功率效率。 於特定實施例中，發光系統可包括一封裴LED(例如·· 一相對大型封裝LED)，藉此以取代封膠材料。在封裝LED 的作用下，由封膠材料所造成之降低效能及/或不一致之時 間函數效能之特定問題均可被避免，如此便可在一相對長 時期之下得到相對理想及/或可靠效能。 1057-6715-PF 10 200531311 於特定實施例中，發光系統可包括一 led(例如·· 一封 裝LED，其可為一相對大型封裝LED)，此LED可為一相對 均勻磷材料塗層。 於部分實施例中，一發光系統可包括一 LED(例如：一 封裝LED，其可為一相對大型封裝LED)，經設計之LED可 在一特定角度範圍（例如：兩於LED表面法向之一特定角度 範圍）内以提供一所需光輸出。 於部分實施例中，一發光系統可包括一 L E D及/或一相 對大型LED晶粒，此LED及/或相對大型LED晶粒可經由一 相對合理價格之一程序所製成。 於特定實施例中，一發光系統可包括一 LED及/或一相 對大型LED晶粒，此LED及/或相對大型LED晶粒可在一大 規模方式下進行生產，並且不會因為經濟無法實行而造成 資本的浪費。 於部分實施例中，矩形狀LED(例如：相較於方形LED) 可提供以下所列出之一或多個優點。矩形LED可在單位面 積内具有較大的鲜線數目，藉此以增加可輸入於LED的功 率。由於矩形結構是可經由選擇方式以配合於一像素或一 微型顯示之一特定寬度深度比例，如此便可減少複雜光束 成型透鏡之需求。另外，矩形LED除了可增加散熱速度之 外，因裝置過熱所導致失效的可能性亦可被降低。此外， 由於經晶圓所切割之一個別LEDs的剖面是略大於LED的 光發射表面面積，則其它個別LEDs、可分離之可定址LEDs 便可採取陣列方式而相互緊密疊置。如果當LED無法運作 1057-6715-PF 11 200531311 (例如·由於大缺陷）時，由於個別LEDs之間是相互緊密疊 置的、，士口此便無法大幅降低陣列狀LEDs的效能。 為了讓本發明之上述和其他目的、特徵、和優點能更 明顯易懂，下文特舉一較佳實施例，並配合所附圖示，作 詳細說明如下： 【實施方式】 苐1圖表示一發光系統（Ught emitting system)50之示 思圖，於發光系統50之中係結合了由複數發光二極體（light emitting diode，LEDs)l〇〇 所組成之一陣列（array)6〇。在陣 列60的設計作用下，於操作過程中、經由leds 1〇〇(如下 所述）所射出光線便可經由表面（surface)55而自發光系統 50發出。 舉例而言，發光系統包括了投影機（pr〇ject〇rs)(例如： 背投影式投影機（rear projection projector)、前投影式投影 機（front projection projector))、可攜式電子裝置（portable electronic devices)(例如：行動電話（cen ph〇ne)、個人數位 助理（personal digital assistants)、膝上型電腦（laptop computers)、電腦螢幕（compUter monitor)、大面積標誌、（large area signage)(例如：高速公路標誌（highway signage))、車 輛内部照明（vehicle interior lighting)(例如：前座遮陽板照 明（dashboard lighting))、車輛外部照明（vehicle exterior lighting)(例如：車輛頭燈（vehicle headlights)、包括顏色變 換頭燈（color changeable headlights)、一 般照明（general 1057-6715·^ 12 200531311 lighting)(例如：辦公室高架照明(office overhead lighting))、高亮度照明（high brightness lighting)(例如：街 燈（streetlights))、相機閃光燈（camera flashes)、醫療裝置 (medical devices)(例如：内視鏡（endoscopes))、通訊 (telecommunications)(例如：用於短距離（short range)之資 料傳送的塑膠纖維（plastic fibers))、保全感測（security sensing)(例如：生物辨視系統（biometrics))、積體光電 (integrated optoelectronic)(例如晶片内與晶片間光學連結 (intrachip and interchip optical interconnects)、光學時脈 (optical clocking))、軍事地域通信（military field communications)(例如：點對點通信（point to point communications))、生物感測（biosensing)(例如：有機或無 機物質（organic or inorganic substance)之光 4貞測 (photo-detection))、光動力法療（photodynamic therapy)(例 如：皮膚治療（skin treatment))、夜視鏡（night-vision goggles)、太陽能式運輸照明（s〇iai· powered transit lighting)、緊急照明（emergency lighting systmes)、機場跑 道照明（airport runway lighting)、航線照明（airline lighting)、外科面罩（surgical g0ggles)、穿戴式光源 (wearable light sources)(例如：救生背心（nfe-vests))。舉例 而吕’背投影式投影機係為一背投影式電視（rear projection television);前投影式投影機係為用以顯示於一平面 (surface)(例如··螢幕（screen)或牆壁（wall))之一投影機。於 部分實施例中，膝上型電腦係可包括一前投影式投影機。 1057-6715-PF 13 200531311 一般而言，表面55係由可傳送來自於LEDs 100、且 撞擊在表面55上之至少約20°/〇(例如··至少約30%、至少 約40%、至少約50%、至少約60%、至少約7〇%、至少約 80%、至少約90%、至少約95%)之光線的材料所製成，例 如：表面55係可由玻璃（glass)、石夕（silica)、石英（qUartz)、 塑膠（pi as tic)及聚合物（pi oymers)等材料所製成。 於部分實施例中，於實質上是希望經由各LED 1 00所 產生（例如：總光線密度（total light intensity)、波長為函數 之光線密度、及/或尖峰發射波長（peak emission wavelength；) 之光線是相同的，例如：於顯示設施（displaying applications)(例如：用以達成了鮮明全彩顯示器（vibrant full-C〇l〇r displays))之實質單色光源（rnonochromatic sources)(例如：LEDs)的時序（time_sequencing)。就通訊中 之光學系統而言，經由光源運行至光導件（light guide)、經 由光導件運行至偵測器（detector)之光線所具之一特定波長 (particular wavelength)係為其優點。就車輛照明中之光學 系統而言，其係藉由顏色以表示信號。另一例子係為在醫 療設施（medical applications)(例如：光感測药物活化 (photosensitive drug activation)或生物感測設施（bi〇sensing applications)，其所具有之波長、顏色上的反應係為優點） 上之應用。 於特定實施例中，其所希望的是在於經由至少一部分 之LED 1 00所射出的光線（例如：總光線密度、波長為函數 之光線密度、及/或尖峰發射波長（peak emissi〇n 141057-6715-PF 8 200531311 A contact structure supported by the surface of the material body. The contact structure includes: a patterned conductive layer with an internal component; and a patterned insulating layer with a plurality of edges. The patterned insulating layer is disposed between the internal component of the patterned conductive layer and the surface of the material body, and the patterned insulating layer makes The conductive layer extends through all these edges of the insulating layer, so that an electrical contact can be formed to the material body. Another object of the present invention is to provide a device including a semiconductor die having a surface layer, the surface layer having a first side and a second side, the two sides are opposite to the first side; a first The conductive pad structure is provided along the _ side of the surface layer of the semiconductor crystal =; the second conductive pad structure is provided along the second side of the surface layer of the semiconductor crystal; a plurality of conductive contact pads, internal components, semiconductors Between the top layers of the die. Electrically contact at least one of the first conductive pad structure and the second conductive pad structure, and the conductive contact pads are extended toward the semiconductor crystal by at least one of the first conductive pad structure and the second conductive pad structure A central region of the particles; and an insulating layer disposed on at least a portion of one of these conductive contact pads. Another object of the present invention is to provide a device including: a rectangular light emitting diode having a surface layer, the surface layer having One side; a conductive pad structure provided along one side of the surface layer of the rectangular light emitting diode; another electrical pad structure provided along the opposite side of the surface layer of the rectangular light emitting diode; a plurality The conductive contact pads are in electrical contact with at least one conductive pad and a silicon structure. These conductive contact pads are extended by at least one conductive pad structure toward: a central region of a light-emitting diode. Lamination Another object of the present invention is to provide a device comprising: a material having a surface; and a contact structure disposed on the surface of the material lamination 1057-6715-PF 9 200531311, the structure including:-a pattern A conductive layer; and a patterned insulating layer 'set between the patterned conductive layer and the material stack', where the patterned conductive layer and the patterned insulating layer are designed so that the voltage used when passing through the patterned conductive layer is about the voltage drop It is equivalent to a plurality of segments, which are arranged along the length of the patterned conductive layer. Still another object of the present invention is to provide a device including: a material stack having a surface; and a contact structure provided on the surface of the material stack. The contact structure includes: _ pattern conductive layer, under the design of the pattern conductive layer, so that the pattern conductive layer during operation ^ a heat generation is approximately equal to the heat generation of a plurality of sections, these sections are = pattern The length of the conductive layer is set. Embodiments of the present invention have at least one of the following advantages. In a specific embodiment, the lighting system includes an LED and / or a relatively large LED chip, and the relatively large LED chip may exhibit a relatively high light extraction amount. In some embodiments, the lighting system includes an LED and / or a relatively large LED chip. The relatively large LED chip may exhibit relatively high surface brightness, relatively high average surface brightness, relatively few heat dissipation requirements, or relatively high heat dissipation rates. , Relatively low source sound range, and / or relatively high power efficiency. In a specific embodiment, the lighting system may include a piece of PEI LED (for example, a relatively large package LED), thereby replacing the sealing material. Under the action of the packaged LED, the specific problems of reduced efficiency and / or inconsistent time function performance caused by the sealing material can be avoided, so that relatively ideal and / or reliable performance can be obtained in a relatively long period of time. . 1057-6715-PF 10 200531311 In a specific embodiment, the lighting system may include a led (eg, a packaged LED, which may be a relatively large packaged LED), and the LED may be a relatively uniform phosphor material coating. In some embodiments, a lighting system may include an LED (for example, a packaged LED, which may be a relatively large packaged LED), and the designed LED may be at a specific angle range (for example, two times the normal direction of the LED surface). A specific angle range) to provide a desired light output. In some embodiments, a light-emitting system may include an LED and / or a relatively large LED die, and the LED and / or relatively large LED die may be made by a procedure at a relatively reasonable price. In a specific embodiment, a light-emitting system may include an LED and / or a relatively large LED die. The LED and / or relatively large LED die may be produced in a large-scale manner, and will not be impossible due to economic reasons. This results in a waste of capital. In some embodiments, rectangular LEDs (eg, compared to square LEDs) may provide one or more of the advantages listed below. The rectangular LED can have a large number of fresh lines in a unit area, thereby increasing the power that can be input to the LED. Since the rectangular structure can be selected to fit a specific width-depth ratio of a pixel or a micro display, the need for complex beam-forming lenses can be reduced. In addition, in addition to increasing the heat dissipation speed of rectangular LEDs, the possibility of failure due to overheating of the device can also be reduced. In addition, since the cross-section of one individual LEDs cut by the wafer is slightly larger than the light emitting surface area of the LED, the other individual LEDs and the detachable addressable LEDs can be closely stacked in an array manner. If the LED fails to operate 1057-6715-PF 11 200531311 (for example, due to a large defect), because the individual LEDs are closely stacked with each other, Shikou can not significantly reduce the performance of the array-shaped LEDs. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is given below in conjunction with the accompanying drawings, and described in detail as follows: [Embodiment] 苐 1 The illuminating system (Ught emitting system) 50 is combined with an array 60 composed of a plurality of light emitting diodes (LEDs) 100 in the light emitting system 50. Under the design of the array 60, during operation, light emitted from the LEDs 100 (described below) can be emitted from the light emitting system 50 through the surface 55. For example, the lighting system includes a projector (for example, a rear projection projector, a front projection projector), and a portable electronic device (portable). electronic devices) (for example: mobile phones (cen phone), personal digital assistants, laptop computers, compUter monitors, large area signage, ( For example: highway signage), vehicle interior lighting (e.g., dashboard lighting), vehicle exterior lighting (e.g., vehicle headlights) , Including color changeable headlights, general lighting (general 1057-6715 · ^ 12 200531311 lighting) (for example: office overhead lighting), high brightness lighting (for example: street lights (Streetlights)), camera flashes, medical devices (medical devices) (for example: endoscopes), telecommunications (for example: plastic fibers for short-range data transmission), security sensing ( For example: biometrics), integrated optoelectronics (such as intrachip and interchip optical interconnects, optical clocking), military field communications (military field) communications) (for example: point to point communications), biosensing (for example: photo-detection of organic or inorganic substances), photodynamic therapy (Photodynamic therapy) (eg, skin treatment), night-vision goggles, solar-powered transit lighting (emergency lighting), emergency lighting (systmes), airport runway lighting (Airport runway lighting), airline lighting (surgical g0g) gles), wearable light sources (for example: nfe-vests). For example, Lu's rear-projection projector is a rear projection television; the front-projection projector is used to display on a surface (such as a screen or a wall) )) One of the projectors. In some embodiments, the laptop computer may include a front-projection projector. 1057-6715-PF 13 200531311 Generally speaking, the surface 55 is at least about 20 ° / 〇 (e.g., at least about 30%, at least about 40%, at least about About 50%, at least about 60%, at least about 70%, at least about 80%, at least about 90%, at least about 95%) of light. Xi (silica), quartz (qUartz), plastic (pi as tic) and polymers (pi oymers) and other materials. In some embodiments, it is essentially desired to be generated by each LED 100 (for example: total light intensity, total light intensity as a function of wavelength, and / or peak emission wavelength;). The light is the same, for example: rnonochromatic sources (for example, LEDs) in display applications (for example, to achieve vibrant full-color displays) ) Time_sequencing. As far as the optical system in communication is concerned, one of the specific wavelengths of the light running through the light source to the light guide and the light guide to the detector. It is its advantage. As for the optical system in vehicle lighting, it is used to indicate the signal by color. Another example is in medical applications (for example: photosensitive drug activation) or Biological sensing facilities (biosensing applications), its wavelength, color response is an advantage) applications In a particular embodiment, it is desirable that at least a portion of the LED via the light emitted (e.g., 100: Total light intensity, the light wavelength is a function of the density and / or peak emission wavelength (peak emissi〇n 14

1057—6715—PF 200531311 wavelength))係不同於其它LED 100所射出的光線（例如： 總光線密度、波長為函數之光線密度、及/或尖峰發射波長 (peak emission wavelength))。以一般照射（general lighting)(例如··其多波長係可增加演色性指數（CRI)(c〇1〇r rendering index，CRI))為例子可知，CRI係表示：相同的物 件、且於對等相關溫度（comparable c〇rrelate(j temperature) 之參考照明系統（reference lighting systems)(例如：曰光 (daylight))的觀察下，這些物件在發光系統所射出光線照射 下所通過時之色偏（color shift)的計量方式。其它的例子分 別為··相機閃光燈（例如··於其實質上係為高CRI、且於實 質上係接近中午曰光（sunlight)之CRI，其希望所拍攝之物 件或主題係可具有真實色彩展現（realistic rendering))、醫 療裝置（例如：於其實質上係具有固定CRI、且有利於組織 (tlSSUe)、器官（organ)、體液（fluid)等之變異（differentiati〇n) 及/或確定類別（identification))、背光顯示器（backUghting displays)(例如：其所具有之特定CRI的白光（whhe 係相當適合於人類的眼精）。 雖然在第1圖中之LEDs 1〇〇係以陣列方式所形成， LEDs H)〇亦可採用其它不同的形式。於部分實施例中，發 ，系統5〇包括了單一㈣1〇〇。於其它特定的實施例中， 藉由曲型狀陣列係可將各種光源之光線以成角度的方式導 引至相同的點位置(例# :如透鏡(lens)之光學鏡片(。ptic)) 之上。此外，於部分實施例中，陣列狀之發光裝置係以> 角狀狀排列’如此係可達到緊密的封裝、高效能之表面=1057—6715—PF 200531311 wavelength)) is different from the light emitted by other LEDs 100 (for example: total light density, light density as a function of wavelength, and / or peak emission wavelength). Taking general lighting (for example, its multi-wavelength system can increase the color rendering index (CRI) (c0100r rendering index, CRI)) as an example, it can be seen that CRI means: the same object, and Under the observation of reference lighting systems (such as daylight) of comparable temperatures (comparable c〇rrelate (j temperature)), the color deviation of these objects when they pass under the light emitted by the lighting system (Color shift) measurement method. Other examples are · camera flash (for example ... because it is essentially a high CRI, and is essentially a CRI close to noon daylight (sunlight), they want to shoot Objects or themes can have realistic rendering), medical devices (for example, they have a fixed CRI in nature, and are beneficial to the variation of tissues, organs, fluids, etc. ( differentiati〇n) and / or identification), backUghting displays (for example: the white light of its specific CRI (whhe is quite suitable for human Fine). Although the LEDs 100 in the first figure are formed in an array, the LEDs H) can also take other different forms. In some embodiments, the system 50 includes a single Y 100. In other specific embodiments, the curved array system can be used to guide the light rays of various light sources to the same point position at an angle (e.g., optical lenses (.ptic) such as lenses) In addition, in some embodiments, the array-shaped light-emitting devices are arranged in a > angular shape, so that a tightly packed, high-performance surface can be achieved =

1057—6715—PF 15 200531311 度。又，於部分實施例中，發光装置係沿著一 (mirror)(例如：雙色向面鏡（dichroic mirrorh夕田m 周圍進行分 佈，藉由鏡子係可對於陣列中之LEDs所鼾+ τ β考了出之光線進行 結合或反射。 如第1圖所示，由LEDs 100所射出之光線係直接傳播 至表面55之上。然而，部分實施例之LEDs 1〇〇所射出 光線係可採取非直接方式而傳播至表面55之上。於部八每 施例中，發光系統50包括了單一 LEE) 1〇〇。另外，於二二 實施例中，LEDs 100所射出之光線係聚焦於一微型顯^ (mirxodisplay)(例如：聚焦在一光閥門之上，例如：數位光 處理器（digital light processor，DLP))之上。又，於部分實 加例中’光線係被導引通過各種透鏡、鏡子或偏光器 (ploadzersK例如：供LCD所使用）。於特定實施例中，: 線是被投射通過主、次透鏡，例如：透鏡或透鏡組。 於第Μ圖中，一光學顯示系統（optical display system) i i 00(如下所述）包括一非朗伯 LED(n〇n_iambertian LED)mo(如下所述）、一透鏡112〇及一微型顯示器 (miCr〇display)1130。LED 111〇 是以一距離相 間隔於透鏡1120，並且微型顯示器113〇是以一距離L2相 間隔於透鏡1!20。在適當之距離u、L2的作用下，經由 LED 1110所射出之光線係撞擊透鏡丨之上，並且透鏡 1120之影像平面（image plane)係與led丨11〇之射出光線所 撞擊之微型顯示器1130的表面之間是相互一致。 1057-6715-PF 16 200531311 在上述配置（arrangement)作用丁，光學顯示系統11〇〇 便根據LED 111(3之表面形狀、將LED 11 10所射出光線以相 當有效率方式照射於微型顯示器1130的表面之上，經由 LED 1 11 0所射出光線是照射於微型顯示器1丨3 〇之上，則 LED 11 10所射出光線大致上是相同於微型顯示器的表 面形狀以邛分貫施例為例，LED 1 1 1 0之寬度深度比例 (aspect rat1〇)與微型顯示器113〇之寬度深度比例之間的比 例是大約是介於0.5至2(例如··大約是由9/16至16/9、大約 疋由3/4至4/3、大約是丨）。舉例而言，微型顯示器113〇之寬 度 /米度比例可為 1920x1080、640x4 80、800x600、1024x700、 1024x768 、 1024x720 、 1280x720 、 1280x768 、 1280x960或 1280x1064 。 一般而言’微型顯示器113〇之表面及/或led 1110之表 面疋可為任思所需形狀（desired shape)，例如··方形 (square)、圓形（circuiar)、矩形（rectangUiar)、三角形 (triangular)、梯形（trapez〇idal)及六角形（hexagonal)。 於部分實施例中，在LED 111 〇、微型顯示器11 3 〇之 間不具有一透鏡的情況下，光學顯示系統仍可根據led 111 〇之表面形狀、將LED 111 〇所射出光線以相當有效率 方式照射於微型顯示器11 3 0的表面之上，而經由LED 111 0 所射出光線是照射於微型顯示器113〇之上，並且LED 1110 所射出光線大致上是相同於微型顯示器11 3 〇的表面形 狀。舉例而言，第2B圖表示一光學顯示系統11 〇2，在LED 111 〇、微型顯示器11 3 0之間不存在有一透鏡的情況下，一 1057-6715-PF 17 200531311 方形LED(square LED) mo是成像於一方形微型顯示器 1 130(square microdisplay)之上。又以第 2C 圖例子，第 2c 圖表示一光學顯示系統1104,其中，在LEDlll〇、微型顯 示器113〇之間不存在有一透鏡的情況下，一矩形 LED(rectangular LED) 111 0可被成像於一矩形微型顯示器 (rectangular micr〇diSplay)之上（具有相同寬度深度比例 (similarly proportioned aspect ratio)) 〇 於特疋貝轭例中，一歪像透鏡（anam〇rphic 可被定 位於LED 1110、微型顯示器mo之間。舉例而言，當led 1110之寬度深度比例於實質上不同於微型顯示器113〇之 寬度深度比例時，則定位於LED1110、微型顯示器1130 之間的歪像透鏡便可根據需求而決定。以第2D圖所示之一 光學顯示系統U06為例子可知，此光學顯示系統11〇6包 括了·於貫質上具有一方形狀表面（substantially squaR shaped surface)、於貫質上具有一方形狀表面之微型顯示器 113〇(例如：寬度深度比例大約為16:9、或大約為4·· 3)， 以及歪像透鏡1120，此歪像透鏡1120設置於LED 111〇、 微型顯不器1130之間。於本實施例中，歪像透鏡於 實質^可將LED 1110戶斤射出錢轉換成為相對應於微 里”、’員不态11 3 0之形狀。因此，藉由增加LED i丨丨〇所射出 之撞擊於微型顯示器1130之表面之光線數量的作用下，光 學顯示系統的效率是可被提高的。 么弟3圖表示一光學顯示系統1200，其中，光學顯示系 統12〇〇包括LED 1110、透鏡112〇及微型顯示器113〇。於 1057-6715-pp 18 200531311 LED 1110之發光表面（Hght emitting surface)具有複數接觸 區（contact regions)，複數電導線（electrical leads)m5 是貼 附於接觸區之上（如下所述）。LED mo是以一距離L3相間 隔於透鏡1120，微型顯示器1130是以一距離L4相間隔於 透鏡1120，並且導線m5阻斷了 [ED 1110之接觸區所射 出的光線。如果於LED 1110之射出光線所撞擊之微型顯示 為1130之表面的所在位置（plane)是與透鏡U2〇的影像平 面之間是相互一致的話，則於微型顯示器U3〇之此一表面 上便會出現一連串的複數暗點（dark sp〇ts)12〇2，這些暗點 1202是相對應於LED m〇之發光表面之接觸區。為了減 少覆蓋於微型顯示器113〇之表面上的暗點12〇2，利用所 選定之距離L3、L4是可使得LED 1110所射出之光線撞擊 在透鏡1120之上，如此使得透鏡丨丨2〇之影像平面、微型 顯示器1130之表面（此為LEDlu〇之射出光線所撞擊之表 面）的所在位置之間不會相互一致（亦即，在透鏡ιΐ2〇的影 像平面LED 1110之射出光線所撞擊於微 的表面之間存在有一…L。在一配置作用下，二0 1110所射出之光線便散焦於微型顯示器、1130之表面（此為 LED 1110之射出光線所撞擊之表面）的所在位置，並且在 此微型顯7F A 113〇之表面上所產生的光線密度（in⑽吻 …㈣是較透鏡112G之影像平面的光線密度更為均勾。 於哪⑴〇與微型顯示器ιΐ3〇之間的總距離― ―⑽）可表示為LED 111 0與透鏡1120之影像平面之間 的距離（L5)加上距離。一 ，杏 两又而σ ，虽利用了加大led1057—6715—PF 15 200531311 degrees. Also, in some embodiments, the light-emitting devices are distributed around a mirror (eg, a dichroic mirrorh, eda m), and the mirror system can be used to determine the + + τ β of the LEDs in the array. The emitted light is combined or reflected. As shown in Figure 1, the light emitted by the LEDs 100 is directly transmitted onto the surface 55. However, the light emitted by the LEDs 100 in some embodiments may be indirect. And spread to the surface 55. In each embodiment, the lighting system 50 includes a single LEE) 100. In addition, in the two or two embodiments, the light emitted by the LEDs 100 is focused on a miniature display ^ (mirxodisplay) (for example, focusing on a light valve, such as a digital light processor (DLP)). In some examples, the light is guided through various lenses and mirrors. Or polarizers (for example, ploadzersK for LCDs). In a specific embodiment, the lines are projected through the primary and secondary lenses, such as lenses or lens groups. In Figure M, an optical display system (optical display system) ii 00 (described below) includes a non-Lambertian LED (n〇n_iambertian LED) mo (described below), a lens 112 and a micro display 1130. The LED 111 is spaced at a distance. The lens 1120 and the micro display 113 are separated by a distance L2 from the lens 1.20. With the proper distance u, L2, the light emitted through the LED 1110 impinges on the lens, and the lens 1120 The image plane is consistent with the surface of the miniature display 1130 that is impacted by the emitted light from the LED 丨 10. 1057-6715-PF 16 200531311 In the above arrangement, the optical display system 11 〇〇 According to the surface shape of the LED 111 (3, the light emitted by the LED 11 10 is irradiated onto the surface of the micro display 1130 in a relatively efficient manner, and the light emitted by the LED 1 11 0 is irradiated on the micro display 1 丨 3 〇 above, the light emitted by the LED 11 10 is roughly the same as the surface shape of the micro display. Take the example of the 邛 division example, the width-depth ratio of the LED 1 1 10 (aspect rat 10) and the micro display 113. The ratio between the width and depth ratio is approximately between 0.5 and 2 (for example, approximately 9/16 to 16/9, approximately 疋 from 3/4 to 4/3, and approximately 丨). For example The width / meter ratio of the micro display 113 can be 1920x1080, 640x4 80, 800x600, 1024x700, 1024x768, 1024x720, 1280x720, 1280x768, 1280x960 or 1280x1064. Generally speaking, the surface of the miniature display 113 and / or the surface of the led 1110 may be a desired shape, such as a square, a circle, a rectangle, a triangle, and a triangle. (triangular), trapezoidal, and hexagonal. In some embodiments, when there is no lens between the LED 111 〇 and the micro display 11 3 〇, the optical display system can still efficiently emit light emitted by the LED 111 〇 according to the surface shape of the LED 111 〇 The method emits light on the surface of the micro display 11 3 0, and the light emitted by the LED 111 0 is irradiated on the micro display 113 °, and the light emitted by the LED 1110 is substantially the same as the surface shape of the micro display 11 3 〇 . For example, FIG. 2B shows an optical display system 11 〇2, in the case where there is no lens between the LED 111 〇 and the micro display 11 3 0, a 1057-6715-PF 17 200531311 square LED Mo is imaged on a square microdisplay 1 130 (square microdisplay). Taking the example of FIG. 2C as an example, FIG. 2c shows an optical display system 1104. In the case where there is no lens between the LED 110 and the miniature display 113, a rectangular LED 111 0 can be imaged on A rectangular miniature display (rectangular micr〇diSplay) (having a similar proportion of aspect ratio). In the case of a special yoke, an anomaly lens (anam〇rphic) can be positioned on the LED 1110, micro Between the display mo. For example, when the width-depth ratio of the led 1110 is substantially different from the width-depth ratio of the micro display 113 °, the anamorphic lens positioned between the LED 1110 and the micro display 1130 can be based on demand. Decision. Taking one of the optical display system U06 shown in Figure 2D as an example, it can be seen that this optical display system 1106 includes a substantially squaR shaped surface on the substrate and a square shape on the substrate. The surface of the miniature display 113 (for example: the width-depth ratio is about 16: 9, or about 4 ... 3), and the distortion lens 1120, this distortion The lens 1120 is disposed between the LED 111 and the miniature display 1130. In this embodiment, the anamorphic lens can convert the light emitted by the LED 1110 into the corresponding micro-mile. The shape of 30. Therefore, the efficiency of the optical display system can be improved by increasing the amount of light emitted by the LED i 丨 丨 〇 and hitting the surface of the micro display 1130. Modi 3 shows an optical The display system 1200, wherein the optical display system 1200 includes an LED 1110, a lens 112, and a micro display 113. At 1057-6715-pp 18 200531311, the Hght emitting surface of the LED 1110 has a plurality of contact regions. ), A plurality of electrical leads (m5) are attached to the contact area (as described below). The LED mo is spaced apart from the lens 1120 by a distance L3, and the micro display 1130 is spaced apart from the lens 1120 by a distance L4. And the wire m5 blocks the light emitted from the contact area of the [ED 1110. If the miniature light impinged by the light emitted from the LED 1110 is shown as the position of the surface 1130 (plane) is with the lens U If the image planes of 20 are consistent with each other, a series of dark spots 122 will appear on this surface of the micro display U30. These dark spots 1202 correspond to the LEDs. The contact area of the light emitting surface of m〇. In order to reduce the dark spots 1202 on the surface of the micro display 113 °, the selected distances L3 and L4 can make the light emitted by the LED 1110 hit the lens 1120, so that the lens 丨 2〇 The positions of the image plane and the surface of the miniature display 1130 (this is the surface impinged by the emitted light from LEDlu0) will not be consistent with each other (that is, the emitted light from the image plane LED1110 of the lens ΐ20 will strike the micro There is a ... L between the surfaces of the lens. Under a configuration, the light emitted by 201110 is defocused to the position of the surface of the microdisplay and 1130 (this is the surface where the emitted light of LED 1110 hits), and The light density on the surface of this miniature display 7F A 113〇 (in⑽Kiss ... ㈣ is more uniform than the light density of the image plane of the lens 112G. The total distance between ⑴〇 and the miniature display ιΐ30. ― ―） Can be expressed as the distance (L5) plus distance between the LED 111 0 and the image plane of the lens 1120. One, two and σ, although the use of enlarged led

1057-6715-PF 19 200531311 1110與微型顯示器113〇之間距離的方式來增加距離 %，雖然可以減少暗點的密度，但是卻也會減少在微型顯 示器1130之表面（此為LED 1110之射出光線所撞擊之表面） 的密度。另一方面，當藉由移動微型顯示器1 130而減少了 LED 1110與微型顯示器113〇之間的距離時，雖然可在透 鏡1120之影像平面上得到較大的密度，但微型顯示器11 3〇 僅會被局部照明。於部分實施例中，AL/I^之絕對值 (absolute value)大約是介於〇〇〇〇〇1至丨（例如：大約是介於 0.00001至（M、大約是介於〇 〇〇〇〇1至〇 〇ι、大約是介於 刪1至0.001或大約是介於〇 〇〇〇〇1至〇 〇〇〇1)。於部分 實施二中’多LEDS(multiple LEDs)是可用來對於單一微型 顯W (例如：具有3χ3矩陣（細士）之LE叫進行照射。因 此，當多LEDs對於單一微型顯示器進行照射時，若其中 之- LEDs故障時，藉由上述系統便可使得系統仍維持於 =用狀態（若是特定LED(particular咖）無法供應光線 k ’則便會產生暗點）。在對於光學顯示系統之設計作用 採用多LEDs對於單一微型顯示器進行照射時， 一 之表面上疋不會產生暗點。舉例而言，每轉 型顯示器被移至影像平面之外 便不會產生暗點。 於咖s之間的區域 =分實施例中，經由對於LEDni〇之接觸區進行適 画的杈汁規劃下，微型顯示器u 接觸區一之上視圖，其中，：二表示…1057-6715-PF 19 200531311 1110 and the micro display 113〇 way to increase the distance%, although it can reduce the density of dark spots, but it will also reduce the surface of the micro display 1130 (this is the light emitted by the LED 1110 The impacted surface). On the other hand, when the distance between the LED 1110 and the micro display 113 ° is reduced by moving the micro display 1 130, although a larger density can be obtained on the image plane of the lens 1120, the micro display 11 3〇 only Will be partially illuminated. In some embodiments, the absolute value of AL / I ^ is between about 0.00001 to 丨 (eg, about 0.00001 to (M, about 0.000). 1 to 00m, approximately between 1 to 0.001, or approximately between 20001 to 20001). In some implementations, 'multiple LEDs (multiple LEDs) are available for a single Miniature display W (for example: LE with 3 × 3 matrix (fine)) is called for irradiation. Therefore, when multiple LEDs are irradiated to a single miniature display, if one of them-LEDs is faulty, the system can be maintained by the above system In the use state (if a specific LED (particular coffee) can not supply the light k ', a dark spot will be generated.) When the design of the optical display system uses multiple LEDs to illuminate a single micro-display, the surface is not Dark spots will be generated. For example, dark spots will not be generated every time the transition display is moved outside the image plane. Area between coffees = In the embodiment, the image is drawn through the contact area for LEDni0. Branch juice plan, miniature U is shown a top view of the contact region, wherein: two indicates ...

Τ 按觸區是沿著LED 1057-6715-ρρ 20 200531311 1Π0之周邊（perimeter)進行設置。在上述配置作用下，不 論疋否具有配置有一透鏡（具有或不具有散焦 (defocusing))，由於可對於光學顯示系統進行設計（例如· 對於微型顯示益11 3 0之表面的面積大小進行適當的士周 整）’則位於微型顯示器11 3 〇之表面上（由LED 111 0之表 面的接觸區所造成）之暗點是相對地具有較小的密度值。上 述方式是同樣可應用在具有多LEDs(例如：具有3χ3矩陣 之LEDs)之光學顯示系統。 以第4B圖為例子，第4B圖表示一光學顯示系統3〇〇。 光學顯示系統300包括了 LED 111〇及微型顯示器ιΐ3〇。 LED 1110包括了一接觸區，此接觸區是由複數導線 所形成。在對於此接觸區之設計作用下，暗點1202所在之 區域（region)是不會成像於微型顯示器113〇的表面之上。Τ The touch area is set along the perimeter of the LED 1057-6715-ρρ 20 200531311 1Π0. With the above configuration, whether or not there is a lens (with or without defocusing), since the optical display system can be designed (for example, the size of the surface area of the micro display is appropriate) The taxi dots) are dark spots on the surface of the micro display 11 3 0 (caused by the contact area of the surface of the LED 111 0) with relatively small density values. The above method is also applicable to an optical display system having multiple LEDs (for example, LEDs with a 3 × 3 matrix). Taking FIG. 4B as an example, FIG. 4B shows an optical display system 300. The optical display system 300 includes an LED 111 and a micro display 30. The LED 1110 includes a contact area formed by a plurality of wires. Under the design of this contact area, the region where the dark spot 1202 is located will not be imaged on the surface of the micro display 113.

於本實施例中，由於暗點是位在微型顯示器ιΐ3〇之表面 位於透鏡1120的影像平面上之成像區域之外側位置上， 此便可使得微型顯示器⑽之表面位於透鏡112〇之影'In this embodiment, since the dark spots are located on the surface of the micro display ιΐ30 and located outside the imaging area on the image plane of the lens 1120, this can make the surface of the micro display ⑽ located on the shadow of the lens 112 ′.

㈠ 上★果LED 111 0之形狀相對應於微型顯示器11: 之形狀，則導線⑴5便可沿著LED uig之周邊而設置1 LED 1110的表面之上。 於本員轭例中，位於LED 111 〇 j 表面之接觸區内邱的 Μ °卩的面積疋相同於微型顯示器1130之^ 面的面積（例如··宽声 見度，木度比例是相同的）。上述方式是斥 樣可應用在具有多 有夕LEDs(例如··具有3x3矩陣之LEDs)之 光學顯示系統。 以第5圖為例子 第5圖表示一光學顯示系統 1 700 °★ The shape of the LED 111 0 corresponds to the shape of the miniature display 11 :, then the wire ⑴5 can be arranged on the surface of the LED 1110 along the periphery of the LED uig. In the example of this yoke, the area of M ° of Qiu located in the contact area of the surface of LED 111 〇j is the same as the area of ^ face of micro display 1130 (for example, the wide sound visibility and the wood ratio are the same ). The above-mentioned method is applicable to an optical display system having multiple LEDs (for example, LEDs with a 3x3 matrix). Take Figure 5 as an example. Figure 5 shows an optical display system 1 700 °

1057-6715-PF 21 200531311 光學顯示系統1700包括了 LED 1110及微型顯示器U3〇。 LED 1110包括了 一接觸區與一均勻機 (hom〇genizer)l7〇2(亦可稱之為一光隧道〇ight她⑽）或導 光管（light pipe))，其中，接觸區是由複數導線lli5所形 成’並且利用均勻機1 702可將LEDs 100所射出之光線導 引至一透鏡1120。在LEDs 1〇〇所射出之光線（偏離於均勻 機 1702 之内側表面（inside surface))之全反射（t〇tai internai reflection)的作用下，於實質上除了可形成具有均勻輸出分 佈（uniform output distribution)的光線之外，同時亦可降低 因導線1115而產生之暗點，於實質上便可利用led "Μ 對於微型顯示器1130進行相當均句的照射（例如：於一影 像平面1131中所產生之一影像（image)於實質上是均勻 的）。 此外，光學顯示系統1700亦可包括了一或多個附加光 學元件（additional optical c〇mp〇nents)。於部分實施例中， 光學顯示系統1700可包括—透鏡，此透鏡是設置於一❹ (path)之上且位於均勾機的前方，如此便可將光線聚声於^ 句機之中。於料實施例中，由於均句機咖之寬度❹ 比例是對應於LED1110之寬度深度比例，當咖mo: 相當接近均句機17G2的方式進行設置時，非必要的附加透 鏡（addhi〇naUenSeS)予被省略的、或是可在均勾機丨7〇2之 前方設置-透鏡的作用下而提高光線搞合於均勾機 的效率。 以第6圖為例子 第6圖表示一光學顯示系統171〇,1057-6715-PF 21 200531311 Optical display system 1700 includes LED 1110 and micro display U30. The LED 1110 includes a contact area and a homogenizer 1702 (also referred to as a light tunnel) or a light pipe. The contact area is composed of a plurality of numbers. The wires 11i5 are formed, and the light emitted from the LEDs 100 can be guided to a lens 1120 by using the homogenizer 1 702. Under the action of totai internai reflection of the light emitted by LEDs 100 (deviation from the inside surface of the homogenizer 1702), in addition to forming a uniform output distribution (uniform output) distribution), and at the same time can reduce the dark spots caused by the lead 1115, in fact, you can use led " M to illuminate the micro display 1130 quite uniformly (for example: in an image plane 1131 An image is generated which is substantially uniform). In addition, the optical display system 1700 may include one or more additional optical elements. In some embodiments, the optical display system 1700 may include a lens. The lens is disposed on a path and is located in front of the homo-hook machine, so that the light can be focused in the sentence machine. In the material example, since the width ❹ ratio of the uniform sentence machine coffee corresponds to the width and depth ratio of the LED1110, when the coffee mo: is set close to the uniform sentence machine 17G2, an unnecessary additional lens (addhionaUenSeS) is set. I omit it, or it can be set in front of the equalizer 丨 7002-the effect of the lens to improve the efficiency of light to the uniform hook machine. Take Figure 6 as an example. Figure 6 shows an optical display system 171〇,

1057-6715-PF 22 200531311 光學顯示系統1710包括了 LED 1110及微型顯示器113〇。 LED 1110包括了一接觸區與一組多透鏡（a set lenses)1712，其中，接觸區是由複數導線1丨15所形成，透 鏡1712是設置於LED 1110、透鏡1120之間，並且透鏡i7i2 之尺寸、形狀及數目（number)是可以變更的。舉例而古， 透鏡1 7 12之數目、尺寸是成比例於LED 111 0之剖面面積 (cross-sectional area)。於部分實施例中，透鏡1712包括大 約介於1至10 0之一組透鏡，例如：此一組透鏡之尺寸範 圍大約是位於1 mm至1 〇 cm。經由led 111 〇所射出之光 線是進入透鏡1712且被折射（refracte(j)的。在具有曲型表 面之透鏡1712的作用下，由於光線是以不同角度進行折 射，如此造成了經由透鏡1712所發出光束之間的重疊。由 於光束的重疊（overlapping)是可降低導線1115所形成之暗 點，於實質上便可利用LED 1110對於微型顯示器113〇進 行相當均勻的照射（例如：於一影像平面u 3 1中所產生之 一影像於實質上是均句的）。 雖然於上述光學顯示系統中均是採用了單一透鏡，但 於部分實施例中是可採用多透鏡（muhiple 10115^)來達到相 同的效果。再者，於特定實施例中亦可採用與上述透鏡 (lens(es))所不同之一或數個光學元件。舉例而言，這些光 子元件了匕括·鏡子（mirr〇rs)、反射器、準直器 (l mators)、光束分離器（beam splitters)、光束結合器 (beam combiners)、雙色向面鏡（dichr〇ic mirrors)、過濾器1057-6715-PF 22 200531311 Optical display system 1710 includes LED 1110 and miniature display 113. The LED 1110 includes a contact area and a set of lenses 1712. The contact area is formed by a plurality of wires 1 丨 15. The lens 1712 is disposed between the LED 1110 and the lens 1120, and the lens i7i2 Size, shape and number can be changed. For example, the number and size of the lenses 1 7 12 are proportional to the cross-sectional area of the LED 111 0. In some embodiments, the lens 1712 includes a group of lenses between about 1 and 100, for example, the size range of this group of lenses is about 1 mm to 10 cm. The light emitted through the led 111 〇 enters the lens 1712 and is refracted (refracte (j). Under the action of the lens 1712 with a curved surface, the light is refracted at different angles. The overlap between the emitted light beams. Because the overlapping of the light beams can reduce the dark spots formed by the wires 1115, the LED 1110 can be used to substantially illuminate the miniature display 113 ° (for example: on an image plane) One of the images produced in u 3 1 is essentially homogeneous.) Although a single lens is used in the above optical display systems, in some embodiments multiple lenses (muhiple 10115 ^) can be used to achieve The same effect. In addition, in specific embodiments, one or more optical elements different from the lens (es) can also be used. For example, these photonic elements are mirrors. ), Reflectors, collimators (l mators), beam splitters, beam combiners, dichromic mirrors, filters

(fllterS)、偏光器（Polarizei*s)、極化光束分離器（p〇larizing 1057-6715-PF 23 200531311 beam splitters)、稜鏡（prisms)、全反射稜鏡（t〇tal internal reflection prisms)、光纖（optical fibers)、導光件（light guides) 及光束均勻機（beam homogenizers)。就如何對於光學顯示 系統内之合適光學元件進行選擇、光學元件之相對應配置 而吕’此相關技術為任何熟習此項技藝者所知悉的。 再者’雖然在上述光學顯示系統中是採用了單一非朗 伯LED，於部分實施例中亦可採用數目大於一個之非朗伯 LED以對於微型顯示器U3〇進行照射。以第7圖為例子， 第7圖表示一光學顯示系統15〇〇，此光學顯示系統15⑽ 包括一藍光發光二極體（blue LED)1410(其為主輸出波長 (dominant output wavelength)約為 450 至 480 nm 之一 LED)、一綠光發光二極體（green LED)142〇(其為主輸出波 長約為500至550 nm之一 LED)及一紅光發光二極體（red LED)143 0(其為主輸出波長約為61〇至65〇 之一 led)， 這些藍光LED 1410、綠光LED 1420、紅光LED 1430是與 微型顯示 1130的表面之間進行光學通信（〇pticai communication)。藍光 LED 141〇、綠光 led i42〇、紅光 LED剛可同時活化、依序活化，或是其中之兩者同時活 化。於其它實施例令，至少一部分的LEDs是可以與微型 顯不裔之個別表面之間進行光學通作。 於部分實施例中，藍光LED 141〇、綠光LED 142〇、 紅光LED M30是以依序方式進行活化。於此類的實施例 中’觀察者（viewer)的眼精通常是維持在藍光led 141〇、 綠光LED 1420、紅光LED 143〇之多彩色（㈣响—㈣ 1057-6715-PF 24 200531311 所產生之複數影像上’並且其亦對於這些影像加以結合。 舉例而言，當一特定像素（particular pixel)(或一組（set 〇f) 像素）或微型顯示（或是一微型顯示之部分）之一晝面（frame)(fllterS), polarizers (Polarizei * s), polarized beam splitters (p〇larizing 1057-6715-PF 23 200531311 beam splitters), prisms, total reflection prisms (t〇tal internal reflection prisms) , Optical fibers, light guides, and beam homogenizers. With regard to how to select the appropriate optical elements in the optical display system and the corresponding configuration of the optical elements, this related technology is known to anyone skilled in the art. Furthermore, although a single non-Lambertian LED is used in the above-mentioned optical display system, in some embodiments, more than one non-Lambertian LED may be used to irradiate the micro-display U30. Take FIG. 7 as an example. FIG. 7 shows an optical display system 150. The optical display system 15 ′ includes a blue light emitting diode (blue LED) 1410 (the dominant output wavelength is about 450). One LED to 480 nm), one green light emitting diode (green LED) 142 (which is one of the main output wavelengths of about 500 to 550 nm) and one red light emitting diode (red LED) 143 0 (its main output wavelength is about one of the LEDs from 61 to 65), these blue LEDs 1410, green LEDs 1420, and red LEDs 1430 are in optical communication with the surface of the miniature display 1130 (〇pticai communication) . The blue LED 141o, the green LED i42o, and the red LED can be activated at the same time, sequentially, or both. In other embodiments, at least a portion of the LEDs may be optically interoperable with individual surfaces of the micro display. In some embodiments, the blue LED 141o, the green LED 142o, and the red LED M30 are sequentially activated. In such embodiments, the viewer's eye essence is usually maintained in multiple colors of blue LED 141 °, green LED 1420, and red LED 143 ° (㈣ 响 —㈣ 1057-6715-PF 24 200531311 The generated plural images are 'and they are also combined. For example, when a particular pixel (or a set of pixels) or a micro display (or part of a micro display) One frame

的顏色被指定為紫色（purple)時，則紅光LED 1430、LED 1410便可在更新周期（refresh cycle)中之適當部分 (appropriate portions)對於微型顯示器之表面進行照射。觀 察者的眼精結合了紅光與藍光且“看到了（sees)” 一紫色微 型顯示（purple microdisplay)。為了使得人類不會察覺到 LEDs 之依序照明（sequential illuminati〇n)，一般是採用了 ’、有適高頻率（aPProPr^ate frequency)(例如：更新率 (refresh rate)大於120Hz)之更新周期來達成。 藍光LED 1410、綠光LED 1420、紅光LED 143〇是可 以改，交其密度及亮度。舉例而言，綠光LED 142〇所具有之 效率是低於紅光LED 1430或藍光LED 141〇所具:之效 率。由於某一特定LED(例如··綠光1^1)142〇)是具有較低 的效率，藉此低效率之LED(例如··綠光咖142〇请射出 之光線（例如··綠光）的顏色便無法輕易地產生高亮度以對 於微型顯示H進行照射。在藉由乡咖之活化周期 ㈣vatl〇n cycles)的調整作用下，如此便可對於多以… 之效率中的差異（disparity)進行補償（基於不同&亮度⑴咖 ^nghtness)之下產生了 一不扭曲影像卜舉例而言，相較於 /、它具有較高效率的LEDs，具有最小效率之咖是可採 ^ ^ ^ (aCtivati〇n ^ ^ 進订配置。於特定實施例中，就取代了 1/3:1/3:i/3之工作 1057-6715-pp 25 200531311 周期配置（dUty cycle ali〇cation)之一紅/綠/藍投影系統 (red/green/blue projection system) , ^ ^ ^ (cycle)^ Λ 率㈣〇)可為 1/6:2/3:1/6 (紅：綠：藍（red:green:Mue))。於 另一實施例中，此周期之比率可為〇.25:〇·45:〇.3〇 (紅：綠： 藍）。於其它實施例中，指定為綠光LED 142〇之活化工作 周期是可更進-步進行提昇。舉例而t，指^為成像於綠 光LED 1420之工作周期大約可增加至4〇%以上（例如：大 約大於45%以上、大約大於5〇%以上、大約大於6〇%以上、 大約大於7G%以上、大約大於8G%以上、大約大於9〇%以 上）。於部分實施例中，各LEDs之工作周期均不相同的。 舉例而言’紅光LED 1430之工作周期是可以大於藍光LED 1410之工作周期。上述所提出之各光學顯示系統中的活化 周期是基於一 LED之密度及/或亮度而被決定，於部分實施 例中之LED的活化周期是可基於一或多個其它參數 (parameters)而被決定。於部分實施例中，發光裝置 emitting device)之活化時間（activati〇n time)是至少約為其 匕發光裝置之活化時間的1 ·25倍（times)(例如：至少約為 1 · 5倍、至少約為2倍、至少約為3倍）。 第8A、8B圖表示基於光學顯示系統172〇之一液晶顯 示器（liquid crystal display (LCD))之一實施例，其中，光學 顯示系統1720包括藍光LED 1410、綠光[ED 1420、紅光 LED 143 0(如上所述），這些藍光LED 141〇、綠光led 1420、紅光LED 1430是與其相關之lcd面板（lcd panels) 1 728、1730、1732的表面之間進行光學通信。另外， 1057-6715-PF 26 200531311 光學顯示系統1720包括複數透鏡1 722、1724與1726，這 些透鏡1722、1724、1726是位於藍光LED 1410/綠光LED 1420/紅光 LED 1430、其相關之 LCD 面板 1 728/1730/1732 之間的一相對光徑（C01TeSp0nding optical path)之上，並且 利用透鏡1722、1724、1726將光線聚焦於與其相關之LCD 面板1728、173 0、1732之上。光學顯示系統1720更包括 一裝置1734(例如：一合光稜鏡（x_cube))，此裝置1734是 用以將來自於LCD面板1728、1730、1732之光線所形成 之多光束進行結合成為一單一光束（single beam) 1736(如箭 頭所述）’此光束1 736可被指向於一投影透鏡（projecti〇n lens) 1 735或其它顯示器。另一方面，光學顯示系統1 720 亦可包括了一偏光器，在利用偏光器對於一所需極化 (desired polarization)(例如：‘p’極化）進行傳送時，同時也 進行另一極化（例如：6s’極化）之反射。偏光器可設置在位 於藍光LED 1410/綠光LED 1420/紅光LED 1430與其相關 之透鏡1722/1724/1726之間、位於藍光LED 1410/綠光LED 1420/紅光 LED 1430 與其相關之 LCD 面板 1 728/1730/1 732 之間的一光徑上，或是偏光器可設置在沿著光徑之其它位 置上。如第8B圖所示，於部分實施例中之一 LED(例如·· 紅光LED 1430)之寬度深度比例是可相對應於上述之微型 顯示器（例如：LCD面板1732)之寬度深度比例。 第9圖表示基於光學顯示系統1750之一數位光處理器 (DLP)之一實施例’其中，光學顯示系統1 75 〇包括藍光led 1410、綠光LEd 1420、紅光LED 1430(如上所述），這些藍 1057-6715-PF 27 200531311 光LED 1410、綠光LED 1420、紅光LED 1430是與其相關 之透鏡1722、1724、1726的表面之間進行光學通信。由藍 光LED 1410、綠光LED 1420、紅光LED 1430所射出之光 線通過了與其相關之透鏡1722、1724、1726且經由一裝置 173 4(例如：一合光稜鏡）所收集，此裝置1734是用以將來 自於藍光LED 1410、綠光LED 1420、紅光LED 1430所射 出之光線所形成之多光束進行結合成為一單一光束，此光 束可被指向於一全反射稜鏡（total internal reflecti〇n (TIR)When the color is designated as purple, the red LEDs 1430 and 1410 can illuminate the surface of the micro display at appropriate portions of the refresh cycle. The observer's eye essence combines red and blue light and "sees" a purple microdisplay. In order to prevent humans from perceiving sequential illumination of LEDs, an update period with a proper frequency (aPProPr ^ ate frequency) (for example: refresh rate greater than 120Hz) is generally used. To reach. The blue LED 1410, the green LED 1420, and the red LED 143〇 can be changed to give the density and brightness. For example, the efficiency of the green LED 1420 is lower than that of the red LED 1430 or the blue LED 1410. Since a certain LED (for example, green light 1 ^ 1) 142〇) has lower efficiency, the LED with low efficiency (for example, green light 142) please emit light (for example, green light ) Color can not easily produce high brightness to illuminate the micro display H. Under the adjustment of the activation cycle of the local coffee (咖 vatl〇n cycles), this can be more effective for the difference in efficiency (disparity) ) Compensation (based on different & brightness ^ nghtness) produces an undistorted image. For example, compared to /, it has higher efficiency LEDs, the least efficient coffee is available ^ ^ ^ (aCtivati〇n ^ ^ custom configuration. In a specific embodiment, it replaces the work of 1/3: 1/3: i / 3 1057-6715-pp 25 200531311 dUty cycle ali cation) A red / green / blue projection system (red / green / blue projection system), ^ ^ ^ (cycle) ^ Λ rate ㈣〇) can be 1/6: 2/3: 1/6 (red: green: blue ( red: green: Mue)). In another embodiment, the ratio of this period may be 0.25: 45 · 45: 0.30 (red: green: blue). In other embodiments, the activation duty cycle designated as green LED 142 may be further improved. For example, t means that the duty cycle of imaging on the green LED 1420 can be increased to about 40% or more (for example, about 45% or more, more than 50% or more, about 60% or more, or about 7G or more) % Or more, more than about 8G% or more, or more than 90% or more). In some embodiments, the duty cycles of each LEDs are different. For example, the duty cycle of the 'red LED 1430' can be greater than the duty cycle of the blue LED 1410. The activation period in each of the optical display systems proposed above is determined based on the density and / or brightness of an LED. In some embodiments, the activation period of an LED can be determined based on one or more other parameters. Decide. In some embodiments, the activation time of the light emitting device is at least about 1.25 times (e.g., at least about 1.5 times, At least about 2 times, at least about 3 times). 8A and 8B show an embodiment of a liquid crystal display (LCD) based on an optical display system 1720, wherein the optical display system 1720 includes a blue LED 1410, a green LED [ED 1420, a red LED 143 0 (as described above), these blue LEDs 1410, green LEDs 1420, and red LEDs 1430 are in optical communication with the surfaces of LCD panels 1 728, 1730, and 1732 associated with them. In addition, the 1057-6715-PF 26 200531311 optical display system 1720 includes a plurality of lenses 1 722, 1724, and 1726. These lenses 1722, 1724, and 1726 are located at the blue LED 1410 / green LED 1420 / red LED 1430 and related LCDs. A relative optical path (C01TeSp0nding optical path) between panel 1 728/1730/1732, and the lenses 1722, 1724, 1726 are used to focus light on the related LCD panels 1728, 1730, 1732. The optical display system 1720 further includes a device 1734 (for example, an x-cube). This device 1734 is used to combine multiple light beams formed by the light from the LCD panels 1728, 1730, and 1732 into a single unit. Single beam 1736 (as indicated by the arrow) 'This beam 1 736 may be directed at a projection lens 1 735 or other display. On the other hand, the optical display system 1 720 may also include a polarizer. When the polarizer is used to transmit a desired polarization (for example, 'p' polarization), the other pole is also performed. (Eg 6s' polarization) reflection. The polarizer can be placed between the blue LED 1410 / green LED 1420 / red LED 1430 and its associated lens 1722/1724/1726, and the blue LED 1410 / green LED 1420 / red LED 1430 and its associated LCD panel. 1 728/1730/1 732, or the polarizer can be placed at other positions along the optical path. As shown in FIG. 8B, the width-to-depth ratio of one of the LEDs (for example, the red LED 1430) in some embodiments may correspond to the width-to-depth ratio of the aforementioned micro-display (for example, the LCD panel 1732). FIG. 9 shows an embodiment of a digital light processor (DLP) based on an optical display system 1750, wherein the optical display system 1750 includes a blue LED 1410, a green LED 1420, and a red LED 1430 (as described above). These blue 1057-6715-PF 27 200531311 light LEDs 1410, green LEDs 1420, and red LEDs 1430 are in optical communication with the surfaces of their associated lenses 1722, 1724, and 1726. The light emitted by the blue LED 1410, the green LED 1420, and the red LED 1430 passes through the associated lenses 1722, 1724, 1726, and is collected by a device 1734 (eg, a light unit). This device 1734 It is used to combine the multiple beams formed by the light emitted from the blue LED 1410, the green LED 1420, and the red LED 1430 into a single beam. This beam can be directed at a total internal reflection. 〇n (TIR)

Prisms)1752。舉例而言，由合光稜鏡1734所發出之光線是 可經由一鏡子1754或其它裝置（例如：光導件）而被指向於 TIR稜鏡1 752,並且藉由TIR稜鏡1752反射光線且將光線 指向於一 DLP面板1 756。DLP面板1750包括複數鏡子， 藉由這些鏡子之活化作用下是可以產生一特定影像。舉例 而言，光線1760(如箭頭所述）可經由一特定鏡子之反射而 被指向至一投影透鏡（projecti〇n)1 755，或是可以利用此特 定鏡子將光線反射遠離於投影透鏡1 755。在藍光LeD ι41〇/Prisms) 1752. For example, the light emitted by Heguang 稜鏡 1734 can be pointed at TIR 稜鏡 1 752 through a mirror 1754 or other device (such as a light guide), and the light is reflected by TIR 稜鏡 1752 and the The light is directed at a DLP panel 1 756. The DLP panel 1750 includes a plurality of mirrors, and a specific image can be generated by the activation of these mirrors. For example, the light 1760 (as indicated by the arrow) can be directed to a projection lens 1 755 through the reflection of a specific mirror, or the specific mirror can be used to reflect the light away from the projection lens 1 755 . LeD ι41〇 /

、、亲光 LED 1420/紅光 LED 1430 之組合（combination)、DLPCombination of DLP and LED 1420 / Red LED 1430 (combination), DLP

面板1 756的作用下是可得到對於信號之較佳控制。舉例而 a ’除了可利用DLP面板1756中之鏡子以降低傳送至DLP 面板1 756之資料量之外，藉由對於藍光LED ι41〇、綠光 LED 142〇、紅光LED 143〇之進行開啟（〇n)與關閉㈧ff)之切 換作用下亦可降低傳送至DLp面板i 7 5 6之資料量。舉例 而a ’如果在一特定影像中不需要紅色時，則紅光led 1430可被關閉，如此便可不必經由傳送一信號至DLp面板 1057-6715-PF 28 200531311 1 756以對於其相關之鏡子進行切換。針對leds進行調變 的月b力疋可以增加顏色品質（c〇l〇r qUaHty)、影像品質 (image quality)或對比（contrast)。 第1 0圖表示基於光學顯示系統1 77〇之一矽液晶顯示 面板（liquid crystal on SiliC0n (LCOS) panel)之一實施例， 其中’光學顯示系統1770包括藍光LEd i4i〇、綠光LED 1420、紅光LED 1430(如上所述），這些藍光[ED 1410、綠The control of the panel 1 756 can obtain better control of the signals. For example, a 'in addition to using the mirror in the DLP panel 1756 to reduce the amount of data transmitted to the DLP panel 1 756, it is turned on by the blue LED 410, the green LED 142, and the red LED 143 ( 〇n) and the switch ㈧ff) can also reduce the amount of data transmitted to the DLp panel i 7 56. For example, if a red is not needed in a particular image, the red led 1430 can be turned off, so that it is not necessary to send a signal to the DLp panel 1057-6715-PF 28 200531311 1 756 for its related mirror Make the switch. Adjusting the brightness of the LEDs can increase color quality (collar qUaHty), image quality, or contrast. FIG. 10 shows an embodiment of a liquid crystal on silicon (LCOS) panel based on the optical display system 770. The optical display system 1770 includes a blue LED LE4i0, a green LED 1420, Red LED 1430 (as described above), these blue lights [ED 1410, green

光LED 1420、紅光LED 1430是與其相關之極化光束分離 器1774、1778、1782之間進行光學通信。由藍光LED 141〇、 綠光LED 1420、紅光LED 1430所射出之光線通過了與其 相關之極化光束分離器1774、1778、1782且被投射至與其 相關之一 LCOS面板1772、1776或1780之上。由於LCOS 面板1 772、1776、1780對於所有光線之極化是不具有敏感 性的’在基於LCOS面板1772、1776、1780之敏感度 (sensitivity)之下，極化光束分離器m4、1778、ι782將光 線極化成為一特定極化（particular p〇larizati〇n)(例如：傳送 一所需極化（例如：‘p’極化）且同時也進行另一極化（例如： ‘s’極化）且傳送其它極化）。一裝置ι734(例如：一合光稜鏡 (x_cube))係用以收集經由LCOS面板1772、1776、1780所 反射的光線’藉由此裝置1734將來自於lcos面板1772、 1776、1780之光線之光束結合成為一光束179〇(如箭頭所 述）’此光束1790可被指向於一投影透鏡1795。 雖然上述之各實施例中之光學顯示系統包括了紅光 LED、綠光LED、藍光LED，然其並非用以限制本發明， 1057-6715-PF 29 200531311 其它任何顏色及其組合亦可被採用。舉例而言，光學顯示 系統之顏色的種類是可不僅限於三種，其它例如黃色 (yellow)亦可被採用且配置成為工作周期之一部分。另二方 面具有主輸出波長之多LEDS是可經由光學結合的方式 以產生一合成顏色（resulting color)。舉例而言，一藍光 LED(例如··具有一主輸出波長之一 led，其主輸出波長是 介於藍光波長、綠光波長之間）可與黃光LED結合而產生 一綠光（‘green，nght)。一般而言，LEDs的數目及各led之 顏色可根據需求而定。此外，光學顯示系統亦可包括了附 加被型顯示益（additional microdisplay)。 於部分實施例中，具有較小效率之LED(例如··綠光 LED)之工作周期是可經由各種資料壓縮技術與算術 compression techniques and algorithms)而提高。舉例而言， 當利用僅對於前一影像（previ〇us image)之影像資訊 information)之差異的傳送方式、取代了對於重建各影像所 需之全部資訊的送方式之作用下，資料速率（data rate)便可 被有效提昇。在上述方法的作用下，利用少量資料的傳送 下便可達到較高的資料速率，並且使得一給定更新周期 (given refresh cycle)之補色（complementary colors)可具有 縮減工作周期（reduced duty cycles)。 雖然在上述實施例中是採用多LEDs對於一給定微型 顯示器（given microdisplay)進行照明，但光學元件（optical componentry)是不一定要沿著一或更多LEDs與微型顯示 裔之間的光徑進行設置。舉例而言，一合光稜鏡或一組雙 1057-6715-PF 30 200531311 色向面鏡是用以將來自於多LEDs之光線結合至—單—微 型顯示器。於部分實施例中，光學元件是沿著光徑進行： 置，而不同的光學元件是可設計應用在各led(例如：如= LEDs之表面具有不同尺寸及形狀）之中，或是相同的^學 元件可設計應用在至少一 led之中。 於部分實施例中’就基於—影像之所需色度 (chr麵aticity)《一特定顏色之所需不同亮度（differi= brightness)而言，其可利用所配置之特定LED對於顯示器 進行一部分之活化時間的照射而得。舉例而言，當為了# 得深藍（intense blue)，藍光LED便必須在整個活化時間= 進行活化；當為了獲得弱深藍（less intense Mue)時，則藍 光LED僅須在部分之整個配置活化時間（t〇tal aii〇cated activation time)内進行活化。舉例而言，利用一組鏡子是可 對於顯示器進行照明之部分的活化時間進行調變，其中， 鏡子的定位方式是根據將光線傳送至微型顯示器或將光線 反射遠離於微型顯示器而決定。 於特定實施例中，成陣列狀之可移動微型顯示器 (movable miCr〇disPlay)(例如：一可移動鏡子（m〇vable mirror))可經由活化處理以產生一所需密度（七士以 intensity)。舉例而言，利用各微型反射鏡（micr_irr〇r)可 表現出一像素’並且根據微型顯示器之定位（p〇siti〇ning) 方式疋可決定出像素的密度。舉例而言，微型反射鏡可處 於開啟狀態（on state)或關閉狀態（off state)，並且就led之 一特疋顏色之活化時間而言，其開啟狀態下所佔用之時間The light LED 1420 and the red light LED 1430 perform optical communication between the polarized beam splitters 1774, 1778, and 1782 associated with them. The light emitted by the blue LED 141, the green LED 1420, and the red LED 1430 passes through the polarized beam splitters 1774, 1778, and 1782 associated with them and is projected onto one of the LCOS panels 1772, 1776, or 1780 associated with them. on. Because the LCOS panels 1 772, 1776, and 1780 are not sensitive to the polarization of all light's, under the sensitivity of the LCOS panels 1772, 1776, and 1780, the polarization beam splitter m4, 1778, ι782 Polarize light into a particular polarization (particular p〇larizati〇n) (eg: transmit a desired polarization (eg: 'p' polarization) and also perform another polarization (eg: 's' polar ) And transmit other polarizations). A device ι734 (e.g., a light beam (x_cube)) is used to collect the light reflected by the LCOS panels 1772, 1776, 1780. By this device 1734, the light from the lcos panels 1772, 1776, 1780 will be collected. The light beams are combined into a light beam 179 (as indicated by the arrow). 'This light beam 1790 may be directed at a projection lens 1795. Although the optical display system in each of the above embodiments includes a red LED, a green LED, and a blue LED, it is not intended to limit the present invention. 1057-6715-PF 29 200531311 Any other colors and combinations thereof may be used. . For example, the types of colors of the optical display system are not limited to three, and other colors such as yellow can also be adopted and configured as part of the work cycle. On the other hand, many LEDS with a main output wavelength can be optically combined to produce a result color. For example, a blue light LED (for example, a led with one of the main output wavelengths whose main output wavelength is between blue and green wavelengths) can be combined with a yellow LED to produce a green light ('green , Nght). In general, the number of LEDs and the color of each LED can be determined according to demand. In addition, the optical display system may include additional microdisplays. In some embodiments, the duty cycle of LEDs with lower efficiency (for example, green LEDs) can be improved through various data compression techniques and algorithms. For example, when using a transmission method that differs only for the image information of the previous image (previous image), instead of sending information for all the information needed to reconstruct each image, the data rate (data rate) can be effectively improved. Under the effect of the above method, a higher data rate can be achieved with a small amount of data transmission, and the complementary colors of a given refresh cycle can have reduced duty cycles. . Although multiple LEDs are used to illuminate a given microdisplay in the above embodiment, the optical componentry does not necessarily follow the light path between one or more LEDs and the microdisplay Make settings. For example, a combined light box or a set of dual 1057-6715-PF 30 200531311 color mirrors is used to combine light from multiple LEDs into a -single-micro display. In some embodiments, the optical components are arranged along the optical path, and different optical components can be designed and applied in each LED (for example, the surfaces of LEDs have different sizes and shapes), or they are the same. The learning element can be designed and applied in at least one LED. In some embodiments, 'based on the required chromaticity of the image (chr plane aticity)' and the required different brightness (differi = brightness) of a specific color, it can use the configured specific LED to perform a part of the display. Derived from the activation time. For example, when #intense blue is used, the blue LED must be activated at the entire activation time =; when in order to obtain less intense blue, the blue LED needs to be activated at only part of the entire configuration. (Total aiiocated activation time). For example, a set of mirrors can be used to adjust the activation time of the portion of the display that is illuminated. The positioning of the mirrors is determined by transmitting light to the micro display or reflecting light away from the micro display. In a specific embodiment, an array of movable microdisplays (for example, a movable mirror) can be activated to generate a desired density (intensity). . For example, each micro-mirror (micr_irr〇r) can express a pixel ', and the density of the pixel can be determined according to the positioning method of the micro-display. For example, a micro-mirror can be in an on state or an off state, and in terms of the activation time of a particular color of the LED, the time it takes in the on state

1057-6715-PF 31 200531311 比例是可用以決定影像之密度。 就上述實施例中之多LEDs而言，其所使用之一或多 個LEDs(例如：各LED)所具有之寬度深度比例是相對於微 型顯示器11 3 0之寬度深度比例。 第11圖表示一光學顯示系統1600。光學顯示系統1600 包括LED 1110、微型顯示器1130、一冷卻系統（cooling system) 1 5 1 0 及一感測器（sensor) 1 520，其中，感測器 1 520 可分別與 LED 1110 之間進行熱傳送（thermal communication)、與冷卻系統 1510之間進行電傳送 (electrical communication)。因此，在光學顯示系統 16〇〇 之使用過程中，感測器1 520、冷卻系統1 5 1 〇可用以調節 LED 1110之溫度。舉例而言，當LED 1110為LEDs中之 一相對大型LED時（如下所述），此LED是可以產生相當多 的熱量（heat)。如第11圖之利用感測器1520且藉由冷卻系 統1 5 1 0對於LED 111 0進行冷卻的配置作用下，輸入至led 1110的功率值（amount 〇f power)更可被提高（主要是針對較 南驅動電流（higher drive currents)下之操作效率 (operational efficiency)進行提高），同時對於 LED 1ιι〇 造 成損壞的可能性亦可被降低。冷卻系統可包括致冷器 (thermal electric coolers)、風扇（fans)、熱管（heatpipes)及 /夜悲政熱糸統（liquid cooling systems)。舉例而言，感測哭 15 20疋可利用手動方式或電腦（c〇mputer)來進行控制。於 部分實施例中，光學顯示系統是可不必包含有感測器（例 如：冷卻系統1510可永久處於開啟狀態（pemanentiy 〇n) 1057-6715-PF 32 200531311 或藉由手動方式進行控制）。在冷卻系統的作用下，除了可 以降低因過剩溫度（excess temperature)所可能造成LED的 才貝壞之外’同時可在較高驅動電流下提高LED之操作效 率。此外，藉由冷卻系統亦可減少因溫度所造成之波長變 化（shift)。 於部分實施例中，非朗伯LED是會造成光線之不均勻 角为佈（non-uniform angular distribution)的情況發生。在此 類型之實施例中，在藉由將微型顯示器以遠離於影像平面 進行移動下，光線之不均勻角分佈的情況便可被降低。於 特定實施例中，利用電性或光學方式連接（electrical 〇r optical connection)的作用下，資訊流（informati(m n〇w)便 可被傳輸至微型顯示器之中。於部分實施例中，利用光學 連接方式是可以提高資訊流率。 於部分實施例中，PLLED或其它非朗伯光源 (norMambertian source)的尺寸是可被降低，並且其所發出 光線可以一較小角度（small angle)進行集中，藉此以增加呈 現於顯示器之影像的亮度。 第12圖表示一 LED 1〇〇之側視圖，此LED 1〇〇具有 一封裝晶粒（package die)之型式。LED 100包括一多重推疊 層（multi-layer stack) 122，此多重推疊層122是設置於一基 座（submount) 120之上。多重推疊層！ 22包括了具厚度為 320nm之一石夕晶摻雜（η-摻雜）氮化鎵層（n-摻雜 doped (n-doped) GaN layer)134，於矽晶摻雜（n-摻雜）氮化 鎵層134之頂面（upper surface)l 10具有複數開孔 1057-6715-PF 33 200531311 (〇peniiigS)150所構成之一圖樣（pattern)。此外，多重推疊 層122亦包括了一結合層（bonding layer)124、厚度為l〇〇nm 之銀層（silver layer) 1 26、厚度為40 nm之一鎂摻雜（pj參雜） 氮化叙層（magnesium doped，（p-doped) GaN layer)128、厚 度為 120 nm 之一光產生區域（Hght-generating region)13〇， 於光產生區域130上形成有多重氮化銦鎵/氮化鎵量子井 (multiple InGaN/GaN quantum wells);以及一氮化鋁鎵層 (AlGaN layer)132。一 n 邊接觸墊（n_side c〇ntact pad)136 係設置於矽晶摻雜（n-摻雜）氮化鎵層134之上，並且一 p 邊接觸墊（p-side contact pad) 138係設置於銀層126之上。 封膠材料層（encapsulant material)(具有折射率（index 〇f refraction)為1.5之環氧樹脂（ep〇xy)) 1 44係位於石夕晶摻雜 (η备雜）氮化叙層134、一蓋玻片（cover s!ip)i4〇與複數支 承構件（suPP〇rts)142之間。封膠材料層144並沒有延伸至 各開孔150之中。 以下將針對LED 1〇〇所產生之光線（light)提出說明。 相對於η邊接觸墊136，p邊接觸墊138係處於正電位 (P Potential) ’ 如此將導至電流（electrical current)輸 入至LED 1〇〇之中。當電流通過了光產生區域13〇時，由 矽晶摻雜（η-摻雜）氮化鎵層134所發出的電子（electr〇ns)與 來自鎂摻雜摻雜）氮化鎵層128之孔洞（holes)便共同在 光產生區域130之上結合，如此便可在光產生區域130產 生了光線。此外’於光產生區域13〇中包含了大量的點偶 木幸田射源（point dip〇le ra(jiation sources)，在點偶極輻射源 1057-6715-pf 34 200531311 之作用下，由光產生區域1 3 0所產生之光線（例如：等向性 (isotropically))便可具備有光產生區域130之製成材料之光 線波長之光譜（spectrum)的特性。在InGaN/GaN量子井的 作用下，如此便可經由光產生區域130而產生出具有約445 奈米（namomewters (nm))之尖峰波長（peak wavelength)、約 30 nm 之半高全寬（full width at half maximum)(FWH]Vl)之光 線波長的光譜。 值得注意的是，在相較於矽晶摻雜（η-摻雜）氮化鎵層 134中之載子（charge carriers)之下，鎂摻雜（ρ_摻雜）氮化鎵 層1 28係相對地具有較低的載子移動率。如此一 來，藉由將銀層126(為導電的）以沿著鎂摻雜（p-摻雜）氮化 叙層128之表面進行設置的作用下，由p邊接觸墊Mg至 鎂摻雜（P-摻雜）氮化鎵層128、光產生區域130之電荷注入 (charge injection)的均勻度（uniformity)是可以有效地被提 高的，同時亦可減少1^〇1〇〇之電阻（616(^1(^11^4以11(：6) 及/或提尚LED 100之注入效率（injecti〇n efficiency)。此 外，由於矽晶摻雜（n-摻雜）氮化鎵層134具有較高之載子移 動率（carrier mobility)，則電子便可自η邊接觸墊136而快 速通過氮化鋁鎵層132、矽晶摻雜（η-摻雜）氮化鎵層134， 於只質上便可使得在產生區域13〇之中、且通過產生區域 13 0之任何位置上的電流也、度（(：111^加心1]^1^)處於均勻狀 態。再者，由於銀層126具有相對較高的導熱性^以加“ conductivity)，如此便可藉由銀層做為led ι〇〇之熱 沈（heat sink)(將熱量經由多重推疊層122、以垂直的方式而 1057-6715-PF 35 200531311 傳遞至載具120)。 由光產生區域1 3 0所產生之至少一部分的光線係可被 導引至銀層126之上。隨後，經由銀層126所反射的光線 係可經由矽晶摻雜（η-摻雜）氮化鎵層134之上表面110、朝 向LED 100之外部發出，或是銀層126所反射之光線係可 經由LED 100中之半導體材料（seiniconductor material)吸 收而形成了 一孔洞對（electron-hole pair)，並且在孔洞對於 光產生區域130之中進行結合的作用下，則於光產生區域 130中便可產生光線。同樣地，由光產生區域13〇所產生 之部分的光線係可被導引至n邊接觸墊136，並且藉由η 邊接觸墊136之底側（underside)的製成材料（material)(例 如·鈦（Ti)/铭（A1)/鎳（Ni)/金（Au))係對於光產生區域130所 產生之至少一部分的光線進行反射。因此，被導引至η邊 接觸墊13 6的光線係可經由η邊接觸墊1 3 6進行反射，並 且經反射後的光線係可經由矽晶摻雜（η-摻雜）氮化鎵層 134之上表面11〇(例如··來自於銀層126所反射）、朝向LED 100之外部發出，或是被導引至η邊接觸墊136、且由11邊 接觸墊136所反射之光線係可經由LED 100中之半導體材 料吸收而形成了一孔洞對，並且在孔洞對於光產生區域i 3 〇 之中進行結合的作用下，則於光產生區域1 3 〇中便可產生 光線（例如··藉由或不必藉由銀層126所反射）。 如第12、13圖所示，LED 100之表面11〇並非平坦狀， 於此表面11 0上包括了由複數開孔1 50所構成之修正三角 形圖樣（modified triangular pattern)。一般而言，開孔 15〇 1057-6715-PF 36 200531311 之深度（depth)可為任意值，並且開孔15〇之直徑、相鄰開 孔1 50之最近間隔（nearest spacing)是可以任意改變的。除 非可由其它方式加以註解，否則以下便採用數值計算 (numerical calculations)之結果而對於各圖式進行清楚說 明：開孔150的深度146約為280 nm;非零直徑（n〇n_zer〇 diameter)約為160 nm ;相鄰開孔150之最近間隔約為22〇 nm;以及折射率為1〇。由於三角形圖樣係經過了調變處 理，於相鄰圖樣150之最近中心間距（center_t〇_center distance)的大小係介於（a-Aa)與（a + Aa)之間，其中，“&，，係表 示二角形圖樣之晶格常數（lattice constant)，“△&，，係表示具 有長度之尺度（dimensions of length)的調變參數（detuning parameter)，於此之調變係可根據任意方向 directions)而得。為有效提高LED 1〇〇所發出之光引出量 (light extraction)(請參閱以下說明），調變參數係約為理 想晶格常數a之至少i%(one percent)(例如：至少約為2%、 至少約為3%、至少約為4。/。、至少約為5%)，並且/或最多 約為理想晶格常數之25%(例如：最多為2〇%、最多為15%、 最多為10%)。於部分實施例中，相鄰圖樣15〇之最近中心 間距係可採用介於（a-Aa)與（a+Aa)之間的任意值，於實質上 便可對於圖樣1 5 0進行任意的調變。 基於複數開孔1 50所構成之修正三角形圖樣可知，藉 由非零調變參數係可提高LED 1〇〇之引出效率。請參閱第 14圖，基於上述之關於LED1〇〇的說明可知，當調變參數 △ a由零（Zero)增加至〇.15a左右時，於LED 1〇〇中之電磁 1057—6715—PF 37 200531311 場（electromagnetic fields)之數學模型（numerical modeling)(將於下文中提出說明）中所示之發光裝置的引出 效率係由0.60增加至0.70。 於第14圖中，引出效率係經由三維有限差分時域 (FDTD)法（three-dimensional finite-difference time-domain (FDTD) method)以估算出在馬克士威方程（Maxwell’s equations)下之LED 100之内部光線、外側光線之大小。舉 例而 a · K.S. Kunz and R.J. Luebbers，The Finite-Difference Time-Domain Methods (CRC，Boca Raton，FL，1993)、A.1057-6715-PF 31 200531311 The ratio is used to determine the density of the image. For the multiple LEDs in the above embodiment, the width-depth ratio of one or more LEDs (e.g., each LED) used is relative to the width-depth ratio of the micro display 1 130. FIG. 11 shows an optical display system 1600. The optical display system 1600 includes an LED 1110, a micro display 1130, a cooling system 1 5 1 0, and a sensor 1 520. Among them, the sensor 1 520 and the LED 1110 can be heated separately. Thermal communication and electrical communication with the cooling system 1510 are performed. Therefore, during the use of the optical display system 160, the sensor 1 520 and the cooling system 15 10 can be used to adjust the temperature of the LED 1110. For example, when LED 1110 is one of the relatively large LEDs of LEDs (as described below), this LED can generate a considerable amount of heat. As shown in Figure 11, using the sensor 1520 and cooling the LED 111 0 by the cooling system 1 5 1 0, the power value (amount 0f power) input to the led 1110 can be further improved (mainly To improve the operational efficiency at higher drive currents, the possibility of damage to the LEDs can also be reduced. Cooling systems may include thermal electric coolers, fans, heatpipes, and liquid cooling systems. For example, sensing cry 15 20 哭 can be controlled manually or by a computer (commputer). In some embodiments, the optical display system does not need to include a sensor (for example, the cooling system 1510 may be permanently on (pemanentiy ON) 1057-6715-PF 32 200531311 or controlled manually). Under the effect of the cooling system, in addition to reducing the LED's failure due to excess temperature, it can also improve the operating efficiency of the LED at a higher driving current. In addition, the cooling system can also reduce the wavelength shift caused by temperature. In some embodiments, non-Lambertian LEDs can cause non-uniform angular distribution of light. In this type of embodiment, the uneven angular distribution of light can be reduced by moving the microdisplay away from the image plane. In a specific embodiment, using an electrical or optical connection, an information stream (informati (mn〇w)) can be transmitted to the micro-display. In some embodiments, the use of The optical connection method can improve the information flow rate. In some embodiments, the size of the PLLED or other non-Lambertian source can be reduced, and the light emitted by it can be concentrated at a small angle. In order to increase the brightness of the image presented on the display, FIG. 12 shows a side view of an LED 100, which has a package die type. The LED 100 includes a multiple push A multi-layer stack 122, which is disposed on a submount 120. The multi-layer stack 22 includes a crystalline silicon doped (η- A doped (n-doped) GaN layer 134 has a plurality of upper surfaces on the silicon doped (n-doped) gallium nitride layer 134. 1057-6715-PF 33 200531311 (〇pe niiigS) 150 is a pattern. In addition, the multiple push stack 122 also includes a bonding layer 124, a silver layer with a thickness of 100 nm 1 26, and a thickness of 40. One nm doped magnesium (p-doped) nitride doped (p-doped) GaN layer 128, 120 nm thickness Hght-generating region 13 °, in light generation Multiple InGaN / GaN quantum wells are formed on the region 130; and an aluminum gallium nitride layer (AlGaN layer) 132. An n-side contact pad 136 is disposed on the silicon-doped (n-doped) gallium nitride layer 134, and a p-side contact pad 138 is disposed on the silver layer 126. The sealant material layer ( encapsulant material) (epoxy resin with a refractive index (index 〇f refraction) of 1.5) 1 44 is located in Shi Xijing doped (η prepared) nitride layer 134, a cover glass ( cover s! ip) i4〇 and a plurality of support members (suPP〇rts) 142. The sealant material layer 144 does not extend into each of the openings 150. The following will describe the light generated by the LED 100. Relative to the n-side contact pad 136, the p-side contact pad 138 is at a positive potential (P Potential) ', so that an electrical current is input into the LED 100. When a current passes through the light-generating region 13o, the electrons (electrns) emitted by the silicon-doped (η-doped) gallium nitride layer 134 and the The holes are combined on the light generating region 130 together, so that light can be generated in the light generating region 130. In addition, a large number of point dipola ra (jiation sources) are contained in the light generating region 13 and are generated by light under the action of the point dipole radiation source 1057-6715-pf 34 200531311. The light (eg, isotropically) generated by the region 1 30 can have the spectrum characteristic of the wavelength of the light produced by the light-generating region 130. Under the action of the InGaN / GaN quantum well , So that a light having a peak wavelength of about 445 nanometers (namomewters (nm)) and a full width at half maximum (FWH) Vl) of about 30 nm can be generated through the light generating region 130. The spectrum of the wavelength of light. It is worth noting that compared to the charge carriers in the silicon-doped (η-doped) gallium nitride layer 134, magnesium is doped (ρ_doped) with nitrogen. The gallium layer 1 28 has relatively low carrier mobility. In this way, the silver layer 126 (which is conductive) is nitrided along the magnesium doped (p-doped) layer 128 Under the effect of surface setting, from p-side contact pad Mg to magnesium doped (P-doped) gallium nitride layer 128. The uniformity of charge injection in the light generating region 130 can be effectively improved, and at the same time, the resistance of 1 ^ 〇100 can be reduced (616 (^ 1 (^ 11 ^ 4 to 11 (: 6) and / or injection efficiency of LED 100. In addition, the silicon-doped (n-doped) gallium nitride layer 134 has a higher carrier mobility. mobility), the electrons can quickly pass the aluminum gallium nitride layer 132 and the silicon-doped (n-doped) gallium nitride layer 134 from the n-side contact pad 136, so that the region 13 can be generated on the substrate 〇, and the current passing through any position in the region 130 is also in a uniform state (degrees: (: 111 ^ plus heart 1) ^ 1 ^). Furthermore, because the silver layer 126 has a relatively high thermal conductivity ^ "Conductivity" is added, so that the silver layer can be used as a heat sink for the LED ι〇〇 (the heat is transferred through the multiple push stacking 122 in a vertical manner 1057-6715-PF 35 200531311 To carrier 120). At least a portion of the light generated by the light generating area 130 can be directed onto the silver layer 126. Subsequently, The light reflected by the silver layer 126 may be emitted through the upper surface 110 of the silicon-doped (η-doped) gallium nitride layer 134 toward the outside of the LED 100, or the light reflected by the silver layer 126 may be transmitted through the LED The semiconductor material (100) in the 100 absorbs to form an electron-hole pair, and when the holes combine with the light-generating region 130, light can be generated in the light-generating region 130 . Similarly, a part of the light generated by the light generating region 13 can be guided to the n-side contact pad 136, and a material (for example, an underside) of the n-side contact pad 136 (for example, Titanium (Ti) / Ming (A1) / Nickel (Ni) / Gold (Au)) reflects at least a part of the light generated in the light generating region 130. Therefore, the light system guided to the n-side contact pad 13 6 can be reflected through the n-side contact pad 1 3 6, and the reflected light system can be passed through a silicon-doped (η-doped) gallium nitride layer. 134 on the upper surface 11 (for example, reflected from the silver layer 126), emitted toward the outside of the LED 100, or guided to the n-side contact pad 136 and reflected by the 11-side contact pad 136 A hole pair can be formed by the absorption of the semiconductor material in the LED 100, and the combination of the hole and the light generating area i 3 0 can generate light in the light generating area 1 3 0 (for example, · With or without reflection by the silver layer 126). As shown in Figs. 12 and 13, the surface 110 of the LED 100 is not flat, and the surface 110 includes a modified triangular pattern composed of a plurality of openings 150. Generally speaking, the depth of the opening 151057-6715-PF 36 200531311 can be any value, and the diameter of the opening 15 and the nearest spacing of the adjacent openings 150 can be arbitrarily changed. of. Unless it can be annotated by other means, the following figures are clearly explained using the results of numerical calculations: the depth 146 of the opening 150 is about 280 nm; the non-zero diameter (non_zer〇diameter) Is 160 nm; the closest interval between adjacent openings 150 is approximately 22 nm; and the refractive index is 10. Since the triangle pattern has undergone modulation processing, the size of the closest center_to_center distance between adjacent patterns 150 is between (a-Aa) and (a + Aa), where "& , Is the lattice constant of the diagonal pattern, "△ &," is the detuning parameter with dimensions of length, and the modulation is based on Arbitrary directions). In order to effectively improve the light extraction emitted by the LED 100 (see the description below), the modulation parameter is about at least i% (one percent) of the ideal lattice constant a (for example: at least about 2 %, At least about 3%, at least about 4%, at least about 5%), and / or at most about 25% of the ideal lattice constant (for example: at most 20%, at most 15%, (Up to 10%). In some embodiments, the closest center distance between adjacent patterns 15 can be any value between (a-Aa) and (a + Aa), and virtually any pattern 150 can be performed. Modulation. Based on the modified triangle pattern formed by the complex openings 150, it can be known that the non-zero modulation parameter system can improve the extraction efficiency of the LED 100. Please refer to FIG. 14. Based on the above description of LED 100, it can be seen that when the modulation parameter △ a increases from zero (Zero) to about 0.15 a, the electromagnetic 1057—6715—PF 37 in LED 100 200531311 The extraction efficiency of the light-emitting device shown in the mathematical modeling of electromagnetic fields (to be described later) is increased from 0.60 to 0.70. In Fig. 14, the efficiencies are derived from the three-dimensional finite-difference time-domain (FDTD) method to estimate the LED 100 under Maxwell's equations. The size of the internal and external light. For example, a. K.S. Kunz and R.J. Luebbers, The Finite-Difference Time-Domain Methods (CRC, Boca Raton, FL, 1993), A.

Taflove， Computational Electrodynamics: TheTaflove, Computational Electrodynamics: The

Finite-Difference Time-Domain Method (Artech House，Finite-Difference Time-Domain Method (Artech House,

London，1995)等已在本發明中參考併入。為了呈現出具有 特疋圖樣150之LED 100的光學行為（0pUcai behaviour)， 於FDTD计异中之輸入參數（inpUt parameters)包括了中心 頻率（center frequency)、於光產生區域13〇中之點偶極輻 射源所發射之光線的頻寬（bandwidth)、於多重推疊層122 中之各層結構之尺寸與介電特性（dimensi〇n and dielectric properties)，以及位於圖樣150中之各開孔之間的直徑、深 度、最近相鄰距離（NND)(nearest neighbor distances (NND)) 〇 於特定的實施例中，LED 100所使用之引出效率資料 (extraction efficiency data)係採用 了如下所示之 fdTD 法而 加以計算。FD1TD法係用以解決全向量時間依賴馬克士威 方程（full-vector time-dependent Maxwell，s equations): 1057-6715—PF 38 200531311London, 1995) and others have been incorporated by reference in the present invention. In order to show the optical behavior (0pUcai behaviour) of the LED 100 with the special pattern 150, the input parameters in the FDTD calculation include the center frequency and the point pair in the light generation area 13 °. The bandwidth of the light emitted by the polar radiation source, the dimensions and dielectric properties of each layer structure in the multiple push stack 122, and between the openings in the pattern 150 Diameter, depth, and nearest neighbor distances (NND). In a specific embodiment, the extraction efficiency data used by the LED 100 is the fdTD method shown below. And calculate. The FD1TD method is used to solve the full-vector time-dependent Maxwell (s equations): 1057-6715—PF 38 200531311

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VxH dE dP =£--1--， 00 dt dt 其中，經由可極化性（polarizability)戶=月+為+... + J係可 捕捉光產生區域130之量子井區域（quantum wells region)、p-接觸層（p-contact layer) 126、於 LED 100 中之其 它層結構的依頻響應（frequency-depen dent response)。見項 目係為根據材料之各種可極化性之不同表現（different contributions)所進行實證推導（empirically)而得之數值（例 如：用於束缚電子振盪（bound electron oscillations)之極化 響應（polarization response)、用於自由電子振盈（free electron oscillations)之極化響應）。特別的是， d2Pm —dt1+Ym ，—► — -^ + ω2ηϊΡηι=ε(ω)Ε, 其中，極化（polarization)係相當於一介電常數 (dielectric constant) +Σ —~~s-r~.~~. w cOrn-ω -ιγηιω 為了方便數值上的計算，於此僅考量了封膠材料層 144、銀層126、以及位於封膠材料層144與銀層126之間 的各層結構。由於此一估算係假設封膠材料層144、銀層 126具有足夠的厚度，如此LED 100之光學性能（optical performance)將不會受到環境層（surrounding iayers)之影 響。於LED 100中，銀層126、光產生區域13〇等相關結 構（relevant structure)係假設具有一依頻介電常數 (frequency dependent dielectric constant)，而其它的結構則 1057-6715-PF 39 200531311 不假設具有依頻介電常數。值得注意的是，於部分實施例 中之LED 1〇〇之封膠材料層144、銀層126之間係包括了 複數附加金屬層（additional metal layers)，其中，各附加金 屬層係分別具有其所對應之依頻介電常數。另一值得注意 的是，銀層126(以及LED 100中之任何其它金屬層）係同時 對於束缚電子（bound electron)、自由電子（free electron)而 具有一依頻項（frequency dependent term)，但是光產生區域 130卻僅對於束缚電子而具有依頻項、但卻對於自由電子 卻不具有依頻項。於其它的實施例中，當進行介電常數之 依頻的核型汁异時’其它例如電聲子相互作用 (electron-phonon interactions)、原子極化（at〇mic polarizations)、離子極化（ionic polarizations)及/或分子極 化（molecular polarizations)等項亦可同時列入考量。 藉由將若干個處於任意位置、固定電流 (randomly-placed, constant-current)之雙極聲源（dip〇le sources)合併於光產生區域130，如此便可完成了對於光產 生區域1 3 0之量子井區域所發出之光線的模型化處理，於 光譜幅寬（spectral width)之各射出短高斯脈衝（emining short Gaussian pulses)係相等於真實量子井（actual quantum well)之射出短高斯脈衝，並且各射出短高斯脈衝係具有任 意初始相位（random initial phase)、開始時間（start_time)。 為了處理LED 100之上表面11〇中之各開孔1 $〇所構 成之圖樣，於侧向（lateral direction)上係採用了一較大超級 單體（supercell)，並且於超級單體中係同時搭配了周期性邊 1057-6715-PF 40 200531311 界條件（periodic boundary conditions)之使用。在上述方式 作用下’除了可以協助大型（例如：邊緣（edge)大於〇 〇1 裝置之尺寸上的模擬之外，當所有偶極源（dip〇le s〇Urees) 之能量完全發出、且直到系統内完全不具任何能量之時， 全演异方程（full evolution equations)仍可及時完成相關的 運算。在模擬過程中，總能量（total energy)之發出、經由 上表面1 1 0所引出之能量流（energy flux)、由量子井與Η摻 雜層所吸收之能量均被監控。在藉由傅立葉之時間（time) 與空間（space)的轉換之後，除了可以得到引出能量流之頻 率、角度解析資料（frequency and angel resolved data)之 外，同時可對於角度、頻率解析引出效率（angle_ and frequency-resolved extraction efficiency)進行計算。藉由光 產生區域130所發出之總能量（total energy emitted)、光產 生區域130之實驗所得發光（experimentally known luminescence)的相互配合下，如此便可得到了用於給定電 性輸入（given electrical input)之單位亮度（lumen/per)、單位 晶片面積之立體角度（s〇Hd angle/per chip area)之絕對角度 解析引出（absolute angle-resolved extraction)。 可以確信的是，經由調變後之圖樣（detuned pattern)丨5〇 的作用下’光產生區域130所產生、且經由LED 100之上 表面110所發出之光線的引出效率是可以被提高，同時由 於各開孔15 0可以根據圖樣型態而建立一介電函數 (dielectric function)，藉此介電函數係可以在石夕晶摻雜（n_ 摻雜）氮化鎵層134之中進行空間上的改變。基於上述可 1057—6715-PF 41 200531311 知，實際結果並不等同於根據理論（the〇r幻下之計算結果。 再者’根據上述之結果亦會改變了輻射模態二— m〇deS)(亦即’由上表面110所發出的發光模式（nght 動㈣）、導引模態㈣ded modes)(亦即，限制於多重推最 層m之中的發光模式）之密度。另外，在不具有圖樣15且0 之作用、且經由上述之輻射模態與導引模態的改變下，於 LED 之部分光線係以散射方式（例如··布拉格散射 (Bragg scattered))射入於導引模態之中，同時這些散射模式 亦可能滲漏至輻射模態之中。於特定的實施例中，圖樣 係可消除所有位於LED 1〇〇之中的導引模態。 可以確信的1，晶格（lattice)的言周變效應 detuning)#^# ^ 之水晶（crystaD的布拉格散射（Bragg scattering 〇ff)方式而 加以了解。以距離d相互間隔之複數晶格平面㈣“ planes)中之完美晶格（perfect lauice)而言，波長人之單色光 (m_ch_atic light)係根據布拉格條件⑼哪 C〇nditi〇n»2dsine、而採用一角度（抓§16)0進行散射，其 中，η係表示散射之階數（order) ’於此之n為一整數 (integer)。然而，就具有光譜幅寬Δλ/λ、且以一立體角度 射入Δ Θ之光源而言，在藉由調變參數（心触^ parameteO^a對於晶格部位（lauice shes)之間隔㈣扣㈣德 灯调變作用下，布拉格條件係可以變得較為寬鬆。因此， 在藉由光譜幅寬、空間發射源輪廓（spatial emissi〇n pr〇fne) 的作用下，晶格的調變係可提高圖樣之散射有效性 1057-6715-PF 42 200531311 (scattermg effectiveness)、接受角度（angular 扣叫加叫。 基於上述說明可知，除了可藉由具有非零調變參數 (non-zero detuning parameter)Aa 之修正三角形圖樣 15〇 以 提高LED 100所發出的光引出量之外，其它的圖樣亦可提 尚LED 100所發出的光引出量。當決定是否藉由所給定圖 樣（given pattern)以提高LED 1〇〇所發出之光引出量及/或 採用那何種開孔圖樣是可以提高led 100所發出之光引出 量時，於進行相關的數值計算之前係必須先以物理圖像 (physica〗 insight)的方式估算出一基本圖樣（basic pattern)’藉由基本圖樣以提高LED 1〇〇所發出之光引出量。 此外，由於介電函數係可根據圖樣丨5〇而進行空間上 的改變，如此便可藉由介電函數之傅立葉轉換（F〇urh transformation)之考量方式以對於LED 1〇〇的引出效率進 行了解。第4圖係表示針對一理想三角形晶格（丨心“ tnangiilar lattice)之傅立葉轉換提出說明。沿著平面内波向 量（in-plane wavevect〇r)k之特定方向（叫仏^。幻 進入之光線的引出係與沿著平面内波向量k，（亦即，平行於 圖樣150)進入所有輻射模態（radiati〇n則和勾之發射源 (source emission)Sk有相互的關連性，其中，平面内波向量 k係可經由平面内波向量k，加上（additi〇n)或扣除 ^btraction) 了倒曰曰曰格向量㈣咖…g而 付’亦即，k=k’士G。引出效率係正比於其所相對之介電函 數之傅立葉分量（FQUrier e㈣㈤麵肌，其關係式為 εό = \s(r)e~i0?drVxH dE dP = £ --1--, 00 dt dt where, via polarizability household = month + is + ... + J is the quantum wells region (quantum wells region) that can capture light generation region 130 ), P-contact layer (p-contact layer) 126, frequency-depen dent response of other layer structures in LED 100. See item is a numerical value obtained by empirically deriving from different contributions of different polarizability of materials (for example: polarization response for bound electron oscillations) ), Polarization response for free electron oscillations (free electron oscillations). In particular, d2Pm —dt1 + Ym, —► —-^ + ω2ηϊΡηι = ε (ω) E, where polarization is equivalent to a dielectric constant + Σ — ~~ sr ~. ~~. w cOrn-ω -ιγηιω In order to facilitate numerical calculations, only the sealant material layer 144, the silver layer 126, and the various layer structures between the sealant material layer 144 and the silver layer 126 are considered here. Since this estimation assumes that the sealing material layer 144 and the silver layer 126 have sufficient thickness, the optical performance of the LED 100 will not be affected by surrounding iayers. In LED 100, the related structures such as the silver layer 126 and the light generating region 13 are assumed to have a frequency dependent dielectric constant, while other structures are 1057-6715-PF 39 200531311 not It is assumed to have a frequency dependent dielectric constant. It is worth noting that, in some embodiments, the sealing material layer 144 and the silver layer 126 of the LED 100 include a plurality of additional metal layers, wherein each additional metal layer has its own Corresponding frequency-dependent dielectric constant. It is also worth noting that the silver layer 126 (and any other metal layer in the LED 100) has a frequency dependent term for both bound electrons and free electrons, but The light generating region 130 has a frequency dependent term only for the bound electrons, but does not have a frequency dependent term for the free electrons. In other embodiments, when the frequency-dependent karyotype of the dielectric constant is different, other examples include electron-phonon interactions, atomic polarizations, and ion polarizations. Items such as ionic polarizations and / or molecular polarizations can also be considered at the same time. By combining a number of random-placed (constant-current) dipole sources at any position in the light generating area 130, the light generating area 1 3 0 can be completed in this way. The modeling process of the light emitted from the quantum well region, the emission of short Gaussian pulses at the spectral width is equivalent to the emission of short Gaussian pulses from the actual quantum well, In addition, each emitted short Gaussian pulse system has an arbitrary initial phase and a start time (start_time). In order to process the pattern formed by the openings 1 10 in the upper surface of the LED 100, a larger supercell is used in the lateral direction, and the supercell is used in the supercell. It is also used with periodic boundary conditions of 1057-6715-PF 40 200531311. In the above manner, in addition to assisting in the simulation of large-scale (for example, devices with edges larger than 〇〇1), the energy of all dipole sources (diplole s〇Urees) is completely emitted, and until When there is no energy in the system, the full evolution equations can still complete the related operations in time. During the simulation, the total energy is emitted and the energy is extracted through the upper surface 1 1 0 The energy flux and the energy absorbed by the quantum well and the erbium doped layer are monitored. After the conversion of Fourier time and space, in addition to the frequency and angle of the drawn energy flow, In addition to frequency and angel resolved data, angle_and frequency-resolved extraction efficiency can be calculated at the same time. The total energy emitted by the light generating area 130, Under the cooperation of experimentally known luminescence of the light generating region 130, it can be used. Absolute angle-resolved extraction of unit luminance (lumen / per) of given electrical input, sod angle / per chip area per unit chip area (absolute angle-resolved extraction). It is convinced that the efficiency of light extraction from the light generating region 130 and the light emitted from the upper surface 110 of the LED 100 can be improved by the detuned pattern 丨 50. Each of the openings 15 0 can establish a dielectric function according to the pattern type, so that the dielectric function can be spatially performed in the Shi Xijing doped (n_ doped) gallium nitride layer 134. Based on the above-mentioned available 1057-66715-PF 41 200531311, the actual results are not equivalent to the calculated results according to the theory (theoretical fantasy. Moreover, according to the above results will also change the radiation mode II-m〇 deS) (that is, the light emission mode (nght) emitted from the upper surface 110, the guided mode (dedicated modes) (that is, the light emission mode limited to the multiple push layer m). In addition, Not at With the function of pattern 15 and 0, and through the above-mentioned change of the radiation mode and the guide mode, part of the light in the LED is scattered into the guide mode (for example, Bragg scattered) into the guide mode At the same time, these scattering modes may also leak into the radiation mode. In a specific embodiment, the pattern can eliminate all the guiding modes located in the LED 100. It can be surely understood that 1. The cyclical effect of lattice (detuning) # ^ # ^ crystal (cragstaD's Bragg scattering ffff) way to understand. The complex lattice plane spaced apart from each other by the distance d ㈣ "Perfect lauice" in "planes", the monochromatic light (m_ch_atic light) of the wavelength person is based on the Bragg condition, which is C〇nditi〇n »2dsine, and an angle (grabbing §16) 0 Scattering, where η represents the order of scattering 'where n is an integer. However, for a light source with a spectral width Δλ / λ and incident at Δ Θ at a three-dimensional angle With the modulation of the parameters (heart touch ^ parameteO ^ a for the interval of the lattice part (lauice shes) ㈣ ㈣ German lamp modulation effect, Bragg conditions can become more relaxed. Therefore, by using the spectral amplitude With the effect of wide and spatial emission source contours (spatial emission), the modulation system of the lattice can improve the scattering effectiveness of the pattern. 1057-6715-PF 42 200531311 (scattermg effectiveness), acceptance angle (angular buckle) Raise. Based on the above It is clear that in addition to the modified triangle pattern 15 with a non-zero detuning parameter Aa to increase the amount of light emitted by the LED 100, other patterns can also improve the LED 100 The amount of light emitted. When deciding whether to increase the amount of light emitted by LED 100 and / or which aperture pattern is used to increase the light emitted by LED 100 when given the pattern (given pattern) When extracting the amount, a basic pattern must be estimated by physical image (physical insight) before the relevant numerical calculation is performed. The basic pattern is used to improve the light emission of the LED 100. In addition, because the dielectric function can be changed spatially according to the drawing, 50, it can be used to derive the LED 100 by the method of the Fourier transformation of the dielectric function. Learn about efficiency. Figure 4 shows a description of the Fourier transform of an ideal triangle lattice. In-plane wavevect〇r The specific direction of k (called 仏 ^. The exit of the magical incoming light is along with the wave vector k in the plane (that is, parallel to the pattern 150) into all the radiation modes (radiation and the emission source of the hook ( Source emission) Sk has mutual correlation, in which the in-plane wave vector k can be added (additi0n) or subtracted ^ btraction) through the in-plane wave vector k. Pay 'that is, k = k' ± G. The extraction efficiency is proportional to the Fourier component of the relative dielectric function (FQUrier e㈣㈤face muscle, the relationship is εό = \ s (r) e ~ i0? Dr

1057-6715-PF 43 200531311 2此外，材料層之中的光線傳播係可以滿足方程式 k2(平面内（in-plane)) + k2(法向（n〇rmal)卜 ε(ω/〇2，其中，經 實際所考量下所得到之倒晶格向4 G的最A^maxim= 係固定受限於光產生區域130所發出之光線頻率卜卜光產 生區域130之介電常數。如第4圖所示，逆袼子空間群 (reciprocal space)之環型（ringH$通常稱之為光能階⑴ line)。由於光產生區域13〇所具有的是有限頻寬⑴ bandwidth)，其所形成之光能階則將是環狀結構（⑽㈣丨別）， 並且為了便於說明，於此係以單色光源（m〇n〇chr〇matic source)之光能階提出介紹。同樣地，光線於封膠材料層中 的傳播係受限於光能階（於第4圖中之内圓（inner circle))。 因此，在增加了介電函數eG之傅立葉分量Fk的同時，於封 膠材料層内之光能階上、各平面内波向量k之方向上的引 出效率便可以提咼，其中，於封膠材料層中的光能階係等 於封膠材料層中之倒晶格向量G點（G points)的增量、對於 封膠材料層内之光能階上之倒晶格向量G點之散射強度 (scattering strength)(介電函數）ε〇}的增量之總和。當所選擇 的圖樣可以提高引出效率時，則便可採用物理圖像來進行 估算。 舉例而5，弟1 6圖係表示在增加了一理想三角形圖樣 (ideal triangular pattern)之晶格常數的效應（effect)。值得注 意的是，於第1 6圖中之資料係經由第12圖中所給定參數 之計算下而得，但這些參數並不包括：具有450 nm之尖蜂 波長的射出光線，以及以最近相鄰距離“ a，，為比例下之 1057-6715-PF 44 200531311 l’27a、（K72a、l.27a-40nm 時之開孔 150 之深度、開孔 15〇 之直徑、與相鄰開孔15〇之矽晶摻雜（n_摻雜）氮化鎵層 的厚度。在晶格常數的增加下，於封膠材料層内、光能階 中之倒晶格向量G點的數量亦可同時被增加的，並且可輕 易藉由具有最近相鄰距離（NND)之引出效率的趨勢㈨⑶幻 而看出。可以確信的是，當最近相鄰距離（NND)近似於在 真二中之光線波長時，則於此一最近相鄰距離（NND)下係 具有最大引出效率，其理由在於：由於材料所具有之均勻 度提高，當最近相鄰距離（NND)遠大於光線波長時，則散 射效應（scattering effect)便可降低。 舉例而言，第1 7圖係表示藉由增加開孔尺寸（h〇le size) 或填充因子（filling faetor)時之效應。三角形圖樣（削烟^ triangular pattern)之填充因子的表示式為七）*(r/a)2，其 中，r係為開孔之半徑（radius)。藉由第12 之所使用參數的計算下以得到了第η圖所示 這些參數中並不包括了根據x#i(a_axis)上之填充因子的數 值而變化之開孔直徑。當散射強度⑹增量下，引出效率係 隨著填充因子而增加。當處於〜48%之填充因子時，則此特 定系統係具有最大值。於敎實施例中，咖剛所具有 之填充因子係至少約為10%(例如：至少約為15%、至：約 為20%)及/或至多約為9〇%(例如：至多約為卿、至多约 為70%、至多約為60%)。 ’於理想三角晶 中之開孔的定位 由上述所提出之修正三角形圖樣可知 袼（triangular lattice)的各位置之上、圖樣 1057-6715-PF 45 200531311 係與调變蒼數之間有關連性；此外，在將圖樣中心保持在 里心一角圖樣（ideal triangular pattern)的各位置上時，則藉 、寸於里心_角圖樣中之開孔進行修改的作用下係仍可以 付到此一修正（調變（detuned))三角形圖樣，於第18圖中之 κ施例所不即為此一修正（調變）三角形圖樣。於此實施例 中就光引出量中之增量（enhancement)、用以進行相對數 值計算（corresponding numerical calculations)的方法 (methodology)、以及對於具有第18圖之圖樣之發光二極體 中所提高之引出效率的物理解釋（physical explanati〇n)而 ό ’均與上述方式相同。於特定的實施例中，修正（調變） 圖樣中之開孔係可經由理想位置而進行倒置（displaced)，並 且位於理想位置之開孔係具有直徑上的變化。 於其它實施例中，藉由不同型式的圖樣係有助於發光 一極體之光引出量的提昇，這些型式的圖樣包括了複雜周 期性圖樣與非周期性圖樣（complex peri〇dic pattei>ns and nonperiodic patterns)。於複雜周期性圖樣之中，其每一單 體（unit cell)係具有超過了一個以上的特徵（feature)，並且 此單體係以周期性樣態（periodic fashi〇n)進行重覆。舉例而 言’複雜周期性圖樣包括了蜂巢狀圖樣（h〇neyc〇ml3 patterns)、蜂巢基底圖樣（honeyComb base patterns)、2χ2 基底圖樣（2x2)(base patterns)、環狀圖樣（ring patterns)及阿 基米得圖樣（Archimidean patterns)。以下之實施例中，於複 雜周期性圖樣中之部分開孔係可具有單一直徑，而其它的 開孔則可具有較小直徑。另外，非周期性圖樣係為單體之 1057-6715-PF 46 200531311 上不具有平移對稱性（trans〗ational synimetry)之圖樣，其 中，此單體之長度係至少為光產生區域13〇所產生之尖峰 波長的5G倍。舉例而言，非周期性圖樣包括了非周期性圖 樣（aperiodic patterns)、準晶圖樣（㈣‘咖仙以 patterns)、羅負遜圖樣（R〇bins〇n 及安曼圖樣 (Amman patterns)。 第19圖係表示針對LED1〇〇、兩種不同的非周期性圖 樣之數值計算資料，其中’於非周期性圖樣中之部分開孔 係具有特定直徑（particular diameier)，而於非周期性圖樣 中之其它的開孔則可具有較小直徑。於第19圖中之數值計 算資料係表示了具有較小直徑之開孔dR、其直徑由〇 nm 變化至95 nm時之引出效率（直徑為8〇 nm之較大開孔）的 表現（behavior)。第！圖中之LED1〇〇之所使用參數的計算 下以付到了第6圖所不之資肖’但這些參數並不包括了根 據圖形中之X軸上之填充因子之數值而變化的開孔直徑。 為了不受到理論上的限制，在多孔尺寸（mulUple h〇ie sizes) 的作用下係可允許由圖樣中之多重周期性㈤此 Peri〇dicities)而產生散射，藉此以增加圖樣之接受角度、光 譜，效性（spectral effectiveness)。於此實施例中，就光引 出量中之增量、用以進行相對數值計算的方法、以及對於 具有第19圖之圖樣之發光二極體中所提高之引出效率的 物理解釋等等而言，均與上述方式相同。 第20圖係表示對於LED1〇〇之數值計算資料，其包括 了不同的環型圖樣（ringpattern)(複雜周期性圖樣）。圍繞於 1057-6715-pf 47 200531311 中心開孔（咖㈣hole)之第一環型卬加_)的開孔數目係 不同於(6、8 $ 1 〇個)其它不同環型圖樣的開孔數目。藉由 第1圖中之LED 100之所使用參數的計算下以得到了第曰20 ，所示之資料，但於這些參數中並不包括了具有45〇nm之 尖峰波長的射出光線。於第9圖巾，其數值計算係表示了 每單位單體之環型圖樣數量由2至4時之LED 1〇〇的引出 效率，其中，環型圖樣數量係以重覆方式通過了單體。於 此貝施例中，就光引出量中之增量、用以進行相對數值計 算的方法、以及對於具有第2〇圖之圖樣之發光二極體中所 提高之引出效率的物理解釋等等而言，均與上述方式相同。 第21圖係表示具有阿基米得圖樣a?之led 1〇〇的 數值计异資料。阿基米得圖樣A7係由具有相同間隔之7 個開孔（eqUally-spaced h〇les)之六角單體（hexag〇nai u加1057-6715-PF 43 200531311 2 In addition, the light propagation system in the material layer can satisfy the equation k2 (in-plane) + k2 (normal direction) and ε (ω / 〇2, where The maximum A ^ maxim of the inverted lattice to 4 G obtained under actual consideration is fixedly limited by the frequency of the light emitted by the light generating region 130 and the dielectric constant of the light generating region 130. As shown in FIG. 4 As shown, the ring type of the reciprocal space (ringH $ is usually called the light energy level ⑴ line). Since the light generating region 13 has a limited bandwidth ⑴ bandwidth, it is formed by The light energy level will be a ring structure (⑽㈣ 丨 别), and for the sake of explanation, the light energy level of a monochromatic light source (monochromatic source) is introduced here. Similarly, the light is sealed The propagation system in the glue material layer is limited by the light energy level (inner circle in Fig. 4). Therefore, while the Fourier component Fk of the dielectric function eG is increased, it is in the sealant material layer The extraction efficiency at the light energy level and in the direction of the wave vector k in each plane can be improved. Among them, the sealing material The light energy level in the material layer is equal to the increment of the inverted lattice vector G points in the sealant material layer, and the scattering intensity for the inverted lattice vector G point on the light energy level in the sealant material layer. (scattering strength) (dielectric function) ε 0} The sum of the increments. When the selected pattern can improve the extraction efficiency, the physical image can be used for estimation. For example, 5 and 16 are shown in the figure The effect of increasing the lattice constant of an ideal triangular pattern. It is worth noting that the data in Fig. 16 are obtained by calculating the parameters given in Fig. 12 However, these parameters do not include: the emitted light with a sharp bee wavelength of 450 nm, and the ratio of 1057-6715-PF 44 200531311 l'27a, (K72a, 1.27a) The depth of the opening 150 at -40nm, the diameter of the opening 150, and the thickness of the silicon-doped (n-doped) gallium nitride layer adjacent to the opening 150. As the lattice constant increases, The number of inverted lattice vector G points in the sealant material layer in the light energy level can also be simultaneously It can be easily seen by the trend of the efficiency of the nearest neighbor distance (NND). It can be sure that when the nearest neighbor distance (NND) is close to the wavelength of light in Shinji , Then the system has the maximum extraction efficiency under this nearest neighbor distance (NND), because the uniformity of the material is improved, when the nearest neighbor distance (NND) is much larger than the wavelength of light, the scattering effect ( scattering effect). For example, Figure 17 shows the effect of increasing the hole size or filling faetor. The expression of the fill factor of the triangular pattern (cutting smoke ^ triangular pattern) is seven) * (r / a) 2, where r is the radius of the opening. The calculation of the parameters used in the twelfth to obtain the η shown in the figure n. These parameters do not include the opening diameter that changes according to the value of the fill factor on x # i (a_axis). When the scattering intensity is increased by ⑹, the extraction efficiency increases with the fill factor. When at a fill factor of ~ 48%, this particular system has a maximum value. In embodiments, the filling factor of Ka Gang is at least about 10% (for example, at least about 15%, to: about 20%) and / or at most about 90% (for example, at most about Qing, at most about 70%, at most about 60%). 'The positioning of the openings in the ideal triangle can be seen from the positions of the triangular lattice above the proposed modified triangular pattern, and the correlation between the pattern 1057-6715-PF 45 200531311 and the modulation number ; In addition, when the center of the pattern is maintained at each position of the inner triangular pattern, the borrowing and adjustment of the openings in the inner_corner pattern can still be paid to this one. The triangle pattern is modified (detuned). The κ embodiment in FIG. 18 is not a modified (modulated) triangle pattern. In this embodiment, the enhancement in the light extraction amount, the methodology for performing relative numerical calculations, and the improvement in the light-emitting diode with the pattern of FIG. 18 are improved. This leads to a physical explanation of efficiency (physical explanation) and ό 'are the same as above. In a specific embodiment, the openings in the correction (adjustment) pattern can be displaced through the ideal position, and the openings in the ideal position have a change in diameter. In other embodiments, different types of patterns are used to improve the light extraction of the light-emitting polar body. These types of patterns include complex periodic patterns and aperiodic patterns (complex periodic patterns). and nonperiodic patterns). In a complex periodic pattern, each unit cell of the complex periodic pattern has more than one feature, and the single system is repeated with a periodic fashion. For example, 'complex periodic patterns include honeycomb patterns, honeycomb base patterns, 2 × 2 base patterns, ring patterns, and Archimedean patterns. In the following embodiments, part of the openings in the complex periodic pattern may have a single diameter, while other openings may have a smaller diameter. In addition, the non-periodic pattern is a pattern of 1057-6715-PF 46 200531311 that does not have translational synimetry, where the length of this cell is at least 13 5G times the peak wavelength. By way of example, aperiodic patterns include aperiodic patterns, quasi-crystal patterns (咖 'coffee immortal patterns), Luobinsonian patterns (Ambin patterns) and Amman patterns (Amman patterns). Figure 19 shows the numerical calculation data for LED100 and two different aperiodic patterns. Among them, some of the openings in the aperiodic pattern have a specific diameter, and in the aperiodic pattern, The other openings may have smaller diameters. The numerical calculation data in Figure 19 shows the extraction efficiency when the diameter of the openings dR with smaller diameters varies from 0 nm to 95 nm (diameter 8 〇nm large opening) performance (behavior). In the figure! The calculation of the parameters used in the LED100 is paid to the figure not shown in Figure 6. But these parameters are not included according to the graph. The diameter of the openings varies with the value of the fill factor on the X axis. In order not to be bound by theory, under the action of mulUple h0ie sizes, it is allowed to allow multiple periodicity in the pattern. This Peri 〇dic ities) to generate scattering, thereby increasing the acceptance angle, spectrum, and spectral effectiveness of the pattern. In this embodiment, in terms of the increase in the amount of light extraction, the method for performing relative numerical calculations, and the physical explanation of the improved extraction efficiency in the light-emitting diode with the pattern of Fig. 19, etc. Are the same as above. Figure 20 shows the numerical calculation data for LED100, which includes different ringpatterns (complex periodic patterns). The number of openings around the center ring of 1057-6715-pf 47 200531311 (the first ring shape of the hole) is different from the number of openings in other ring patterns (6, 8 $ 10) . According to the calculation of the parameters used in the LED 100 in Figure 1 to obtain the data shown in Figure 20, but these parameters do not include the emitted light with a peak wavelength of 45nm. In Figure 9, the numerical calculation shows the extraction efficiency of the LED 100 when the number of ring patterns per unit is from 2 to 4. Among them, the number of ring patterns passed the unit repeatedly. . In this example, a physical explanation of the increase in the amount of light extracted, the method used to perform the relative numerical calculation, and the improved extraction efficiency of the light-emitting diode with the pattern of Figure 20, etc. In all respects, it is the same as above. Fig. 21 shows numerically different data of led 100 having an Archimedean pattern a ?. Archimedes pattern A7 consists of hexagonal monomers (hexag〇nai u) with 7 equally spaced holes (eqUally-spaced h〇les)

CellS)230所構成，其相互之間隔為最近相鄰距離（NND)a。 於六角單It 230之中，其6個開孔係以正六角形（^心 hexagon)之形狀進行排列，並且第7個開孔係位於六角型 之中心位置上。隨後，將這些六角單體230以中心至中心 間距（center-to-centerspacing)為 a，= a*〇 + VJ)、且沿著其邊 緣相互配合的方式而共同構成了 LED的所有圖樣表面。此 一方式即為所熟悉之A7貼圖（A7 tiling)，其利用了 7開孔 以構成了單體。同樣地，阿基米得貼圖（Archimidean tlhng)A19係由具有最近相鄰距離（NND)a、相同間隔之19 個開孔所構成’其中’ 6個開孔係以内六角（inner hexag〇n) 的方式進行排列，12個開孔係以外六角（outer hexagon)的 1057-6715-PF 48 200531311 方式進行排列，並且將一中心開孔設置於内六角之中。隨 後’將這些六角單體23〇以中心至中心間距為 (且A者其邊緣相互配合的方式而共同構成了 LED的所有圖樣表面。於此實施例中，就光引出量中之增 置、用以進行相對數值計算的方法、以及對於具有第21圖 之圖樣之發光二極體中所提高之引出效率的物理解釋等等 而& ’均與上述方式相同。於第1〇圖中，A7、A19貼圖之 引出效率約為77%，並且藉由第12圖中之LED 100之所使 用多數的π十异下以得到了第21圖所示之資料，除了於這些 參數中不包括了具有450 nm之尖峰波長的射出光線之 外’同日守這些參數亦不包括了以最近相鄰距離（NND)所定 義之開孔的個別單體。 第22圖係表示具有準晶圖樣之LED 100的數值計算資 料牛例而 ° ’ 於 M. Senechal，Quasicrystals and Geometry (Cambridge University Press, Cambridge, England 1996)# 揭露了相關準晶圖樣之技術，於此亦將其併入說明。於此 係以數值計算說明了當8重級基準周期結構（class of 8-fold based qusi-periodic structure)之變化時之引出效率的表 現。可以確信的是，由於準晶圖樣結構係可允許高度之平 面内迴轉對稱性（due t0 high degr>ee Qf ir^plane rotational symmetries allowed by such structure)，如此便可藉由準晶 圖樣以呈現出相當高的引出效率。於此實施例中，就光引 出虿中之增ΐ、用以進行相對數值計算的方法、以及對於 具有第22圖之圖樣之發光二極體中所提高之引出效率的 1057-6715-PF 49 200531311 王解料等而言，均與上述方式相同。由第22圖所干之 二維有限差分時域(FDTD)法之計算資料可知，1 結構所達到之^效㈣為82%。藉由第i2 w 1〇〇之所使用參數的計算下以得到了第22圖所示之 些參數中不包括了具有450 _t尖峰波長的射 光線之外，同時這些參數Μ包括了以最近相鄰距離 (NND)所定義之開孔的個別單體。 基於上述所提出之各種圖樣可知，凡是滿足上述所提 出之基本原則（basic principles)下的圖樣均可以提高於 LED 100之引出效率。可以確 :、 此上 精田日加了準晶圖 樣釔構或複雜周期性圖樣之調變（detuning)下，引出效率β 可以有效地被提高。 > …疋 、在部分實施例中’由LED 1〇〇所發出、且於光產生區 域130所產生之總光線強度（t〇tal咖⑽〇f u咖）的至少約 為45。/。(例如：至少約為5〇%、至少約為训 '至少約為 60%、至少約為鳩、至少約為嶋、至少約&⑽、至 少約為95%)係會經由上表面n〇而發出。 於部分實施例中，LED100係可相對地具有較大的剖 面積，藉此仍可經由LED100以呈現出有效能之光引出量 (light extraction)。舉例而言，於LED1〇〇中之至少或更多 的邊緣係可至少約為i公釐（mm)(milHmeter)(例如：至少約 為1.5 mm、至少約為2 mm、至少約為2·5 mm、至少約為 3 mm)，並且由LED 1〇〇所發出、且於光產生區域13〇所 產生之光總量的至少約為45%(例如：至少約為5〇% '至少 1057-6715-PF 50 200531311 約為55% '至少約為60%、至少約為7〇%、至少約為8〇%、 至少約為90%、至少約為95%)係會經由上表面ιι〇而發 出。如此一來，LED便可相對地具有較大的剖面積（例如： 至少約為1.5 mm X至少約為藉此以呈現出理想 功率轉換效率（power conversi〇n efficiency)。 於部分實施例中，具有LED1〇〇設計之LED的引出效 率於貫質上係與LED的邊緣的長度無關連性。舉例而言， 相較於具有LED 100之設計且其至少一或更多邊緣約為 0.25 mm之LED的引出效率、具有LED j 〇〇之設計且其至 少一或更多邊緣約為！ mm之lED的引出效率而言，兩者 之間的差別變化係約小於·(例如：約小於8%、約小於 5%、約小於3%)。LED之引出效率係為㈣所發出的光線'、 X光裝置所產生之光線強度之間的比率(於此係可採用“能 篁（energy)”或“光子（ph〇t〇ns)”來量測）。如此一來，l印便 可相對地具有較大的剖面積(例如：至少約為】一至少 約為1 mm)，藉此以呈現出理想功率轉換效率。 於部分實施例中，具有LEDl〇〇設計之㈣的量子嗖 率（q麵她efficiency)於實質上係與㈣的邊緣的長度無 關連性。舉例而言’相較於具有咖1〇〇之設計且立至少 -或更多邊緣約為〇.25_之咖的量子效率CellS) 230, and the distance between them is the nearest neighbor distance (NND) a. In the hexagonal single It 230, its six openings are arranged in the shape of a hexagon, and the seventh opening is located at the center of the hexagon. Subsequently, these hexagonal cells 230 are used to form a center-to-center spacing (a, = a * 〇 + VJ), and form a pattern along the edges of the LEDs. This method is known as A7 tiling, which uses 7 openings to form a single body. Similarly, the Archimidean tlhng A19 is composed of 19 openings with the nearest adjacent distance (NND) a and the same interval 'wherein' 6 openings are within the hexagon (inner hexag〇n) The 12 holes are arranged in the outer hexagon 1057-6715-PF 48 200531311, and a center hole is set in the inner hexagon. Subsequently, 'the hexagonal monomers 23 are used to form the center-to-center spacing of (and A and their edges cooperate with each other) to form all the pattern surfaces of the LED. In this embodiment, the increase in the amount of light extraction, The method used to perform the relative numerical calculations, and the physical explanation of the improved extraction efficiency in the light-emitting diode with the pattern of Fig. 21, etc. are the same as above. In Fig. 10, The extraction efficiency of A7 and A19 textures is about 77%, and the data shown in Figure 21 are obtained by using the majority of the π ten different LED 100 in Figure 12, except that these parameters are not included. In addition to the emitted light with a peak wavelength of 450 nm, these parameters do not include individual cells with holes defined by the nearest neighbor distance (NND). Figure 22 shows an LED 100 with a quasicrystal pattern. The numerical calculation data of the example is “°” In M. Senechal, Quasicrystals and Geometry (Cambridge University Press, Cambridge, England 1996) # The technology of related quasicrystal patterns is disclosed, and it is also incorporated into the description here. The numerical calculations show the performance of the elicitation efficiency when the class of 8-fold based qusi-periodic structure is changed. It is believed that the quasi-crystal pattern structure allows a plane with a high height Internal rotation symmetry (due t0 high degr> ee Qf ir ^ plane rotational symmetries allowed by such structure), so that the quasi-crystal pattern can be used to show a very high extraction efficiency. In this embodiment, the light extraction 虿The increase in the value, the method used for the relative numerical calculation, and the 1057-6715-PF 49 200531311 Wang Jiering, etc. for the improved extraction efficiency in the light-emitting diode with the pattern shown in Figure 22 are all related to The above method is the same. From the calculation data of the two-dimensional finite difference time domain (FDTD) method shown in Figure 22, it can be known that the ^ effect ratio achieved by 1 structure is 82%. With the parameters used in i2 w 100 The calculation shows that the parameters shown in Figure 22 do not include the light rays with a peak wavelength of 450 _t. At the same time, these parameters M include the individual openings defined by the nearest neighbor distance (NND). monomer Based on the various patterns proposed above, it can be known that any pattern that meets the basic principles proposed above can improve the extraction efficiency of LED 100. It can be confirmed that: Sapporo Japan added a quasicrystal pattern to yttrium Under the configuration or detuning of complex periodic patterns, the extraction efficiency β can be effectively improved. > ... 疋, in some embodiments, the total light intensity (t〇tal coffee) generated by the LED 100 and generated in the light generating area 130 is at least about 45. /. (For example: at least about 50%, at least about 60%, at least about 60%, at least about dove, at least about 嶋, at least about & ⑽, at least about 95%) will pass through the upper surface n. And issued. In some embodiments, the LED 100 can have a relatively large cross-sectional area, so that the LED 100 can still pass through the LED 100 to exhibit effective light extraction. For example, at least or more of the edges in the LED 100 may be at least about 1 millimeter (mm) (milHmeter) (for example: at least about 1.5 mm, at least about 2 mm, at least about 2 · 5 mm, at least about 3 mm), and at least about 45% of the total amount of light emitted by the LED 100 and generated in the light generating area 13 (for example: at least about 50% 'at least 1057 -6715-PF 50 200531311 about 55% 'at least about 60%, at least about 70%, at least about 80%, at least about 90%, at least about 95%) will pass through the top surface. And issued. In this way, the LED can have a relatively large cross-sectional area (for example: at least about 1.5 mm X at least about so as to exhibit the ideal power conversion efficiency (power conversion). In some embodiments, The extraction efficiency of an LED with the LED 100 design is independent of the length of the edge of the LED. For example, compared to a design with LED 100 and at least one or more of its edges is about 0.25 mm. With regard to the extraction efficiency of the LED, the design with the LED j 〇 and its at least one or more edges is about! The extraction efficiency of the LED of the 1ED, the difference between the two is about less than (for example: about 8% , About less than 5%, less than about 3%). The extraction efficiency of the LED is the ratio between the light emitted by the light source and the intensity of the light generated by the X-ray device (here, "energy" can be used) Or "photon (ph0t〇ns)". In this way, the seal can have a relatively large cross-sectional area (for example: at least about]-at least about 1 mm), so as to Shows ideal power conversion efficiency. In some embodiments, it has LED100 Its quantum efficiency (q-plane efficiency) is essentially independent of the length of its edges. For example, 'compared to a design with 100 ° and at least-or more edges is about 〇.25_ 之 Quantum efficiency

100之設計且苴至小一十西夕直A ^ _ /、至夕一或更夕邊緣約為1 mm之LED的量 文率而口兩者之間的差別變化係約小於1 〇。/。（例如：约 小於8 %、約小於ς 〇/ 、 ;5 /〇、約小於3%)。於此所提出之 量子效率係為：；[… D所產生的光子數量、於LED中所發生The design of the 100 and the size of the LED is about one tenth of the eve, and the dimension of the LED is about 1 mm at the edge of the eve or less. The difference between the two is less than about 10. /. (For example: less than 8%, less than ς 〇 /,; 5 / 〇, approximately less than 3%). The quantum efficiency proposed here is: [... the number of photons generated by D, which occur in the LED

1057-6715-PF 51 200531311 之孔洞再、、、°合（electron-h〇le recombinations)的數量之間的 比率。如此一來，LED便可相對地具有較大的剖面積（例 如·至少約為1 mm χ至少約為i mm)，藉此以呈現出良 好的性能。 於部分實施例中，具有LED 100設計之LED的電光轉 換效率（wall plUg efficiency)於實質上係與LED之邊緣的長 度無關。舉例而言，相較於具有LED 1 00之設計且其至少 一或更多邊緣約為〇·25 mm之LED的電光轉換效率、具有 LED 100之設計且其至少一或更多邊緣約為i 之 的電光轉換效率而言，兩者之間的差別變化係約小於 10%(例如··約小於8%、約小於5%、約小於3%)。於此所 提出之LED的電光轉換效率係為：led之注入效率（注入 於發光裝置中之載子數目、發光裝置之光產生區域中所再 、、’。e之載子數目之兩者之間的比率）、之輻射效率 (radiative efficiency)(孔洞再結合所導致之一輻射結果 (radiative event)、孔洞再結合之總數目之兩者之間的比 率）、以及LED之引出效率（由LED所引出之光子的數目、 所形成之光子的總數目之兩者之間的比率）之乘積 (product)。如此一來，LED便可相對地具有較大的剖面積 (例如.至少約為1 mm X至少約為i mm)，藉此以呈現出 良好的性能。 於部分實施例中，由LED 100所發出之光的角度分佈 (angular distribution)係可經由上表面11〇而受到巧妙的控 制。為了提高進入於一給定立體角度（given s〇lid angle)(例 105 7 — 6715-PF 52 200531311 如.進入了圍繞在上表面110之法線方向的一立體角度）之 引出效率，於此係對於可根據圖樣150(如上所述）進行空間 亡的變化之介電函數的傅立葉轉換進行檢查。第23圖係表 不具有不同晶格常數之兩理想三角形晶格之傅立葉社 構（F〇UHe"ransformation c〇nstrucii〇n)。為了提高引出: 率於此係增加了封膠光能階（enc叩㈤咖丨丨如）中之 倒晶格向量G點的數目、材料光能階（material light line) 中之倒晶格向f G點的散射強度（Sg)，此—方式係暗示了 藉由最近相鄰距離（NND)之增加係可達到如第16圖中所提 出之效果。然而，於此係特別留意進入了立體角度之引出 效率的增加量，此立體角度係以置中對準於上表面"Ο之 、友方向因此，在希望同時藉由減少封膠光能階之半徑 以達到了限制倒晶格向量G點的引入（intr〇ducti〇♦下， 倒晶格向量G之大小係會大於（0)(ne))/c，亦即， G^>(〇)(ne))/c。由此可知，藉由減少封膠(最低需求(b㈣ minimum)係為將所有封膠均—起移除）之折射率的作用下 係可得到較大的最近相鄰距離（NND)，因而增加了在材料 光能階中之倒晶格向量〇點的數目，並且藉由材料光能階 係可造成了於法線方向（F>G)上的引出，同時可避免於封膠 之中繞射（diffraction)成了較高階數（傾斜角度（〇Mique 了上述說明之趨勢、以及進 angles))。於第24圖中係表示 入立體角度（由圖形中之集合半角⑽Mf,…）所 給定）之引出效率。藉由第12圖巾之· 1〇〇之所使用參 數的計算下以得到了第24圖所示之資料，但於這些參數中1057-6715-PF 51 200531311 The ratio between the number of hole recombinations (electron-holle recombinations). In this way, the LED can have a relatively large cross-sectional area (for example, at least about 1 mm x at least about i mm), thereby exhibiting good performance. In some embodiments, the wall plUg efficiency of the LED with the LED 100 design is substantially independent of the length of the edge of the LED. For example, compared to an LED with a design of LED 100 and at least one or more edges of about 0.25 mm in electro-optical conversion efficiency, a design of LED 100 and at least one or more edges of about i In terms of electro-optical conversion efficiency, the difference between the two is less than about 10% (for example, about less than 8%, less than about 5%, and less than about 3%). The electro-optical conversion efficiency of the LED proposed here is: the injection efficiency of the LED (the number of carriers injected into the light-emitting device, the number of carriers in the light-emitting area of the light-emitting device, and the number of carriers of the '.e' Ratio), radiative efficiency (ratio of a radiation event caused by hole recombination, ratio between the total number of holes recombination), and LED extraction efficiency (by LED The product of the number of photons drawn out and the total number of photons formed. In this way, the LED can have a relatively large cross-sectional area (for example, at least about 1 mm X at least about i mm), thereby exhibiting good performance. In some embodiments, the angular distribution of the light emitted by the LED 100 can be skillfully controlled via the upper surface 110. In order to improve the extraction efficiency at a given given angle (eg 105 7 — 6715-PF 52 200531311, such as entering a solid angle around the normal direction of the upper surface 110), here The Fourier transform of the dielectric function that can change the space death according to the pattern 150 (as described above) is checked. Figure 23 shows the Fourier structure (FuoU " ransformation cnstrucii〇n) of two ideal triangular lattices with different lattice constants. In order to improve the extraction: The number of inverted lattice vector G points in the encapsulant light energy level (enc 叩 ㈤ カ 丨 丨) is increased, and the inverted lattice direction in the material light line is increased. The scattering intensity (Sg) at f G point, this method implies that the effect as proposed in Fig. 16 can be achieved by increasing the nearest neighbor distance (NND). However, I pay special attention to the increase in the extraction efficiency when entering the three-dimensional angle. This three-dimensional angle is centered and aligned with the upper surface. "Quote, friend direction. Therefore, it is desirable to reduce the optical energy level of the sealant at the same time. The radius is such that the introduction of the point of the inverted lattice vector G is restricted (under introductory), the size of the inverted lattice vector G will be greater than (0) (ne)) / c, that is, G ^ > ( O) (ne)) / c. It can be seen that by reducing the refractive index of the sealant (b㈣ minimum is to remove all sealants), a larger nearest neighbor distance (NND) can be obtained, thereby increasing The number of inverted lattice vectors in the material's light energy level is 0, and the material's light energy level system can lead to the normal direction (F & G), while avoiding winding around the sealant. The diffraction becomes a higher order (the angle of inclination (oMique describes the trends described above, as well as the angles)). In Fig. 24, the extraction efficiency of the solid angle (given by the set half-angle ⑽Mf, ...) in the figure is shown. Based on the calculation of the parameters used in Figure 12 · 100, the data shown in Figure 24 were obtained, but in these parameters

1057-6715-PF 53 200531311 亚：包括：具有530疆之尖峰波長的射出光線及34-的 頻見封膠之折射率為1〇、？推雜材料層之厚度為副請、 光產生區域（hght_generating㈣叫之厚度為_、如第 “，，圖所不之對於二曲線之最近相鄰距離（ΝΝΒ)(&)，以及以 ’广4下之1,27a、0.72a、1273+40 nm時之深度、開 孔直徑及η摻雜材料層之厚度。當晶格常數增加時，則在 狹角（謝咖叫㈣之引出效率、進入所有角度之總引出效 率便均可增加。然而，就較大晶格常數而言，即使進入所 有角度之總引出效率是增加的，但在封膠之中所繞射形成 之較向階數模式係會對於狹角之引出效率造成了限制。就 曰曰格常數為460麵之計算結果可知，其所進人於集合半角 之引出效率係大於25%。換言之，僅在大肖13.4%之立體 肖度之上半球（upper hemispWe)中之近半數的引出光線是 被收集的’藉此以呈現出此圖樣之準直性效應(c〇出一 也⑽）。可以確信的是’就任何可以增加枯料光能階内之 倒晶格向量G點之數目、但限制了於平面内波向量㈣時 之封膠光能階内之倒晶格向量G點之數目的圖樣而古，藉 由這些圖樣係可提高了進人於立體角度之引出效率^ 令，此立體角度係以置中對準於上表面11〇之法線方‘ 值的注意的是’上述方式係特別可以有效降低源音域 (source etendue)，此一源音域係通常正比於〆，其中，n 係表示周圍材料（S_Undingmaterial)(例如··封^之折射11 率。因此’藉由降低了 LED100令之封膝材料層之折射率 的作用下，如此將會造成了更多的相互平行之發射 1057-6715-PF 54 200531311 (collimated emisslon)、較少的源音域及較高的表面亮度 (surface bnghtness)(於此係將其定義為引入了來源音域之 總7C度）。於部分實施例中，由空氣所形成之封膠係可減少 源音域，但因而卻增加了進入於一給定集角（c〇Uecti〇n angle)、以置中對準於上表面11()之法線方向。 於部分實施例中，當光產生區域13〇所產生之光線經 由上表面110而自LED 100發出時，其光線分佈之相互平 行性係比拉普拉斯分佈（lambertian distributi〇n)為佳。舉例 而言，當光產生區域130所產生之光線經由上表面11〇而 自LED 100發出時，由介電層（dielectric 表面所發出 之光線中，其至少約為4〇%(例如：至少約為5〇%、至少約 為70%、至少約為9〇〇/0)係以至多約3〇。（例如：至多約25。、 至多約20。、至多約15。）的範圍内發出，而此一角度係正交 於上表面110。 由此可知，就可在一指定角度（desired angle)下、相對 引出高比例光線之能力，或是同時具有了相對高光線引出 量之能力而言，藉此能力係可製作出具有相對高密度的 LED，如此以提供作為一給定晶圓（giyen wafa)之使用。舉 例而口於母平方公分（per square centimeter)之晶圓中係 至少具有5個LEDs(例如：至少具有25個LEDs、至少具 有 50 個 LEDs)。 ' 此外，在相對於光產生區域丨3 〇所產生之光線的波長 而言，於部分實施例中係可針對封裝LED i 〇〇所發出之光 線的波長進行修正。於第25圖所示之例子中，一 1057-6715-PF 55 200531311 係具有一含磷材料層（layer containing a phosphor material)180，此含磷材料層180係設置於上表面11〇，藉 由石粦材料係可與光產生區域130所產生之具有既定波長之 光線之間達到交互作用，如此以產生出所需之指定波長。 於部分實施例中，由封裝LED 100所發出的光線於實質上 疋可以為白光（white light)的。此外，於特定之實施例中， 含磷材料層180中之磷材料係可由（Y，Gd)(A1，Ga)G:Ce3 + 或釔鋁石榴石磷光體（“YAG，，（yttrium，aluminum，別⑺加））所 製成。當經由光產生區域丨3〇發出之藍光（blue 所激 發呤，則便可對於含磷材料層18〇中之磷材料進行活化， 同時藉由磷材料係可發出了具有寬光譜、置中對準於黃光 波長（yellow wavelengths)之光線（例如··等向性）。經由封裝 〇所鲞出之總光谱（total Hght spectrum)之觀察器 (VleWer)係可看出黃光磷材料寬發射光譜（yellow phosphor broad emission1057-6715-PF 53 200531311 Sub: Includes: the emitted light with a peak wavelength of 530 and the frequency of 34-frequency sealant has a refractive index of 10,? The thickness of the dopant material layer is a request, the light-generating area (hght_generating is called a thickness of _, as shown in ",", and the closest adjacent distance (NNB) for the two curves (&), and The depth, opening diameter, and thickness of the η doped material layer at 1,27a, 0.72a, 1273 + 40 nm under 4. When the lattice constant increases, it is at a narrow angle (the extraction efficiency of Xiejia called ㈣, The total extraction efficiency at all angles can be increased. However, for larger lattice constants, even if the total extraction efficiency at all angles is increased, the relative order formed by the diffraction in the sealant The model system will limit the extraction efficiency of narrow angles. For example, the calculation result of the lattice constant of 460 faces shows that the extraction efficiency of people who enter the collection half angle is greater than 25%. In other words, only in Daxiao 13.4% Nearly half of the drawn light in the upper hemispWe of the three-dimensional shaw is collected ', thereby presenting the collimation effect of this pattern (c〇 出 一 ⑽). It is believed that' as far as any Can increase the inverted lattice vector G in the light level of the dead material The number of patterns, but the number of points in the inverted lattice vector G within the optical energy level of the sealant when the wave vector in the plane is limited, is ancient. With these patterns, the extraction efficiency of entering the stereo angle can be improved. ^ Let this stereo angle be centered and aligned with the normal to the upper surface of 11 °. Note that the above method is particularly effective in reducing the source etendue, which is usually proportional to其中, where n represents the refractive index of the surrounding material (S_Undingmaterial) (for example, the seal 11). Therefore, 'by reducing the refractive index of the knee seal material layer of LED100, this will cause more The parallel emission of 1057-6715-PF 54 200531311 (collimated emisslon), fewer source sound ranges and higher surface bnghtness (here it is defined as the total 7C degrees introduced into the source sound range). In some embodiments, the sealant system formed by air can reduce the source sound range, but therefore increases the entry into a given set angle (c0Uecti0n angle), centered on the upper surface 11 ( ) Normal direction. In the example, when the light generated from the light generating region 13 is emitted from the LED 100 through the upper surface 110, the mutual parallelism of the light distribution is better than the lambertian distribution. For example When the light generated by the light generating region 130 is emitted from the LED 100 through the upper surface 110, at least about 40% (for example: at least about 50%) of the light emitted by the dielectric layer (dielectric surface) %, At least about 70%, at least about 900/0) is up to about 30. (For example: at most about 25., at most about 20., at most about 15.), and this angle is orthogonal to the upper surface 110. It can be seen that in terms of the ability to relatively draw out a high proportion of light at a specified angle, or the ability to draw out a relatively high amount of light at the same time, this ability can produce a relatively high density The LED is thus provided for use as a given wafer (giyen wafa). For example, a wafer with a mother square centimeter has at least 5 LEDs (for example, at least 25 LEDs and at least 50 LEDs). In addition, with respect to the wavelength of the light generated by the light generating region, in some embodiments, the wavelength of the light emitted by the packaged LED i 00 can be corrected in some embodiments. In the example shown in FIG. 25, a 1057-6715-PF 55 200531311 system has a layer containing a phosphor material 180, and the phosphorus-containing material layer 180 is disposed on the upper surface 110. The ballast material can interact with the light with a predetermined wavelength generated by the light generating region 130, so as to generate the required specified wavelength. In some embodiments, the light emitted by the packaged LED 100 may be substantially white light. In addition, in a specific embodiment, the phosphorus material in the phosphorus-containing material layer 180 may be made of (Y, Gd) (A1, Ga) G: Ce3 + or yttrium aluminum garnet phosphor ("YAG ,, (yttrium, aluminum , Do not add)). When the blue light (blue excited blue) is emitted through the light-generating region, the phosphorous material in the phosphorous material layer 18 can be activated, and the phosphorous material system It can emit light with a broad spectrum, centered at yellow wavelengths (eg, isotropic). A viewer (VleWer) of the total Hght spectrum emanating from the package 0 The yellow phosphor broad emission spectrum can be seen.

Spectrum)、藍光氮化銦鎵窄發射光譜（blueSpectrum), blue indium gallium nitride narrow emission spectrum (blue

InGaN narrow emission (spectra)與感受白光（per spectrum)，此通常係為兩光譜 ceive white)之混合。 :邛为貫施例中，含磷材料層18〇於實質上係可以土 勻方式設置於上表s 110之上。舉例而言，於圖樣15“ 頂部⑽、含碟材料層18G之頂部181之間的距離係月 以通過上表面110且略少於2〇%(例如：略少於、略少 於5%、略少於2%)的方式進行變更。 相較於LED 1 〇〇之表φ u 〇之剖面尺寸，含鱗材料層 iS〇係通常具有較小的厚度，其大小約為1mm XI _。此InGaN narrow emission (spectra) and perception of white light (per spectrum), this is usually a mixture of two spectrum ceive white. : In the embodiment, the phosphorus-containing material layer 18 is substantially disposed on the surface s 110 in a uniform manner. For example, the distance between the top of the pattern 15 "and the top 181 of the plate-containing material layer 18G is the month to pass the upper surface 110 and less than 20% (for example: slightly less than, slightly less than 5%, Slightly less than 2%). Compared to the cross-sectional size of the table φ u 〇 of the LED 100, the scale-containing material layer iS〇 series usually has a smaller thickness, and its size is about 1mm XI.

1057-6715-PF 56 200531311 外，含磷材料層18〇於實質上係以均勻方式沉積於表面11〇 之上’於含磷材料g 18"之磷材料於實質上係可均勻地 由表面11 0所發出之光線所泵送。在相較於1 〇〇之 2面110之剖面尺寸可知，由於含磷材料層18〇之厚度相 S的薄，由光產生區域130所發出之光線便可在LED 1〇〇 之整個表面110上、以幾近均勻地的方式而在含磷材料層 18 0之中被轉換成了較低波長光線。因此，藉由相對薄且 均勻之含磷材料層180之作用下，如此便可經由led 1〇〇 發射出具有均勻光譜之白光’藉此以做為表面丨丨〇上之位 置的函數。 一般而言，LED 1 00係可根據不同需求而進行製作。 LED 1〇〇之製作通常包括了各種的沉積（dep〇siti〇n)、雷射 製程（laser processing)、微影微微影技術（iithography)、蝕 刻（etching)等步驟。1057-6715-PF 56 200531311 In addition, the phosphorus-containing material layer 18 is deposited on the surface 11 in a uniform manner, and the phosphorus material in the phosphorus-containing material g 18 is substantially uniformly formed on the surface 11 0 The light emitted is pumped. Comparing the cross-sectional dimensions of the two sides 110 of 1000, the thickness S of the phosphorus-containing material layer 180 is relatively thin, and the light emitted from the light generating region 130 can be applied to the entire surface 110 of the LED 100. It is converted into lower wavelength light in the phosphorous material layer 180 in a nearly uniform manner. Therefore, under the action of the relatively thin and uniform phosphorus-containing material layer 180, white light with a uniform spectrum can be emitted through LED 100 'as a function of the position on the surface. Generally speaking, LED 100 series can be manufactured according to different needs. The manufacturing of LED 100 usually includes various steps such as deposition, laser processing, lithography, lithography, and etching.

以弟26圖表示一發光二極體晶圓（LED wafer) 500為 例’LED晶圓500包括一 LED材料推疊層（LED layer stack of material)，此LED材料推疊層係沉積於一基底 (substrate)(例如：由藍寶石（sapphire)、混合半導體 (compound semiconductor)-氧 4匕 I令（zinc oxide)、石夕石炭 4匕物 (silicon carbide)、石夕（silicon))502之上，此晶圓已在商業上 使用。舉例而言，供應商包括了 Epistar Corporation，Arima Optoelectronics Corporation and South Epitaxy Corporation。於基底502之上依序設置了缓衝層（buffer layer)504(例如氮化鎵層（GaN layer)、氮化I呂層（A1NTake Figure 26 for an example of a light-emitting diode wafer (LED wafer) 500. The LED wafer 500 includes an LED layer stack of material, which is deposited on a substrate. (for example: sapphire, compound semiconductor-oxygen 4 zinc oxide, silicon oxide, silicon carbide, silicon oxide) 502, This wafer is already in commercial use. For example, suppliers include Epistar Corporation, Arima Optoelectronics Corporation and South Epitaxy Corporation. A buffer layer 504 (such as a gallium nitride layer (GaN layer) and a nitride layer (A1N)

1057-6715-PF 57 200531311 layer)、氮化鋁蘇層（AlGaN layer)、η-摻雜半導體層（n-doped semiconductor layer)506({列 士口： η-接雜石夕··氮 4匕蘇層（n-doped Si. GaN layer))、電流散佈層（current spreading layer)508(例 如·氣化铭叙/氮化叙異質接面（AlGaN/GaN heterojunction) 或超晶格（superlattcie))、一光發射區域（Hght-emitting region)510(例如：氮化銦鎵/氮化鎵多量子井區域 (InGaN/GaN multi-quantum well region))、一半導體層 (semiconductor layer)512(例如：p_摻雜鎂：氮化鎵層 (p-doped Mg : GaN layer))。一般而言，LED 晶圓 5〇〇 之 直径係約至少為2忖（例如：由約2叶至約12 n寸、由約2 吋至約6吋、由約2吋至約4吋、由約2吋至約3吋）。 第27圖係表示一多重推疊層55〇，其包括了複數層結 構 502、504、506、508、510、512 及 52〇、522、524、526。 一般而 a ，廷些層結構 5〇2、5〇4、5〇6、5〇8、51〇、512、 520、522、524、526之材料係可藉由以下所述之壓床 及/或加熱的方式進仃結合。舉例而言，層結構係可為 一錄層㈤心layer)(例如：電子束蒸鍍（elecfbe· evaporated))、層結構 在 π * ^ 2係可為一銀層（例如：電子束蒸 鍍）、層結構524係可為一辟既。 … ”、、鎳層（例如：電子束蒸鑛）、層結 構526係可為一金声“丨. 曰（j如·電子束蒸鍍）。於部分實施例 中，層結構520係可亙丄 、 ^ 相對薄層結構，並且層結構524 係可為一相對厚層纟士描_ ^ 。曰結構524係可用以做為擴散阻 層（diffusion barrier)，士0 a 次此以減少污染物（contaminants)(例 如：金）擴散進入層結槿 毒520、5 22及/或其本身5 24之中。1057-6715-PF 57 200531311 layer), aluminum nitride layer (AlGaN layer), n-doped semiconductor layer (n-doped semiconductor layer) 506 ({Leshikou: η-doped stone xi ·· nitrogen 4 N-doped Si. GaN layer), current spreading layer 508 (e.g. AlGaN / GaN heterojunction or superlattcie) ), A light-emitting region (Hght-emitting region) 510 (for example: InGaN / GaN multi-quantum well region (InGaN / GaN multi-quantum well region)), a semiconductor layer (semiconductor layer) 512 (for example : P-doped Mg: GaN layer (p-doped Mg: GaN layer). Generally speaking, the diameter of LED wafer 500 is at least about 2 忖 (for example: from about 2 leaves to about 12 n inches, from about 2 inches to about 6 inches, from about 2 inches to about 4 inches, from About 2 inches to about 3 inches). Figure 27 shows a multiple push stack 55o, which includes a plurality of layer structures 502, 504, 506, 508, 510, 512 and 52, 522, 524, 526. Generally speaking, the materials of these layer structures 502, 504, 506, 508, 510, 512, 520, 522, 524, 526 can be made by the following presses and / Or heat to combine. For example, the layer structure can be a layer (eg, electron beam evaporation), and the layer structure can be a silver layer (eg, electron beam evaporation) at π * ^ 2 ), The layer structure 524 series can be clear. … ”, Nickel layer (for example: electron beam evaporation), the layer structure 526 can be a golden sound“ 丨. ”(J 如 · electron beam evaporation). In some embodiments, the layer structure 520 may be a relatively thin layer structure, and the layer structure 524 may be a relatively thick layer. The structure 524 can be used as a diffusion barrier, and a second time to reduce the diffusion of contaminants (for example, gold) into the layered poison 520, 5 22 and / or itself 5 24 In.

1057-6715-PF 58 200531311 在完成了層結構520、522、5：24、526的沉積作業之後，多 重推疊層550便可經由處理而達到了歐姆式接觸。舉例而 言，多重推疊層550係可於適當的氣體環境（例如：氮氣、 氧氣、空氣或成型氣體（forming gas))、既定時間（例如：約 由30至300秒）下進行退火處理（例如：溫度約介於4〇〇_6〇〇 °C (Celsius)之間），如此以達到了歐姆式接觸。 第28圖係表示一多重推疊層6〇〇，包括了 一載具 (submount)(例如：鍺（germanium)(例如：多晶鍺 (polycrystalline germanium))、矽（silic〇n)(例如：多晶石夕 (polycrystalline silicon))、石夕碳化物（silic〇n_carbide)、銅 (copper)、銅鶴（C0pper_tungsten)、鑽石（diam〇nd)、錄钻 (niCkel-c〇balt))602,此載具 602 係由層結構 6〇4、6〇6、6〇8、 6 i 0所沉積而成。舉例而言，载具6〇2係可由滅鐘（sputter_ 或電積（eiectr〇f〇rming)而形成。層結構6〇4係為一接觸墊 (contact)，其係由銘（例如：電子束蒸鍍）所製成。層結構 606係為-擴散阻層，其係由鎳（例如：電子束蒸幻所製 成。層結構608係、為-金層（例如：電子束蒸鍵方式所形 成）。層結構610係可為一金锡結合層（AuSn bonding layer)610係沉積（例如：利用電子東 果瘵鍍）於金層608之上。 在完成了層結構604、606、608、w π μ 610的沉積作業之後，多 重推疊層600便可經由處理而達至丨 思勻了歐姆式接觸。舉例而 言，多重推疊層600係可於適當的氧 κ产 7祇體裱境（例如：氮氣、 氧氣、空氣或成型氣體）、既定時問 、一、 間（例如··約由30至3〇〇 秒）下進行退火處理（例如：溫度約 丨於35〇-5〇〇°c之間）， 1057-6715-PF 59 200531311 如此以達到了歐姆式接觸。 第29圖係表示一多重推疊層650，其包括了相互結合 之層結構5 2 6、6 1 0 (例如·以錫焊（s ο 1 d e r b ο n d)、共晶結合 (eutectic bond))、包晶結合（peritectic bond)方式所形成）。 舉例而言，層結構526、610係可採用熱壓機械 (thermal-mechanical pressing)方式而達到相互的結合。舉 例而言，多重推疊層650係可經由壓床及熱壓（例如··壓力 至多約為5 MPa、至多約為2 MPa)(例如：溫度約介於 200-400°C之間）的方式進行結合。隨後，將多重推疊層65〇 自壓床移除且進行冷卻（例如：於室溫（r〇〇m temperature) 之中）。 隨後，將部分的基底502、緩衝層504局部地自多重 推疊層650進行移除，其移除係可採用任何的方法來達 成。舉例而言，如第30圖所示之實施例中，在電磁輻射 (electromagnetic radiati〇n)、適當的波長下進行曝光時，如 此便可對於多重推疊層650(例如：經由基底5〇2之表面5〇1: 之基底502進行移除，並且局部對於緩衝層5〇4進行分解 (decompose)。可以確信的是，在上述方式作用下係會造成 了缓衝層5G4之局部加熱，同時造成了鄰近於緩衝層⑽、 基底502之介面的位置上之緩衝層5〇4的局部分解曰，藉此 便可對於多重推疊層65〇上之基底5〇2進行移除(如下文所 述）。以氮化鎵層所製成之緩衝層5〇4為例，可以讀認的是 於其成份（C〇nstituent)中係包括了鎵（料出職）、氣能氮 (gaSe_nitr〇gen)。於部分實施例中，當基底如之^面1057-6715-PF 58 200531311 After the deposition of the layer structures 520, 522, 5:24, 526 is completed, the multiple push stack 550 can be processed to achieve ohmic contact. For example, the multiple push stack 550 can be annealed in a suitable gas environment (for example: nitrogen, oxygen, air or forming gas) for a predetermined time (for example, from about 30 to 300 seconds) ( For example: the temperature is between 400-600 ° C (Celsius)), so as to achieve ohmic contact. Figure 28 shows a multiple push stack 600, including a submount (for example: germanium (for example: polycrystalline germanium)), silicon (for example : Polycrystalline silicon), silicon carbide, copper, copper, copper_tungsten, diamond, niCkel-cobalt) 602 This carrier 602 is deposited by a layer structure 604, 606, 608, 6i0. For example, the carrier 602 series can be formed by sputter_ or eiectrffrming. The layer structure 604 is a contact pad, which is formed by an inscription (for example: electronic Beam evaporation). The layer structure 606 is a -diffusion resistance layer, which is made of nickel (for example: electron beam evaporation. The layer structure 608 is -gold layer (for example, the electron beam evaporation method). The layer structure 610 can be an AuSn bonding layer (AuSn bonding layer). The 610 series can be deposited (eg, plated with electronic fruit) on the gold layer 608. The layer structures 604, 606, 608 are completed After the deposition operation of w π μ 610, the multiple push stack 600 can be processed to achieve ohmic contact. For example, the multiple push stack 600 can produce 7 bodies with appropriate oxygen κ. Mounting environment (such as: nitrogen, oxygen, air, or molding gas), timed, and time (for example, about 30 to 300 seconds) annealed (for example, the temperature is about 35 to 5-5) 〇〇 ° c), 1057-6715-PF 59 200531311 so as to achieve ohmic contact. Figure 29 shows A multiple push stack 650 including a layer structure 5 2 6 and 6 1 0 bonded to each other (for example, soldering (s ο 1 derb ο nd), eutectic bond), peritectic bond (Peritectic bond). For example, the layer structures 526 and 610 can be combined with each other by thermal-mechanical pressing. For example, the multiple push-stack 650 can be laminated by pressing. Bed and hot pressing (for example, the pressure is at most about 5 MPa, at most about 2 MPa) (for example, the temperature is about 200-400 ° C). Then, multiple pushes are stacked 65. It is removed from the press and cooled (for example, at room temperature). Then, a part of the substrate 502 and the buffer layer 504 are partially removed from the multiple push stack 650, and the The division can be achieved by any method. For example, in the embodiment shown in FIG. 30, when the exposure is performed under electromagnetic radiation and an appropriate wavelength, multiple overlapping can be performed in this way. Layer 650 (e.g. via surface 5 of substrate 502: substrate 5 02 is removed, and the buffer layer 504 is partially decomposed. It is believed that the above method will cause local heating of the buffer layer 5G4, and at the same time, it will cause the buffer layer ⑽, The partial disassembly of the buffer layer 504 at the position of the interface of the substrate 502 can be used to remove the substrate 502 on the multiple push stack 650 (as described below). Taking the buffer layer 504 made of gallium nitride layer as an example, it can be read that its composition (Constituent) includes gallium (recruited), gas energy nitrogen (gaSe_nitrogen). In some embodiments, when the substrate is

1057-6715-PF 60 200531311 501於電磁輻射下造杆 广遵仃曝先的過程時，多重 可以被加熱。此外，多重 且曰5〇疋 π +彳, 且層65〇亦可放置在一加埶板 (hot plate)及/或利用另一 ^ ά W 射源（laser source)(例如·· c〇2 雷射 C〇2(C〇2 laser、、，v A > , 2 ))以進仃加熱。舉例而言，當基底502 之表面501於電磁輻身十下、隹—甚， 田巷低 兹季田射下進订曝光、且對於多重推 〇 進行加熱時，除了可以请+ 了以減》（例如··預防）液態鎵（liquid gallium)的固化之外 同B士 — ^同％在鎵之再固化（re-solidification) 過程中係可降低多重施晶恳 夕更推$層65〇中之應變（Strain)。 少於特定貝^例中’當完成了電磁輻射的曝光程序之 後基底502係可藉由殘留録（㈣咖^料出聰）而結合於多 重推疊層650之中。於部分實施例中，多重推疊層650係 可被加熱至鎵之熔點溫度（mehing temperature)之上，如此 便可對基底502進行移除作業。於特定實施例中，多重推 且層650係可曝硌在一姓刻劑（etchant)(如HQ之化學钱刻 劑（chenncal etchant))之中，如此便可對於殘留鎵進行蝕 刻、對於基底502進行移除。另外，凡是可它可對於殘留 鎵進行移除之其它方式均可被採用。 於特定實施例中，基底502之表面501係曝露在具有 每射504(例如·約248奈米（nanometers)、約355奈米）之 及收波長（absorption wavelength)之雷射輕射（laser radiation)。舉例而言，美國專利第 6,420,242、6,071，795 中係分別揭露了相關雷射輻射製程（laser racjiation processes)，於此亦併入說明。隨後，當多重推疊層650係 被加熱至鎵之熔點溫度之上時，藉由一側向力（lateral force) 1057-6715-PF 61 200531311 便可將多重推疊層65〇中之基底502、緩衝層5〇4進行移 除（例如·採用棉花棒（c〇tt〇n swab))。 於部分實施例中，基底502之表面501的複數部分 (multiple portions)係同時曝露於電磁輻射之中。於特定實 加例中基底5 0 2之表面5 0 1的複數部分係依序曝露於電 磁輻射之中。基底502之表面5〇1的複數部分亦可採用同 日寸及依序的方式而曝露於電磁輻射之中。此外，電磁輕射 亦可採用圖樣（例如··蛇形狀圖樣（serpentine patterns)、圓 % 狀圖樣（circular patterns)、螺旋狀圖樣（spiral paUerns)、 格子（grids)、格栅狀圖樣（gratings)、三角圖樣⑴丨妨別心 patterns)、（elementary patterns)、任意圖樣（咖1057-6715-PF 60 200531311 501 When making a rod under electromagnetic radiation When following the first exposure process, multiple can be heated. In addition, multiple and said 5〇 疋 π + 彳, and the layer 65〇 can also be placed on a hot plate and / or using another ^ ά W laser source (such as · c〇2 Laser Co2 (Co2 laser ,,, v A >, 2)) was used for heating. For example, when the surface 501 of the substrate 502 is ten times under the electromagnetic radiation, and the field is low and the field is shot, and the exposure is set, and the multiple pushes are heated, in addition to +, you can subtract + " (For example, · prevent) Liquid gallium is the same as B—except for the solidification of liquid gallium, which can reduce the multiple application of crystals during the re-solidification process of gallium. Strain. In less than a specific example, the substrate 502 can be incorporated into the multi-push stack 650 by the residual recording after the exposure process of electromagnetic radiation is completed. In some embodiments, the multiple push stack 650 can be heated above the mehing temperature of gallium, so that the substrate 502 can be removed. In a specific embodiment, multiple layers and layers 650 can be exposed to an etchant (such as HQ's chenncal etchant), so that the residual gallium can be etched, and the substrate can be etched. 502 for removal. In addition, any other method that can remove residual gallium can be used. In a specific embodiment, the surface 501 of the substrate 502 is exposed to laser light having a radiation wavelength of 504 (for example, about 248 nanometers, about 355 nanometers) and an absorption wavelength. ). For example, US Patent Nos. 6,420,242 and 6,071,795 respectively disclose related laser racjiation processes, which are also incorporated herein. Subsequently, when the multiple push stack 650 is heated above the melting point of gallium, the substrate 502 in the multiple push stack 65 can be pushed by the lateral force 1057-6715-PF 61 200531311. And removing the buffer layer 504 (for example, using a cotton swab). In some embodiments, multiple portions of the surface 501 of the substrate 502 are simultaneously exposed to electromagnetic radiation. In the specific example, a plurality of parts of the surface 5 0 1 of the substrate 5 2 are sequentially exposed to electromagnetic radiation. Plural portions of the surface 501 of the substrate 502 may also be exposed to electromagnetic radiation in the same manner and in a sequential manner. In addition, electromagnetic light emission can also use patterns (for example, serpentine patterns, circular patterns, spiral paUerns, grids, grids, gratis) 、 Triangular patterns ⑴ 丨 beware of patterns), (elementary patterns), arbitrary patterns (coffee

PatternS)、複雜圖樣（complex patterns)、周期性圖樣 (periodic patterns)、非周期性圖樣（n〇nperi〇dic 方式而對於基底502之表面5〇1進行曝光。於部分實施例 中’電磁輻射亦可採用網格方式通過了表面5〇1之一或多 數個邛刀。於特定實施例中，表面5 0 1係曝露在電磁輻射 之複數重疊區域（overlapping fields)之中。 於部分實施例中，在將基底5〇2之表面501於電磁輻 射下進行曝光之前，其更包括了使得電磁輻射通過一光罩 (maSk)。舉例而言，當電磁輻射未抵達基底502之表面501 之前，電磁輻射係可通過一光學系統（〇ptical system)，一 光罩（例如·光罩鉬光罩（m〇lybdenum mask)、鈹銅光罩 (coppe卜berylliUm mask))之高熱傳導光罩（high 加·w ductivity mask))係設計在此光學系統之中。於部分實施 62PatternS), complex patterns, periodic patterns, aperiodic patterns (nonperiodic) to expose the surface 501 of the substrate 502. In some embodiments, 'electromagnetic radiation is also One or more of the surface 501 can be passed in a grid manner. In a specific embodiment, the surface 501 is exposed to multiple overlapping fields of electromagnetic radiation. In some embodiments Before exposing the surface 501 of the substrate 50 to electromagnetic radiation, it further includes passing the electromagnetic radiation through a mask (maSk). For example, when the electromagnetic radiation does not reach the surface 501 of the substrate 502, the electromagnetic The radiation system can pass through an optical system, a photomask (for example, a molybdenum mask, a coppe berylliUm mask), and a high heat conduction mask (high plus · W ductivity mask)) is designed in this optical system. Partially implemented 62

1057-6715-PF 200531311 例中，光罩係為力, wt 為開孔（apenure)(例如··用以對於電子束進 订截切(truncatino、十々如丨/ ! 电丁术進 g)或成型（shaping))。舉例而言， 包括了至少兩鎊片，品止里a 尤予系統 g 片而先罩係設置於兩鏡片之間。於另一 例子中，光罩係可由表面501上$ 於另 # # ^ #面501上之一材料㈣#^彡#， =ΓΓ得特定之部分的表面501曝光、部分的表面 501不曝光。舉例而言’光1057-6715-PF 200531311 In the example, the mask is force and wt is an aperture (for example, to cut the electron beam into a cut (truncatino, ten 々 like 丨 /! 电 丁 术 进 g) Or shaping). For example, it includes at least two pounds, pinzili a, especially system g, and the first cover is placed between the two lenses. In another example, the mask can be exposed on the surface 501 to ## ^ # 一个 材料 501 # ^ 彡 # on the surface 501 to obtain a specific portion of the surface 501 exposed, and a portion of the surface 501 not exposed. For example ’light

Drocess^/f^^ . ^ ^ % (hth〇graphy 方…：成。於部分實施例中，電磁輕射係以光栅化的 方式通過了光罩之一或複數部分。 為：不希望受到理論的限制，當藉由降低曝光於 輕射之表面、5〇1中之給定區域之至少一尺寸的作用下，其 係可二制了進入多重推疊層㈣之緩衝層5〇4、層結構州 或其它層結構之裂痕的傳播現象是可以被限制的，但其仍 然可允許基底5G2、緩衝層5G4之間之介面上的裂痕傳播。 可以確認的是，如果表面5〇1上之電磁輕射之特徵的尺寸 過大’則便可會形成了氣泡(gase_b錢㈣ (nitrogen bubble)) ’亚且在氣泡的作用下係 (1—剛叫、不當裂痕的現象產生。舉例而言^ 部分實施例中，雷射輕射下所進行曝光的表面5〇ι上係會 形成了點（spot)及線（line)的裂痕，此點或線裂痕之最大尺 寸係可能約為1公爱（例如：至多約為5〇〇微米㈤C⑽S)、 至多約為100微米、至多約為25微米、至多約為1〇微米）。 於部分實施例中，點的尺寸係約可從5微米至1公釐(例 如·約可從5微米至1 0 0彡叫出 __ ⑽被未、約可從5微米至25、約可Drocess ^ / f ^^. ^ ^% (Hth〇graphy square ...: Cheng. In some embodiments, the electromagnetic light transmission system has passed through one or more of the photomasks in a rasterized manner. For: do not want to be subject to theory The limitation is that by reducing at least one size of a given area exposed to light shots and a given area in 501, it can be made into a buffer layer 504, a layer that enters a multiple push stack. The propagation of cracks in structural states or other layer structures can be restricted, but it still allows cracks to propagate on the interface between the substrate 5G2 and the buffer layer 5G4. It can be confirmed that if the electromagnetic field on the surface 501 If the size of the light shot feature is too large, then a bubble (gase_b㈣ nitro (nitrogen bubble)) will be formed, and it will be under the action of the bubble (1-just called, improper cracks. For example, ^ part In the embodiment, spot and line cracks will be formed on the surface exposed by laser light shots. The maximum size of this point or line crack may be about 1 kilogram ( For example: at most about 500 microns (C⑽S), at most about 100 microns (At most about 25 microns, at most about 10 microns). In some embodiments, the size of the dots can be from about 5 microns to 1 mm (e.g., about 5 microns to 100 mm). Quilt, about 5 microns to about 25, about

從5微米至1 〇微米）。 1057—6715—PF 63 200531311 於特定貫施例中，各其麻$ π 9 之下、隹—膜上士 田土- 之表面501於電磁輻射 之下進仃曝光時，多會姑田田田溫κ c Λ〆 表Μ 夕重推$層65〇係會產生振動。為了不 希望文到理論的限制，當其底 τ ^ ^底502之表面501於電磁輕射 之下進行曝光時，振動的容舌施晶 搌動的夕重推豐層65〇係會造成了沿 基底502、緩衝層504之η之人而l 野曰⑽之間之;丨面上之裂痕傳播現象的增 加。-般而t ’藉由條件（conditions)的選擇係可對於進入 緩衝層504之裂痕傳播進行限制（例如：於實質上便不會有 裂痕進入緩衝層504、層結構5〇6及多重推叠層_之並 它層結構）。 a 在將基底502移除之後，於層結構5〇6之部分表面上 係會殘留有部分的緩衝| 5〇4。此外，基底5G2之殘留部 分（例如：含鋁及/或氧）亦可能出現在緩衝層5〇4之殘留部 分及/或層結構506之表面上。就後續所形成之電接觸塾 (dectrica! Contact)而言，由於層結構5〇6(_般係由n_接雜 半導體材料所形成)係具有相當良好的電性質⑷咖― propertles)(例如：所需之接觸電阻（electrical resistance》， 一般係將緩衝層504之殘留部分、基底5〇2之任何殘留部 分完全移除，如此便可對於層結構5〇6之表面進行曝光、 對於η-摻雜半導體層506之曝光表面進行清潔。此^卜，就 任何殘留部分及/或緩衝層5〇4之殘留部分的移除方式、對 於層結構506之表面的清潔方式（例如：移除有> 機物 (organics)及 / 或粒子（particles)之不純物（inipuritie…而 言’其係藉由-或數個步驟來達成。這些製程係可採用各 種技術及/或其組合方式而完成。舉例而言，化學機械研磨 1057-6715-PF 64 200531311 製程（chemical-mechanical polishing process)、機械研磨 (mechanical polishing)、活性離子蝕刻（reactive]〇n etching)(例如··於實質上係利用化學蝕刻成分（chemical component))、物理蝕刻（physical physical)及溼蝕刻（wet etching)。舉例而言，於 Ghandhi，S_，VLSI Fabrication Principles: Silicon & Gallium Arsenide (1994)係揭露了相 關的技術，於此亦列入相關說明之中。於特定實施例中， 緩衝層504並未完全被移除，取而代之的方式係為：僅將 後續所形成之電導線（electrical leads)所對應設置之位置上 的部分緩衝層504予以移除（例如：採用自動對準製程 (self-aligned process)) 〇 一般在將基底502移除之後，於多重推疊層65〇(例 如：於由於在多重推疊層650中之晶格差排（mismatch)&/ 或熱差排（thermal mismatch))中之應變的數量是可以改變 的。舉例而言，如果在多重推疊層650中之應變的數量減 少，則尖峰輸出波長（peak output wavelength)係會隨之改綠 (例如：增加）。於另一例子中，如果在多重推疊層中 之應變的數量增加，則尖峰輸出波長係會隨之改變（例如· 減少）。 為了避免在基底502之移除過程中產生 I /生土〗不當的裂 痕，則基底502之熱膨脹係數、載具602之熱膨服係數、 複數層結構502/504/506/508/510/512之結合厚户及/或、— 數層結構502/504/506/508/5 10/512中之一式鉍加p 次数個層結構之 熱膨脹係數是必須進行適當的考量。舉例而士 牛列印5 ’在對於基 65From 5 microns to 10 microns). 1057—6715—PF 63 200531311 In the specific embodiment, each line is under $ π 9 and the surface 501 of the film field soil is exposed to electromagnetic radiation. κ c Λ〆 Table M will cause vibration if the layer 65 is pushed again. In order not to limit the theory to the theory, when the surface 501 of the bottom τ ^ ^ bottom 502 is exposed under the electromagnetic light, the vibration of the tongue will cause the crystal layer to move and push the layer 65. There is an increase in the propagation of cracks on the surface of the substrate 502 and the n of the buffer layer 504. -In general, the choice of conditions can limit the propagation of cracks into the buffer layer 504 (for example, substantially no cracks will enter the buffer layer 504, the layer structure 506, and multiple pushovers. Layer_ and its layer structure). a After removing the substrate 502, there will be a portion of the buffer on the surface of the layer structure 506 | 504. In addition, the residual portion of the substrate 5G2 (for example, containing aluminum and / or oxygen) may also appear on the surface of the residual portion of the buffer layer 504 and / or the layer structure 506. In terms of the subsequent formation of Dectrica! Contact, the layer structure 506 (which is generally formed by n-doped semiconductor materials) has fairly good electrical properties (propertles) (for example, : Required contact resistance (electrical resistance). Generally, the residual portion of the buffer layer 504 and any residual portion of the substrate 50 are completely removed, so that the surface of the layer structure 506 can be exposed. For η- The exposed surface of the doped semiconductor layer 506 is cleaned. In this regard, the removal method of any remaining portion and / or the remaining portion of the buffer layer 504, and the cleaning method of the surface of the layer structure 506 (for example: removing > Impurities of organics and / or particles (in terms of 'inipuritie ...' are achieved by-or several steps. These processes can be accomplished using various techniques and / or combinations thereof. For example, chemical-mechanical polishing 1057-6715-PF 64 200531311 process (chemical-mechanical polishing process), mechanical polishing (mechanical polishing), reactive ion etching (reactive) on etching (for example · It essentially uses chemical component, physical physical and wet etching. For example, Ghandhi, S_, VLSI Fabrication Principles: Silicon & Gallium Arsenide (1994) The related technology is disclosed, and it is also included in the related description. In a specific embodiment, the buffer layer 504 has not been completely removed, and the method is instead: only the electrical leads formed subsequently A portion of the buffer layer 504 at the corresponding position is removed (for example, using a self-aligned process). Generally, after the substrate 502 is removed, the multiple layers are stacked 65. (For example: in Because the amount of strain in the lattice mismatch & / or thermal mismatch in the multiple push stack 650 can be changed. For example, if the If the amount of strain decreases, the peak output wavelength will change to green (for example: increase). In another example, if the strain in the multiple push stack The number increases, the peak wavelength of the output line will change (for example Reduce). In order to avoid improper cracking during the removal of the substrate 502, the thermal expansion coefficient of the substrate 502, the thermal expansion coefficient of the carrier 602, and the multiple layer structure 502/504/506/508/510/512 Combining thick households and / or, — The thermal expansion coefficient of the multi-layer structure of bismuth plus p times in the multi-layer structure 502/504/506/508/5 10/512 must be properly considered. For example, cattle printing 5 ’on the base 65

1057-6715-PF 200531311 底5〇2、载具6〇2之適當選摆 田&擇之下，於部分實施例中之載 具_之熱膨脹係數是以至少約為15%(至少約為ι〇%、至 少約為5%)而小於基底502之熱膨脹係數。另外，在對於 基底502、载具602之適當選擇之下，於特定實施例中之 基底5〇2之厚度於實質上係大於载具602之厚度。於另一 例子中，在對於半導體層5〇4、5〇6、5〇8、51〇、512及載 具6〇2之適當選擇之下’載具6()2之熱膨脹係、數是以至少 約為15%(至少約為1〇%、至少約為5。句而小於半導體層 504、506、508、51 0q ^ _ 12中之一或數個半導體層之熱膨 脹係數。 般而3，基底502、載具6〇2之厚度係可根據實際 需求而調整。於部分實施例中’基底5〇2之厚度至多約為 5公釐(例如：至多約為3公釐、至多約為i公釐、至多約 為〇.5公釐）。於部分實施例中’載具6〇2之厚度至多約為 10公釐(例如：至多約為5公釐、至多約為i公釐、至多約 為0.5公釐）。於部分實施例巾，載具6〇2的厚度係大於基 底5〇2的厚度；於特定實施例中，基底502的厚度係大於 載具602的厚度。 在完成了緩衝層504之移除、層結構5〇6之表面的曝 光/清潔作業之後，層結構5〇6之厚度係可降低至光發射裝 置（hght-ermtting device)所採用之最終厚度（心士以 thlCkneSS)。舉例而言，僅藉由機械蝕刻製程（mechanical etching process)、或是同時搭配蝕刻製程而降低層結構5〇6 的厚度。於部分實施例中，當完成了層結構5〇6之曝光表 1057—6715-PF 66 200531311 面的㈣/清潔之後，於層結構5G6之表面係具有相對高平 坦度（degree〇ffiatn叫（例如：以微影標線（丨 reticle)之比例下的可利用相對离 、 祁对回千坦度）。舉例而言，在完 成了層結構5 0 6之曝光表面的钱 挪刎&凃之後，於部分實施 例中之層結構5 0 6之表面係具有各 ，母6.25平方公分、至多約 10微米之平坦度（flatness)(例如：每 母平方公分、至多 約5微米，每6.25平方公分、至多 少，.]i彳政未）。舉另一例而 言’在完成了層結構506之曝光表面的钱刻/清潔之後，於 特定實施例中之層結構506之表面係具有每平方公分、至 多約10微米之平坦度（例如：每平方公分、至多約5微米， 每平方公分、至多Θ !微米）。於特定實施例中，在完成了 層結構506之曝光表面的钱刻/清潔之後，層結構5〇6之表 面係”有至夕約50奈米之均方根粗糙度（rms roughness)(例如··至多約25奈米、至多約ι〇奈米、至多 約5奈米、至多約丨奈米）。 在形成了介電函數（根據層結構5〇6之表面之圖樣而進 打空間上改變的）之前，於部分實施例中之層結構5〇6係具 有相當粗糙及/或平坦度不足之曝光表面，如此將無法使用 奈米微影（nan〇lith〇graphy)以形成了具有相當精確 (accuracy)及/或再現性（repr〇ducibility)之圖樣。為了在層 結構506之表面上形成具有相當精確及/或再現性高之圖 樣’於奈米微影製程中係可包括了 ··在層結構5〇6之表面 /儿積形成了一平坦化層（planarization layer)、在平坦化層之 表面；儿積形成了一微影層（lithography layer)。以第3 1圖所 1057-6715-PF 67 200531311 不為例，一平坦化層702係沉積形成於層結構5〇6之表面 上’一微影層704係沉積形成於平坦化層702之上。在完 成了層結構506之蝕刻/清潔之後，層結構5〇6之曝光表面 5 05係相當的粗糙（例如：約1〇或至多為1〇奈米之均方根 粗糙度）。於部分實施例中，平坦化層7〇2係由複數層結構 (例如：以相同材料）、依序沉積的方式而形成。 舉例而言，平坦化層702係可選自於包括有聚合物（例 如：Brewer Sciences所提出之DUV_3〇J、抗反射塗層 (anti-reflection coatings)、高黏度可成型聚合物砂 viscosity formable p〇lymers))之材料，微影層 7〇4 係可選自 於包括有紫外光硬化型聚合物（uv_curaMe p〇lyme^(例 如·由M〇leciilar Imprints，lnc.所提供之低黏度 MonoMatTM(l〇w visc〇sity M〇n〇MatTM))。平坦化層 7〇2、微 影層704係可根據任何指定之技術而形成，例如··旋轉塗 佈（spin coating)、氣相沉積（vap〇r心卩⑽⑴⑽）及其它類似 方式。 八 、、 舉例而言，平坦化層702之厚度係至少約為1〇〇奈米 l例如·至少約為500奈米）及/或至多約為5微米（例如：至 多約為1微米），微影層704之厚度係至少約為i奈米（例 如·至少約為10奈米）及/或至多約為1微米（例如：至多約 為0.5微米）。 、[^後，將_模型（m〇ld)壓入於微影層之中，此模型係 用以定義所需圖樣之一部分（p〇rti〇n)(通常係經由加熱程 序、或模型及/或層結才籌7〇4之紫外光硬化），並且以:段1057-6715-PF 200531311 Bottom 502, Appropriate selection of the carrier 602, and the thermal expansion coefficient of the carrier _ in some embodiments is at least about 15% (at least about 10%, at least about 5%) and less than the thermal expansion coefficient of the substrate 502. In addition, under proper selection of the substrate 502 and the carrier 602, the thickness of the substrate 50 in the specific embodiment is substantially larger than the thickness of the carrier 602. In another example, under the appropriate choice of the semiconductor layers 504, 506, 508, 51, 512, and the carrier 602, the thermal expansion coefficient of the carrier 6 () 2 is The coefficient of thermal expansion of at least about 15% (at least about 10%, at least about 5.) is less than the thermal expansion coefficient of one or more of the semiconductor layers 504, 506, 508, and 51 0q ^ _12. Generally, 3 The thickness of the substrate 502 and the carrier 602 can be adjusted according to actual needs. In some embodiments, the thickness of the substrate 502 is at most about 5 mm (for example: at most about 3 mm, at most about i mm, at most about 0.5 mm). In some embodiments, the thickness of the carrier 602 is at most about 10 mm (for example: at most about 5 mm, at most about i mm, (At most about 0.5 mm). In some embodiments, the thickness of the carrier 602 is greater than the thickness of the substrate 502; in a particular embodiment, the thickness of the substrate 502 is greater than the thickness of the carrier 602. Upon completion After removing the buffer layer 504 and exposing / cleaning the surface of the layer structure 506, the thickness of the layer structure 506 can be reduced to a light emitting device (hght-ermttin g device) The final thickness (thlCkneSS) used. For example, only the mechanical etching process (mechanical etching process), or simultaneous etching process to reduce the thickness of the layer structure 506. Partial implementation In the example, after the exposure of 1057—6715-PF 66 200531311 of the layer structure 506 is completed, the surface of the layer structure 5G6 has a relatively high flatness (degree Offiatn called (for example: The available relative separation and qi reticle ratio can be used in the proportion of the reticle. For example, after completing the Qian Nuo 刎 & coating of the exposed surface of the layer structure 506, The surface structure of the layer structure 506 in the embodiment has a flatness of 6.25 square centimeters and a flatness of at most about 10 micrometers (for example: per square centimeter, up to about 5 micrometers and 6.25 square centimeters, and how much) ，] I 彳 政 未). For another example, after the engraving / cleaning of the exposed surface of the layer structure 506 is completed, the surface of the layer structure 506 in a specific embodiment has a surface area of at most about 10 micron flat (For example: at most about 5 microns per square centimeter, at most Θ! Microns per square centimeter.) In a specific embodiment, after the engraving / cleaning of the exposed surface of the layer structure 506, The "surface system" has a root-mean-square roughness (rms roughness) of about 50 nanometers (for example, at most about 25 nanometers, at most about 1 nanometer, at most about 5 nanometers, at most about 丨 nanometers). Prior to the formation of the dielectric function (which is spatially altered according to the pattern of the surface of the layer structure 506), the layer structure 506 in some embodiments had a relatively rough and / or insufficient flatness exposure On the surface, nanolithography cannot be used in this way to form a pattern with relatively accurate and / or reproducibility. In order to form a pattern with high accuracy and / or high reproducibility on the surface of the layer structure 506, it may be included in the nanolithography process ... a flattening is formed on the surface / product of the layer structure 506 Layer (planarization layer) on the surface of the planarization layer; a lithography layer is formed by the child product. Taking Fig. 31, 1057-6715-PF 67 200531311 as an example, a planarizing layer 702 is deposited on the surface of the layer structure 506. A lithographic layer 704 is deposited on the planarizing layer 702. . After the etching / cleaning of the layer structure 506 is completed, the exposed surface of the layer structure 506 is relatively rough (e.g., about 10 or at most 10 nm root-mean-square roughness). In some embodiments, the planarization layer 702 is formed of a plurality of layers (for example, the same material) and sequentially deposited. For example, the planarization layer 702 may be selected from the group consisting of polymers (for example, DUV_30J proposed by Brewer Sciences, anti-reflection coatings, and high viscosity moldable polymer sand visacosity formable p). 〇lymers)) material, the lithography layer 704 may be selected from the group consisting of ultraviolet curable polymers (uv_curaMe plyme ^ (for example, low viscosity MonoMatTM provided by Moleciilar Imprints, lnc. l〇w visc〇sity M〇n〇MatTM)). The planarization layer 702, the lithographic layer 704 can be formed according to any specified technology, such as spin coating, vapor deposition ( vap〇r heart) and other similar methods. 8. For example, the thickness of the planarization layer 702 is at least about 100 nm (for example, at least about 500 nm) and / or at most about 5 micrometers (for example: at most about 1 micrometer), the thickness of the lithographic layer 704 is at least about 1 nanometer (for example, at least about 10 nanometers) and / or at most about 1 micrometer (for example: at most about 0.5) Microns). After [^, _ model (m〇ld) is pressed into the lithography layer. This model is used to define a part of the desired pattern (p〇rti〇n) (usually through a heating program, or model and And / or lamination to raise the UV light curing of 704), and:

1057-6715-PF 68 200531311 性方式逐步地（p〇rtion-by-p0rti〇n)在層結構704(第32圖） 上形成了複數凹陷部（indentions)，這些凹陷部係相對於層 結構506之表面中所形成的圖樣。於部分實施例中，藉由 單一步驟（single steps)係可將整個晶圓予以覆蓋（例如：完 整晶圓奈米微影技術（full wafer techniques))。隨後，對於層結構704進行蝕刻（例如··利用 活性離子颠刻（reactive ion etching)、澄钱刻（wet etching))，如此便可對於相對於層結構704之凹陷部之平 坦化層702之表面上的複數部分進行曝光（第33圖）。舉例 而言’美國專利第 5,722,905 號、Zhang et al·，Applied Physics Letters，Vol. 83, No. 8, ρρ· 1632-34 等係揭露了關 於壓印/兹刻製程（impirnt/etch processes)，於此係均併入朱 考。一般而言，於後續流程中之n-接觸墊係沉積在微影層 704之圖樣中之部分區域之上。於另一實施例中，其它的 技術（例如：X光微影（x-ray lithography)、深紫外線微影 (deep ultraviolet lithography)、極紫外線微影（extreme ultraviolet lithography)、浸潤式微影（immersi〇n lithography)、干涉式微影（interference lithography)、電子 束微影（electron beam lithography)、照相微景〈 (photolithography)、微接觸式印刷（microcontact printing)、 自動組裝技術（self-assembly techniques)係可用以進行微影 層704之製作。 如第34圖所示，經圖樣之微影層704係用以做為一光 罩，藉此可將圖樣轉移至平坦化層702之中（例如：乾钱刻 1057—6715—PF 69 200531311 (dry etching)、溼蝕刻）。乾蝕刻之例子係為活性離子蝕刻。 請參閱第36圖，層結構702、704係依序用以做為光罩， 藉此可將圖樣轉移至層結構506的表面之中（例如：採用乾 蝕刻、溼蝕刻）。如第36圖所示，在對於層結構5〇6之蝕 刻作用下，層結構702、704便可被移除（例如··採用氧基 活性離子蝕刻（oxygen_based reactive_i〇：n etching)、溼溶劑 雀虫刻（wet solvent etching))。 如第37圖所示，於部分實施例之製程中係包括了將一 材料（material)708(例如：紹（aiuminum)、錄（nickei)、鈦 (titanium)、鎢（tungsten)等金屬）沉積於層結構7〇2/7〇4(例 如·蒸鑛（evaporation)之被银刻部位之中、層結構704之表 面上。如第38圖所示，隨後對於層結構702、704進行蝕 刻（例如：採用活性離子蝕刻、溼蝕刻）、且將蝕刻阻止材 料708留置於層結構5〇6之表面上，藉此所形成之一光罩 係將圖樣飿刻於層結構5 〇 6的表面之上（第3 9圖）。請參閱 苐〇圖卩过後便可對於钱刻阻止材料7 0 8進行移除（例如： 採用乾I虫刻、渥钱刻）。 於部分實施例中，當完成了層結構704之表面上之複 數凹陷部（indents)的成型作業之後，則便可將一蝕刻阻止 才料（例如·石夕摻雜聚合物（SUoped p〇lymer))7iQ設置於 (例如··旋轉塗佈）層結構704之表面上、層結構704之複 數凹陷部之中；隨後，對於蝕刻阻止材料710進行背蝕刻（例 如：採用乾蝕刻），如此便可對於層結構7〇4之表面進行曝 光、但蝕刻阻止材料係仍保留在層結構704之複數凹陷部 1057-6715-PF 70 200531311 之中(第圖）。如第42圖所示，隨後對於部分的層結構 702、704進行蝕刻（例如··採用活性離子蝕刻、乾蝕刻、溼 钱亥〇而使得部分的層結構702、704冑置於钱刻阻止材料 708之後側，藉此所形成之一光罩係可將圖樣蝕刻於層結 構506之表面上（第43圖）。請參閱第34圖，隨後便可^ 層結構m/m之剩餘部分、兹刻阻止材料7〇8予以移除 (例如：採用活性離子蝕刻、乾蝕刻、溼蝕刻）。於部分實 施例中，藉由電漿製程（plasma prt)eess)(例如：I電衆製程 (fluodne Plasma pr〇cess))亦可對於蝕刻阻止材料 移除。 在圖樣完全被轉移至n_摻雜半導體層5〇6之後，一磷 材料層（layer of phosph〇r mateHal)是以可選擇性方式設置牛 於（例如：旋轉塗佈）n_摻雜半導體層5〇6之 於部分實施例中，鱗材料係可採用相當均勻方：塗二 樣表面之上（於圖樣表面之中、沿著開孔之底部/側壁上之 塗覆層係於實質上不會有空孔（voids)的存在）。另一方面， 封勝材料係可被設置於圖樣化n_摻雜半導體層5G6之表面 :(:1如：化學氣相沉積(c VD)、濺鑛(-⑽㈣、藉由後 只“、、鍍下之液體黏結劑（liquid binder)所形成之懸浮 (sUSpension))。於部分實施例中，封膠材料係可包括了一種 ❹種鱗材料。於部分實施例中，磷材料係可經由加壓方 2而具有一致性的厚度，其經加壓下的厚度值係較平均厚 二了約20%、15%、10%、5%或2%。於部分實施例中， …膠材料係可採用相當一致方式塗覆於圖樣化表面之1057-6715-PF 68 200531311 In a stepwise manner (p〇rtion-by-p0rti〇n), a plurality of indentations are formed on the layer structure 704 (Fig. 32), and these depressions are relative to the layer structure 506 The pattern formed in the surface. In some embodiments, the entire wafer can be covered by a single step (eg, full wafer techniques). Subsequently, the layer structure 704 is etched (for example, using reactive ion etching, wet etching), so that the planarization layer 702 with respect to the recessed portion of the layer structure 704 can be used. The plural parts on the surface are exposed (Fig. 33). For example, U.S. Patent No. 5,722,905, Zhang et al., Applied Physics Letters, Vol. 83, No. 8, ρρ · 1632-34, etc., disclose the impirnt / etch processes, In this department are incorporated into Zhu Kao. Generally, the n-contact pads are deposited on a part of the pattern in the lithography layer 704 in the subsequent processes. In another embodiment, other technologies (such as: x-ray lithography, deep ultraviolet lithography, extreme ultraviolet lithography, immersion lithography) n lithography), interference lithography, electron beam lithography, photolithography, microcontact printing, and self-assembly techniques are available The lithographic layer 704 is produced. As shown in FIG. 34, the patterned lithographic layer 704 is used as a mask, so that the pattern can be transferred to the flattening layer 702 (for example, money) Engraving 1057—6715—PF 69 200531311 (dry etching), wet etching). An example of dry etching is active ion etching. Please refer to FIG. 36, the layer structure 702, 704 is used as a photomask in order, thereby The pattern can be transferred to the surface of the layer structure 506 (for example: dry etching, wet etching). As shown in FIG. 36, under the effect of the etching on the layer structure 506, the layer structure 7 02, 704 can be removed (for example, using oxygen-based reactive ion etching (oxygen based etching), wet solvent etching). As shown in FIG. 37, in some embodiments The process involves depositing a material 708 (eg, metals such as aluminum, nickei, titanium, tungsten, and tungsten) on the layer structure 702 / 7〇4 ( For example, the surface of the layer structure 704 among the silver-engraved parts of evaporation, as shown in FIG. 38, and then the layer structures 702 and 704 are etched (for example, using reactive ion etching, wet etching), And the etch stop material 708 is left on the surface of the layer structure 506, thereby forming a photomask to engrav the pattern on the surface of the layer structure 506 (Fig. 39). See 苐〇 After the drawing, the money-blocking material 7 0 8 can be removed (for example, using dry I worm-etching, Wool-qian carving). In some embodiments, when the multiple depressions on the surface of the layer structure 704 are completed After forming the indents, an etching stop can be prevented. (I.e., SUoped polymer) 7iQ is disposed on the surface of the layer structure 704 (for example, spin coating) and in the plurality of recessed portions of the layer structure 704; The material 710 is back-etched (for example, dry etching), so that the surface of the layer structure 704 can be exposed, but the etch stop material remains in the plurality of recesses 1057-6715-PF 70 200531311 of the layer structure 704. Medium (pictured). As shown in FIG. 42, part of the layer structure 702 and 704 is subsequently etched (for example, using active ion etching, dry etching, and wet money), so that part of the layer structure 702 and 704 is placed on the money-blocking material. On the rear side of 708, one of the photomasks formed thereby can be etched on the surface of the layer structure 506 (Figure 43). Please refer to Figure 34, and then the remaining part of the layer structure m / m, The material is prevented from being removed by etching (for example, using reactive ion etching, dry etching, or wet etching). In some embodiments, plasma prt (eess) is used (for example, fluodne) Plasma pr))) can also prevent material removal for etching. After the pattern is completely transferred to the n_-doped semiconductor layer 506, a layer of phosphor mateHal is selectively disposed on the n-doped semiconductor (eg, spin coating). In some embodiments of the layer 506, the scale material can adopt a fairly uniform square: coating on the second surface (in the pattern surface, the coating layer on the bottom / side wall along the opening is essentially There will be no voids). On the other hand, the Fengsheng material can be set on the surface of the patterned n-doped semiconductor layer 5G6: (: 1 such as: chemical vapor deposition (c VD), sputtering (-⑽㈣, by only ", 2. Suspension formed by the plated liquid binder. In some embodiments, the sealant material may include a kind of scale material. In some embodiments, the phosphorus material may be passed through The pressure square 2 has a uniform thickness, and the thickness value under pressure is about 20%, 15%, 10%, 5%, or 2% thicker than the average thickness. In some embodiments, ... Can be applied to the patterned surface in a fairly consistent manner

1057-6715-PF 71 200531311 上。 當介電函數已經被建立在摻雜半導體層5〇6之後， 則便可進行晶圓之個別LED晶粒的切割。當完成了晶圓製 私及晶圓測試之後，經分離後之個別LED晶粒便可進行封 裝、測4。在晶圓的切割過程中，藉由側壁鈍化步驟 (sdewall passivation step)及/或預分離深支台蝕刻步驟 (pre-separation deep mesa etching step)等方式係可降低對 於圖樣化LED之電及/或光性質所可能造成之潛在的破 壞。個別的LEDs係可根據晶圓之尺寸而製作成任意的尺 寸仁般係多半採用了側邊長度約介於〇·5 mm〜5 mm之 方型或矩形狀結構。當進行LED晶粒之製作時，標準照相 微影係用以定義出晶圓上之複數接觸墊的位置，藉由這些 接觸墊以對於此裝置進行增能處理，並且歐姆式接觸係採 用蒸鍵方式（例如：電子束蒸鍍）而形成於既定位置之上。 如第45A圖所示之部分實施例中，一 [ED 1802之一 接觸墊配置（contact layout)包括了兩導電墊結構 (conductive pads)1804a、1804b 與導電桿結構（或手 才日）（conductive bars (or Hngers))1806，其中，導電桿結構 1806是由導電墊結構1804a、1804b而延伸朝向於LED 1802 之中心區域（central area)。連接於導電墊結構1804a、i8〇4b 之間的銲線（wire bonds)(未圖示）是用以提供電流與電壓至 LED 1802。來自於導電墊結構18〇4a、1804b之電流係經由 導電桿結構1806而被散播至LED 1802之頂面（t〇p surface) 1 808。在導電桿結構ι8〇6的作用下，雖然電流可 1057-6715-PF 72 200531311 充份地擴散至LED 1 802的頂面18〇8，但其卻會對於經由 接觸墊（contacts)所覆蓋之頂面18〇8之數量上的限制。'工 第45B圖表示包括了導電墊結構18〇4。18〇4b及導電 桿結構1806之LED 1802的上視圖。於部分實施例中，導 電墊結構1804a、1804b的寬度是可以大於導電桿結構18〇6 的寬度。在具有較大寬度之導電墊結構18〇4a、l8〇4b的作 用下，導電墊結構18〇4a、1804b可用以做為電力埠結構 (power busses)，並且可將—相對大功率值（relativeiy am〇Unt〇fP〇wer)經由埠結構而擴散至導電桿結構i8〇6。導 電墊結構1804a、1804b與導電桿結構18〇6之寬度是可相 對於1^0 1802之尺寸且/或導電墊結構18〇4&、18〇讣與導 電桿結構1806之寬度可根據微影技術及製程參數 (processing parameters)等因素而被決定。 舉例而言，一 LED 於0.5mm至1cm之間。 之一侧邊（side)之尺寸是可大約介 根據上述纟兄明可知，LED 1802之 寬度深度比例亦可被改變。舉例而言，導電墊結構i8〇4a、 1804b之寬度大約可為5〇um至5〇〇um，而導電桿結構μ% 之寬度大約可為lum 5 SOiim。7與 主。又舉例而言，導電墊結構 l8〇4a、l8〇4b與導電桿結構18〇6之寬度可根據輸送至led 之電流與功率而被決定，或是導電墊結構18〇乜、18〇朴與 導電桿結構1806之寬度可根據沉積及製程參數等因素而 被決定。舉例而言，導電墊結構18〇4a、18〇仆與導電桿結 構1 806之高度大約可為〇 lum至i〇um。 -般而言’導電桿結構·6之長度與形狀均可根據需 1057-6715-PF 73 200531311 求而進行改變。如第45B圖所示，導電桿結構1 806可為矩 形狀（rectangular)，並且導電桿結構1 806是由導電墊結構 1 8 04a、1804b而延伸朝向於LED 1802之〆中心區域。另 一方面，導電桿結構1 806可具有不同的形狀，例如：方形、 三角形或梯形。 第46A-46C圖表示一接觸結構（contact structure)之另 一貫施例’其中’多桿結構（multiple bars) 1 8 12係以延伸通 過了 LED 1810之整個長度，藉此以將導電墊結構i8〇4a 連接至導電墊結構1804b。多桿結構1812具有相關的一電 阻（resistivity)rm、厚度（thickness)tb 及長度（length)l。如第 46C圖所示，基於導電墊結構18〇4a、18〇4b及多桿結構1812 之下’藉由將其結構簡化成為一等效電路模型（equivalent circuit model)的方式是可以對於led 1810之電流分佈特 性（current distribution properties)進行估算。 LED 1810之寬度深度比例是會對於系統之電流分散 (current dissipation)造成影響。根據以下方程式可對於[ED 1 8 1 0之寬度深度比例‘ 1 ’進行計算： L =」Ab / a A表不晶粒之表面積（surface area)(例如··長度χ寬 度）’ a、b表示晶粒之寬度深度比例。以具有ΐ6χ9之寬度 深度比例的晶粒為例子，其中，a=丨6、。 根據上述說明可知，為了將LED所產生之光線可以射 入通過此表面，則多桿結構1812便不可以覆蓋在ledi8i〇 之整個表面。由於接觸墊僅覆蓋在LED 18ι〇之部分表面之 741057-6715-PF 71 200531311. After the dielectric function has been established in the doped semiconductor layer 506, individual LED die of the wafer can be cut. After the wafer fabrication and wafer testing are completed, the individual LED dies after separation can be packaged and tested4. During the dicing process of the wafer, by means of a sidewall passivation step and / or a pre-separation deep mesa etching step, the power for patterned LEDs and / Potential damage caused by light or light. Individual LEDs can be made into any size according to the size of the wafer. Most of them adopt a square or rectangular structure with a side length of about 0.5 mm to 5 mm. When making LED dies, standard photolithography is used to define the positions of multiple contact pads on the wafer. These contact pads are used to enhance the processing of this device, and the ohmic contact system uses steam bonding. It is formed on a predetermined position by a method (for example, electron beam evaporation). As shown in FIG. 45A, in one embodiment, a contact layout of [ED 1802] includes two conductive pad structures 1804a, 1804b, and a conductive rod structure (or hand). bars (or Hngers)) 1806, wherein the conductive rod structure 1806 extends from the conductive pad structures 1804a and 1804b toward the central area of the LED 1802. Wire bonds (not shown) connected between the conductive pad structures 1804a and i8004b are used to provide current and voltage to the LED 1802. The current from the conductive pad structures 1804a and 1804b is spread to the top surface 1808 of the LED 1802 via the conductive rod structure 1806. Under the action of the conductive rod structure ι8〇6, although the current can be fully diffused to the top surface of the LED 1 802 18 008 1057-6715-PF 72 200531311, it will affect the area covered by the contact pads. There is a limit on the number of top surfaces 1808. Figure 45B shows a top view of an LED 1802 including a conductive pad structure 1804. 1804b and a conductive rod structure 1806. In some embodiments, the width of the conductive pad structures 1804a, 1804b may be greater than the width of the conductive rod structure 1806. Under the action of the conductive pad structures 1804a and 1804b with a relatively large width, the conductive pad structures 1804a and 1804b can be used as power busses, and can-relatively high power value (relativeiy am〇Untffower) diffuses to the conductive rod structure i806 through the port structure. The widths of the conductive pad structures 1804a, 1804b and the conductive rod structure 1804 may be relative to the size of 1 ^ 0 1802 and / or the widths of the conductive pad structures 1804 &, 180, and the conductive rod structure 1806 may be according to the shadow Factors such as technology and processing parameters are determined. For example, an LED is between 0.5mm and 1cm. The size of one of the sides can be approximated. According to the above information, the width-depth ratio of LED 1802 can also be changed. For example, the width of the conductive pad structures i8044a and 1804b may be approximately 50um to 500um, and the width of the conductive rod structure μ% may be approximately lum 5 SOiim. 7 with the Lord. For another example, the widths of the conductive pad structures 1804a, 1804b and the conductive rod structure 1806 can be determined according to the current and power delivered to the LED, or the conductive pad structures 180 °, 18 ° and The width of the conductive rod structure 1806 can be determined according to factors such as deposition and process parameters. For example, the height of the conductive pad structures 1804a, 1801 and the conductive rod structure 1 806 may be approximately 0 lum to i0um. -In general, the length and shape of the conductive rod structure · 6 can be changed according to the requirements of 1057-6715-PF 73 200531311. As shown in FIG. 45B, the conductive rod structure 1 806 can be rectangular, and the conductive rod structure 1 806 extends from the conductive pad structures 1 8 04a and 1804b toward the center region of the LED 1802. On the other hand, the conductive rod structure 1 806 may have different shapes, such as a square, a triangle, or a trapezoid. Figures 46A-46C show another embodiment of a contact structure, in which the "multiple bars" 1 8 12 are extended through the entire length of the LED 1810, thereby using the conductive pad structure i8 〇4a is connected to the conductive pad structure 1804b. The multi-rod structure 1812 has an associated resistance rm, thickness tb, and length l. As shown in FIG. 46C, based on the conductive pad structures 1804a, 1804b, and the multi-rod structure 1812, the method of simplifying the structure into an equivalent circuit model is feasible for the led 1810 The current distribution properties. The width-depth ratio of the LED 1810 will affect the current dissipation of the system. [ED 1 8 1 0 width-depth ratio '1' can be calculated according to the following equation: L = "Ab / a A indicates the surface area of the grain (surface area) (for example, length x width) 'a, b Represents the width-to-depth ratio of grains. Take a grain with a width-depth ratio of ΐ6χ9 as an example, where a = 丨 6. According to the above description, in order to allow the light generated by the LED to pass through this surface, the multi-rod structure 1812 cannot cover the entire surface of the ledi8i〇. As the contact pad covers only 74% of the surface of the LED 18ι〇

1057-6715-PF 200531311 上’則接觸電阻（contact resistance)可經由表面收斂比例 (surface coverage ratio)/所分割，相關的方程式如下：1057-6715-PF 200531311, the contact resistance can be divided by the surface coverage ratio / division. The related equation is as follows:

Pn-c— PnJ f 通過接合位置（junction)之電流密度可根據以下方程式 來估算： W-1)， Λ 表示接合飽合電流（junction satumic)n cun>ent)，^ 表示絶對溫度（absolute temperature)。於上式的估算方式 中’在4頁向電流散佈（lateral current spreading)中所具有之 η 型材料（n-type material)的表現（contribution)是忽略的。 然而’由於接觸墊之傳導性（conductivity)是遠大於η型材 料之傳導性，所以電流散佈的情況一般主要是發生在金屬 接觸墊（metal contact)之中。舉例而言，接觸墊之傳導性、 η型材料之傳導性之比例的範圍大約是介於1⑽_ 5⑻。 在一相類似系統中（但於接觸墊之間具無限分離 (infinite separation))，如果相關的計算是在一順向偏壓 (forward bias)(例如：中進行且如果通過串聯電阻 (series resistance)之壓降（v〇itage drop)是遠大於 kT/e(例 如· Ο"+ >>H7e )，則電流密度分佈之 線性逼近（linear approximation)可根據以下方程式進行估 算·· W】(f/Lw(L，） Ά表示於墊結構之下方（beneath a pad)的電流密度，χ 表示源自於塾結構之一距離’ 4表示電流散佈長度 75Pn-c— PnJ f The current density at the junction can be estimated according to the following equation: W-1), Λ represents junction satumic n cun > ent, and ^ represents absolute temperature ). In the above estimation method, the contribution of the n-type material in the four-page lateral current spreading is ignored. However, since the conductivity of the contact pad is much larger than that of the η-shaped material, the current spreading generally occurs mainly in metal contact pads. For example, the range of the ratio of the conductivity of the contact pad to the conductivity of the n-type material is approximately between 1⑽ and 5⑻. In a similar system (but with infinite separation between the contact pads), if the relevant calculations are performed in a forward bias (for example: in and if through series resistance The voltage drop (v〇itage drop) is much larger than kT / e (such as · 〇 " + > > H7e), then the linear approximation of the current density distribution can be estimated according to the following equation. (f / Lw (L,) Ά is the current density below the pad structure (beneath a pad), χ is a distance from the 塾 structure, and 4 is the current spread length 75

1057-6715-PF 200531311 spreading length)。電流散長度4可表示為以下方程式： 4 =^P-c +P^/f + pptp +pjn)tj^ 上述估算方式是假設在兩墊結構之間為一無限分離。 然而，由於一線性逼近是具有非無限分離（n〇n_infinite separation)，就個別墊結構的結果（s〇luti〇n)是可合計在一 起的。於上述程序中’ 一錯誤（err〇r)係發生在接近於墊結 構中央位置（die center)上，但此錯誤並不會造成實體傾向 (physical trends) ° 最小電流密度（minimum current density)可能會出現在 電子裝置之中心位置，並且最小電流密度可根據以 下方程式而進行估算： •^min L/2Ls 均勻性因子（Unif0rmity fact〇r)可根據以下方程式而進 行估算： TT」{LII) 2e~U2^ 就具有相同表面面積之晶粒而言，當對於具有寬度深 度比例a、b且沿著小側邊具有接觸桿結構（c〇ntactbars)之 表面而言，當其形狀經由一方形改變成為一矩形時，最小 電流密度便可被增加，並且均勻性因子可根據以下方程式 而進行修正： yjAb / a 2L- LTt —J(L’ 12) 2e~^^/2Ls J(〇) \ + e-^T^ Ls 因此均勻性增加因子（uniformity increaSe fact〇r)之 1057-6715-PF 76 200531311 估异方式可表示如下之方程式·· S = ur/u = 1 + e~hb 1 a 丨 Ls 舉例而s ’就方形例子（例如：a=b)而言，均勻性增加 因子‘S’是具有最小值（minimum value)S =卜就16x9之矩形 例子而言，其所假設之數值如下：pm=2 2· ^ 〇_bcm(金（g〇ld))， PP，l.〇.l〇-3Dcm2、Pp=5.〇ncm、pn c=1 〇 ι〇_4ω_2、 pn = 5.0.1(T3ncm、n 接觸表面收斂（n_c〇ntact c〇verage) 為 10%、p-/n-/金屬（metal)之厚度為 〇 3μιη/3 〇μπι/2 _ (以 10%的收傲（at a 10% coverage))。如果晶粒的表面積為 A=25mm2時’ 等於14mm。於方形例子中之㈣325，而 16x9之矩形例子中之case y = 〇5，或是均勻性增加因子為 M54，亦即，電流均勻性（⑽咖_随吻增加了 54%。1057-6715-PF 200531311 spreading length). The current dispersion length 4 can be expressed as the following equation: 4 = ^ P-c + P ^ / f + pptp + pjn) tj ^ The above estimation method assumes an infinite separation between the two pad structures. However, since a linear approximation has non-infinite separation, the results of individual pad structures (solotin) can be summed together. In the above procedure, an error (err〇r) occurred near the die center of the pad structure, but this error does not cause physical trends ° minimum current density may It will appear in the center of the electronic device, and the minimum current density can be estimated according to the following equation: • ^ min L / 2Ls Uniformity factor (Unif0rmity fact〇r) can be estimated according to the following equation: TT ″ {LII) 2e ~ U2 ^ For crystals with the same surface area, when the surface has a width-depth ratio a and b and has contact bars along the small side, the shape changes when the shape changes through a square. When it becomes a rectangle, the minimum current density can be increased, and the uniformity factor can be modified according to the following equation: yjAb / a 2L- LTt —J (L '12) 2e ~ ^^ / 2Ls J (〇) \ + e- ^ T ^ Ls Therefore, the uniformity increase factor (uniformity increaSe fact〇r) of 1057-6715-PF 76 200531311 can be expressed as the following equation ... S = ur / u = 1 + e ~ hb 1 a 丨Ls for example and s' just For a shape example (for example: a = b), the uniformity increasing factor 'S' is the minimum value S =. For a 16x9 rectangular example, the assumed value is as follows: pm = 2 2 · ^ 〇_bcm (gold), PP, 1.0.10-3Dcm2, Pp = 5.0ncm, pn c = 1 〇〇〇4ω_2, pn = 5.0.1 (T3ncm, n Contact surface convergence (n_c〇ntact c〇verage) is 10%, p- / n- / metal thickness is 〇3μιη / 3 〇μπι / 2 _ (at a 10% coverage )). If the surface area of the grain is A = 25mm2, it equals 14mm. ㈣325 in the square example and case y = 〇5 in the rectangular example of 16x9, or the uniformity increase factor is M54, that is, the current Uniformity (Coffee_With kisses increased by 54%.

口此在不又到理淪的限制之下，藉由具有矩形之LED 是確認可以獲得較佳之電流散佈的效果。當在部分之接觸 …構之底。P具有—絕緣層（insulating layer)i82〇(例如：第 47A圖中之氧化層（〇xide layer))時，在可選擇方式改變接 觸電阻（eontaet fesistivity)、或是額外地對於接觸電阻進行 改變之下’電流散佈之效果是可被增加的。如第47A、㈣ 圖所示，絕緣層1820(以虛線表示）是被包含在多桿結構 1812之-部分的底部。位於多桿結構之頂部（例如：接近於 導電墊結構副4)的絕緣層咖是具有較大的寬度，並且 絕緣層^刪之厚度以愈接近朝向於晶粒之中心區域愈 小。第47B圖表示—等效電路圖（叩⑻邮^則^ diagram) 〇 1057-6715-PF 77 200531311 一般而言’接觸電阻是正比於接觸面積（contact area)。舉例而言’當接觸面積減少時，則接觸電阻便增加， 其相互關係可經由以下方程式表示··Under the circumstance of no limitation, it is confirmed by the rectangular LED that a better current spreading effect can be obtained. When in contact with the part ... the bottom of the structure. When P has an insulating layer i82〇 (for example, the oxide layer in FIG. 47A), the contact resistance (eontaet fesistivity) can be changed in an optional manner, or the contact resistance can be additionally changed. The effect of 'current spreading' can be increased. As shown in Figs. 47A and ，, an insulating layer 1820 (shown by a dotted line) is included at the bottom of a part of the multi-pole structure 1812. The insulating layer on the top of the multi-rod structure (for example, close to the conductive pad structure pair 4) has a larger width, and the thickness of the insulating layer is smaller as it approaches the center area of the die. Figure 47B shows the equivalent circuit diagram (叩 ⑻ 叩 ⑻ ^ 则 ^ diagram) 〇 1057-6715-PF 77 200531311 Generally speaking, the contact resistance is proportional to the contact area. For example, when the contact area decreases, the contact resistance increases, and their relationship can be expressed by the following equation ...

pf_c - P-c - Pn~〇W . Pn-cWL ^ pn_c L feff 2xwb f 2x W表示多桿結構（例如··單位面積（unit are a)之多桿結 構的數目）之重覆率（repetition rate)。由於底部絕緣層182〇 的關係，於最接近於導電墊結構l804a、1804b之接觸墊的 邊緣上具有較小的接觸面積，並且接觸面積會隨著接觸墊 邊緣與導電墊結構18〇4a、1804b之間的距離增加而增加。 由於具有不同的接觸面積，於接近導電墊結構18〇4a、18〇4b 的位置上疋具有較高的接觸電阻，並且接觸電阻會隨著愈 接近朝向於LED之中心位置而降低。由於不同接觸電阻可 更進一步使得是電流產生移動，藉此可達到降低電流擁擠 (current crowding)、增加通過表面之射出光線之均勻性及 減少效能降低（performance degradation)。電流散佈長度 (current spreading length)可根據以下方程式而估算： z“x)二 ^Pp-c+(^-c /f)(L/2x)+p/p+Ps^jym · 沿著晶粒之接合電流密度（junction current density：^ 根據以下方程式而估算：pf_c-Pc-Pn ~ 〇W. Pn-cWL ^ pn_c L feff 2xwb f 2x W represents the repetition rate of a multi-rod structure (for example, the number of multi-rod structures per unit area (unit are a)). . Due to the relationship of the bottom insulating layer 1820, there is a smaller contact area on the edge of the contact pad closest to the conductive pad structure 1804a, 1804b, and the contact area will follow the contact pad edge and the conductive pad structure 1804a, 1804b The distance between them increases. Due to the different contact areas, the contact resistance near the conductive pad structures 1804a and 1804b has a higher contact resistance, and the contact resistance decreases as it approaches the center position of the LED. The different contact resistances can further cause current to move, thereby reducing current crowding, increasing the uniformity of the light emitted through the surface, and reducing performance degradation. The current spreading length can be estimated according to the following equation: z "x) 2 ^ Pp-c + (^-c / f) (L / 2x) + p / p + Ps ^ jym · Along the grain Junction current density: ^ is estimated from the following equation:

X X ~^dx/Ls{x) -\dx!Ls{L-x) 於裝置之中心位置（例如：於χ=^/2)的最小電流 (minimum current)可根據以下方程式而估算： 1/2 -卜/^⑴ 1057-6715-PF 78 200531311 於第47B圖中所示之結構之電流均勻性因子（current uniformity factor)可根據以下方程式而估算： U- J(L/2)_ 2e "7^Γ= L, I 1 -\dx/2Ls(x) l + e L ~\dx/2Ls(x) 根據上述說明可知，氧化層1 820可迫使電流移動朝向 於接觸墊之端部（例如··朝向於晶粒之中心區域），如此以 增加電流散佈的程度。此外，由於光吸收接觸墊（light absorbing contacts)之底部的光產生（light generation)會受 到氧化層1 820的作用而降低，則經由LED之表面所發出 之光線的百分比（percentage)便可被提高。 第48A、48B圖表示導電墊結構i8〇4a/18〇4b、接觸墊 1 830及氧化層1820(以虛線表示且位於接觸墊ι83〇之一部 分的底部）之另一組態，其中，接觸墊183〇亦具有錐狀結 構。雖然在第48A圖中之接觸墊183〇之結構是呈現線性錐 形（linearly tapered)，然其並非用以限制本發明，其它任何 線型之錐形亦可被採用。如第47A圖所示，線性錐形⑴以訂 tapering)可使得多桿結構1812之接觸面積保持在一相同總 接觸面積（similar total contact area)，並且於晶粒中心之接 觸寬度（contact width)大約為多桿結構1812(第47a圖）之寬 度的-半，而位於塾結構之接觸寬度是三倍大於第47A圖 所示之寬度。氧化層可採用較大角度方式以進行錐度化， 如此使得最大的接觸電阻位於晶叙 从 之上，並且使得最小的 接觸電阻位於在晶粒中心。接觸 从士上&丄 J电|且疋以朝向於晶粒中心 的方式而遞減，並且接觸桿結構 再之接觸電阻是被減少接近 1057-6715-PF 79 200531311 於墊結構之接觸電阻。於接觸墊與絕緣層所具有之錐形 (tapering)是會迫使電流流動朝向於晶粒的中心。局部散佈 長度（local spreading length)可經由以下方程式進行估算： 1 乂x) = ^pp~c + (Pn-c' f)(L /x) + pptp+ pntn )tm !{2pm /(3 - 4x/ L)) 就上述所提出之電流分佈之積分公式（integrati〇n formulas)而言，其同樣可以對於第48a、48B圖中之電流 分佈進行估算。 第49A圖表示一 LED之上視圖，第49B、49C圖分別 表示另一接觸結構（contact structure) 1 801之剖面圖。複數 導電接觸墊（conductive contacts) 1 836是延伸朝向於晶粒之 中心，但這些導電接觸墊1836不是以連續方式覆蓋於導電 墊結構1804a、1804b之間之LED的頂面。一絕緣層1834 是位於LED之頂面與導電接觸墊1836之間之接觸墊的一 内部件（interior portion)之中。導電接觸墊1 830、絕緣層 1834均具有錐狀結構。箭頭1837表示經由導電接觸墊1836 散佈進入於晶粒表面的電流。 笫50圖表示經估算正常化接合電流密度（estimated normalized junction current density)之一圖形 (graph) 1 850，此圖形1 850係為各種接觸墊之導電墊結構 1804a/18 04b、基於上述方程式之晶粒組態（die configuration)之間之正常化距離（nornialized distance)的函 數。線條（line)l 856表示具有矩形桿結構（rectangular bars) 且不具有氧化物（oxide)之方型晶粒（square die)的電流密 度，線條1 858表示具有矩形桿結構且不具有氧化物之矩型 1057—6715—PF 80 200531311 晶粒的電流密度，線條i 86〇表示具有矩形桿結構且具有錐 狀氧化物之一矩型晶粒的電流密度，以及線條i 862表示具 有錐狀桿結構且具有錐狀氧化物之矩型晶粒的電流密度。 圖形1 850表示在一接觸墊之一部分之底部、針對一矩型晶 粒與一氧化層之電流密度分佈（current density distributi〇n) 的改善（improvement)。 第51A圖表示一多重推疊層之上視圖，第51B圖表示 另接觸結構1 8 〇 3之剖面圖。絕緣層1 g 〇 $ a、1 $ 〇 $ b是分 別設置於LED之頂面、金屬導電墊結構18〇4a/18〇4b之間。 系巴緣層1 8 0 5 a、1 8 0 5 b是分別以位於金屬導電塾結構 1804a/l 804b之一部分的底部且朝向於晶粒之邊緣，如此使 得金屬導電墊結構18〇4a、1804b之一部分可分別經由絕緣 層1 805a、1 805b所支承，並且金屬導電墊結構18〇4a、18〇4b 之一部分可經由發光二極體之頂面所支承。在絕緣層 1805a、18〇5b的作用下，於金屬導電墊結構i8〇4a、i8〇4b 之底部的光產生會被減少，如此使得經由LED的表面所發 出之光線的百分比（percentage)可被提高。 於上述貫施例中之單一接觸墊組（single set 〇f 是延伸自金屬導電墊結構1804a、1 804b，而其它多數的接 觸墊組仍疋可被採用的。舉例而言，一第二接觸墊組 (second set of contacts)係自與金屬導電墊結構1804所連接 之接觸墊組而延伸，以此類推。此外，除了可採用上述氧 化層以製作接觸結構之外，此一層結構亦可採用其它合適 的電絕緣材料（appropriate electronically insulating 1057-6715-PF 81 200531311 material)(例如：氮（nitride))而形成。 第52圖表示根據-實施例中之一接觸塾（c〇ntact)} 899 之尺寸視圖，藉此圖可料n接觸塾（n_c〇ntact)内側之電傳 輸（electrical transport)進行估算。在接觸周期（c〇ntact peri〇d)D 1870中，接觸墊1899是假設為以一均勾電流密 度（uniform CUrrent density)々進行分佈。由接觸墊所攜帶之 總電流（total current)可經由以下方程式進行估算： ^max ~ JqDL . 最大電流（maximum current)是在接觸墊之頂部（在墊 結構）流動，其所相對之一電流密度是可經由以下方程式進 行估算：XX ~ ^ dx / Ls {x)-\ dx! Ls {Lx) The minimum current at the center of the device (eg, at χ = ^ / 2) can be estimated according to the following equation: 1/2- BU / ^ ⑴ 1057-6715-PF 78 200531311 The current uniformity factor of the structure shown in Figure 47B can be estimated according to the following equation: U- J (L / 2) _ 2e " 7 ^ Γ = L, I 1-\ dx / 2Ls (x) l + e L ~ \ dx / 2Ls (x) According to the above description, the oxide layer 1 820 can force the current to move toward the end of the contact pad (for example · • towards the center area of the die), so as to increase the degree of current spreading. In addition, since the light generation at the bottom of the light absorbing contacts will be reduced by the action of the oxide layer 1 820, the percentage of light emitted through the surface of the LED can be increased . Figures 48A and 48B show another configuration of the conductive pad structure i8004a / 18〇4b, the contact pad 1 830, and the oxide layer 1820 (shown in dotted lines and located at the bottom of a portion of the contact pad 830). Among them, the contact pad 183〇 also has a tapered structure. Although the structure of the contact pad 1830 in FIG. 48A is linearly tapered, it is not intended to limit the present invention, and any other linear tapered shape may be used. As shown in FIG. 47A, the linear taper ⑴ (tapering) can maintain the contact area of the multi-rod structure 1812 at a similar total contact area, and the contact width at the center of the grain. It is approximately -half the width of the multi-rod structure 1812 (Fig. 47a), and the contact width of the cymbal structure is three times larger than the width shown in Fig. 47A. The oxide layer can be tapered with a larger angle, so that the maximum contact resistance is located above the crystal grains, and the minimum contact resistance is located at the center of the grain. Contact The contact resistance is reduced toward the center of the die, and the contact resistance of the contact rod structure is reduced by approximately 1057-6715-PF 79 200531311. The contact resistance of the pad structure. The tapering of the contact pads and the insulation layer forces the current to flow toward the center of the die. The local spreading length can be estimated by the following equation: 1 乂 x) = ^ pp ~ c + (Pn-c 'f) (L / x) + pptp + pntn) tm! {2pm / (3-4x / L)) As far as the integral formulas of the current distribution proposed above, they can also be used to estimate the current distributions in Figures 48a and 48B. Figure 49A shows a top view of an LED, and Figures 49B and 49C show cross-sectional views of another contact structure 1 801, respectively. The plurality of conductive contacts 1 836 extend toward the center of the die, but these conductive contact pads 1836 do not cover the top surface of the LED between the conductive pad structures 1804a, 1804b in a continuous manner. An insulating layer 1834 is in an interior portion of the contact pad between the top surface of the LED and the conductive contact pad 1836. Both the conductive contact pad 1 830 and the insulating layer 1834 have a tapered structure. Arrow 1837 represents the current spread into the surface of the die via the conductive contact pads 1836.笫 50 shows a graph 1 850 which is an estimated normalized junction current density. This graph 1 850 is a conductive pad structure of various contact pads. 1804a / 18 04b, a crystal based on the above equation. A function of the normalized distance between the die configurations. Line 1 856 indicates the current density of a rectangular die with rectangular bars and no oxide, and line 1 858 indicates a current with a rectangular rod structure and no oxide. Rectangular 1057—6715—PF 80 200531311 grain current density, line i 86〇 represents the current density of a rectangular grain with a rectangular rod structure and a cone-shaped oxide, and line i 862 represents a cone-shaped rod structure And has the current density of the rectangular grains of the rectangular oxide. Graph 1 850 represents the improvement of the current density distribution of a rectangular grain and an oxide layer at the bottom of a portion of a contact pad. Figure 51A shows a top view of a multiple push stack, and Figure 51B shows a cross-sectional view of another contact structure 183. The insulating layers 1 g 〇 $ a and 1 $ 〇 $ b are respectively disposed on the top surface of the LED and between the metal conductive pad structures 1804a / 18〇4b. The rim edge layers 1 8 0 5 a and 1 8 0 5 b are respectively located at the bottom of a part of the metal conductive plutonium structure 1804a / l 804b and face the edges of the grains, so that the metal conductive pad structures 1804a, 1804b A part can be supported by the insulating layers 1 805a and 1 805b, respectively, and a part of the metal conductive pad structure 1804a and 1804b can be supported by the top surface of the light emitting diode. Under the effect of the insulating layers 1805a and 1805b, the light generation at the bottom of the metal conductive pad structures i8004a and i804b will be reduced, so that the percentage of the light emitted through the surface of the LED can be reduced. improve. The single contact pad group (single set 0f) in the above embodiment is extended from the metal conductive pad structures 1804a, 1804b, and most other contact pad groups can still be used. For example, a second contact The second set of contacts is extended from the contact pad group connected to the metal conductive pad structure 1804, and so on. In addition, in addition to using the above-mentioned oxide layer to make the contact structure, this layer of structure can also be used Other suitable electrically insulating materials (appropriately electrically insulating 1057-6715-PF 81 200531311 material) (eg, nitrogen) are formed. FIG. 52 shows contact according to one of the embodiments—contact} 899 Dimensional view from which the electrical transport on the inside of n-contact 塾 (n_cntact) can be estimated. In the contact period (contact period) D 1870, the contact pad 1899 is assumed to be A uniform CUrrent density々 distribution. The total current carried by the contact pad can be estimated by the following equation: ^ max ~ JqDL. Maximum current maximum current) is flowing at the top (in the pad structure) of the contact pads, one of which it is the relative current density is estimated by the following equation to carry out:

J L max 在墊結構之端部所延伸之任一距離X上，電流密度是 可經由以下方程式進行估算：At any distance X where J L max extends at the end of the pad structure, the current density can be estimated by the following equation:

J = ^-x WT 每單位長度（per unit length)之電壓降（voltage drop)是J = ^ -x WT voltage drop per unit length (voltage drop) is

可經由以下方程式進行估算·· dVc ^ J0DRx dx ~~WT 每單位長度所產生之熱值（heat)是可經由以下方程式 進行估算： dQc dx wt 、、二由整a上述方程式之下，總電壓降（t〇tal v〇itage drop)可表示為以下的方程式·· y = J〇drl2 c ^2WT^ 82It can be estimated by the following equation: dVc ^ J0DRx dx ~~ WT The heat value (heat) generated per unit length can be estimated by the following equation: dQc dx wt, total voltage under the above equation The drop (t〇tal v〇itage drop) can be expressed as the following equation ... y = J〇drl2 c ^ 2WT ^ 82

1057-6715-PF 200531311 於接觸桿結構中所產生之總熱值（total heat)是可經由 以下方程式進行估算：1057-6715-PF 200531311 The total heat value generated in the contact rod structure can be estimated by the following equation:

〇 = 2J20D2RL^ c ~ WT ¥所產生之總熱值具有重要意義時，其所崩潰（break down)之均勻電流假設（uniform current assumption)便可做 為電子裝置之性能（performance)(例如··電子裝置過熱 (overheats))。因此，在上述方式的作用下，最大電流密度 (maximum current density)(電流密度通常隨著長度而成線 I*生比例）電壓降（電廢降通常隨著長度之平方（Square len#h) 而成線性比例）及/或所產生熱值（所產生熱值通常隨著長度 之二次方（cube of the length)而成線性比例）可根據需求而 被最小化。基於上述關係可知，由較多且較短之桿結構所 構成一矩形9X16晶粒是具有a、b、c，其中，a、b、c是 分別經由3/4、9/16、27/64之因子所縮減。由於桿結構之 號數（number)是由3/4之因子所增加，如此便可確信總產生 熱值是可經由9/16之因子而縮減。 第53圖表示一封裝發光二極體（packaged led) 1 890之 圖式。般而& ’經由封裝結構（package)而加速光線之收 集（light collection)，除了可提供機械與環境保護 (mechanical and environmental protection)之外，同時亦可 對於晶粒中所產生之熱量進行散熱。如上所述，LED 1890 包括導電墊結構1804a、1804b，經由導電墊結構1804a、 1804b可將電流散佈至多桿結構1812及lEd之表面。複數 銲線（multiple wire bonds) 1892係可在LED與封裝結構之間 83〇 = 2J20D2RL ^ c ~ WT ¥ When the total heating value produced by the WT ¥ is significant, the uniform current assumption that it breaks down can be used as the performance of the electronic device (for example ... Electronics overheats). Therefore, under the effect of the above method, the maximum current density (current density usually forms a line I * ratio with the length) voltage drop (electric waste drop usually with the square of the length (Square len # h) It is linearly proportional) and / or the calorific value generated (the calorific value generated is usually linearly proportional to the cube of the length) can be minimized according to demand. Based on the above relationship, it can be known that a rectangular 9X16 crystal grain composed of more and shorter rod structures has a, b, and c, wherein a, b, and c are respectively via 3/4, 9/16, and 27/64. Factor. Since the number of the rod structure is increased by a factor of 3/4, it can be assured that the total heating value can be reduced by a factor of 9/16. Fig. 53 shows a packaged led 1 890 diagram. In general & 'Accelerated light collection through package structure, in addition to providing mechanical and environmental protection, it can also dissipate heat generated in the die . As described above, the LED 1890 includes the conductive pad structures 1804a and 1804b, and the current can be distributed to the surfaces of the multi-rod structures 1812 and 1Ed through the conductive pad structures 1804a and 1804b. Multiple wire bonds 1892 can be between LED and package structure 83

1057-6715-PF 200531311 提供了一電流路徑（electrjcal cUrrent path)。複數銲線1 892 可由各種導電材料（conductive materials)所製成，例如： 金、鋁、銀、白金、銅及其它金屬或合金。封裝結構結亦 已括了複數栓槽結構（multiple c ast ell at ions) 1 894，此複數 栓槽結構1 894是用以將電流經由封裝結構之底面傳輸至 封裝結構的頂面，藉此以增加在一電路板（circuit board)之 表面安裝（surface mounting)速度。複數栓槽結構丨8料包括 中心區域（central regi〇n)與一鍍層結構（plating hya)。中 〜區域可由一咼熔點金屬（refractory metal)所構成，例如： 鶴且其可具有相對厚度（例如：約為100um至1mm)。此外， 於中心區域可鍍上一導電材料，例如··金。鍍層結構之厚 度可由大約0.5 um至1〇 um，並且由鍍層結構所提供之一 電流路禮是可承載一相當高功率位準（high ρ〇_ 。 4 破、、口 構包括一透明蓋子（transparent cover) 1 896， 此透明盍子1896是封裝結構於LED晶粒之上。當不使用 封膠材料％，藉由透明蓋子1 896便可對於層結構Μ"第 3口6圖）進仃保護。蓋+ i 896是貼附於封裝結構之上，例如： u 破离卷料（giassyfrit)此玻璃粉料係於溶爐 (furnace) 之中進仃熔化作業。另一方面，蓋子i 896可藉由邊蓋焊接 P “句或娘氧樹脂而達到連接。此外，蓋子1 890更可 精由由或多抗反射塗層所塗覆，藉此以增加光傳輸量 (t transmissi〇n)。為了不受到理論上的限制，可以確定 、：田封膠材料層不存在時，於圖樣化表面LED 1 00中 之單位面積下容許較高電力負載（tolerable power loads)。 1057-6715-ρρ 84 200531311 此外，對於標準LEDs而言，通常係將封裝層之劣化 (degradation)視為破壞機制（fa iiure mechanism)，如此便可 避免封裝層之使用。封裝LED 1 890可被安裝在一電路板、 另一裝置或直接設置於一散熱器（heat sink)之上。 第54圖表示應用於一封裝[ED 1890之熱量分散（heat dissipation)的一模型（m〇dei)，此封裝[ED 1890是設置於 月欠熱态之上。封裝LED 1890是由一芯板（co re board) 1 900 所支承心板1900包括絕緣及導電區域（insuiating and electrically conductive regions)(例如··利用鋁或銅金屬之 導電區域），此絕緣及導電區域貼附於散熱器之上。舉例而 言，封裝1^0 1890可利用焊接（3〇1(16〇(例如：焊接的種類 包括··金鍚焊（AuSn solder)、鉛鍚焊（PbSn s〇lder)、鎳鍚焊 (NiSn soider)、銦鍚焊（InSn s〇lder)、銦鍚鎂焊（inAgSn solder)、鉛鍚鎂焊（PbSnAg s〇lder)或利用導電環氧樹脂 ㈨ectrically conductive ep〇xy)(例如··具銀填充之環氧樹脂 ^silver filled epoxy))而貼附於芯板19〇〇之上。芯板Μ⑻ 是由-散熱器1金屬層（heat sink metal) i 9〇2與複數散熱器 用鰭片（heat sink fins)19〇4所支承。舉例而言，芯板侧 可利用焊接（例如：焊接的種類包括：金锡焊、錯錯焊、錄 鍚焊、銦鍚焊、銦鍚鎭焊、錯鍚鎭焊或利用環氧樹脂⑽如： 具銀填充之環氧樹脂）而貼附於散熱器用金屬層Η们之 上。在上述模型中，當熱量被傳送朝向於散_，此一 熱里疋假设為來自於封裝LED 189〇。散佈角 angle)1906是表示經由封裝；189〇 又 a lng 斤I放之熱量的角 851057-6715-PF 200531311 provides an electrcal calUrrent path. The plurality of bonding wires 1 892 may be made of various conductive materials such as: gold, aluminum, silver, platinum, copper, and other metals or alloys. The package structure junction has also included multiple cast ell at ions 1 894. This plurality of pin-and-slot structures 1 894 is used to transmit current through the bottom surface of the packaging structure to the top surface of the packaging structure. Increase the surface mounting speed of a circuit board. The plurality of plug-and-groove structures include a central region and a plating hya. The middle region can be composed of a refractory metal, such as a crane, and it can have a relative thickness (for example, about 100um to 1mm). In addition, a conductive material such as gold can be plated on the central area. The thickness of the coating structure can be from about 0.5 um to 10 um, and one of the current circuits provided by the coating structure can carry a relatively high power level (high ρ〇_. 4), the structure includes a transparent cover ( transparent cover) 1 896, this transparent mold 1896 is a packaging structure on the LED die. When no sealant material% is used, the transparent structure 1 896 can be used for the layer structure M (quotation of the third port 6)) protection. The cover + i 896 is attached to the packaging structure, for example: u giassyfrit This glass powder is put into a melting furnace for melting operation. On the other hand, the cover i 896 can be connected by welding the side cover P or oxyresin. In addition, the cover 1 890 can be coated with or anti-reflective coating to increase light transmission. (T transmissi0n). In order not to be limited by theory, it can be determined that: when the field sealant material layer does not exist, a higher power load (tolerable power loads) per unit area in the patterned surface LED 100 is allowed. ). 1057-6715-ρρ 84 200531311 In addition, for standard LEDs, the degradation of the packaging layer is usually regarded as a fa iiure mechanism, so the use of the packaging layer can be avoided. Packaging LED 1 890 It can be mounted on a circuit board, another device or directly on a heat sink. Figure 54 shows a model (modei) of heat dissipation applied to a package [ED 1890 ), This package [ED 1890 is set on the under-heated state. The package LED 1890 is supported by a core board (co re board) 1 900. The core board 1900 includes insulating and electrically conductive regions ( example ·· Using the conductive area of aluminum or copper metal), this insulating and conductive area is attached to the heat sink. For example, the package 1 ^ 0 1890 can be soldered (3〇1 (16〇 (for example: the type of welding Including ... AuSn solder, PbSn solder, NiSn soider, InSn solder, inAgSn solder, lead solder Magnesium welding (PbSnAg solder) or using conductive epoxy epoxy conductive (such as silver filled epoxy ^ silver filled epoxy) attached to the core board 1900. Core The board M⑻ is supported by a heat sink metal i 920 and a plurality of heat sink fins 190. For example, the core board side can be welded (for example, welding) The types include: gold-tin solder, stagger welding, recording welding, indium welding, indium welding, stagger welding, or using epoxy resin (such as: silver-filled epoxy resin) to attach to the heat sink Metal layers on the device. In the above model, when the heat is transferred toward the diffuser, this heat is assumed to be . 189〇 LED divergence angle in the package angle) 1906 is a via packaging; 189〇 I and a lng kg of heat release angle 85

1057-6715-PF 200531311 度。一般而言，散佈角度1906是根據材料性質（makrial properties)與系統之垂直配置（vertical lay〇ut)而定，並且於 散熱器中之不同層結構是具有不同的散佈角度19〇6。片厚 度為dx之熱阻（thermal resistance)可根據以下方程式進行 估算： dRth 1 K0 S^2 KQ (iSr, + 2xtan^)2 K〇表示導熱性（thermal conductivity)，y表示在元件頂 部之熱前端（heat front)的尺寸。經整合之後，阻值 (resistivity)可表示為以下的方程式：1057-6715-PF 200531311 degrees. Generally speaking, the spreading angle 1906 is based on the material properties and the vertical layout of the system, and the different layer structures in the heat sink have different spreading angles of 1906. The thermal resistance of the chip thickness dx can be estimated according to the following equation: dRth 1 K0 S ^ 2 KQ (iSr, + 2xtan ^) 2 K〇 stands for thermal conductivity, and y stands for the heat at the top of the element The size of the heat front. After integration, the resistance can be expressed as the following equation:

R = —--L 尤〇 S'(夕’ + 2dtan0) 在上述矩形結構例子中，阻值在經過計算下，其產生 之結果可由第55圖所表示。第55圖表示針對具有大厚度 且具散佈角度為45。之一系統所計算之寬度深度比例 Rth_rectangle/Rth_square(Rth為熱阻）。熱阻會隨著寬度深度比 例的增加而降低。舉例而言，如果一方形晶粒系統（square die system)具有20°C /W之熱阻且所需散熱功率為3w時， 則接合溫度（junction temperature)(假設在 25 °C之室溫 (ambient temperature))可為 25 + 20*3 = 85°C。然而，就相較 於具有相同面積且所需發散熱量之矩形晶粒而言，此矩形 晶粒是具有較低的接合溫度。第56圖表示接合溫度之圖 形，此圖形為寬度深度比例之函數。可以確定的是，較低 的接合溫度是適合於獲得縮減波長變化（reduced wavelength shift)及較高的裝置效率（device efficiency)。 1057-6715-PF 86 200531311 由上述說明可知，矩形LED(例如：相較於方形led) 可提供以下所列出之一或多個優點。矩形led可在單位面 積内具有較大的銲線數目’藉此以增加可輸入於咖的功 率。由於矩形結構是可經由選擇方式以配合於一像素或一 微型顯示之一特定寬度深度比例，如此便可減少複雜光束 成型透鏡（complex beam shaping 〇pUcs)之需求。另外，矩 形LED除了可增加散熱速度之外，因裝置過熱所導致失效 (failure)的可能性（Hkeiih〇〇d)亦可被降低。 此外，由於經晶圓所切割之一個別LEDs的剖面是略 大於LED的光發射表面面積（light_emhting ⑽）， 則其它個》j LEDs、可分離之可定址LEDs(addressaMe le叫 便可採取陣列方式而相互緊密疊置。如果當LED無法運作 (^例如：由於大缺陷（largedefect))時，由於個別leDs之間 是相互緊密疊置的’如此便無法大幅降低陣列片犬LEDs的 效能。 由上述所提出之各實施例可知，其它實施例中亦可具 有相同的特徵。 舉例而言，除了上述發光裝置與其相關之層結構所提 出之特疋厚度之外，其它的厚度值仍可被採用的。一般而 口，發光I置可具有任何所需之厚度，並且於發光裝置中 之個別層尨構亦可可具有任何所需之厚度。就光產生區域 130而曰，於多重推疊層122中所選出之層結構厚度是設 计用以i曰加光學模式（〇ptical m〇des)之空間重疊 overlap)’藉此以增加在光產生區域中所產生光線之輸R = —-- L Especially 〇 S '(夕 ’+ 2dtan0) In the above rectangular structure example, the resistance value is calculated, and the result can be shown in Figure 55. Fig. 55 shows that for a large thickness and a spread angle of 45. The width-depth ratio Rth_rectangle / Rth_square calculated by one of the systems (Rth is the thermal resistance). Thermal resistance decreases as the ratio of width to depth increases. For example, if a square die system has a thermal resistance of 20 ° C / W and the required heat dissipation power is 3w, then the junction temperature (assuming a room temperature of 25 ° C ( ambient temperature)) can be 25 + 20 * 3 = 85 ° C. However, the rectangular crystal grains have a lower bonding temperature than the rectangular crystal grains having the same area and the required heat radiation amount. Figure 56 shows a graph of joint temperature as a function of width-to-depth ratio. It can be determined that a lower junction temperature is suitable for obtaining a reduced wavelength shift and a higher device efficiency. 1057-6715-PF 86 200531311 From the above description, it can be seen that rectangular LEDs (for example: compared to square LEDs) can provide one or more of the advantages listed below. The rectangular led can have a larger number of bonding wires in a unit area, thereby increasing the power that can be input into the coffee. Since the rectangular structure can be selected to fit a specific width-depth ratio of a pixel or a micro display, the need for complex beam shaping lenses (pUcs) can be reduced. In addition, in addition to the increased heat dissipation speed of rectangular LEDs, the possibility of failure due to overheating of the device (Hkeiih〇d) can also be reduced. In addition, because the cross section of one individual LEDs cut by the wafer is slightly larger than the light emitting surface area of the LED (light_emhting ⑽), the other "j LEDs" and "detachable addressable LEDs" (addressaMe) can be arrayed. And they are closely stacked with each other. If the LEDs cannot work (for example: due to large defects), because the individual LEDs are closely stacked with each other, so the efficiency of the array chip LEDs cannot be greatly reduced. From the above It can be known from the proposed embodiments that other embodiments may have the same characteristics. For example, in addition to the special thickness proposed by the light-emitting device and its related layer structure, other thickness values may still be used. Generally speaking, the light emitting device may have any desired thickness, and the individual layer structures in the light emitting device may also have any desired thickness. As for the light generating area 130, in the multiple push stack 122 The thickness of the selected layer structure is designed to cover the spatial overlap of the optical mode (〇ptical m〇des) to increase the generation in the light generation area. The transmission line

1057-6715-PF 87 200531311 出值。以下便針對發光裝置中 描屮；te E^、 之特疋層結構所具有之厚卢 牷出相關明。於部分實 有之厗度 至少约A 1 ΠΛ 層、構1 3 4之厚度係可 至八勺為100 nm(例如··至 子-竹」 nm、至少約為4f)n nm、至少約為3〇〇 王夕、、勺為400 nm、至少 ! 〇 n ^ r . 〇為500 nm)及/或至多約為 10破未（如cr0ns)(例如··至多 夕、Ί马 米、至多約為w乎、=為5微米、至多約為3微 ；）。於部分實施例中，層結構128之厚 度係可至少約為10nm(例 構⑵之厂予 刊叫及/或至多約為^^/力為〜心至少約為 多約A 1〇n 、 ^卡（例如··至多約為500 nm、至 夕、，、勺為100 nm)。於部分實 至少m 甲層九構126之厚度係可 主> 4為10 nm(例如··至少 « /5, 5 t ，、句為 50 nm、至少約為 1〇〇 nm) 及/或至多約為i微米（例如 王夕約為500 nm、$容的么 250 nmh於部分實施例中 至夕約為 ^ έΑ Λ 1 〇…丄 先產生區域130之厚度係可至 乂、、々為10 nm(例如··至少約 少約Α 1ΛΛ 、 、、力為25nm、至少約為5〇nm、至 乂约為100 nm)及/或至多 、力為 nm(例如··至多約為250 nm、至多約為nm)。 舉例而言，雖鈇於卜、+、上、 rn. . …、於上述祝明中揭露了相關於發光二極 體（light-emitting diodes、少々= i + ^ & )之各項特徵，然其並非用以做為限 .. 万了具有相同的特徵（例如：圖案、 製程），類似的裝置包衽 • 匕括了雷射及光學放大器（laser and optical amplifiers)。 由其它例子可知，上流 上迷所k出之電流散佈層132係可 做為矽晶摻雜（n-摻雜）氮 、’豕 g 134 之一分離層（separate ayer)’於„”刀貫施例中，_電流散佈層係可一體成型於(例 如：一部分）石夕晶摻雜（n_摻雜）氮化鎵層134之上。於部分1057-6715-PF 87 200531311. The following is a description of the thickness of the special layer structure of te E ^, in the light-emitting device. In some cases, the thickness is at least about A 1 ΠΛ layer, and the thickness of structure 1 3 4 is 100 nm (e.g., to Zi-Bamboo nm, at least about 4f) n nm, at least about 3〇〇 Wang Xi,, spoon is 400 nm, at least! 〇n ^ r. 〇 is 500 nm) and / or at most about 10 breaks (such as cr0ns) (for example ... It is almost, = 5 micrometers, and at most about 3 micrometers;). In some embodiments, the thickness of the layer structure 128 may be at least about 10 nm (for example, the name given by the factory and / or at most about ^^ / force is ~ at least about A 1n, ^ Card (for example, up to about 500 nm, up to 100 nm, spoon, 100 nm). The thickness of the layer A and the structure 126 may be at least m. 4 is 10 nm (for example, at least «/ 5, 5 t, 50 nm, at least about 100 nm) and / or at most about 1 micron (for example, Wang Xi is about 500 nm, and the capacity is 250 nmh) in some embodiments. The thickness of the first generated region 130 can be 乂, 々, and 々 are 10 nm (for example, at least about Α 1ΛΛ, 、, force is 25 nm, at least about 50 nm, and 乂). (Approximately 100 nm) and / or at most, the force is nm (for example, at most about 250 nm, at most about nm). For example, although it is described in Bu, +, Shang, rn ... Various features related to light-emitting diodes (light-emitting diodes, 々 = i + ^ &) are disclosed, but they are not used as a limit .. They have the same characteristics (eg, patterns, processes) Similar devices include: • Laser and optical amplifiers. From other examples, it can be seen that the current spreading layer 132 from the upper stream can be used as silicon doped (n-doped). Miscellaneous) Nitrogen, a "separate ayer" of "豕 g 134" in the "" knife embodiment, the current spreading layer can be integrally formed (for example: a part of) Xi Xijing doped (n_ doped) ) On the gallium nitride layer 134.

1057-6715-PF 88 200531311 貫施例中，f流散佈層係、可為相對於相鄰層之㈤、相對高 之夕SS 4雜（η-摻雜）氮化鎵層丨3 4或異質接面，藉此以形成 二維電子氣體（2D eleetr()n gas)。 ，士另例子可知’雖然於上述說明中揭露了相關於半 導體材料之使用，然其並非用以做為限制，其它的半導體 材料亦可應用在各實施例之中。一般而言，任何半導體材 料（例如：第ΙΠ_ν族半導體材料（III-V semiconductor rials)有枝半導體材料（organic semiconductor materials)、矽（silic〇n))係可應用在發光裝置之中，其它的 光產生材料（light-generating material)包括了 ··銦鎵砷磷 (InGaAsP)、鋁銦氮化鎵（A1InGaN)、鋁鎵砷⑷以^)、銦 嫁氮化銘（InGaAlP)。有機發光材料（〇rganic light-emiuing materials)包括了二_8_羥基奎琳化鋁（電子轉移材料 (Alq3))(aluminum tris|hydr〇xyquin〇Hne(Aiq3》之小分 子、聚[2-甲氧基-5-(2-乙基己氧基）_l5 4_對位苯乙二烯] 【P〇ly[2’th〇xy-5-(2-ethylhexyl〇Xy)-1，4-vinylenephenylene^^ 對笨乙块（MEH-PPV)之共軛聚合物（c〇njugated p〇lymerS)。 又如另一例子可知，雖然於上述說明中揭露了具有大 面積之LEDs，然其並非用以做為限制，小面積LEDs亦同 樣可達到相同的特徵（例如：LEDs之邊緣係以3〇〇微米小 於標準值（standard))。 又如另一例子可知，雖然於上述說明中揭露了介電函 數係可根據具有孔洞之圖樣而進行空間改變，然其並非用 以做為限制，圖樣亦可採用其它樣式來達成，例如：於適 89 200531311 ^的增、、’。構中’圖樣係可採用連續脈紋（ν_)及/或 當的層結構申， 不連讀1057-6715-PF 88 200531311 In the present embodiment, the f-flow distribution layer system may be a relatively high relative to adjacent layers, and a relatively high SS 4 hetero (η-doped) gallium nitride layer 3 4 or heterogeneous The interface is formed to form a two-dimensional electron gas (2D eleetr () n gas). It can be seen from another example. Although the use of semiconductor materials is disclosed in the above description, it is not intended to be a limitation, and other semiconductor materials may also be used in the embodiments. Generally speaking, any semiconductor material (for example: III-V semiconductor rials, organic semiconductor materials, silicon) can be used in light-emitting devices. Others Light-generating materials include InGaAsP, AlGaInP, AlGaAs, and InGaAlP. The organic light-emitting materials (〇rganic light-emiuing materials) include di_8_ hydroxy quinine aluminum (electron transfer material (Alq3)) (aluminum tris | hydrOxyquinOHne (Aiq3) small molecules, Methoxy-5- (2-ethylhexyloxy) _l5 4-p-phenylene diene] [P〇ly [2'th〇xy-5- (2-ethylhexyl〇Xy) -1,4- vinylenephenylene ^^ Conjugated polymer (MEH-PPV) conjugated polymer (coonjugated polymerS). As another example, it can be seen that although large-area LEDs are disclosed in the above description, it is not useful. As a limitation, small-area LEDs can also achieve the same characteristics (for example: the edge of the LEDs is less than the standard value of 300 microns). As another example, it can be seen that although the medium is disclosed in the above description The electrical function system can be changed spatially according to the pattern with holes, but it is not used as a limitation, and the pattern can also be achieved by other styles, such as: Yu Shi 89 200531311 ^ increase, ``. 中 中 '' pattern system Can use continuous veins (ν_) and / or current layer structure to apply, do not read

改變。 又如另一例子可知，雖然於上述說明中揭露了利用銀 來形成層結構126，然其並非用以做為限制，層結構126 亦同樣可採用其它材料來形成。於部分實施例中，層結構 126係由可反射光線之材料所製成，藉由此一層結構126 係對於光產生區域所產生之50%的光線進行反射，隨後被 反射之光線係衝擊在一反射材料層（a layer 〇f a reflective material)之上，其中，反射材料層係位於支承構件與一多 重材料推疊層（multi-layer stack of material)之間。此類型 之材料包括·布拉格反射鏡疊層（distributed Bragg reflector stacks)、各種金屬與合金，例如：鋁、含铭合金。 又如另一例子可知，載具120係可由各種材料所製 成’這些材料包括了銅（copper)、銅鐵（copper-tungsten)、 氮化 I呂（aluminum nitride)、碳化石夕（silicon carbide)、氧化 鈹（beryllium-oxide)、鑽石（diamonds)、TEC、鋁。 又如另一例子可知，雖然於上述說明中之層結構1 2 6 係以熱沈材料所製成，但於其它實施例中之發光裝置係可 由包括了分離層（例如：設置於層結構126、載具120之間） 之材料所製成，藉此以做為一熱沈。值得注意的是，此實 1057-6715-PF 90 200531311 施例中之層結構 成0 126 係可或不必經由熱沈用 之材料所製 又如另-例子可知’除了上述說明中所提出之 個光產生區域的方式以改變介電函數中的圖樣之外，僅— 由延伸至矽晶摻雜（n-摻雜）氮化鎵層134之中的方式以错 變介電函數中的圖樣（於實f上係具有降低表面再 子損失（surface rec〇mbination carrier 1〇sses)之可能）。Z 部 分實施例中由延伸超過了石夕晶摻雜（n_摻雜）氮化嫁層 134的方式亦可改變介電函數中的圖樣（例如：延伸進入^ 化銘鎵層132、光產生區域130及/或鎂摻雜（p_接雜）氮化= 層 128)。 又如另一例子可知，雖然於上述實施例中提出了可將 空氣設置於上表面110、蓋玻片14〇之間，於其它實施例 中係可將其它材料及/或空氣設置於上表面11〇、蓋玻片 之間。一般而言，此類型之材料之折射率係必須至少約為 卜至少約小於1.5(例如：至少約小於i _4、至少約小於2 _3、 至少約小於1.2、至少約小於lel)，其材質係包括了氮 (nitrogen)、空氣，或是其它具高導熱性 conductivity)之氣體。於此實施例中，上表面11〇係可或不 必被圖樣化處理，例如··上表面110係可為粗糙化處理之 非圖樣（non-patterned)表面（例如：可為具有任意分佈、各 式尺寸及形狀之外貌，其波長係小於λ/5)。 又如另一例子可知，雖然於上述實施例中提出包括在 平坦化層、微影層之沉積、蝕刻，一預圖樣化蝕刻光罩 1057-6715—PF 91 200531311 (pre_patterned etch mask)係可設置於&摻雜半導體層的表 面之上。 又如另一例子之實施例中可知，一蝕刻光罩層（^仏 mask layer)係可設置於n_摻雜半導體層、平坦化層之間。 於此實施例中，其方法係包括了對於钱刻光罩層之至少一 部分進行移除（例如：以相對於n_摻雜半導體層中之圖樣的 方式下，於钱刻阻層（etchstoplayer)之中形成了 一圖樣）。 又如另一例子可知，雖然於上述實施例令提出了具有 平滑之圖樣化表面110,但於其它實施例中之表面ιι〇係可 為粗糙之圖樣化表面（例如··可為具有任意分佈、各式尺寸 及形狀之外貌，其波長係小於λ/5、λ/2、λ)。此外，於特 定貫施例中，開孔1 50之複數側壁係可為粗糙的（例如：可 為具有任意分佈、各式尺寸及形狀之外貌，其波長係小於 λ/5、λ/2、λ)，其表面1丨〇係可以或不必為粗糙的表面。再 者，於部分實施例中之開孔150的底面（b〇tt〇m⑽^“匀可 為粗糙的（例如··可為具有任意分佈、各式尺寸及形狀之外 ^ 其波長係小於λ/5、λ/2、λ)。舉例而言，表面1 1 〇、開 孔150之側壁及/或開孔15〇之底面係可藉由蝕刻（例如： 採用渔钱刻、乾蝕刻、活性離子蝕刻）方式而達到粗糙化。 為了不受到理論上的限制，可以確定的是：在相較於自動 平滑表面之下，一光線最終係會以小於Snell，s定律之臨界 角（critical angle)的角度撞擊在表面結構7⑽之上，而藉由 粗糖的表面11 〇及/或開孔i 5〇之侧壁係會大幅度地增加了 此種清況發生的可能性（probability)。 1057~6715-PF 92 200531311 於其匕例子中，經適當的加工作用下，部分實施例之 載’、係可包括了彈簧狀結構（spring-like structure)。為了不 受到理論上的限制，可以確定的是：在基底之移除過程中， 藉由此彈黃狀結構係可降低基底之裂痕情況。 於其它例子中可知，部分實施例之載具係可藉由一吸 音平台（acoustically absorbing platform)(例如：聚合物 (P〇lymerS)、發泡金屬（metallic foams))而加以支承。為了 不党到理論上的限制，可以確定的是：在基底之移除過程 中’藉由此吸音平台係可降低基底之裂痕情況。 於其它例子中可知，在基底被移除之前，部分實施例 係對於基底進行處理（例如：钱刻、研磨（gr〇un(j)、噴砂 (sandblasted))。於特定實施例中，當基底在被移除之前， 基底係可被圖樣化處理。於部分實施例中，當基底、緩衝 層在被移除之前，由於基底、緩衝層係具有適當的厚度， 夕重推$層之一中立機構軸（neutral mechanicai axis)於實 質上係接近於（例如：至少約為5〇〇微米、至少約為i 〇〇微 米、至少約為1 〇微米、至少約為5微米）p摻雜半導體層、 、、、σ a 層（bonding layer)之間的一介面（interface)。於特定 貝加例中’基底之各部分係可採用個別方式進行移除（例 如：減少裂痕產生的可能性）。 於其它例子中可知，雖然於上述實施例中提出了一緩 衝層係分離於一 η摻雜半導體層（例如：緩衝層係於基底之 上成長、一 η摻雜半導體層係以個別方式而於緩衝層之上 成長），然而於其它實施例中係可採用單一層結構而進行取 1057-6715-PF 93 200531311 代。舉例而言’此單一層結構之形成方式係包括：首先將 相對低摻雜（relatively 1〇w d〇ped)(例如··非摻雜 (undoped))半導體材料沉積於基底之上，隨後並（以單一程 序（one process))將一相對高摻雜（n摻雜）半導體材料進行 沉積。 於另一例子中可知，雖然於上述實施例中所提出了藉 由包括了將基底之一表面於電磁輻射（例如··雷射光）下進 行曝光方式之一程序以對於基底進行移除，但於部分實施 例中係可採用其它方法以對於基底進行移除。舉例而言， 基底之移除方式係可包括了蝕刻及/或拋光，並且隨後經由 電磁輪射（例如：雷射光）進行曝光。 /於又一例子中可知，在完成了平坦化層的沉積程序之 後、但在微影層的沉積程序之前，部分實施例之平坦化層 之上表面係可被平坦化。舉例而言，當進行平坦化層之加 熱程序時（例如：採用加熱板），_平坦物件（flatQbject)(例 如··光學平面鏡（0?11(^1 flat))係可被設置於平坦化層之上 表面。於部分實施例中，藉由施加一壓力（例如··採用實質 重物（phySlcal weight)或壓迫（press))的方式係可協助平坦 化程序之進行。 於入一例子中可 广一-…入π ,小〜別，部分實施{ 之基底係可經由數種方式進行處理。舉例而言，美底之石 理係可由蝕刻、拋光、研磨、喷沙之其中一者或其多數4 程序來進行。於特定實施例中，其處理方式係可包括了對 於其進行圖樣化。於部分實施例中，其處理方式係可包括 1057-6715-PF 94 200531311 了將一抗反射塗層（antireflective coating)沉積於基底之 上舉例而。荽進行了基底移除程序（substrate removal process)時，由於此一程序中係包括了將基底於電磁輻射下 進行曝光，並且由於塗層係可減少電磁輻射的反射，藉由 此抗反射塗層係可容許相對大區域之基底可被移除。於特 定實施例中，基底之表面上的圖樣係同樣可以達到抗反射 的效果。 於部分實施例中，發光裝置之表面11〇、蓋玻片14〇 及支承構件142之上係可塗層有一填材料層。 於特定實施例中，發光裝置係可包括一蓋玻片丨4〇， 並且於蓋玻片140之中係具有一磷材料層，並且於其表面 11 〇係可或不必圖樣化。 之上。 於另一種實施方式中，由光產生區域130所發出之光 線係可為UV(或紫（violet)或藍（blue))，並且於含碟材料層 180之中係包括了紅色碟材料（red phosphor material)(例 如· L202S : Eu3 )、綠色碟材料（green phosphor material)(例 如· ZnS : Cu，Al，Mn)、藍色麟材料（blue phosphor material)(例 如：（Sr，Ca，Ba，Mg)10(P〇4)6ci : Eu2 + )。 其它實施例係含括於申請專利範圍之中。 【圖式簡單說明】 第1圖表示一發光系統（light emitting system)之示意 圖。 1057-6715-PF 95 200531311 弟2A-2D圖表示光學顯示系統（〇ptjcai display system) 之不意圖。 第3圖表示一光學顯示系統之示意圖。 弟 4 A 圖表示一發光二極體（Hght emitting diode，LED) 之上視圖之示意圖。 第4B圖表示一光學顯示系統之示意圖。 第5圖表示一光學顯示系統之示意圖。 第6圖表示一光學顯示系統之示意圖。 第7圖表示一光學顯示系統之示意圖。 第8A、8B圖表示一光學顯示系統之示意圖。 第9圖表示一光學顯示系統之示意圖。 第1 0圖表示一光學顯示系統之示意圖。 第11圖表示一光學顯示系統之示意圖。 笫12圖表示具有一圖樣表面（patterned surface)之一發 光二極體（LED)之剖面圖。 第13圖表示第2圖之發光二極體（Led)之圖樣表面之 上視圖。 弟14圖表示具有一圖樣表面之一發光二極體（LED)之 圖形（graph) ’此圖形為一解調參數（detuning patterned)之函 數。 第15圖表示一發光二極體（LED)之一圖樣表面之傅利 葉轉換（Fourier transform)之示意圖。 弟16圖表示具有一圖樣表面之一發光二極體（LED)之 一萃取效率（extraction efficiency)之圖形，此圖形為一最近 1057-6715-PF 96 200531311 鄰近距離（nearest neighbor distance)之函數。 第17圖表示具有一圖樣表面之一發光二極體（LED)之 一卒取效率之圖形，此圖形為一填充因子（filUng fact〇灼之 函數。 第18圖表示一發光二極體（LED)之一圖樣表面之上視 圖。 第19圖表示具有不同圖樣表面（different surface patterns)之發光二極體（LEDs)之一萃取效率之圖形。 第20圖表示具有不同圖樣表面之發光二極體（leDs) 之一萃取效率之圖形。 第21圖表示具有不同圖樣表面之發光二極體（LE]〇s) 之一萃取效率之圖形。 第22圖表示具有不同圖樣表面之發光二極體（LEDs) 之一萃取效率之圖形。 第23圖表示在相較於發光二極體（LED〇之輻射射出 光譜（radiation emissionspectrum)之下、具有不同圖樣表面 之兩發光二極體（two LEDs)之傅利葉轉換之示意圖。 第24圖表示具有不同圖樣表面之發光二極體（leDs) 之一萃取效率之圖形，此圖形為角度（angle)之函數。 第25圖表示具有一圖樣表面、於一圖樣表面具有一磷 層（phosphor layer)之一發光二極體（LED)之側視圖 弟26圖表示具有夕重推疊層（multi-layer stack)之剖 面圖。 第27圖表示具有一多重推疊層之剖面圖。 1057-6715-PF 97 200531311 第28圖表示具有一多重推疊層之 。 第29圖表示具有一多重 。 夕重推豐層之剖面 第30圖表示一基底移除程序 ° process)之側視圖。 （Substrate remo val 第31圖表示具有一多重推疊層 第32圖表示具有一 :面圖。 第33圖表示具有一多重推心=剖面圖。 第34B…士 局部剖面圖。 弟34圖表不具有一多重推疊層之 第35圖表示具有一多重推 第36圖表示具有一多重 剖面圖。 策W… $層局部剖面圖。 弟37圖表不具有一多重推疊層之 第3δ圖表示具有一多 面圖。 第39圖…： 層之局部剖面圖。 弟圖表不具有—多重推疊層之局# 第40圖表示具有一多重 回。 因+ 推豐層之局部剖面圖。 弟41圖表示具有一容舌 繁42… 層之局部剖面圖。 弟42圖表不具有一客舌 田 頁夕重推豐層之局部剖面圖。 第43圖表示具有一多重推疊層之局部剖面圖。 第44圖表示具有-多重推疊層之局部剖面圖。 弟45Α圖表示—發光二極體（led)之立體圖。 第45B圖表示一發光二極體（led)之上視圖。 第46A圖表示一發光二極體（led)之上視圖。 第46B圖表示具有一發光二極 ） 给门 〜之局部剖面圖。 圖表示一等效電路圖（equivalent circuitchange. As another example, although it is disclosed in the above description that silver is used to form the layer structure 126, it is not intended to be a limitation, and the layer structure 126 may also be formed using other materials. In some embodiments, the layer structure 126 is made of a material capable of reflecting light, so that the layer structure 126 reflects 50% of the light generated in the light generating area, and then the reflected light impinges on a A layer of reflective material layer, wherein the reflective material layer is located between the support member and a multi-layer stack of material. This type of material includes distributed Bragg reflector stacks, various metals and alloys, such as: aluminum, alloys with inscriptions. As another example, it can be known that the carrier 120 series can be made of various materials. These materials include copper, copper-tungsten, aluminum nitride, and silicon carbide. ), Beryllium-oxide, diamonds, TEC, aluminum. As another example, it can be seen that although the layer structure 1 2 6 in the above description is made of a heat sink material, the light emitting device in other embodiments may include a separation layer (for example, provided in the layer structure 126 , Between carrier 120), as a heat sink. It is worth noting that the layer structure of this example 1057-6715-PF 90 200531311 in the example is 0 126. It can be made with or without the material used for heat sinks. As another example, it can be seen that 'in addition to the one mentioned in the above description, The way the light is generated is to change the pattern in the dielectric function, and only to-by extending into the silicon-doped (n-doped) gallium nitride layer 134, the pattern in the dielectric function is distorted ( On the real f, it is possible to reduce the surface recion carrier loss (surface recOmbination carrier 10ss). In the embodiment of part Z, the pattern in the dielectric function can also be changed by extending beyond the nitrided doped (n_doped) nitrided layer 134 (for example, extending into the GaN layer 132, light generation Region 130 and / or magnesium doped (p_doped) nitride (layer 128). As another example, it can be seen that although it is proposed in the above embodiment that air can be provided between the upper surface 110 and the cover glass 14o, in other embodiments, other materials and / or air can be provided on the upper surface. 110. Between coverslips. In general, the refractive index of this type of material must be at least about 1.5 and less than about 1.5 (for example: at least about less than i_4, at least about less than 2_3, at least about less than 1.2, at least about less than lel), and its material system is Including nitrogen, air, or other gases with high thermal conductivity. In this embodiment, the upper surface 110 may or may not be patterned. For example, the upper surface 110 may be a roughened non-patterned surface (for example, it may have any distribution, The size and appearance of the formula, its wavelength is less than λ / 5). As another example, it can be seen that, although it is proposed in the above embodiment to include deposition and etching on a planarization layer and a lithographic layer, a pre-patterned etching mask 1057-6715-PF 91 200531311 (pre_patterned etch mask) can be set Above the surface of the & doped semiconductor layer. As another example, it can be known that an etching mask layer may be disposed between the n-doped semiconductor layer and the planarization layer. In this embodiment, the method includes removing at least a portion of the money-etching mask layer (for example, an etchstop layer in a manner relative to the pattern in the n-doped semiconductor layer). A pattern is formed). As another example, it can be seen that although a smooth patterned surface 110 is proposed in the above embodiment, the surface in other embodiments may be a rough patterned surface (for example, it may have an arbitrary distribution) , Various sizes and shapes, and its wavelength is less than λ / 5, λ / 2, λ). In addition, in a specific embodiment, the plurality of side walls of the openings 150 may be rough (for example, they may have an arbitrary distribution, various sizes and shapes, and their wavelengths are less than λ / 5, λ / 2, λ), the surface of which is not necessarily a rough surface. Furthermore, in some embodiments, the bottom surface of the opening 150 (bottom) may be rough (for example, it may have an arbitrary distribution, various sizes and shapes ^ and its wavelength is less than λ / 5, λ / 2, λ). For example, the surface 1 10, the side wall of the opening 150 and / or the bottom surface of the opening 150 can be etched (for example, using fishing money, dry etching, active Ion etching) to achieve roughening. In order not to be bound by theory, it can be determined that, compared with the automatic smooth surface, a light will eventually be less than the critical angle of Snell's law (critical angle) The angle of impact on the surface structure 7⑽, and the side wall system of the crude sugar surface 11 〇 and / or the opening i 5 〇 will greatly increase the probability of such a situation (1057 ~). 6715-PF 92 200531311 In the example of the dagger, after proper processing, some embodiments may include a spring-like structure. In order not to be limited by theory, it can be determined Yes: During the removal of the substrate, by this The yellow structure can reduce the cracking of the substrate. In other examples, it can be known that the carrier of some embodiments can be achieved by an acoustically absorbing platform (for example, PolymerS, foamed metal ( metallic foams)). In order not to limit the theory to the theory, it can be determined that during the removal of the substrate, 'the sound absorption platform can reduce the cracks of the substrate. In other examples, it can be known that Before the substrate is removed, some embodiments process the substrate (eg, money engraving, grinding (groon (j), sandblasted)). In certain embodiments, when the substrate is removed before the substrate is removed, The system can be patterned. In some embodiments, before the substrate and the buffer layer are removed, since the substrate and the buffer layer have a proper thickness, a neutral mechanicai axis is re-launched Is substantially close to (eg, at least about 500 microns, at least about 100 microns, at least about 10 microns, at least about 5 microns) the p-doped semiconductor layer, ,,, , Σ a layer (bonding layer) interface (interface). In specific examples of the 'base parts' can be removed individually (for example: reduce the possibility of cracks). In other examples It can be seen that although a buffer layer is separated from an n-doped semiconductor layer in the above embodiment (for example, the buffer layer is grown on the substrate, and an n-doped semiconductor layer is separated from the buffer layer in a separate manner). Growth), however, in other embodiments, a single layer structure can be used to take the 1057-6715-PF 93 200531311 generation. For example, 'the formation method of this single layer structure includes: firstly depositing a relatively lowly doped (relatively 10 wdped) (eg, undoped) semiconductor material on a substrate, and then ( A relatively highly doped (n-doped) semiconductor material is deposited in a single process). In another example, it can be known that, although it is proposed in the above embodiment to remove a substrate by a procedure including exposing a surface of the substrate to electromagnetic radiation (for example, laser light), In some embodiments, other methods may be used to remove the substrate. For example, the method of removing the substrate may include etching and / or polishing, and then exposing via electromagnetic wheel shot (eg, laser light). / In another example, it can be known that the surface of the planarization layer above some embodiments can be planarized after the deposition process of the planarization layer is completed but before the lithographic layer deposition process. For example, when performing a heating process for a flattening layer (eg, using a heating plate), a flatQbject (eg, an optical flat mirror (0? 11 (^ 1 flat)) can be set to flattening The upper surface of the layer. In some embodiments, the flattening process can be assisted by applying a pressure (eg, using a phySlcal weight or press). In an example Ke Guangyi -... into π, small ~ other, some of the substrates that implement {can be processed in several ways. For example, the stone system of the bottom can be one of etching, polishing, grinding, sandblasting, or Most of them are performed by 4 procedures. In a specific embodiment, the processing method may include patterning it. In some embodiments, the processing method may include 1057-6715-PF 94 200531311. An example of an antireflective coating deposited on a substrate. 荽 When the substrate removal process was performed, this process included exposing the substrate to electromagnetic radiation, and because The coating system can reduce the reflection of electromagnetic radiation, thereby the anti-reflection coating system can allow a relatively large area of the substrate to be removed. In a specific embodiment, the pattern on the surface of the substrate can also achieve the effect of anti-reflection. In some embodiments, a surface of the light-emitting device 11, the cover glass 14, and the support member 142 may be coated with a filler material layer. In a specific embodiment, the light-emitting device may include a cover glass 丨40, and there is a phosphorous material layer in the cover glass 140, and the surface 110 may or may not be patterned on the surface. In another embodiment, the light emitted by the light generating region 130 is The system can be UV (or violet or blue), and the disc-containing material layer 180 includes a red phosphor material (eg, L202S: Eu3), a green disc material (green phosphor material) (e.g. ZnS: Cu, Al, Mn), blue phosphor material (e.g. (Sr, Ca, Ba, Mg) 10 (P〇4) 6ci: Eu2 +). Other implementations Examples are included in the scope of patent application. DESCRIPTION FIG 1 shows a first lighting system (light emitting system) a schematic of FIG. 1057-6715-PF 95 200531311 brother FIG. 2A-2D shows an optical display system (〇ptjcai display system) it is not intended. FIG. 3 is a schematic diagram of an optical display system. Figure 4A shows a schematic view of a top view of a Hght emitting diode (LED). FIG. 4B shows a schematic diagram of an optical display system. FIG. 5 shows a schematic diagram of an optical display system. FIG. 6 shows a schematic diagram of an optical display system. FIG. 7 shows a schematic diagram of an optical display system. 8A and 8B are schematic diagrams of an optical display system. FIG. 9 shows a schematic diagram of an optical display system. FIG. 10 is a schematic diagram of an optical display system. FIG. 11 is a schematic diagram of an optical display system. Fig. 12 shows a cross-sectional view of a light emitting diode (LED) having a patterned surface. Fig. 13 shows a top view of the patterned surface of the light emitting diode (Led) of Fig. 2. Figure 14 shows a graph of a light-emitting diode (LED) with a patterned surface. This graph is a function of a detuning patterned. FIG. 15 is a schematic diagram of a Fourier transform of a pattern surface of a light emitting diode (LED). Figure 16 shows a graph of the extraction efficiency of a light-emitting diode (LED) with a pattern surface. This graph is a function of the nearest neighbor distance 1057-6715-PF 96 200531311. Fig. 17 shows a graph of the efficiency of a light-emitting diode (LED) with a patterned surface, which is a function of a fill factor (filUng fact). Fig. 18 shows a light-emitting diode (LED) ) A top view of a patterned surface. Figure 19 shows a pattern of extraction efficiency of one of the light emitting diodes (LEDs) with different surface patterns. Figure 20 shows a light emitting diode with different patterned surfaces. (LeDs) pattern of extraction efficiency. Figure 21 shows the pattern of extraction efficiency of light-emitting diodes (LE) 0s with different pattern surfaces. Figure 22 shows the pattern of light-emitting diodes (LE) with different pattern surfaces ( LEDs) is a graph of extraction efficiency. Figure 23 shows the two LEDs with different patterned surfaces compared to the light emitting diodes (LED0's radiation emission spectrum). Schematic diagram of Fourier transform. Figure 24 shows a graph of the extraction efficiency of one of the light-emitting diodes (leDs) with different pattern surfaces. This figure is a function of angle. Figure 25 shows the Side view of a light emitting diode (LED) with a pattern surface and a phosphor layer on the pattern surface. Figure 26 shows a cross-section view with a multi-layer stack. The figure shows a cross section with a multiple push stack. 1057-6715-PF 97 200531311 Figure 28 shows a cross section with a multiple push stack. Figure 29 shows a cross section with a multiple push section. Figure 30 shows a side view of a substrate removal process. (Substrate remo val Figure 31 shows a multi-push stack. Figure 32 shows a puppet: Figure 33. Figure 33 shows a multi-push center. = Sectional view. Section 34B ... Partial sectional view. Figure 34 does not have a multiple push stack. Figure 35 shows a multiple push. Figure 36 shows a multiple cross section. Sectional diagram. The 37th graph of the 37th graph without a multiple push stacking has a multi-faceted graph. Figure 39 ...: a partial cross-sectional view of the layer. The younger graph does not have—multiple stacking bureau ## 40 The figure shows a partial cross-section view of a multiple loop. Figure 41 shows a partial cross-sectional view of a layer containing 42 ... layers. Figure 42 does not have a partial cross-sectional view of a re-pushing layer of Kexi Tianxi. Figure 43 shows a partial section with a multiple push stack. Fig. 44 shows a partial cross-sectional view with a multiple push stack. Fig. 45A shows a perspective view of a light emitting diode (led). Fig. 45B shows a top view of a light emitting diode (led). Figure 46A shows a top view of a light emitting diode (LED). Fig. 46B shows a partial cross-sectional view of a gate having a light emitting diode. 1. The figure shows an equivalent circuit diagram.

diagram) ° 1057-6715-PF 98 200531311 第47A圖表示一發光二極體（LED)之上視圖。 第47B圖表示一等效電路圖。 第48A圖表示一發光二極體（LED)之上視圖。 第48B圖表示一等效電路圖。 第49A圖表示一發光二極體（led)之上視圖。 第49B圖表示具有一發光二極體（LED)之局部剖面圖。 第49C圖表示具有一發光二極體（LED)之局部剖面圖。 第50圖表示一接合電流密度（juncti(m current density) 之圖形。 第51A圖表示一多重推疊層之上視圖。 第51B圖表示具有一發光二極體（LED)之局部剖面圖。 第52圖表示一接觸墊（c〇ntact)之視圖。 弟53圖表示一封裝發光二極體（packagecj led)之圖 式。 第54圖表示一封裝發光二極體及一散熱器（heat sink) 之圖式。 第55圖表示電阻（resistance)之圖形。 弟56圖表示接合溫度（juncti〇ri temperature)之圖形。 主要元件符號說明】 100〜LEDs 11 0〜上表面 11 00〜光學顯示系統 11 02〜光學顯示系統 11 04〜光學顯示系統 1106〜光學顯示系統 1110 〜LED 1115〜導線 1057-6715-PF 99 200531311 1120〜透鏡 1130〜微型顯示器 1131〜影像平面 120〜載具 1200〜光學顯示系統 1202〜暗點 122〜多重推疊層 124〜結合層 12 6〜銀層 128〜鎂摻雜（p-摻雜）氮化鎵層 13 0〜光產生區域 132〜氮化銘鎵層 134〜矽晶摻雜（n-摻雜）氮化鎵層 13 6〜η邊接觸墊 151〜頂部 13 8〜ρ邊接觸墊 15 10〜冷卻系統 140〜蓋玻片 1520〜感測器 1410〜藍光LED 16〇〇〜光學顯示系統 142〜支承構件 1700〜光學顯示系統 1420〜綠光LED 1702〜均勻機 1430〜紅光LED 1710〜光學顯示系統 144〜封膠材料層 1712〜透鏡 146〜深度 1720〜光學顯示系統 1 5 0〜開孔 1722、1724、1726〜透鏡 1 5 0 0〜光學顯示系統 1728、1730、1732〜LCD 面板 1752〜TIR稜鏡 1734〜裝置 1754〜鏡子 1735〜投影透鏡 1755〜投影透鏡 1 73 6〜光束 1756〜DLP面板 1750〜光學顯示系統 1 7 6 0〜光線 1057-6715-PF 100 200531311 1770〜光學顯示系統 1772、1776、1 780〜LCOS 面板 1774、1778、1 782〜極化光束分離器 1790〜光束 1795〜投影透鏡 1 80〜含罐材料層 1 860〜線[条 1 801〜接觸結構 1862〜線條 1802 〜LED 1 890 〜LBD 1 803〜接觸結構 1892〜銲線 l8〇4a、1804b〜導電墊結構 1894〜拴槽結構 1 806〜導電桿結構 1896〜透明蓋子 1 808〜頂面 1899〜接觸塾 181〜頂部 1900〜芯板 1810 〜LED 1902〜散熱器用金屬層 1 8 12〜多桿結構 1904〜散熱器用鰭片 1 8 2 0〜絕緣層 1906〜散佈角度 1834〜絕緣層 230〜六角單體 1 836〜導電接觸墊 3 00〜光學顯示系統 1 8 3 7〜箭頭 50〜發光系統 1850〜圖形 500〜LED晶圓 1 85 6〜線條 5 0 1〜表面 185 8〜線條 502 、 504 、 506 、 508 、 510 、 512〜層結構 520、522、524、526〜層結構 1057 — 6715 — PF1 1〇1 200531311 550〜多重推疊層 60〜陣列 604、606、608、610〜層結構 650〜多重推疊層 702〜平坦化層 704〜微影層 7 0 8〜钱刻阻止材料 7 10〜蝕刻阻止材料 a〜格常數 600〜多重推疊層 602〜載具 D 1 870〜接觸周期 dr〜開孔 LI、L2〜距離 X〜距離 △ a〜尺度 _ 1057-6715-PF 102diagram) ° 1057-6715-PF 98 200531311 Figure 47A shows a top view of a light emitting diode (LED). Figure 47B shows an equivalent circuit diagram. Figure 48A shows a top view of a light emitting diode (LED). Figure 48B shows an equivalent circuit diagram. Figure 49A shows a top view of a light emitting diode (LED). Fig. 49B shows a partial cross-sectional view of a light emitting diode (LED). Fig. 49C shows a partial cross-sectional view of a light emitting diode (LED). Figure 50 shows a graph of a junction current density (Figure 51A). Figure 51A shows a top view of a multiple push stack. Figure 51B shows a partial cross-sectional view of a light emitting diode (LED). Figure 52 shows a view of a contact pad. Figure 53 shows a package cj led. Figure 54 shows a packaged light emitting diode and a heat sink. ). Figure 55 shows the resistance (resistance) figure. Figure 56 shows the junction temperature (juncti〇ri temperature). The description of the main component symbols] 100 ~ LEDs 11 0 ~ upper surface 1 00 ~ optical display system 11 02 ~ Optical display system 11 04 ~ Optical display system 1106 ~ Optical display system 1110 ~ LED 1115 ~ Wire 1057-6715-PF 99 200531311 1120 ~ Lens 1130 ~ Micro display 1131 ~ Image plane 120 ~ Carrier 1200 ~ Optical display system 1202 ~ dark spot 122 ~ multiply push stack 124 ~ bonding layer 12 6 ~ silver layer 128 ~ magnesium doped (p-doped) gallium nitride layer 13 0 ~ light generating region 132 ~ gallium nitride layer 134 ~ silicon Crystal doping ) GaN layer 13 6 ~ η side contact pads 151 ~ top 13 8 ~ ρ side contact pads 15 10 ~ cooling system 140 ~ cover glass 1520 ~ sensor 1410 ~ blue LED 160 ~ optical display system 142 ~ Supporting member 1700 ~ Optical display system 1420 ~ Green LED 1702 ~ Homogeneous machine 1430 ~ Red LED 1710 ~ Optical display system 144 ~ Seal material layer 1712 ~ Lens 146 ~ Depth 1720 ~ Optical display system 1 50 ~ Open hole 1722 , 1724, 1726 ~ lens 1 500 0 ~ optical display system 1728, 1730, 1732 ~ LCD panel 1752 ~ TIR 稜鏡 1734 ~ device 1754 ~ mirror 1735 ~ projection lens 1755 ~ projection lens 1 73 6 ~ beam 1756 ~ DLP panel 1750 ~ optical display system 1 7 6 0 ~ light 1057-6715-PF 100 200531311 1770 ~ optical display system 1772, 1776, 1 780 ~ LCOS panel 1774, 1778, 1 782 ~ polarized beam splitter 1790 ~ beam 1795 ~ projection Lens 1 80 ~ can-containing material layer 1 860 ~ line [bar 1 801 ~ contact structure 1862 ~ line 1802 ~ LED 1 890 ~ LBD 1 803 ~ contact structure 1892 ~ bond wire 804a, 1804b ~ conductive pad structure 1894 ~ Slot structure 1 806 ~ conductive rod structure 1896 ~ transparent cover 1 808 ~ top surface 1899 ~ contact 塾 181 ~ top 1900 ~ core board 1810 ~ LED 1902 ~ metal layer for heat sink 1 8 12 ~ multi-rod structure 1904 ~ fin for heat sink 1 8 2 0 ~ Insulation layer 1906 ~ Dispersion angle 1834 ~ Insulation layer 230 ~ Hexagonal monomer 1 836 ~ Conductive contact pad 3 00 ~ Optical display system 1 8 3 7 ~ Arrow 50 ~ Lighting system 1850 ~ Graphics 500 ~ LED wafer 1 85 6 ~ line 5 0 1 ~ surface 185 8 ~ line 502, 504, 506, 508, 510, 512 ~ layer structure 520, 522, 524, 526 ~ layer structure 1057 — 6715 — PF1 1〇1 200531311 550 ~ multiple Push stack 60 ~ array 604, 606, 608, 610 ~ layer structure 650 ~ multiple push stack 702 ~ flattening layer 704 ~ lithography layer 7 0 8 ~ money etch stop material 7 10 ~ etching stop material a ~ lattice constant 600 to multiple push stack 602 to carrier D 1 870 to contact period dr to opening LI, L2 to distance X to distance △ a to scale _ 1057-6715-PF 102

Claims (1)

200531311 十、申請專利範圍： 1 · 一種裝置，包括： 材料體，设汁為在一電子裝置之中使用 包括一表面；以及 一接觸結構，由該材料體之該表面所支承 構包括： 該材料體 該接觸結 -圖樣導電層’具有一内部件；以及 圖樣絶緣層’具有複數邊緣，該圖樣絕緣層設 置於該圖樣導電層之該内部件、該材料體之該表面之間， 經圖樣化之該絕緣層使得料電層延伸通過了該絕緣層之 所有該等邊緣’如此可將一電接觸形成至該材料體。 2.如巾請專㈣圍第β所述之m巾，該圖樣 導電層包括一金屬。 3·如申請專利範圍第丨項所述之裝置 絕緣層包括一氧化物。 4.如申請專利範圍第1項所述之f置 絕緣層具有錐狀。 ^5·如申請專利範圍第！項所 絕緣層於實質上具有三角狀。 衣置導二請:。利範，項所述之裝置導電所述之裝置 、上具有三角狀。8·如申請專利範圍第7項所述之裝置 其中，該圖樣 其中，該圖樣 其中，該圖樣 其中，該圖樣 其中，該圖樣 其中，該圖樣 1057-6715-ΡΡ 103 所述之裝置，其 該材料體之該表 所述之裝置，其 接之該墊結構。 200531311 絕緣層之一面積是小於該圖樣導電層。 9·如申請專利範圍第8項所述之裝置，其中 絕緣層之一長度約等於該圖樣導電層之一長度。 10·如申請專利範圍第丨項所述之裝置，其中 導電層包括： A 至少一墊結構；以及 至少一接觸墊。 1 1 ·如申请專利範圍第1 〇項 樣絕緣層設置於至少一接觸墊、 12·如申請專利範圍第11項 樣絶緣層之一端部是大於其所鄰 13.如申請專利範圍第丨項所述之裝置，其中 裝置為一發光二極體。 ^丨4.如申請專利範圍第1項所述之裝置，其中 i置為一光子晶格發光二極體。 15·如申請專利範圍第1項所述之裝置，其中 裝置為一面射型雷射。 16.如申請專利範圍第丨項所述之裝置，其中 體之頂面於實質上為矩形狀。 /、 17·如中請專利範圍第1項所述之裝置，其中 體之該表面之一寬度深度比例為4x3。 Μ.如申請專利範圍第1項所述之裝置，其中 體之該表面之-寬度深度比例為16x9。 、 19· 一種裝置，包括·· 1057-6715-PF ，該圖樣 ，該圖樣 中，該圖 δ之間。 中，該圖 ，該電子 ，該電子 ，該電子 ，該材料 ’該材料 該材料 104 200531311 -半導體晶粒，具有—表面層，該表面層具有一第一 側及一第二側’肖第二側是相反於該第一側； -第-導電塾結構’沿著該半導體晶粒之該表面層之 該第一側而設置； -弟二導電墊結構，沿著該半導體晶粒之該表面層之 該第二側而設置； 複數導電接觸塾，電性接觸於該第一導電塾結構與該 第二導電墊結構中之至少一者，該等導電接觸墊是由該第 -導電墊結構與該第二導電塾結構中之至少一者而延伸朝 向於該半導體晶粒之一中心區域；以及 一絕緣層，設置於$小 加八 置於至J一部分之該等導電接觸墊之一 内邛件、該半導體晶粒之頂層之間。 20. 如申請專利範圍第19項所述之裝置 一導電墊結料實質上是平行於該第二導電塾結構。 21. 如申請專利範圍第19項所述之裝置，其中，該絕 緣^經圖樣化之下，如此使得該等導電接觸塾令之一者 :::-部件可經由該絕緣層所支承、該等導電接觸塾甲 二部件是可經由該半導體晶粒之-頂層所支 接觸於該半導體晶粒之該表面層。者之該第二部件是電性 22.如申請專㈣㈣叫所述之裝置，〇， =是由該第一導電墊結構與該第二導電塾結構中^ -者而延伸朝向於該半導體晶粒之該中心區域。 如申請專利範圍第22項所述之裝置，其中，該絕 1057-6715-PF 105 200531311 緣層於該第一導電墊結構與該第二導電墊結構中之至少一 者所延伸之一第一端部是大於其所鄰接於該半導體晶粒之 5亥中心區域之一第二端部。 24·如申請專利範圍第19項所述之裝置，其中，該等 導電接觸墊為矩形狀。 25·如申請專利範圍第19項所述之裝置，其中，在該 等導電接觸墊之錐狀的作用下，接近於該第一導電墊結構 與該第二導電墊結構中之至少一者之該等導電接觸墊中之 至少一者之一部分是大於接近該半導體晶粒之該中心區域參 之該導電接觸墊之一部分。 26·如申請專利範圍第19項所述之裝置，其中，各該 等導電接觸墊之一第一端部是連接至該第一導電墊結構、 各該等V電接觸墊之一第二端部是連接至該第二導電墊結 構ο 、27·如申請專利範圍第19項所述之裝置，其中，該半 導體晶粒是矩形狀。 士申叫專利* U第丨9項所述之裝置，#中，該半 導體晶粒之該表面層之-寬度深度比例為4小 2 9.如申請專利筋圊筮 , 犯圍弟19項所述之裝置，其中，該半 ‘體晶粒之該表面層之一嘗诗 夏度洙度比例為16x9。 3 0 ·如申請專利範圍第 H 員所述之裝置，其中，該半 導體日日粒為一發先二極體晶粒。 3 1 ·如申请專利範圍第 弟30項所述之裝置，豆中，該發 光二極體晶粒為一光子晶格 ’、 " 九一極體晶粒。 1057-6715-PF 106 200531311 32. 如申請專利範圍第19項所述之裝置，其中，該半 導體晶粒為一面射型雷射。 33. 如申請專利範圍第19項所述之裝置更包括一絕緣 層，該絕緣層設置於該第一導電墊結構與該第二導電墊結 構中之至少一者、該半導體晶粒之表面層之間。 34· —種裝置，包括： 一矩形發光二極體，具有一表面層，該表面層具有一 第一側及一第二側，該第二側是相反於該第一側； 一第一導電墊結構，沿著該矩形發光二極體之該表面 層之該第一側而設置； 一第二導電墊結構，沿著該矩形發光二極體之該表面 層之該第二側而設置； 複數導電接觸墊，電性接觸於該第一導電墊結構與該 第二導電墊結構中之至少一者，該等導電接觸墊是由該第 一導電墊結構與該第二導電墊結構中之至少一者而延伸朝 向於該矩形發光二極體之一中心區域。 35·如申請專利範圍第34項所述之裝置，其中，該矩 形發光二極體包括一第三側與一第四側，該第一側、該第 一側所具有之長度大於該第三側、該第四側。 3 6.如申請專利範圍第35項所述之装置，其中，該等 ‘電接觸墊是以平行於該第三側、該第四側進行延伸。 37·如申請專利範圍第34項所述之裝置，其中，操作 過程中之散熱於實質上是相等於通過該矩形發光二極體之 散熱。 1057-6715-PF 107 200531311 38·如申請專利範圍第34項所述之裝置，其中，操作 過程中之功率分散於實質上是相等於通過該矩形發光二極 體之功率分散。 3 9.如申請專利範圍第34項所述之裝置，其中，該矩 形發光二極體為一光子晶格發光二極體。 40. 如申請專利範圍第34項所述之裝置，其中，該材 料體之該表面層之一寬度深度比例為4x3。 41. 如申請專利範圍第34項所述之裝置，其中，該材 料體之該表面層之一寬度深度比例為1 6x9。 42. 如申請專利範圍第34項所述之裝置更包括一絕緣 層’該絕緣層設置於該等導電接觸墊之至少一導電接觸墊 之一内部件、該矩形發光二極體之該表面層之間。 43·如申請專利範圍第34項所述之裝置更包括一絕緣 層’該絕緣層設置於該第一導電墊結構與該第二導電墊結 構中之至少一者之一部分、該矩形發光二極體之該表面層 之間。 44· 一種裝置，包括： 一材料疊層’具有一表面；以及 一接觸結構，設置於該材料疊層之該表面之上，該接 觸結構包括： 一圖樣導電層；以及 一圖樣絕緣層’设置於該圖樣導電層盘該材料疊 層之間，其中，在該圖樣導電層、該圖樣絕緣層之設計作 用下’如此可使得通過該圖樣導電層時之所使用之一電壓 1057-6715-PF 108 200531311 降大約相等於複數段部 長度進行設置。 該等段部是沿著 该圖樣導電層之 45.如申請專利範圍第44項所述 一 忒置，其中，於沿 者該圖樣導電層之該長度所設置之該等段部之百八之十之 中’通過該圖樣導電層之該電壓降具有一均句性。 46· —種裝置，包括： 一材料疊層，具有一表面；以及 一接觸結構，設置於該材料疊層之該表面之上，該接 觸結構包括： 一圖樣導電層，在該圖樣導電層之設計作用下，如此 可使得在操作過程中之該圖樣導電層之一熱產生大約相等 於複數段部之熱產生，該等段部是沿著該圖樣導電層之長 度進行設置。 1057-6715-PF 109200531311 X. Scope of patent application: 1. A device including: a material body provided for use in an electronic device including a surface; and a contact structure supported by the surface of the material body including: the material The contact junction-pattern conductive layer 'has an inner part; and the pattern insulation layer' has a plurality of edges, and the pattern insulation layer is disposed between the inner part of the pattern conductive layer and the surface of the material body, and is patterned. The insulating layer allows the electrical layer to extend through all of the edges of the insulating layer, so as to form an electrical contact to the material body. 2. Please refer to the m-towel described in section β. The pattern conductive layer includes a metal. 3. The device according to item 丨 of the patent application. The insulating layer includes an oxide. 4. The insulating layer described in item 1 of the patent application scope has a tapered shape. ^ 5 · If the scope of patent application is the first! The insulation layer of the project has a substantially triangular shape. Guidance for clothes please :. Lee Fan, the device described in the item has a triangular shape on the device. 8. The device according to item 7 of the scope of patent application, wherein the pattern is therein, the pattern is therein, the pattern is therein, the pattern is therein, the pattern is therein, the pattern is therein, the device described in the pattern 1057-6715-PP 103, which is The device described in the table of the material body is connected to the pad structure. 200531311 One of the insulating layers is smaller than the conductive layer of the pattern. 9. The device according to item 8 of the scope of patent application, wherein the length of one of the insulating layers is approximately equal to the length of one of the conductive layers of the pattern. 10. The device according to item 丨 of the patent application scope, wherein the conductive layer comprises: A at least one pad structure; and at least one contact pad. 1 1 If the sample insulation layer No. 10 is applied to at least one contact pad, 12 · If one end of the sample insulation layer No. 11 is larger than its neighbor 13. If the patent application No. The device, wherein the device is a light emitting diode. ^ 丨 4. The device according to item 1 of the scope of patent application, wherein i is a photonic lattice light emitting diode. 15. The device according to item 1 of the scope of patent application, wherein the device is a surface-emitting laser. 16. The device according to item 丨 of the patent application scope, wherein the top surface of the body is substantially rectangular. /, 17. The device as described in item 1 of the patent scope, wherein the width-depth ratio of one of the surfaces of the body is 4x3. M. The device according to item 1 of the scope of patent application, wherein the surface-to-width-depth ratio of the surface is 16x9. 19. A device including 1057-6715-PF, the pattern, and the pattern between the δ. In the figure, the electron, the electron, the electron, the material 'the material the material 104 200531311-semiconductor grain, having-a surface layer, the surface layer has a first side and a second side The side is opposite to the first side;-the first-conductive erbium structure is provided along the first side of the surface layer of the semiconductor die;-the second conductive pad structure is along the surface of the semiconductor die A plurality of conductive contact pads are electrically contacted with at least one of the first conductive pad structure and the second conductive pad structure, and the conductive contact pads are formed by the first conductive pad structure And at least one of the second conductive plutonium structure extends toward a central region of the semiconductor die; and an insulating layer is disposed in one of the conductive contact pads placed in a portion up to J Between the top layer and the semiconductor die. 20. The device according to item 19 of the scope of the patent application. A conductive pad material is substantially parallel to the second conductive pad structure. 21. The device according to item 19 of the scope of patent application, wherein the insulation is patterned so that one of the conductive contact orders ::-the component can be supported by the insulation layer, the The isoelectrically conductive contact armored part 2 can contact the surface layer of the semiconductor die via the top layer of the semiconductor die. The second component is electrically 22. The device as described in the application, 〇, = is extended from the first conductive pad structure and the second conductive 塾 structure toward the semiconductor crystal. The center of the grain. The device according to item 22 of the scope of patent application, wherein the insulation layer 1057-6715-PF 105 200531311 is formed on at least one of the first conductive pad structure and the second conductive pad structure. The end portion is a second end portion that is larger than one of the center regions adjacent to the semiconductor die. 24. The device according to item 19 of the scope of patent application, wherein the conductive contact pads are rectangular. 25. The device according to item 19 of the scope of patent application, wherein, under the tapered action of the conductive contact pads, it is close to at least one of the first conductive pad structure and the second conductive pad structure. A portion of at least one of the conductive contact pads is a portion of the conductive contact pad that is larger than the central region near the semiconductor die. 26. The device according to item 19 of the scope of patent application, wherein a first end of each of the conductive contact pads is connected to the first conductive pad structure and a second end of each of the V electrical contact pads The part is connected to the second conductive pad structure ο, 27. The device as described in item 19 of the scope of patent application, wherein the semiconductor die is rectangular. Shi Shen is called the device described in the patent * U item 9 #, in #, the surface-to-width depth ratio of the surface layer of the semiconductor die is 4 small 2 9. If you apply for a patent, you will commit 19 crimes The device described in the above, wherein one of the surface layers of the semi-bulk crystal grains has a ratio of 16x9. 30. The device as described in the H-member of the scope of the patent application, wherein the daily grains of the semiconductor are first diodes. 3 1 · According to the device described in item 30 of the scope of the patent application, in the bean, the light-emitting diode crystal grains are a photonic lattice ′, " 1057-6715-PF 106 200531311 32. The device described in item 19 of the scope of patent application, wherein the semiconductor die is a surface-emitting laser. 33. The device described in item 19 of the scope of patent application further includes an insulating layer disposed on at least one of the first conductive pad structure and the second conductive pad structure, and a surface layer of the semiconductor die. between. 34 · A device comprising: a rectangular light-emitting diode having a surface layer having a first side and a second side, the second side being opposite to the first side; a first conductive A pad structure is provided along the first side of the surface layer of the rectangular light emitting diode; a second conductive pad structure is provided along the second side of the surface layer of the rectangular light emitting diode; The plurality of conductive contact pads are electrically contacted with at least one of the first conductive pad structure and the second conductive pad structure, and the conductive contact pads are formed by one of the first conductive pad structure and the second conductive pad structure. At least one of them extends toward a central region of the rectangular light emitting diode. 35. The device according to item 34 of the scope of patent application, wherein the rectangular light-emitting diode includes a third side and a fourth side, and the first side and the first side have a length greater than that of the third side. Side, the fourth side. 36. The device according to item 35 of the scope of patent application, wherein the ‘electrical contact pads are extended parallel to the third side and the fourth side. 37. The device according to item 34 of the scope of patent application, wherein the heat dissipation during operation is substantially equal to the heat dissipation through the rectangular light emitting diode. 1057-6715-PF 107 200531311 38. The device according to item 34 of the scope of patent application, wherein the power dispersion during operation is substantially equal to the power dispersion through the rectangular light emitting diode. 3 9. The device according to item 34 of the scope of patent application, wherein the rectangular light emitting diode is a photonic lattice light emitting diode. 40. The device according to item 34 of the scope of patent application, wherein a width-depth ratio of one of the surface layers of the material body is 4x3. 41. The device according to item 34 of the scope of patent application, wherein a width-depth ratio of one of the surface layers of the material body is 16 × 9. 42. The device described in item 34 of the scope of patent application further includes an insulating layer 'the insulating layer is disposed on an inner part of at least one conductive contact pad of the conductive contact pads, and the surface layer of the rectangular light emitting diode between. 43. The device according to item 34 of the scope of the patent application further includes an insulating layer. The insulating layer is disposed on at least one of the first conductive pad structure and the second conductive pad structure, and the rectangular light emitting diode. Between the surface layer. 44. A device comprising: a material stack having a surface; and a contact structure disposed on the surface of the material stack, the contact structure including: a pattern conductive layer; and a pattern insulation layer Between the patterned conductive layer disk and the material stack, under the design of the patterned conductive layer and the patterned insulating layer, 'this can make one of the voltages used when passing through the patterned conductive layer 1057-6715-PF 108 200531311 The drop is set approximately equal to the length of the complex segment. The sections are arranged along 45. the conductive layer of the pattern as described in item 44 of the scope of the patent application, in which one hundred eighty of the sections are provided along the length of the conductive layer of the pattern. Among the ten, the voltage drop through the conductive layer of the pattern is uniform. 46 · A device comprising: a material stack having a surface; and a contact structure disposed on the surface of the material stack, the contact structure including: a pattern conductive layer, on the pattern conductive layer Under the design action, this can make one pattern of the pattern conductive layer generate heat approximately equal to that of a plurality of sections during operation. The sections are arranged along the length of the pattern conductive layer. 1057-6715-PF 109
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US10/794,452 US7074631B2 (en) 2003-04-15 2004-03-05 Light emitting device methods
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