TW200530309A - Etching composition, method of preparing the same, method of etching an oxide film, and method of manufacturing a semiconductor device - Google Patents

Abstract

An exemplary etching composition includes about 0.1 to 8% by weight of hydrogen fluoride, about 10 to 25% by weight of ammonium fluoride, about 0.0001 to 3% by weight of a non-ionic polymer surfactant, and water. Using the composition in a wet etching process, an oxide layer may be selectively removed while a pattern or storage electrode including polysilicon may be effectively passivated. The oxide layer may be removed with a high etching selectivity, while at the same time minimizing damage to the polysilicon layer.

Description

200530309 IX. Description of the invention: [Technical field to which the invention belongs] The present invention relates to a kind of composition, and more specifically, the present invention relates to a kind of rhyme composition with a high degree of surname selectivity, a preparation A method thereof, a method for selecting and engraving an oxide thin film, and a method for manufacturing a semiconductor device using the same. [Prior art] In general, capacitors in semiconductor memory devices (such as DRAM4sram) have storage electrodes, a dielectric film, and a plate electrode. The dielectric film is usually made of a material having a low dielectric constant, such as SiO 2 (SiO 2), SiO 2 / Nitride (called / named), and the like. The level of integration of memory devices has increased to the range of gigabits or more: the usable area per unit unit has been reduced to the extent that problems have occurred in the manufacture of these memory devices. It is particularly difficult to form a capacitor with a desired capacitance of at least 25 μI / unit in the small usable area of a car available in a highly integrated device. l To produce a cylindrical shape with a cylindrical shape when trying to produce sufficient capacitors. By using this structure, both the internal and external regions of the capacitor form a capacitance region. In addition, increasing the height of the storage electrode allows the capacitance to be increased 'without taking up additional surface area. It is also possible to form a hemispherical grain (HSG) layer on the storage electrode to further increase the surface area of the capacitor, thereby further increasing the capacitance. Published in U.S. Patent No. 6,413,813 (published by eng Edk) and U.S. Patent No. ~ He Kawasaki Kakasenchi et al. ^ Discloses a method for manufacturing a semiconductor memory device having a capacitor having 96824.doc 200530309 hsg Shixian . 1A to 1D, cross-sectional views illustrating a conventional method of manufacturing a HSG capacitor for a semiconductor memory device. As shown in FIG. 1A, an isolation layer 15 is formed on the substrate 10 to define an active area. Next, a gate structure 35 is formed on the active region of the substrate 10. Each gate structure 35 includes a gate electrode 20, a top layer 25, and a spacer 30.

After Ik, the source / drain region 40 is formed by an ion implantation process between the gate structures 35. A conductive layer is deposited on the entire surface of the substrate 10 including the gate structure 35, and then the deposited conductive layer is planarized to form a contact pad 45. An interlayer dielectric layer (or interlayer insulating layer) 50 is formed on the substrate 10. Next, the dielectric layer 5 is formed. The contact hole of the contact pad 45 is exposed. A conductive layer is deposited on the interlayer dielectric layer 50 to fill the contact hole. Then the conductive layer is planarized to form a _ The storage contact point plug 5 5 connected to the contact pad 45. Next, an etch stop layer 60 and a lower F-node contact plug 55 sink the material, and the lower sacrificial layer 65 is as shown in FIG. 1B, and then A sacrificial layer 65 is deposited between the interlayer dielectric layer 50 and the storage layer. The etch stop layer 60 includes a nitride material, including an oxide material such as BPSG.

96824.doc 200530309 layer. Then, the doped polycrystalline silicon layer is patterned to form a storage electrode rib on the storage node contact hole = a trowel and a storage node contact plug. Next, an HSQ silicon layer 85 is selectively formed on the storage electrode 80. Next, referring to FIG. 1D, the upper sacrificial layer 70 and the lower sacrificial layer 65 are removed. Generally, this is achieved by a wet etching process using an LAL etching solution. Next, an oxide layer or a nitride layer is successively deposited, and a conductive layer is patterned after the conductive layer, oxide layer, or nitride is patterned. Layer, and an etch stop layer 60 to form a dielectric film 90 and cover the upper electrode 95 of a battery array region on the storage electrode rib, thereby completing the HSG capacitor 97. This conventional method has a disadvantage that the polycrystalline silicon storage electrode tends to deteriorate during the formation of the hsg silicon layer. As a result, when the upper and lower sacrificial layers are removed, the storage electrode is easily damaged. This will be explained further below. Figure 2 is an electron microscope image of a storage electrode after etching a sacrificial oxide layer using a conventional LAL solution. "As seen in Figure 2, the polycrystalline silicon storage electrode was damaged when the upper and lower sacrificial layers were removed. This is due to the crystallization of polycrystalline silicon in the storage electrode during the heat treatment used to grow the HSG stone layer. To remove the ammonium fluoride ions from the LAL etching solution of the oxide T layer, the crystalline polycrystalline silicon is easily peeled off. Therefore, damage to the storage electrode is introduced. In an effort to prevent problems associated with the use of LAL etching solutions, nine wet etching methods have been developed that use an etching solution with a mixing ratio of hydrogen fluoride and deionized water of about 5: 1 to remove the oxide layer. Fig. 3 is an electron microscope picture of a storage electrode after etching a sacrificial oxide layer using a 5: 1 hydrogen fluoride solution. 96824.doc 200530309 Refer to Figure 3 ′ When 5: 1 hydrogen fluoride solution is used to remove the upper and lower oxide sacrificial layers, the storage electrode is relatively undamaged compared with the etching process using LAL etching solution. However, the amount of dispersion of the last names on the last stop layer placed on the substrate increases. Dispersion of the button carving means that the rhyme carving is uneven. In addition, the amount of the nitride layer to be etched is also increased, and therefore, when the over-etching is generated, the range of the etching is reduced. Fig. 4A is a plan view explaining the dispersion (thickness) of the residual nitride layer's thickness after the etching process using the conventional 5: 1 hydrogen fluoride solution impregnation technique. Fig. 4B is a plan view explaining the thickness (etching) dispersion of the 'retained nitride layer' after the etch process using the conventional 5: 1 hydrogen fluoride solution still ring technique. Referring to FIG. 4A, an immersion type wet etching process is performed for about 670 seconds. The average thickness of the nitride layer remaining on the substrate is about 419A. Its maximum thickness is approximately 442 A and its minimum thickness is approximately 373 A. That is, the difference between the maximum thickness and the minimum thickness of the nitride layer is about 69 A. Therefore, it can be concluded that the etching process is non-uniform for the nitride layer. Referring to FIG. 4B, it takes about a leap second to perform a cycle-type wet etching process. The average thickness of the nitride layer remaining on the substrate is about 425 people. Its maximum thickness is approximately 444 A, and its minimum thickness is approximately 4.05 A. That is, the difference between the maximum thickness and the minimum thickness of the residual = nitride layer is approximately% A. This difference is greatly reduced compared to the / fork / shell type wet afterburning, but the wet lasting treatment is still uneven for the nitride layer. The pH of 5: 1 hydrogen fluoride solution is about 丨, which is a strong acid. Therefore, the wet etching process is performed under a strong acid environment. As a result, the nitride layer was etched unevenly 96824.doc 200530309 and the dispersion of the nitride layer was high. In addition, particles peeled off from the inclined portion or the back portion of the substrate may be absorbed on the surface portion of the substrate during the wet etching process so as to introduce a soft-glare type defect. [Summary of the Invention] According to one aspect of the present invention, an etching composition includes about 5% to about 5% by weight of hydrogen fluoride (HF), about ammonium (NH4F), about 0.0001 to 3 weight percent active agent, and water (h2o) . 10 to 25 weight percent fluorinated non-ionic polymer interface. According to another aspect of the present invention, a method for preparing an etching composition includes the following steps: by combining a non-ionic polymer surfactant with a gasification gas The solution is clipped to prepare a first mixture solution, and a second mixture solution is prepared by mixing water with the first mixture solution. Then, an etching composition is prepared by mixing the vaporization recording solution with the second mixture solution. According to still another aspect of the present invention, an etching method includes the following steps: forming a nitride layer on a substrate; forming an oxide layer over the nitride layer; and patterning the oxide layer to form an exposed layer The contact hole of the nitride layer. Next, a polycrystalline dream layer pattern 'is formed on the exposed nitride layer and the inner wall portion of the contact hole, and the oxide layer is removed using a samarium composition. The coin-cut composition includes a non-ionic polymer surfactant, which is selectively adsorbed on a surface portion of the polycrystalline stone layer pattern to passivate the polycrystalline layer pattern. According to another aspect of the present invention, a method for manufacturing a semiconductor device includes the following steps: forming an etching stop layer on a semiconductor substrate; forming a first oxide layer on the last stop layer; and On the oxide layer 96824.doc 200530309 the first emulsion layer 'and partially removed the first

Expose a contact area. Then, the material layer M is in contact with the area, and the first and second oxide layers are removed by contacting the composition with ㈣ 日人 仏 + 口 口 茶. The etching composition includes a non-removable lL, a disulfonate compound surfactant, and is characteristically adsorbed on a polycrystalline silicon layer. The surface portion of the case is used to passivate the polycrystalline stone layer. [Embodiment] The present invention will be described with reference to a preferred but non-limiting example. The embodiments are related to a surname-engraving composition, a method for preparing a recording material '-an etching method', and a method for manufacturing a semiconductor device. Silver engraved composition / The button engraved composition according to one embodiment of the present invention includes hydrogen fluoride, bismuth fluoride, a nonionic polymer surfactant, and water. A hydrazone solution having a concentration of about 40 to 60% by weight can be used to prepare the tincture composition. The amount of hydrogenated hydrogen contained in the thorium composition is preferably in the range of about (M to about 08% by weight). An ammonium fluoride having a concentration of about 30 to 50% by weight ... The etching composition. The amount of ammonium fluoride included in the etching composition is preferably in the range of about 10 to about 25 weight percent. When the amount of the non-ionic polymer surfactant is less than about 0.0000 At a weight ratio of 100 knives, the prevention of defects due to absorption on the back of the particles will be insufficient, and when the amount of the surfactant exceeds about 3% by weight, the improvement in preventing defects is relatively small. Therefore, the nonionic polymer interface activity The amount of the agent is preferably in the range of about 0.0001 to about 3 weight percent based on the total amount of the composition. 96824.doc 200530309, more preferably in the range of about 0.001 to about 0.002 weight percent. Nonionic The polymer surfactant may include a nonionic polymer that is both hydrophilic and hydrophobic (ie, a nonionic polymer has both hydrophilic and hydrophobic groups). Nonionic polymer interface activity Examples include fluorene copolymers of polyethylene glycol and polypropylene glycol (alternatively referred to as, ethylene glycol / propylene glycol block copolymers), which are Block copolymers and made by copolymerizing polyethylene glycol and propylene glycol monomers), random copolymers of polyethylene glycol and polypropylene glycol (alternatively referred to as " ethylene glycol / propylene glycol random copolymers, and, Is a random copolymer with ethylene oxide and propylene oxide chains and is produced by copolymerizing polyethylene glycol and propylene glycol monomers), a block copolymer of polyethylene oxide and polypropylene oxide (alternatively ,, "Ethylene oxide / propylene oxide" -like copolymer, which is a block copolymer with ethylene oxide and propylene oxide chain and is manufactured by copolymerizing ethylene oxide and propylene oxide monomers), Or a random copolymer of polyethylene oxide and polypropylene oxide (alternatively referred to as a "ethylene oxide / propylene oxide random copolymer" which is a random copolymer having ethylene oxide and propylene oxide chains and which borrows Manufactured from copolymerization of ethylene oxide / propylene oxide monomers. Ionic polymeric surfactant having the following structure ··

H- (OCH2CH2) x- (OCH (CH3) CH2) y- (〇CH2CH2) z-OH where X, y, and z are positive integers, and the weight of the average molecular weight is about 3000 or less. The block copolymer of polyethylene glycol and polypropylene glycol having the above structure includes commercially available Synperonic PE / L64 or Synperonic PE / L61, which are manufactured by the company FLUKA in Germany. Synperonic PE / L64 or 96824.doc 12 200530309

Synperonic PE / L61 is a dispersant based on alcohol purification and washing, and produces a small amount of by-products, which is beneficial to the environment and has good wettability. Synp⑽nic PE / L64 has a molecular weight of about 2900 or less and a density of about 1.05 g / ml. Synperonic! ^ / £ 61 has a molecular weight of about 2000 or less and a density of about 1.02 g / ml. Alternatively, the non-ionic polymer surfactant may include a polyalcohol non-ionic polymer surfactant. Examples of the polyalcohol nonionic surfactant include polyalcohol monoesters and diesters, ethylene oxide additives thereof, aliphatic alkanolamines (alkanol amide), ethylene oxide additives thereof, and the like. Examples of the polyhydric alcohol may include glycerol, isoprene tetraol, sorbitan, and the like. The ring of Shanzhongzhong furfuryl ester ......... When sorbitol and aliphatic acids are heated with a catalyst such as sodium hydroxide, the sorbitol is dehydrated to produce sorbitan. The sorbitan thus formed reacts with an aliphatic acid to produce an ester compound.

The structure of polysorbate 8 0 is illustrated by the following examples of sorbitan lipids HO (CH, aia〇) t (aaaCH,) x0H Μ

. Enter strict ocuaUyOH CH, (oCB, aU〇ooai, (ai,) ftcHiaKaaii (a ^ • Gong where w, x, y & z are positive integers. The chemical structure of the above compounds is as illustrated by the following chemical formula: 96824.doc -13 -200530309

Ethylene oxide additives including polysorbate 60, polysorbate 65, and the like can also be used in the embodiments of the present invention. A mechanism for passivation of a polycrystalline silicon layer by a non-ionic polymer during selective etching of an oxide layer will be described below. 5A and 5B are schematic cross-sectional views for explaining a mechanism of passivation of a polycrystalline layer by an etching composition according to an embodiment of the present invention. In FIG. 5A, when a nonionic polymer having a hydrophobic group and a hydrophilic group is added as a surfactant to a solution including ammonium fluoride, hydrogen fluoride, and water, as shown in FIG. 5B, the nonionic polymer selectively Adsorbed on the surface of the polycrystalline silicon layer. Surfactant absorption helps protect the polycrystalline silicon layer during subsequent wet etching of the oxide layer. That is, when the oxide layer is selectively etched, damage to the polycrystalline silicon layer can be minimized or avoided due to the presence of the non-ionic polymer. Moreover, the uniformity of etching of the nitride layer can be obtained. Preparation of Etching Composition FIG. 6 is a flowchart illustrating a method of preparing an etching composition according to an embodiment of the present invention. 96824.doc -14- 200530309 Referring to FIG. 6, in step S10, a chemical chloride (HF) solution having a final concentration of about 50% by weight and a final concentration of 0.1 to 8% by weight is added to the container. . Next, in step S2q, a large-scale deletion weight percentage 'is added to the filamentous hydrogen solution with a surfactant having a weight of about 0.001 to 0.02 weight percentage. In step pair, the thus obtained mixture of the hydrogenated gas / hybrid solution and the surfactant is searched for about 3 hours or more: evenly combine this solution to make a first mixture solution (this step Called the first mixing step). In step S40, a predetermined amount of water (° C) is added to the first mixture solution. In step S50, the mixture thus obtained is stirred for about 3 hours or more to uniformly mix the first mixture solution with water to prepare a second mixture solution (this step is referred to as a second mixing step). In Step S60, an ammonium fluoride solution having a knife ratio of about 40% by weight is added to the second mixture solution so that the final concentration of the ammonium fluoride solution is about 10 to 25 weight percent. In step S70, the second mixture solution and the ammonium fluoride solution are uniformly stirred for about 12 hours or more to obtain a uniformly mixed etching composition (this step is referred to as a third mixing step). A circulation pump and a filter are connected to the container to circulate and filter the particles in the first mixture / valley, the first mixture solution and the insect-carved composition. During the preparation of the first mixture solution, the second mixture solution and the etching composition, all the solutions and the etching composition are maintained at a temperature of about 10 to about 40 ° C. If the components are not added and stirred as described above, ammonium fluoride can potentially react with hydrogen fluoride to produce NH4FHF2 crystals, thereby producing an etching composition that does not have the desired characteristics of 96824.doc ^ 200530309. Example 1 ::: Addition of a hydrogen fluoride (HF) solution at a concentration of about 50% by weight ...... present I I # Add a small amount of a surfactant to the valley π with the hydrogen fluoride. As the surfactant, commercially available y PfOnie PE / L64 manufactured by the German company Fluka can be used. The muscle hydrogenation solution including the surfactant was stirred for more than 3 hours to prepare a first mixture solution. To this first mixture solution was added water (H2O). Decanter water and the first mixture solution are used for more than 3 hours to obtain a second mixture solution which is evenly mixed. (2) A solution of hydrazine having a concentration of about 40% by weight is added to the second mixture solution so that the final concentration of the ammonium fluoride is about 1G to 25% by weight. The second mixture solution and the ammonium fluoride solution were stirred for more than 12 hours to prepare a uniformly mixed etching composition. A cycle pump and a filter were connected to the container to circulate and filter the particles in the first mixture solution, the second mixture solution, and the etching composition. During the preparation of the first mixture solution, the second mixture solution, and the etching composition ', the solution is maintained at a temperature of about 10 to about 400c. An etching composition comprising about 18 weight percent ammonium fluoride, about 45 weight percent hydrogen fluoride, and about 0.001 to 0.02 weight percent nonionic polymer surfactant is obtained. Example 2 An etching composition was prepared in the same manner as described in Example 1, except that Synperonic PE / L64 and polysorbate 80 were used instead of Synperonic PE / L64 as a surfactant. The obtained engraving composition contains 96824.doc -16- 200530309 about 18 weight percent ammonium fluoride and about 45 weight percent hydrogen fluoride and about 10 ppm of non-ionic surfactant, Synperonic pE / L64 and Approximately 200 ppm of polysorbate 80. Example 3 An etching composition was prepared in the same manner as described in Example 1, except that Polysorbate 80 was used instead of Synperonic PE / L64 as a surfactant. The obtained etching composition contained about 18% by weight of ammonium fluoride and about 4.5% by weight of hydrogen fluoride, and about 200 ppm of polysorbate 80 as a nonionic surfactant. Comparative Example 1 A coin-cut composition was prepared by mixing hydrogen fluoride (HF) and deionized water (EU • water) at about a mixing ratio. Comparative Example 2 By mixing approximately 40% by weight of ammonium fluoride, approximately 50% by weight of hydrogen fluoride and deionized water at a mixing ratio of approximately 5: 1: 5, and then adding the same molar ratios of CgHnNH2 and C ^ HbCOOH was prepared by adjusting the concentration of the surfactant to about 200 ppm (LAL 5000 aqueous solution). Comparative Example 3 An etching composition was prepared by adding the same mole ratio of C9Hi9COOH to Comparative Example 1's engraved composition to adjust the concentration of the surfactant to about 200 ppm. Comparative Example 4 An etching composition was prepared in the same manner as described in Comparative Example 2, except that 96824.doc 17 200530309 was added without a surfactant. Etching an oxide layer Figs. 7A to 7C are cross-sectional views illustrating a method for selectively etching an oxide layer among an oxide layer, a nitride layer, and a polycrystalline silicon layer by using the etching composition according to the present invention. In FIGS. 7A to 7C, for the sake of simplicity, the underlying structure between a substrate and a nitride layer is not shown or described. Referring to FIG. 7A, a nitride layer 105, a first oxide layer 110, and a second oxide layer 115 are continuously formed on a substrate 100 such as a silicon wafer. In this example, the nitride layer 105 is formed using silicon nitride (SiN), the first oxide layer 110 is formed using BPSG, and the second oxide layer 115 is formed using pE-TEs. See FIG. 7B ', the second oxide layer 5 and the first oxide layer 110 are partially etched to form a contact hole 120 for exposing the nitride layer 100 by photolithography. After forming a polycrystalline silicon layer on the exposed nitride layer 105 through the contact hole 120 and on the inner sidewall of the contact hole 120 and the second oxide layer 115, the polycrystalline silicon layer is patterned to form a polycrystalline silicon layer pattern 丨2 5. Referring to FIG. 7C, the second oxide layer 115 and the first oxide layer 110 are etched by a wet inversion process using the above-described etching composition according to an embodiment of the present invention. The upper portion of the nitride layer 105 on the substrate 100 is also partially etched. Here, since the etching composition of this embodiment includes a non-ionic polymer, which is adsorbed on the surface portion of the polycrystalline silicon layer pattern 125 to passivate the polycrystalline silicon layer pattern 125, the first and second oxide layers 11 () are etched The damage to the polycrystalline silicon layer pattern 125 during the period 115 can be significantly reduced. In addition, compared with the conventional LAL or 5: 1 hydrogen fluoride etching solution, the remaining uniformity on the nitride layer 105 is improved. The etching results on the nitride 96824.doc -18-200530309 layer 105, the first and second oxide layers 110 and 115, and the polycrystalline silicon layer pattern i25 after the etching process will be described below. Etching Experiment 1 FIGS. 8A to 8D are diagrams illustrating the use of the PE_TE0s layer in a wet etching process by using the surname composition obtained according to Example 1 of the present invention and the etching composition obtained according to Comparative Examples 1 to 3. Graph of etch rates for Bpsg layer, silicon nitride layer (SiN) and polycrystalline silicon layer. FIG. 8A corresponds to an etching result of a silicon nitride layer; FIG. 8B corresponds to an etching result of a BPSG layer; FIG. 8 (: corresponds to an etching result of a pE_TE0s layer; and FIG. 8 corresponds to an etching result of a polycrystalline silicon layer. See FIG. 8A, during the etching of the PE-TEOS layer and the BPSG layer by the wet etching process using the etching composition of the example 丨, the average etching rate for the silicon nitride layer is about 26 A per minute. Its maximum etching rate is about 27 A 'per minute and its minimum etch rate is about 24 a per minute. Therefore, the etch rate dispersion is only about 3 A per minute. In contrast, when using a hydrogen fluoride etching solution according to Comparative Example 丨, it is used for a silicon nitride layer The average etch rate is approximately 76 A per minute. Its maximum etch rate is approximately 86 A per minute, and its minimum etch rate is approximately 65 A per minute. Therefore, the dispersion rate of the etch rate is approximately 2 A per minute. When the LAL 500 etching solution according to Comparative Example 2 is used, the average etch rate for the nitride layer is approximately 14 A per minute. Its maximum #etch rate is approximately 15 A per minute, and its minimum etch rate is approximately 13 A per minute. Therefore, the etching rate dispersion is about 2 A per minute, which is very low. When the etching composition according to Comparative Example 3 is used, the average etch rate for the nitride layer is about 46 A per minute . Its maximum surname engraving rate is approximately 96824.doc -19- 200530309 49 A per minute, and its minimum stroking rate is approximately 43 A per minute. Therefore, the rate of money engraving is scattered at approximately 6 A per minute. Therefore, and Xi Compared with the known composition of the last name, the uniformity of the last name of the nitrided stone layer has been greatly improved during the use of the example to describe the composition of the last name of the PE_TE0s layer and the Peng G layer. See FIG. 8B. From the wet etching process using the etching composition according to the example, the average etch rate for the BPSG layer is about 2303 A per minute. Its maximum etch rate is about 2390 A per minute, and its minimum etch rate is about It is 2215 A per minute. Therefore, the etching rate dispersion is approximately 175 A per minute. When the hydrogen fluoride etching solution according to Comparative Example 1 is used, the average etching rate for the BpsG layer is approximately 5885 A per minute. Its maximum etching rate The large force is 6298 A, and the minimum silver etch rate is about 5472 A per minute. Therefore, the etching rate dispersion is about 826 a per minute. That is, the etching rate for the BPSG layer increases and the stepped layer Etching uniformity is greatly reduced. When using the LAL 5 00 etching solution according to Comparative Example 2, the average etch rate for the BPSG layer is approximately 582 A per minute. Its maximum etch rate is approximately 591 A per minute, and its minimum etch The rate is approximately 572 A per minute. Therefore, the etch rate dispersion is approximately 19 A per minute, which is very low. Although the uniformity of the engraving of 8 to 80 layers can be obtained, the etching rate is greatly reduced when the conventional engraving solution is used. When the etching composition according to Comparative Example 3 was used, the average engraving rate for the BPSG layer was about 3939 A per minute. The maximum etch rate is about 96824.doc -20-200530309, the female knife is 44181 A, and the minimum ㈣ rate is about 1 minute per minute. Therefore, the spread of the surname engraving rate is about A per minute. Although a sufficient rate of the BPSG layer can be obtained, the uniformity of the BpsG layer is reduced to zero. Therefore, when the etching composition according to the embodiment of the present invention is applied, the BPSG layer is etched at The conventional maggot composition has a well-known uniformity. Referring to FIG. 8C, the average surname rate for the PE-TEOS layer in a wet etch process by using the etch composition according to Example j is about 3124 A per minute. Its maximum etch rate is about 3132 A per minute, and its minimum last etch rate is about 3116 Αβ per minute. Therefore, the money etch rate spread is only about 16 A per minute, which is very low. When the hydrogen fluoride etching solution according to Comparative Example 丨 is used, the average etching rate for the PE-TEOS layer is about 3031 A per minute. Its maximum etch rate is approximately 3529 A per minute, and its minimum etch rate is approximately 2533 A per minute. Therefore, the etch rate dispersion is approximately 996 A per minute. That is, when the conventional 5: 1 hydrogen fluoride etching solution is used, the etching rate for the pE_TE0s layer is reduced, and at the same time, the etching uniformity of the PE-TEOS layer is also greatly reduced. When the LAL 500 etching solution according to Comparative Example 2 was used, the average etching rate for the PE-TEOS layer was about 1262 A per minute. Its maximum etch rate is about 1316 A per minute, and its minimum etch rate is about 1208 A per minute. Therefore, the dispersion of the etching rate is about 108 μm per minute, which is very low. Although the etch uniformity of the PE_TEOS layer can be obtained, when the conventional LAL 500 # etching solution is used, the insect etching rate is greatly reduced. 96824.doc -21-200530309 When using the composition and composition according to Comparative Example 3, the flat-side rate for pE_Dinger layer is about A per minute · A. Its maximum rhyme rate is about 3195 A per minute, and its minimum rate is about A deleted per minute. As a result, the diligence rate spreads around 1575 people per minute. Although a high etch rate of the PE-TEOS layer can be obtained, the etch uniformity of the PE-TEOS layer is reduced when the conventional M 5_ etch solution is used. Therefore, when the PE-TEOS layer is engraved by using the surname engraving composition according to the present invention # J1 ', a relatively high engraving rate and appropriate uniformity are obtained. Referring to FIG. 8D, during the processing of the PE-TEOS layer and the BPSG layer by using the wet engraving composition of the button engraving composition of Example 1, the average engraving rate for the polycrystalline stone layer was about 9 A per minute. . Its maximum rate is approximately 9.8 per minute, and its minimum rate is approximately 88 per minute. The rate dispersion is only approximately approximately per minute! A. That is, during the treatment, the polycrystalline layer was appropriately purified. When using the hydrogen fluoride solution according to the comparative example! For polycrystalline stone rate: about 8A per minute. Its maximum engraving rate is about $. And the minimum engraving rate is about MA per minute. Therefore, the etching rate is dispersed at about 1 A per minute. According to the comparative example & LAL_ etching solution, for polycrystalline = other etching rate is about per minute ". Its maximum engraving rate is large factor f · 5A, and its minimum _ rate is about 7 per minute · 5Αβ: The etching rate dispersion is about 1A per minute, which is very low. When the composition according to Comparative Example 3 is used, the average etching rate for multiples is about Δθ per minute, and the rate of etching loss is about 8.4 A per 96824.doc -22- 200530309 minutes, and its minimum etch rate is approximately 7.5 A per minute. Therefore, the etch rate dispersion is approximately 1. As illustrated in Figures 8A to 8D, the The etching composition of Example J of the present invention, during the etching of oxide layers such as the PE-TEOS layer and the BPSG layer, can effectively passivate the polycrystalline layer. In addition, uniform etching of the oxide layer and the nitride layer can be sufficiently obtained Etching Experiment 2

9A to 9D are diagrams illustrating the use in a PE-TEOS layer, 3? In a wet etching process by using the etching compositions obtained according to Examples 2 and 3 of the present invention and the etching composition obtained according to Comparative Example 4; 5 (} Layer, silicon nitride layer and polycrystalline silicon layer etch rate. Figure 9 corresponds to the etching result of the silicon nitride layer; Figure 9B corresponds to the etching result of the BPSG layer; Figure 9C corresponds to the pE-TE0s layer Etching results; FIG. 9D corresponds to the etching results of the polycrystalline silicon layer.

Referring to FIG. 9A, during the etching of the PE-TEOS layer and the BPSG layer by a wet etching process using the etching composition according to Example 2, the average hafnium rate for the silicon nitride layer is about 32 A per minute. Its maximum rate is about 33 A per minute, and its minimum etch rate is about 30 a per minute. Therefore, the etch rate dispersion is only about 3 A per minute. When the rhyme composition according to Example 3 is used, the lithography rate for the nitrided dream layer is approximately 3 G A per minute. Its maximum rate is approximately 32 A per clock; and its minimum remaining rate is approximately 29 A per minute. Therefore, the dispersion of the datum rate is also about 3 A per minute, which is very low. When the osmium composition according to Comparative Example 4 was used, the average engraving rate for the nitrided layer was about 32 A per minute. Its maximum rate is 96824.doc • 23- 200530309 34 A per minute, and its minimum etch rate is about 30 A per minute. As a result, the money rate spread is only about 4 A per minute. Therefore, when the PE-TEOS and BPSG oxide layers are etched using the etching composition according to the example of the present invention, the etching uniformity of the silicon nitride layer is enhanced compared with the conventional etching solution. Referring to FIG. 9B, during the wet etching treatment period using the etching composition according to Example 2, the average etch rate of the poem BPSG layer is about 1978 A per minute. Its maximum etch rate is about 2155 in. Per minute, and its minimum etch rate is about 1800 A per minute. That is, the etching rate dispersion was about 355 A per minute. When the etching composition according to Example 3 was used, the average etching rate for the 50 layer was about 1360 A per minute. Its maximum etch rate is approximately 1381 A per minute, and its minimum etch rate is approximately i339 A per minute. Therefore, the etch rate dispersion is approximately 42A per minute. When the coin engraving composition according to Example 3 is used, the hafnium rate for the BPSG layer is reduced. However, the uniformity of the nickname of the BPSG layer has been greatly improved. When the etching composition according to Comparative Example 4 is used, the average etching rate for the BpsG layer is about 2796 A per minute. Its maximum etch rate is approximately 2889 A per minute, and its minimum etch rate is approximately 2703 A per minute. Therefore, the etch rate dispersion is about 186 A per minute, which is very low. Therefore, when the etching compositions of Examples 2 and 3 according to the present invention are used to etch the BPSG layer ', the etching rate is reduced compared to an etching composition that does not include a surfactant as in Comparative Example 4. Looking at FIG. 9C, in the wet etching by using the etching composition according to Example 2 96824.doc • 24-200530309 processing, the average ㈣ rate for the PE_TE0S layer is about 2802 A per minute. Its maximum etch rate is approximately A per minute, and its minimum etch rate is approximately 2556 A per minute. Therefore, the etch rate dispersion is approximately 492 A per minute. When the etching composition according to Example 3 is used, the engraving rate for the pE_TE0s layer is about 2358 A per minute. Its maximum #etching rate: about 2581 A per cutter, and its minimum etch rate is about 2i35 a per minute. Therefore, the etch rate dispersion is approximately 446 A per minute. When the button-engraving composition according to Comparative Example 4 is used, the average surname rate for the pE_TE0s layer is approximately A per minute plus A. Its maximum engraving rate: about 3639 A per minute, and its minimum remaining engraving rate is about ⑽ A per minute. Therefore, the rate dispersion is only about a per minute, which is very low. When using the _composition pe_teqs layer according to * Comparative Example 4, etching uniformity can be obtained. However, the etching rate is extremely low. Therefore, when the PE-TEOS layer is engraved using the surname engraving composition according to one embodiment of the present invention, appropriate uniformity is obtained. Referring to FIG. 9D ', during the "wet etching process of the etching composition of Example 2 according to Example 2", the average surname of the multi-layer layer during the extraction of the etched composition according to Example 2 was approximately 32 per minute. A. Its maximum engraving rate is approximately A per minute and its minimum _ rate is approximately μ per minute. Therefore, the ㈣ rate dispersion is approximately 28 A per minute. When the composition according to Example 3 was used, the average insecticide rate for the polycrystalline layer was about 26 A per minute. Its maximum chirping rate is approximately 1 ', and its minimum button rate is approximately i6 A per minute. Therefore, the etching rate spread of etch 96824.doc -25- 200530309 is about 9 A per minute. When using the engraving composition according to Comparative Example 4, the rate for multi-division engraving was about 128 A per minute. The maximum ㈣ rate is 131 A ′ in the female knife 4 and the minimum etch rate is about 125 A per minute. Therefore, the 'sequence rate dispersion is about 3A per minute, which is quite low. However, the etching rate for a polycrystalline silicon layer is unacceptably high. Since the composition of the engraved composition obtained from Examples 2 and 3 is better than that obtained from Comparative Example 4

The rest of the composition exhibited a lower tadpole rate, so the etching compositions obtained from Examples 2 and 3 were better. As illustrated in Figures from 90 to 'When an oxide layer such as a PE-TEOS layer and an oxide layer is etched using the engraving combination according to the present invention, the oxide layer is shown in the etching rate—a large difference, For the nitride layer, the rate is shown—smaller differences, and for the polycrystalline silicon—it is very etched. This is because the addition of a surfactant to the etching composition is effective for obtaining a better result of the rice carving. Method for manufacturing semiconductor device

10A to 10E are sectional views illustrating a method of manufacturing a semiconducting device according to an embodiment of the present invention. In Figure 1GAjL, the same reference numerals denote the same components. Fig. 10A is a cross-sectional view illustrating a step for forming a first pad · and a second pad 205 on a semiconductor substrate 15G on which a transistor structure i 83 including a gate structure 175 is formed. Referring to FIG. 10A, an isolation layer 1 5 5 is formed on the semiconductor substrate 15060824.doc -26- 200530309 by using an insulating method such as a shallow trench isolation (sti) method or a localized hafnium oxide method of Shi Xi. To the half and one 'area. The conductor substrate 150 is divided into an active region by a g-oxidation method or a chemical vapor deposition (CVD) method to form a thin inter-electrode layer (not shown on the thin closed-electrode emulsion layer sequentially) Form the __ conductive layer (not shown) and the first-masking layer (shown) 帛 v electric layer and the first masking layer respectively correspond to a closed-electrode conductive layer and: a leisure electrode masking layer. The first conductive layer Sub-patterning is performed by using impurity-doped polycrystalline stones to form the _gate conductive pattern 165. The first conductive layer can also be formed as a structure with doped polycrystalline silicon and polycide. The first mask layer is changed to form a gate mask pattern, and a material having an etching selectivity to the first interlayer dielectric layer 195 (subsequently formed) is used to form a first mask layer. For example, When the first interlayer dielectric layer i 95 is formed using an oxide, the first mask layer is formed using a nitride such as silicon nitride. A first photoresist film (not shown) is deposited on the first mask layer, And exposing and developing the first photoresist film to obtain a first photoresist pattern ( (Shown). The first mask layer, the first conductive layer, and the gate oxide layer are continuously patterned by using a photoresist pattern as a mask to form a gate structure 175, which includes a gate oxide. The object pattern 160, a gate conductive pattern 165, and a gate mask pattern 170. A first dielectric layer (not shown) is formed on the semiconductor substrate 150 and the gate structure 175 using a nitride such as silicon nitride. Next, the first dielectric layer is anisotropically etched to form a first spacer W0, such as a gate spacer on a side wall of the gate structure 175. 96824.doc -27- 200530309 Subsequently, by ion implantation After the impurity is doped by using the gate structure 175. As an ion implantation mask, the semiconductor substrate 150 exposed between the gate structure 75 and 75 is subjected to a heat treatment to form a first contact region 185 and a second The contact region 190, that is, the source / drain region. Therefore, a MOS transistor structure 183 having first and second contact regions 185 and 190 is formed. The first and second contact regions 185 and 190 are divided into a capacitor contact Area and one-bit line contact area, The first gasket 200 of the capacitor and the second gasket 200 of the 7L line are connected respectively (in the next step). In other words, the first contact area 185 corresponds to the storage node connected to the first gasket 200. Area, and the second contact area 190 corresponds to the bit line contact area connected to the second pad 205. An oxide material is used to form a first portion on the entire surface portion of the semiconductor substrate 15 including the transistor structure 183. Interlayer dielectric layer 195. The first interlayer dielectric layer 195 may be a BPSG, USG, or HDP-CVD oxide material. A chemical mechanical polishing (CMP) process, an etch-back process, or a combination thereof is used to

The upper portion of the interlayer dielectric layer 195 is etched to planarize the upper portion of the first interlayer dielectric layer 195. On the planarized first interlayer dielectric layer 195, a second photoresist layer is coated (not shown). The second photoresist film is exposed and developed to form a second photoresist pattern. Next, using the second photoresist pattern as an etching mask, the first interlayer dielectric layer 195 is partially and anisotropically etched to form a first contact hole 198 exposing the first and second contact regions 185 and 190. Therefore, the first contact hole] is aligned with respect to the transistor structure 183 while exposing the first and second contact regions 185 and 190. 96824.doc -28- 200530309 μ removes the second photoresist pattern by ashing treatment and peeling treatment. A second conductive layer (not shown) is formed on the first interlayer dielectric layer 195 filling the first contact hole 198. The second conductive layer is formed by doping polycrystalline silicon or metal with a high concentration of impurities. The second conductive layer is engraved by a CMP process, a cashback process, or a combination thereof until the upper surface of the planarized first interlayer dielectric layer 195 is exposed to form the second spacer 200 and the first spacer 205. , Where the first and second diaphragms are self-aligned contact (SAC). The figure is just a cross-sectional view illustrating the steps of forming a bit line and a fourth ridge 240. Referring to FIG. 10B, a first interlayer dielectric layer is formed on the first interlayer dielectric layer 195 and the first and second pads 200 and 2005 using a BPSG, _ or HDP-CVD oxide material. 210. The second interlayer dielectric layer 21 electrically insulates the bit line (formed later) from the first pad 2000 of the first storage node contact pad. The second interlayer dielectric layer 210 is etched by a CMP process, an etch-back process, or a combination thereof to planarize the upper surface of the second interlayer dielectric layer 21o. A third photoresist film (not shown) is coated on the second interlayer dielectric layer 21o. A second photoresist film is exposed and developed to form a third photoresist pattern (not shown). The second interlayer dielectric layer 210 is partially etched by using the third photoresist pattern as an etch mask to form a second contact hole (not shown) in the second interlayer dielectric layer 21 to expose the buried first layer. The first bit line in the inter-dielectric layer 195 contacts the second pad 205 of the pad. The second contact hole corresponds to a bit line contact hole for electrically connecting the bit line to the second pad 205 of the first bit line contact pad. The third photoresist pattern is removed by an ashing process and a peeling process. Then at 96824.doc -29- 200530309 filling the bit line contact hole No. 丨 shop, the second interlayer dielectric of Leyi contact hole sequentially formed a third conductive layer (not ^ M210 ± ψ it Μ ~ m. No. A masking layer (not shown). The picture shows the second conductive layer — ^ ^ R s 〇 The masking layer forms a one-bit wire conductive # pattern (not shown) and one opens a green spray door ~ m 增 々) /, Weifan line mask pattern (not shown). A fourth photoresist film is coated on the second photoresist film to open on the second photomask layer, and an I exposure path is developed and developed to form a fourth photoresist pattern (not shown). The fourth photoresist is used as A 4) The cover sound fish is continuously-patterned the second cover: two = a third gasket that fills the second contact hole corresponding to the bit line contact hole (Not shown) and form bit lines including bit line conductive patterns and bit 70 line masking layer patterns (not shown) The second pad corresponds to the second bit line contact and is used to make the bit line profit The second pad 205 of the first bit line contact pad is electrically connected. The third cymbal is also known as the first plug as the bit line contact plug. During the engraving process of the four contact holes 27 () (Fig. 1GC), the bit 7L line mask pattern passivates the bit line conductive pattern. The first and second oxide layers 260 and 265 are used to form the The four-layer dielectric layer 250 has an etch-selective material to form a bit line mask pattern. For example, the bit line mask pattern is formed using a nitride such as silicon nitride. An interposer is formed between the bit line and the second layer. A second dielectric layer (not shown) is formed on the electrical layer 21. Then, the second dielectric layer is anisotropically etched. A second spacer (not shown) corresponding to a bit line spacer on a side wall portion of each bit line is formed. The second interlayer dielectric layer 210 and the third interlayer dielectric layer 215 (formed later) are etched. Selective material to form a second spacer for purifying the 96824.doc -30 · 200530309 bit line during the formation of the fourth spacer 240 of the second storage node contact spacer. Second interlayer dielectric layer 21 5 is formed on the second interlayer dielectric layer 210 while covering the bit lines including the second spacers on the sidewall portions thereof. The third interlayer dielectric layer 215 uses an oxygen compound such as BPSG, USG, and HDP-CVD oxide. Forming. The third interlayer dielectric layer 215 is etched by a CMP process, an etch-back process, or a combination thereof until the upper surface portion of the bit line mask pattern is exposed to planarize the upper surface of the third interlayer dielectric layer 215. Five photoresist films are coated on the planarized third interlayer dielectric layer 215. The fifth photoresist film is exposed and developed to form a fifth photoresist pattern (not shown). The third interlayer dielectric layer 215 and The second interlayer dielectric layer 21 uses a fifth photoresist The pattern is used as a engraving ㉟ | to partially engraved the money to form a third contact hole 238 for exposing the first cymbal 200. The third contact hole 汨 8 corresponds to the first storage node contact hole. The third connection 238 is about a bit A second spacer formed on the side wall portion of the line is formed in a self-aligned manner. A fourth conductive layer is formed on the third interlayer dielectric layer 215 filling the second contact hole 23 8. Then, a CMP process, a hafnium process, or The combination comes from the fourth conductive layer until the upper surface of the third interlayer dielectric layer 215 and the bit lines are exposed, so as to form the fourth ^ 24Q ° fourth pad of the second storage node contact pad in the third contact hole. 240 is also known as the second plug of the storage node contact plug. The fourth W is formed using a conductive material such as hetero-doped poly. The fourth spacer 240 electrically connects the first diaphragm 200 of the first storage node contact diaphragm with the storage electrode 29G (see FIG. 9D). Therefore, the storage electrode is electrically connected to the first contact area 185 of the storage node contact area 96824.doc -31-200530309 by the first pad 200 and the fourth diaphragm _. Fig. 10C is a sectional view illustrating a step of forming a fourth contact hole 27o and a storage electrode 29o. Referring to FIG. 10C, a fourth interlayer dielectric is formed on the fourth pad 240, the bit line, and the third interlayer dielectric layer 215 of the second storage node contact pad by BPSG, USG, and SO (^ HDp_CVD oxide). Layer 25. The fourth interlayer dielectric layer 250 electrically separates the bit line from the storage electrode 29. Between the fourth layer and the I layer 250, a stop layer 255 is formed for a while. The fourth interlayer dielectric layer 250 is used. The first oxide layer 260 and the second oxide layer 265 have etch-selective materials to form the etch stop layer 255. For example, the etch stop layer 255 is formed by using a nitrogen compound such as silicon nitride. Here, after the upper surface of the fourth interlayer dielectric layer 250 is planarized by a CMP process, an etch-back process, or a combination thereof, an etching stop layer 255 may be formed on the planarized fourth interlayer dielectric layer 250. A first oxide layer 26 and a second oxide layer 265 are formed on the etching stop layer 255 to serve as a mold for forming the storage electrode 29. The first oxide layer 26 is formed using BPSG or USG, and the second oxide The material layer 265 is formed using an oxide material such as PE-TEOS. The oxide layers 26 and 265 may be formed on the upper surface of the etching stopper layer 255 to a thickness of about 5000 to about 50000 A. However, the total thickness of the first and second oxide layers 26 and 265 may be Appropriately controlled according to the required capacitance of the valley of 310 (see FIG. 10E). That is, the south of the capacitance of 310 is determined by the thickness of the first and second oxide layers 26 and 265. In the second oxide layer A sixth photoresist film (not shown) is formed on 265. The sixth photoresist film is patterned by exposure and development on 96824.doc -32- 200530309 to form a sixth photoresist pattern on the second oxide layer 265. The sixth photoresist pattern is used as a material to partially pierce the dioxide layer 265, the first oxide layer, the puppet stop layer ... and the fourth interlayer dielectric layer 25 to form a fourth film for exposing the film. The fourth contact hole 270 of the storage node contact hole. FIG. 4 is a cross-sectional view illustrating a step of forming-storing the electrode 290 in the fourth contact hole 270. See the trace to remove the first through ashing and peeling processing. Six photoresist patterns. Next, the exposed fourth pad 24 and the fourth contact hole 27 A fifth conductive layer of impurity-doped polycrystalline silicon is formed on the inner wall portion. A portion of the fifth conductive layer is removed by the CMP process or a combination thereof until the upper surface of the second oxide layer 265 is exposed, so that A conductive layer pattern 2⑽ is formed on the inner wall portion of the four pads 240 and the fourth contact hole 27. A HSG silicon layer 285 is selectively grown on the surface of the V electrical pattern 280 to form an electrical connection to the first contact region 185. The storage electrode 29. FIG. 10E is a cross-sectional view illustrating a step of forming the capacitor 31. Referring to FIG. 10E, the second oxide layer is removed by a wet etching process using an etching composition according to an embodiment of the present invention. 265 and the first oxide layer 260. A dielectric layer film of a nitride material or an oxide material is formed on the bottom surface, the inner wall portion, and the outer wall portion of the storage electrode 290. Next, an upper electrode 300 is formed on the dielectric film doped with polycrystalline or hetero-shell polysilicon to complete the capacitor 310. The upper electrode 300 and the dielectric film 295 96824.doc -33- 200530309 are patterned to separate the respective capacitors 310 from each other _ μperson + a ^. A fifth layer is formed on the electric valley device 310; an electric layer (not shown) is used for electrical insulation of the upper, lower, and upper V lines. The upper conductive line is formed between the fifth layer and the electric layer to form a semiconductor device. According to an embodiment of the present invention, further description is provided below for removing the second and first oxide layers 2 6 5 and 2 6 0 by using the M-etching composition having the characteristics described above. Money carved. Images of 260 and 265. The figures illustrate the results after performing the wet etching treatment using the scoring composition for about 15 minutes, about 16 minutes, about 17 minutes, about 18 minutes, about 19 minutes, and about 20 minutes, respectively. As shown in FIGS. 11A to 11F, the storage electrode 290 formed by using polycrystalline silicon is not damaged during the etching of the ^ th oxide layer 265 and the -oxide layer. »11Α to ⑽ are photographs taken by an electron microscope to illustrate the use of the first and second oxide layers of the silver-etched composition according to the embodiment of the present invention. FIGS. 12A and 12B are illustrations illustrating the use of the silver oxide composition according to the present invention. A plan view of the thickness dispersion of the residual nitride layer after the dip type etching process and the cycle type etching process of the etching composition of an embodiment. FIG. 12A is a plan view illustrating a thickness dispersion of the etching stop layer 255 (which is a residual nitride layer on the semiconductor substrate 150) when a wet etching process is performed using an immersion technique. FIG. 12B is a plan view illustrating the dispersion of the thickness of the etching stop layer 255 (which is a residual nitride layer on the semiconductor substrate 150) when the wet etching process is performed using a cycle technique. Referring to FIG. 12A, an immersion type wet etching process is performed for about 900 seconds. The average thickness of the remaining discontinuity stop layer 25 5 on the semiconductor substrate 150 is approximately 404 96824.doc -34- 200530309 A ', its maximum thickness is approximately 41 lA and its minimum thickness is approximately 395 a. Therefore, the thickness dispersion of the residual rhyme stop layer 255 is approximately i5A. That is, when the osmosis treatment is performed using the osmium composition according to the embodiment of the present invention, the thickness dispersion of the nitride layer is substantially reduced as compared with the conventional etching composition. Referring to FIG. 12B, the cycle-type wet etching process is performed for about 84 seconds. The average thickness of the residual etch stop layer 255 on the semiconductor substrate 150 is about 47 Å. Its maximum thickness is approximately 474 A, and its minimum thickness is approximately 人 2 persons. Therefore, the thickness dispersion of the residual etching stop layer 255 is about 2a, which is very low. Therefore, when the oxide layer is selectively removed by a wet etching process using an etching composition according to an embodiment of the present invention, the uniformity of the etching is significantly improved. According to an embodiment of the present invention, the etching composition (by which a pattern or a storage electrode is formed using polycrystalline silicon) can be effectively passivated, that is, protected from being engraved. When the oxide layer is removed by a wet-money engraving process using a money-engraving composition, the oxide layer is removed to have a high etching selectivity, and the polycrystalline silicon layer is protected from damage. In addition, compared with the conventional etching composition, the remaining uniformity produced by the wet etching process for selectively removing the oxide layer is greatly improved. Although the present invention has been described in detail with reference to the accompanying embodiments, various modifications, alternative constructions, and equivalents can be used without departing from the true spirit and scope of the invention. [Schematic description] Figures 1A to id are cross-sectional views illustrating a method for manufacturing a conventional semiconductor device having an HSG capacitor 96824.doc 200530309. Figure 2 is a conventional LAL solution in use taken by an electron microscope. An image of the storage electrode after the oxide layer is etched; FIG. 3 is an image of the storage electrode after the oxide layer is etched in a conventional 5: 1 hydrogen fluoride solution by an electron microscope; FIG. 4A and 4B are respectively It is a plan view showing the thickness dispersion of the residual nitride layer after the conventional 5L iF treatment of the immersion type 5L after-treatment and the cycle-type money engraving treatment; FIGS. 5A and 5B are illustrations for explaining the method according to the present invention. A schematic cross-sectional view of the mechanism by which the polysilicon layer is passivated by an etching composition according to an embodiment; FIG. 6 is a flowchart illustrating a method for preparing an etching composition according to an embodiment of the present invention; FIGS. 7A to 7C are views illustrating the use of Cross-sectional views of a method for selectively etching an oxide layer in an oxide layer, a nitride layer, and a polycrystalline silicon layer according to an etching composition according to an embodiment of the present invention; FIGS. 8A to 8D are diagrams illustrating Used for PE-TEOS layer, BPSG layer, silicon nitride layer, and polycrystalline in a wet etching process by using the etching composition obtained according to the example of the present invention and the etching composition obtained according to the comparative examples. Figures 9A to 9D are diagrams illustrating the use of the etch-off treatment in the etch-off process obtained by using the etch-in composition obtained according to Examples 2 and 3 of the present invention and the etching composition obtained in accordance with Comparative Example 4. PE-TE0S layer, BPSG layer, silicon nitride layer, and polycrystalline silicon layers; Figures 10A to 10E illustrate a manufacturing method according to the present invention. -200530309 A cross-sectional view of a method of a semiconductor device; Figures 11A to IIF are taken by an electron microscope, and the oxide layer engraved with the combination of the example and the present invention. Figures 12A and 12B are representative of the use according to the present invention. A top view of the dispersion of the thickness of the residual nitride layer after the etching solution of one embodiment is subjected to an immersion type etching process and a cyclic type etching process. [Description of main component symbols] 10, 100 Substrates 15, 155 Isolation layer 20 Gate electrode 25 Capping layer 30 Isolator 35 Gate structure 40 Source / drain region 45 Contact diaphragm 50 Interlayer dielectric layer 55, 75 Storage node Contact plug 60 Etch stop layer 65 Lower sacrificial layer 70 Upper sacrificial layer 75 Storage node contact hole 80, 290 Storage electrode 85 HSG Shixi layer 90 Dielectric film

96824.doc -37- 200530309 95 upper electrode 97 HSG capacitor 105 nitride layer 110 first oxide layer 115 second oxide layer 120 contact hole 125 polycrystalline silicon layer pattern 150 semiconductor substrate 165 gate conductive pattern 170 gate mask pattern 175 gate structure 180 first spacer 183 transistor structure 185 first contact area 190 second contact area 195 first interlayer dielectric layer 198 first contact hole 200 capacitor 200 first spacer 205 second spacer 210 first Second interlayer dielectric layer 215 Third interlayer dielectric layer 238 Third contact hole 240 Fourth spacer

96824.doc -38- 200530309 250 Fourth interlayer dielectric layer 255 Interrupt stop layer 260 First oxide layer 265 Second oxide layer 270 Fourth contact hole 280 Conductive layer pattern 285 HSG silicon layer 290 Storage electrode 295 Dielectric Film 300 Upper electrode 310 Capacitor 96824.doc -39-

Claims (1)

200530309 10. Scope of patent application: L-a kind of afterburning composition, which contains about 0.01 to 8 weight percent of gasified nitrogen (HF), about 10 to 25 weight percent of ammonium fluoride (nh4f), about 0.0001 to 3 Weight percent of non-ionic polymer surfactant and water (H20) 〇2. As requested by the composition, the amount of the non-ionic polymer surfactant in # is about 0.001 to about 0.02 weight Range of percentages. 3. The composition as claimed in claim 2, wherein the non-ionic polymer has interfacial activity free block copolymers of polyethylene glycol and polypropylene glycol, random copolymers of polyethylene glycol and polypropylene, polyethylene oxide It is a group consisting of a poly-propylene oxide copolymer and a random copolymer of polyethylene oxide and polyfluorene oxide. 4. Ask for it! Zhiqian composition, wherein the nonionic polymer surfactant has a structure of h- (OCH2CH2) x- (och (CH3) CH2V (〇ch2CH2) z 〇h 'where x and yh are positive integers, and wherein the non-ionic The average molecular weight of the polymer surfactant is about 3000 or less. 5. The composition as claimed, wherein the non-ionic polymer surfactant comprises a polyalcohol non-ionic polymer surfactant. 6. The composition as claimed in claim 5, wherein the polyalcohol nonionic polymer surfactant is a sorbitan lipid with polyethylene oxide as shown in the following structure, H〇 (CHJCH < 0) y ^ / (OCHagUxOH 'rt N0 ^ pi (0〇tCHi) y〇H), 00001, (¾) 5 CH, okbch, (CH,) $ CH, 96824.doc 200530309 where X, y and Z are positive integers. 7. One kind of preparation A method of etching a composition, the method comprising the steps of: preparing a first mixture solution by mixing a nonionic polymer surfactant with a hydrogen fluoride solution; preparing a second mixture solution by mixing water with the first mixture solution ; And by mixing the fluorinated syrup> Valley fluid with the younger brother The material solution is mixed to make the remaining composition. 8. The method of claim 7, wherein the non-ionic polymer surfactant and the hydrogen fluoride solution are mixed at a temperature range of about 10 to 40 T: for about 3 hours or more. 9. The method of claim 7, wherein the water and the first mixture solution are mixed at a temperature range of about 10 to 4 ° C for about 3 hours or more. 1 The method of claim 7, in which The second mixture solution and the ammonium fluoride solution are mixed at a temperature range of about 10 to 4 ° C. for about 12 hours or more. 11. The method of claim 7, wherein the first mixture solution, the second During the preparation of the mixture solution and the etching composition, the particles contained in the first mouthpiece solution, the second mixture solution, and the etching composition are filtered. 12. The method of claim 7, wherein the non-ionic polymer The surfactant is selected from the group consisting of a block copolymer of polyethylene glycol and polypropylene glycol, a random copolymer of polyethylene glycol and polypropylene T alcohol, a block copolymer of polyethylene oxide and polypropylene oxide, and polyethylene oxide and polyethylene oxide. C 96824.doc 200530309 a composed of random copolymers, the method of claim 7, wherein the non-ionic polymer surfactant has WH2CH2H0CH (CH3 ^^^^ t X ^ t is a positive integer, J_ # 中非The average molecular weight of the ionic polymer surfactant is approximately 3000. The method of the second member 7 'wherein the non-ionic polymer surfactant comprises a polyalcohol non-ionic surfactant. 15. The method of claim 14, wherein the polyalcohol nonionic polymer has interfacial activity The agent is a sorbitan lipid with polyoxyethylene as shown in the following structure, HQ ^ CKaO) ^ / 0Ca2CR%) xm Γ \ '0 Eight strict οα ^ αί, ν (耻 αι, αΛοοοα ^ αΐΑατ, σκΒα ^ α!,) · ^ where χ, y, and ζ are positive integers. 16. If requested, the method of item 7, wherein the concentration of the hydrogen fluoride solution is in the range of about 40 to 60 weight percent. The method of Shiming Chang item 7, wherein the concentration of the ammonium fluoride solution is in the range of about 30 to 50 weight percent. 18. A money engraving method comprising the steps of: forming a nitride layer on a substrate; forming an oxide layer; patterning the oxide to form a contact hole exposing the nitride layer; Forming a polycrystalline silicon layer pattern on a nitride layer and an inner sidewall portion of the contact hole; and removing the oxide layer using an etching composition, wherein the etching composition 96824.doc 200530309 includes a nonionic polymer surfactant, It is selectively adsorbed on the surface portion of the polycrystalline silicon layer to passivate the polycrystalline silicon layer pattern. 19. The etching method according to claim 18, wherein the non-ionic polymer surfactant is selected from the group consisting of a block copolymer of polyethylene glycol and polypropylene glycol, a random copolymer of polyethylene glycol and polypropylene glycol, polyethylene oxide and polyethylene. A group of block copolymers of propylene oxide and random copolymers of polyethylene oxide and polyoxypropylene. 20. The etching method according to claim 19, wherein the non-ionic polymer surfactant has a structure of H- (〇CH2CH2) x- (OCH (H3) CH2) y- (〇CH2CH2) z 〇I ^, wherein X, 7 And 2 are positive integers, and the average molecular weight of the non-ionic polymer surfactant is about 3000. 21. The etching method of claim 18, wherein the nonionic polymer interfacial activity M comprises a polyalcohol nonionic surfactant. 22. The etching method according to claim 21, wherein the polyalcohol non-ionic polymer surfactant is a polysorbate added with polyethylene oxide, HCXCHjCHjO) represented by the following structure. (ΟΟί, ΟΙ ^ χΟΗ ^ CJKOCH.CHOyOH CH, (〇CHaaU〇d〇CH B (CHa) tfCHaCHKaCHt (CHa) eCH3 where X, y, and z are positive integers 23.) The etching method according to claim 18, wherein the step of forming an oxide layer includes : Forming a first oxide layer on the nitride layer, and forming a second oxide layer on the first oxide layer. 96824.doc 200530309 24. The etching method as claimed in claim 23, wherein the nitrogen I。 The compound layer comprises silicon nitride, the first oxide layer comprises BPSG, and the second oxide layer comprises PE-TEOS. 25. The etching method as claimed in claim 18, wherein the etching composition comprises about 0.1 to 8 weight percent hydrogen fluoride (HF, about 10 to 25 weight percent ammonium fluoride (NHj), about 0.0001 to 3 weight percent non-ionic polymer surfactant, and water (H20). 26 A method of manufacturing a semiconductor device, the method comprising the following steps: forming a worm stop layer on a semiconductor substrate; forming a first oxide layer on the etch stop layer; on the first oxide layer Forming a second oxide layer, partly Removing the first and the second oxide layers to expose a contact area to form a polycrystalline silicon layer pattern in contact with the contact area; and using a engraving composition to remove the first and the second oxide layers, The material includes a non-ionic polymer surfactant, a layer-selecting pattern. The surface of the ytterbium is divided to passivate the polycrystalline stone. 27. If the method of item 26 is clear, the first oxide layer is PE-TEOS. Wherein the ㈣stop layer contains nitride stone eve # contains BPSG 'and the second oxide layer contains 2 8 · As in the method of seeking item 26, a random copolymer of free polyethylene glycol and polypropylene glycol wherein the non-ionic polymer Interfacial activity _ Block copolymers of diols, polyethylene glycol polymerization, polyethylene oxide and polypropylene oxide Qian Yan 96824.doc 200530309 copolymers and random copolymers of polyethylene oxide and polypropylene oxide 29. The method according to claim 28, wherein the non-ionic polymer surfactant has a structure of H- (OCH2CH2) x- (〇CH (CH3) CH2) y- (〇CH2CH2V〇H), wherein X, y and Z are positive integers, and wherein the non-ionic polymer The average molecular weight of the surfactant is about 3000. 30. The method of claim 26, wherein the non-ionic polymer surfactant comprises a polyalcohol non-ionic surfactant. 3 1 · The method of claim 30, wherein the polymer Alcohol nonionic surfactants are sorbitan lipids with polyethylene oxide as shown in the following structure, W (Ol9ai90) w (OCHaCHa) x〇H Qin 0 OKOCHaCHaJyOH ® jiCXSaOit) i〇〇〇C2Is (£ 3I, ) eCMa (»< HCHa (CHa)« CH, where x, y, and z are positive integers. 32. The method of claim 26, further comprising the steps of: forming an HSG silicon layer on the polycrystalline silicon layer pattern; forming a dielectric thin film on the HSG silicon layer; and forming a plate on the dielectric layer. electrode. 33. The method of claim 26, wherein the etching composition comprises about to ^ weight percent of hydrogen fluoride (HF), about 10 to 25 weight percent of fluorine, chemical conversion (NHUF), and about 0.001 to 3 Non-ionic polymer surfactants by weight, and water (Η20). 96824.doc