TW200527651A - Ferroelectric capacitor and ferroelectric device - Google Patents

Ferroelectric capacitor and ferroelectric device Download PDF

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Publication number
TW200527651A
TW200527651A TW93115224A TW93115224A TW200527651A TW 200527651 A TW200527651 A TW 200527651A TW 93115224 A TW93115224 A TW 93115224A TW 93115224 A TW93115224 A TW 93115224A TW 200527651 A TW200527651 A TW 200527651A
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Taiwan
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electrode layer
ferroelectric
layer
patent application
oxide
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TW93115224A
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Chinese (zh)
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Sheng-Chih Lai
Hsiang-Lan Lung
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Macronix Int Co Ltd
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Abstract

A ferroelectric capacitor and a ferroelectric device are provided. The ferroelectric capacitor is consisted of a first electrode layer, a second electrode layer, and a ferroelectric dielectric layer between the first electrode layer and the second electrode layer. Also, at least one of the material of the first electrode layer and the material of the second electrode layer is a conducting material. Due to the conducting material, an Ohmic electrode/ferroelectric interface is existed between at least one of the first electrode layer and the second electrode layer, and the ferroelectric dielectric layer for eliminating the Schottky barrier between at least one of the first electrode layer and the second electrode layer, and the ferroelectric dielectric layer.

Description

200527651200527651

【發明所屬之技術領域】 本發明是有關於-種電容器以及使用此電容器之元 件,且特別是有關於一種鐵電(Ferr〇electric)電容器以 及使用此鐵電電容器之鐵電元件。 【先前技術】 隨著時代的演進,行動電子產品日趨重要,如行動電 話、個人數位助理(PDA)、數位相機等,使得非揮發性記 憶體=需求日益增加,目前常見的非揮發性記憶體有罩幕 ,唯讀記憶體(Mask ROM)、快閃記憶體(Flash memory) 專’然而罩幕式唯讀記憶體不能更改記憶内容,因此使用 範圍大受限制。而快閃記憶體雖然可以任意更改儲存内 谷’然其寫入次數有限且讀寫速度遠低於動態隨機存取記 憶體(DRAM)及靜態隨機存取記憶(sraM),因此對於高讀寫 次數、高讀寫速度、低耗能及低操作電壓之新型記憶體的 需求已逐漸浮現,目前具有此優點的的新型記憶體有鐵電 記憶體(Ferroelectric Random Access Memory , FeRAM) 及磁性記憶體(Magnetic Random Access Memory,MRAM) 等。 鐵電記憶體係由電晶體與鐵電電容器所構成,且其中 的鐵電電容器是由下層之鉑電極層、中間之以锆鈦酸船 (Lead Zirconate Titanate,PZT)為材質之鐵電介電層與 上層之鉑電極層所構成。此外,電容器中的電極層藉由絕 緣層_之金屬插塞與電晶體之源極/汲極區電性連接°而 鐵電記憶體訊號的大小決定於鐵電電容器中殘留極化值的[Technical field to which the invention belongs] The present invention relates to a capacitor and a device using the same, and more particularly to a ferroelectric capacitor and a ferroelectric device using the ferroelectric capacitor. [Previous technology] With the development of the times, mobile electronic products are becoming more and more important, such as mobile phones, personal digital assistants (PDAs), digital cameras, etc., making non-volatile memory = increasing demand, currently common non-volatile memory There is a mask, read-only memory (Mask ROM), flash memory (Flash memory) exclusively. However, the mask-type read-only memory cannot change the memory content, so the use range is greatly limited. Although flash memory can arbitrarily change the storage valley, it has limited write times and read and write speeds much lower than dynamic random access memory (DRAM) and static random access memory (sraM). The demand for new types of memory with high frequency, high read / write speed, low power consumption and low operating voltage has gradually emerged. At present, new types of memory with this advantage include ferroelectric random access memory (FeRAM) and magnetic memory. (Magnetic Random Access Memory, MRAM), etc. The ferroelectric memory system is composed of a transistor and a ferroelectric capacitor, and the ferroelectric capacitor is a platinum electrode layer on the lower layer and a ferroelectric dielectric layer made of a lead zirconate titanate (PZT) material in the middle. It is composed of an upper platinum electrode layer. In addition, the electrode layer in the capacitor is electrically connected to the source / drain region of the transistor through the metal plug of the insulating layer, and the size of the ferroelectric memory signal is determined by the residual polarization value in the ferroelectric capacitor.

13095twf.ptd 第8頁 200527651 五、發明說明(2) 大小,因此如何增加殘留極化值的大小是非常重要的。 在上述鐵電電谷器中’始電極層與鐵電介電層之功函 數(Work Function)的差異很大,因此當此二膜層結合 後’功函數小的鐵電介電層中之電子會流向功函數大的鉑 電極層,直到彼此之費米能量(Fermi Energy)相同為止, 如此將於此二膜層的界面處產生蕭基能障(Sch〇ttky Barrier),而產生如圖1所示之在鉑電極層1〇與鐵電介電 層20的界面處之能帶彎曲(Band Bending)的現象,且此蕭 基能障的存在會造成鐵電電容器在低電壓操作時,程式化 的速度變慢的問題。 以下係以一電壓操作與所對應之鐵電介電層中的電場 變化說明上述之在低電壓操作時,程式化速度緩慢的問 題。圖2(a)〜2(c)是分別繪示出在不同操作電壓下,在鐵 電介電層3 0中,所得之能帶與所對應之電場(£ )的變化 圖。其中鐵電介電層30係區分成FI、F2、F3三個區域,且 鐵電介電層3 0的兩側係為鉑電極層4 〇、5 〇。 由圖2(a)〜2(c)可知,由於此二膜層之材質的功函數 差異很大’因此在此一膜層的界面處會有能帶·彎曲之現象 (如2(a)〜2(c)左邊之圖式所示)。此外,初始之鐵電介電 層30係在程式化電壓(V)小於負的矯頑電壓(Negative Coercive Voltage ’-Vc)(V<-Vc)下進行右向之預極化 (Pre-Po 1 ar i zed) 〇 由圖2(a)可知,在V = 0時,其殘存極化(Remnant Polarization)係來自於F2與F3這兩個區域,而F1區域所13095twf.ptd Page 8 200527651 V. Description of the invention (2) The size, so how to increase the size of the residual polarization value is very important. In the above ferroelectric valley device, the work function of the 'starting electrode layer and the ferroelectric dielectric layer is very different, so when the two films are combined, the electrons in the ferroelectric dielectric layer having a small work function are combined. It will flow to the platinum electrode layer with a large work function until the Fermi Energy of each other is the same, so a Schottky Barrier will be generated at the interface of the two film layers, resulting in Figure 1 The phenomenon of band banding at the interface between the platinum electrode layer 10 and the ferroelectric dielectric layer 20 is shown, and the existence of this Schottky energy barrier will cause the ferroelectric capacitor to operate at low voltage. Slow down. The following is a description of the problem of the slow programming speed in low-voltage operation described above with a voltage operation and corresponding changes in the electric field in the ferroelectric dielectric layer. Figures 2 (a) to 2 (c) are graphs showing changes in the energy band and the corresponding electric field (£) in the ferroelectric dielectric layer 30 at different operating voltages, respectively. The ferroelectric dielectric layer 30 is divided into three regions of FI, F2, and F3, and the two sides of the ferroelectric dielectric layer 30 are platinum electrode layers 40 and 50. As can be seen from Figures 2 (a) to 2 (c), because the work functions of the materials of these two layers are very different, there will be band-bending phenomenon at the interface of this layer (such as 2 (a) ~ 2 (c) The figure on the left). In addition, the initial ferroelectric dielectric layer 30 performs a right-side pre-polarization (Pre-Po) under a stylized voltage (V) less than a negative coercive voltage (-Vc) (V < -Vc). 1 ar i zed) 〇 As shown in Figure 2 (a), when V = 0, its residual polarization (Remnant Polarization) comes from the two regions F2 and F3, and the F1 region is

13095twf.ptd 第9頁 200527651 五、發明說明(3) 產生之電場由於與原本的電場抗衡,因此在F1區域有些微 的反轉(Reversed)。 此外,由圖2(b)可知,當V增加至Vc時,即在V” Vc 時,大部分之F2、F3區域的電場較小,且在F2區域的電場 約等於橋頑電場(Coercive Electric Field,Ec)。此 時,由於在低電場的時候,區域切換的速度(S p e e d o f Domain Switching)會下降,因此程式化速度會隨之下 降。 而且,由圖3之程式化電壓與電流密度之關係圖可 知,在矯頑電壓、時間為1 0 m s的情況下,具有最大的切換 電流值。換言之,在低電壓操作時,以鐵電材料作為電容 器之s己憶體元件其程式化速度緩慢的問題會特別嚴重。 另外,由圖2(c)可知,當v>Vc時,在F2、F3區域可以 進行極化切換(Switch),特別是F2區域的切換時間很快, 而在大部分之F 3區域由於其電場仍小於ec,因此仍為緩慢 切換(Slow Switching)。於是,再次由圖3之程式化電壓 與電流密度之關係圖可知,當程式化電壓由l 5V增加至4V 時,其切換電流會隨之減小。 除此之外’由以下的說明也可以再次突顯出在低電壓 操作時,上述之程式化速度緩慢的問題。圖4是鐵電電容 器之程式化脈衝寬度(秒)與極化量的關係圖,其中表示 程式化電壓為-5V,#程式化電壓為_3V,▲程式化電壓為 -2V,而負號(-)係表示負向驅動。由圖4可知,隨著程式 化電壓的降低(例如:操作電壓為_2V),在小的程式化脈13095twf.ptd Page 9 200527651 V. Description of the invention (3) The generated electric field is slightly reversed in the F1 area because it is in opposition to the original electric field. In addition, as shown in Figure 2 (b), when V increases to Vc, that is, at V "Vc, most of the electric fields in the F2 and F3 regions are small, and the electric field in the F2 region is approximately equal to the bridge coercive electric field (Coercive Electric Field, Ec). At this time, since the speed of area switching (Speed of Domain Switching) will decrease at a low electric field, the programming speed will decrease accordingly. Moreover, the voltage and current density The relationship diagram shows that the maximum switching current value is obtained under the condition of coercive voltage and time of 10 ms. In other words, during low voltage operation, the programming speed of the s-memory element using a ferroelectric material as a capacitor is slow. In addition, it can be seen from Figure 2 (c) that when v > Vc, polarization switching (Switch) can be performed in the F2 and F3 regions, especially the switching time in the F2 region is fast, and in most cases Since the electric field in F 3 region is still smaller than ec, it is still Slow Switching. Therefore, again from the relationship diagram of the stylized voltage and current density in Fig. 3, when the stylized voltage is increased from 15 V to 4 V, , Its cut The switching current will decrease accordingly. In addition, the problem of the slow programming speed mentioned above can also be highlighted again in the following description. Figure 4 shows the programmed pulse width (seconds) of the ferroelectric capacitor. ) And the amount of polarization, which shows the stylized voltage is -5V, # stylized voltage is _3V, ▲ stylized voltage is -2V, and the negative sign (-) indicates negative driving. As can be seen from Figure 4 As the stylized voltage decreases (eg, the operating voltage is _2V),

13095twf.ptd 第10頁 200527651 五、發明說明(4) 衝寬度下(例如:1 0 _ 6秒),即高頻的情況下,極化量耗損 (Polarization Loss)會特別嚴重。因此,上述之程式化 速度緩慢的問題係與程式化脈衝寬度及程式化電壓之大小 有關。然而,具有程式化速度快、低操作電壓、低消耗功 率等特性的記憶體元件勢必在未來市場的成為主流,因 此,上述之在低電壓操作時,程式化速度緩慢的問題是亟 待解決的重要課題。 【發明内容】 有鑑於此,本發明的目的就是在提供一種鐵電電容 器,以縮小,甚至消除鐵電電容器中之電極層與鐵電介電 層之間的蕭基能障。 I _ 本發明的目的就是在提供另一種鐵電電容器,以縮 小,甚至消除鐵電電容器中之電極層與鐵電介電層之間的 蕭基能障。 本發明的目的是提供一種鐵電元件,以解決在低電壓 操作及小的程式化脈衝寬度下時,鐵電電容器程式化速度 緩慢的問題。 本發明的目的是提供另一種鐵電元件,以解決在低電 壓操作及小的程式化脈衝寬度下時,鐵電電容器程式化速 度緩慢的問題。 本發明的目的是提供又一種鐵電元件,以縮小,甚至 消除鐵電元件中之電極層與鐵電介電層之間的蕭基能障。 本發明的目的是提供再一種鐵電元件,以縮小,甚至 消除鐵電元件中之電極層與鐵電介電層之間的蕭基能障。13095twf.ptd Page 10 200527651 V. Description of the invention (4) Polarization Loss will be particularly serious at the punch width (for example: 10 -6 seconds), that is, at high frequencies. Therefore, the problem of the slow programming speed mentioned above is related to the programming pulse width and the programming voltage. However, memory elements with fast programming speed, low operating voltage, and low power consumption are bound to become mainstream in the future market. Therefore, the problem of slow programming speed in low voltage operation is an important issue that needs to be resolved. Topic. SUMMARY OF THE INVENTION In view of this, the object of the present invention is to provide a ferroelectric capacitor to reduce or even eliminate the Schottky energy barrier between the electrode layer and the ferroelectric dielectric layer in the ferroelectric capacitor. The purpose of the present invention is to provide another ferroelectric capacitor to reduce or even eliminate the Schottky barrier between the electrode layer and the ferroelectric dielectric layer in the ferroelectric capacitor. The object of the present invention is to provide a ferroelectric device to solve the problem that the programming speed of the ferroelectric capacitor is slow under low voltage operation and a small programmed pulse width. The object of the present invention is to provide another ferroelectric device to solve the problem of slow programming speed of the ferroelectric capacitor under low voltage operation and small programming pulse width. The object of the present invention is to provide another ferroelectric element to reduce or even eliminate the Schottky energy barrier between the electrode layer and the ferroelectric dielectric layer in the ferroelectric element. The object of the present invention is to provide another ferroelectric element to reduce or even eliminate the Schottky energy barrier between the electrode layer and the ferroelectric dielectric layer in the ferroelectric element.

13095twf.ptd 第11頁 200527651 五、發明說明(5) 本發明提出一種鐵雷 電極層、第二電極芦 ^ ° ,此鐵電電容器係由第〜 之間的鐵電介電層戶^構#配^ f第一電極層與第二電極層 第二體材…此導體材^ 之一與鐵電介電層之間if第一電極層之至少其中 除第-電極層及第二;;ί:=極/鐵電界面’以消 之間的蕭基能障。 s 、中之一與鐵電介電層 -電ii明ίίί:ΐ鐵電電容器’此鐵電電容器係由第 層之間的鐵電介電層;:二配第-電極層與第二電極 可二之一的材質係為導體材料,且此導體材i :;以;:::=電極層之至少其中之-具= 極層少其中之一與鐵電介電層之間的蕭基能障。電 戶及之鐵電電容器中,由於第一電極層與鐵電介電 i姆ί 丄之至少其中之—與鐵電介電層&間具有: ,ι、 ,極/鐵電界面,或是第一電極層及第二電極層之至 之一具有與此鐵電介電層相近之功函數,因此第一 二電極層 <至少④^一與鐵電介電層之間的 二,障較小,甚至無蕭基能障。於是,在低電壓操作及 程式化脈衝寬度下時,鐵電電容器的極化量耗損可以 本發明提出-種鐵電元件,此鐵電元件係由基底、電13095twf.ptd Page 11 200527651 V. Description of the invention (5) The present invention proposes an iron lightning electrode layer and a second electrode ^ °. This ferroelectric capacitor is composed of the ferroelectric dielectric layer between the first and the second ~ ^ F the first electrode layer and the second electrode layer the second body material ... if at least one of the first electrode layer between the one of this conductive material and the ferroelectric dielectric layer is the first electrode layer and the second; : = Pole / ferroelectric interface 'to eliminate the Schottky barrier between. s, one of them and the ferroelectric dielectric layer-electricity II Minglong: "Ferroelectric capacitors" This ferroelectric capacitor is composed of the ferroelectric dielectric layer between the first layer; two pairs of the first-electrode layer and the second electrode The material of one of the two is a conductive material, and the conductive material i:;:; === at least one of the electrode layers-with = one of the few electrode layers and the ferroelectric dielectric layer Disabled. In electric households and ferroelectric capacitors, since at least one of the first electrode layer and the ferroelectric dielectric ——and the ferroelectric dielectric layer & has:, ι,, pole / ferroelectric interface, or It is that one of the first electrode layer and the second electrode layer has a work function similar to that of the ferroelectric dielectric layer, so the first two electrode layers < at least ④ ^ 1 and the ferroelectric dielectric layer are two, Barriers are small, even without Shaw energy barriers. Therefore, under low voltage operation and stylized pulse width, the polarization loss of the ferroelectric capacitor can be reduced. The present invention proposes a ferroelectric element, which is composed of a substrate, an electric

13095twf.ptd 第12頁 200527651 五、發明說明(6) 晶體、絕緣層、插塞以及鐵電電容器所構成。其中,電晶 體係配置於基底上。此外,絕緣層係配置於基底上,且覆 蓋住電晶體。另外,插塞係配置於絕緣層中。除此之外, 鐵電電容器係配置於絕緣層上,且此鐵電電容器藉由插塞 與電晶體電性連接,而且此鐵電電容器係由第一電極層、 第二電極層以及配置在第一電極層與第二電極層之間的鐵 電介電層所構成。其中,第一電極層及第二電極層之至少 其中之一的材質係為導體材料,且此導體材料可以使得第 一電極層及第二電極層之至少其中之一與鐵電介電層之間 具有一歐姆電極/鐵電界面,以消除第一電極層及第二電 極層之至少其中之一與鐵電介電層之間的蕭基能障。 本發明提出另一種鐵電元件,此鐵電元件係由基底、 電晶體、絕緣層、插塞以及鐵電電容器所構成。其中,電 晶體係配置於基底上。此外,絕緣層係配置於基底上,且 覆蓋住電晶體。另外,插塞係配置於絕緣層中。除此之 外,鐵電電容器係配置於絕緣層上,且此鐵電電容器藉由 插塞與電晶體電性連接,而且此鐵電電容器係由第一電極 層、第二電極層以及配置在第一電極層與第二電極層之間 的鐵電介電層所構成。其中,第一電極層及第二電極層之 至少其中之一的材質係為導體材料,且此導體材料可以使 得第一電極層及第二電極層之至少其中之一具有與此鐵電 介電層相近之功函數,以縮小第一電極層及第二電極層之 P 至少其中之一與鐵電介電層之間的蕭基能障。 在上述之鐵電元件中,由於鐵電電容器中的第一電極13095twf.ptd Page 12 200527651 V. Description of the invention (6) Crystal, insulation layer, plug and ferroelectric capacitor. The transistor system is arranged on the substrate. In addition, the insulating layer is disposed on the substrate and covers the transistor. The plug is disposed in the insulating layer. In addition, the ferroelectric capacitor is disposed on the insulating layer, and the ferroelectric capacitor is electrically connected to the transistor through a plug, and the ferroelectric capacitor is configured by a first electrode layer, a second electrode layer, and A ferroelectric dielectric layer is formed between the first electrode layer and the second electrode layer. Wherein, the material of at least one of the first electrode layer and the second electrode layer is a conductive material, and the conductive material can make at least one of the first electrode layer and the second electrode layer and the ferroelectric dielectric layer There is an ohmic electrode / ferroelectric interface in between to eliminate the Schottky energy barrier between at least one of the first electrode layer and the second electrode layer and the ferroelectric dielectric layer. The invention proposes another ferroelectric element, which is composed of a substrate, a transistor, an insulating layer, a plug, and a ferroelectric capacitor. The transistor system is arranged on the substrate. In addition, the insulating layer is disposed on the substrate and covers the transistor. The plug is disposed in the insulating layer. In addition, the ferroelectric capacitor is arranged on the insulating layer, and the ferroelectric capacitor is electrically connected to the transistor through a plug, and the ferroelectric capacitor is configured by a first electrode layer, a second electrode layer, and A ferroelectric dielectric layer is formed between the first electrode layer and the second electrode layer. Wherein, the material of at least one of the first electrode layer and the second electrode layer is a conductive material, and the conductive material can make at least one of the first electrode layer and the second electrode layer have a dielectric with this ferroelectricity. The layers have similar work functions to reduce the Schottky energy barrier between at least one of P of the first electrode layer and the second electrode layer and the ferroelectric dielectric layer. In the above ferroelectric element, since the first electrode in the ferroelectric capacitor

13095twf.ptd 第13頁 20052765113095twf.ptd Page 13 200527651

層及第二電極層之至少其中之一與鐵電 歐姆電極/鐵電界面,或是第一電極層及第1二電極1層/之至 少其中之一具有與此鐵電介電層相近之功函數,因此第一 電極層及第二電極層之至少其中之一與鐵電介電層之間的 蕭基能障較小,甚至無蕭基能障。於是,在低電壓操作及 小的程式化脈衝寬度下時,可以提高鐵電元件的效能。特 別疋將鐵電元件應用於記憶體元件時,可以得到一個具有 程式化速度快、低操作電壓、低消耗功率等特性之 ^ 憶體元件。 為讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂,下文特舉較佳實施例,並配合所附圖式,作詳細 說明如下。 , 【實施方式】 以下係以鐵電元件為例’說明本發明之鐵電電容器與 鐵電元件,唯非用以限定本發明之應用。 〃 圖5所示’其繪示依照本發明一較佳實施例的一種鐵 電元件之剖面示意圖。 請參照圖5,本發明之鐵電元件係由基底丨〇 〇、電晶體 1 0 2、絕緣層1 1 2、插塞1 1 6以及鐵電電容器1 2 6所構成。其 中,電晶體1 0 2係配置於基底1 〇 〇上,且此電晶體1 〇 2係由 閘介電層1 0 4、閘極導體層1 〇 6、源極/汲極區1 〇 8與間隙壁 1 1 〇所構成。其中,閘極導體層1 0 6係配置於基底1 0 0上。泰 此外,閘介電層1 0 4係配置於基底1 0 0與閘極導體層1 〇 6之 間。另外,源極/汲極區1 〇 8係配置於閘極導體層1 0 6兩側At least one of the first electrode layer and the second electrode layer and the ferroelectric ohmic electrode / ferroelectric interface, or at least one of the first electrode layer and the first two electrode 1 layer / has a similarity to this ferroelectric dielectric layer The work function, therefore, the Schottky energy barrier between at least one of the first electrode layer and the second electrode layer and the ferroelectric dielectric layer is small, or there is no Schottky energy barrier. Therefore, the performance of the ferroelectric device can be improved under low voltage operation and a small programmed pulse width. In particular, when a ferroelectric element is applied to a memory element, a ^ memory element having characteristics such as fast programming speed, low operating voltage, and low power consumption can be obtained. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, preferred embodiments are described below in detail with the accompanying drawings, as follows. [Embodiment] The following is a description of the ferroelectric capacitor and the ferroelectric element of the present invention by taking the ferroelectric element as an example, but it is not used to limit the application of the present invention. 〃 FIG. 5 ′ shows a schematic cross-sectional view of a ferroelectric device according to a preferred embodiment of the present invention. Referring to FIG. 5, the ferroelectric element of the present invention is composed of a substrate, a transistor 10, an insulating layer 1 12, a plug 1 16, and a ferroelectric capacitor 1 2 6. The transistor 102 is arranged on the substrate 100, and the transistor 102 is composed of a gate dielectric layer 104, a gate conductor layer 106, and a source / drain region 108. And the partition wall 1 1 〇. The gate conductor layer 106 is disposed on the substrate 100. In addition, the gate dielectric layer 104 is disposed between the substrate 100 and the gate conductor layer 106. In addition, the source / drain region 108 is disposed on both sides of the gate conductor layer 106.

13095twf.ptd 第14頁 200527651 五、發明說明(8) ' t °除此之外,間隙壁UG係配置於閘極導體層 1 0 6之侧壁上。 另外,鐵電元件中的絕緣層U2係配置於基底1〇〇上, 且覆,住電晶體102。其中,絕緣層112之材質例如是氧化 矽、氮化矽、氮氧化矽或是其他合適的材料。此外,插塞 1 1 6係配置於絕緣層丨丨2中,且插塞丨丨6之材質例如是鋁、 鎢或是其他合適之導電材料。除此之外,鐵電電容器126 係配置於絕緣層112上,且鐵電電容器126係藉由插塞116 與電晶體1 1 6之源極/汲極區1 〇 8電性連接。而且,此鐵電 電容器126係由電極層120、124以及配置在電極層12〇盥 124之間的鐵電介電層122所構成。其中,鐵 ^ 的1質例如是鍅鈦酸鉛、鈦錘酸鑭鉛、鈕鉍酸鳃、^钽鉍 酸錄、鈥酸鋇、鈇酸錄鋇或其他合適之材料, & a t別是,在一較佳實施例中,鐵電電容器1 26中的電 ΪΙ二之材質例如是鉑(Pt) ’而電極層124的材質例如是 ΪίΠ且η此導體材料包括導體氧化物,其例如是鑭鎳 ,LN〇)、氧化姥(RU〇2)、氧化銀(Ir〇2)、鋼 在:=氧化物(Lai_xSrxCo〇3)或其他合適之導體材料。使用上 ;二m材之料門作為電極層124 ’可以使得電極層124與鐵 6A ^, 7 4具有一歐姆電極/鐵電界面,即此二膜層 基能障。或者,在另-較佳實施例 數,極層124具有與鐵電介電層122相近之功函 ΐ中;i i、12f/124與鐵電介電層122之間的蕭基能障, '、中電極層124與鐵電介電層122之間的功函數的差係介於13095twf.ptd Page 14 200527651 V. Description of the invention (8) 't ° In addition, the spacer UG is arranged on the side wall of the gate conductor layer 106. In addition, the insulating layer U2 in the ferroelectric element is disposed on the substrate 100 and covers the transistor 102. The material of the insulating layer 112 is, for example, silicon oxide, silicon nitride, silicon oxynitride, or other suitable materials. In addition, the plug 1 1 6 is disposed in the insulating layer 2 and the material of the plug 6 is, for example, aluminum, tungsten, or other suitable conductive materials. In addition, the ferroelectric capacitor 126 is disposed on the insulating layer 112, and the ferroelectric capacitor 126 is electrically connected to the source / drain region 108 of the transistor 1 16 through the plug 116. The ferroelectric capacitor 126 is composed of electrode layers 120 and 124 and a ferroelectric dielectric layer 122 disposed between the electrode layers 120 and 124. Among them, the first substance of iron ^ is, for example, lead osmium titanate, lead lanthanum titanate, gallium bismuth acid, ^ tantalum bismuth acid, barium acid, barium osmium acid, or other suitable materials, & at In a preferred embodiment, the material of the capacitors in the ferroelectric capacitor 126 is, for example, platinum (Pt), and the material of the electrode layer 124 is, for example, ΪίΠ, and the conductor material includes a conductor oxide, which is, for example, Lanthanum nickel, LN0), hafnium oxide (RU〇2), silver oxide (IrO2), steel in: = oxide (Lai_xSrxCo03) or other suitable conductor materials. The use of a two-material gate as the electrode layer 124 ′ can make the electrode layer 124 and iron 6A ^, 74 have an ohmic electrode / ferroelectric interface, that is, the two-layer-based energy barrier. Or, in another preferred embodiment, the electrode layer 124 has a work function similar to that of the ferroelectric dielectric layer 122; ii, the Schottky barrier between the 12f / 124 and the ferroelectric dielectric layer 122, ' The difference in work function between the middle electrode layer 124 and the ferroelectric dielectric layer 122 is between

200527651 五、發明說明(9) 0至0.5eV之間。如此一來,鐵雷雷交哭 小的程式化脈衝寬度下時,相較習知二效t電可^操雜作及 f。特別是將鐵電元件應用於記憶體元;牛改 ;化速度’並且可於較低電壓下操作,進以 當然,在另一較佳實施例中,若 電極層120之材質是上述的豆中一 器126中的 1 24的材質例如是鉑,目,丨Φ + f導體材抖’而電極層 之功效則此鐵電電容器126也同樣具有上述 + μ Ϊ f ί外,在另一更佳實施例中,若鐵電電容1 26 2由在 膜層的界面處幾乎沒有或是完全沒有 能障,鐵電電容器126效能將更優於上述二凡王/有 ’並且可於更低的電壓下操:, 效減少功率消耗的目的。 逐巧有 以:係以鐵電電容器126中的電極層12〇的材質為鉑 電二,it層二4Ϊί質為鑭鎳氧化物(LaNi〇3,LN〇),鐵 特點電層122的材質為鍅鈦酸錯(ρζτ)為例,說明本發明之 夕雜Ϊ 6ia)〜6 ( C )係分別繪示出在不同操作電壓下,所得 2 2電層122中的能帶與所對應之電場⑴變化圖,皇 如fD電"電層122係區分成F1、F2、F3三個區域,且豆左 側為Pt電極層12〇,右側為LN0電極層124。 八 200527651200527651 V. Description of the invention (9) Between 0 and 0.5eV. In this way, compared with the conventional two-effect t electric power, it is possible to perform complicated operations and f under the small stylized pulse width. In particular, the ferroelectric element is applied to the memory element; the speed is changed; and it can be operated at a lower voltage. Of course, in another preferred embodiment, if the material of the electrode layer 120 is the above-mentioned bean The material of 1 24 in the middle device 126 is, for example, platinum, mesh, and Φ + f conductor material is shaken, and the function of the electrode layer is also the same as the above-mentioned + μ Ϊ f ί, in another more In the preferred embodiment, if the ferroelectric capacitor 1 26 2 has little or no energy barrier at the interface of the film layer, the performance of the ferroelectric capacitor 126 will be better than that of the above-mentioned two-fan king / yes' and can be lower. Operation under voltage: The purpose of reducing power consumption. As it happens, the material of the electrode layer 120 in the ferroelectric capacitor 126 is platinum, the layer 2 of it is lanthanum nickel oxide (LaNi〇3, LN〇), and the material of the iron-specific electrical layer 122 is iron. For the case of erbium titanate (ρζτ) as an example, it is illustrated that the present invention's evening hybrids 6ia) to 6 (C) respectively show the energy bands in the 22 electric layer 122 and the corresponding ones under different operating voltages. In the electric field change diagram, Huangru fD electric " electric layer 122 is divided into three regions of F1, F2, and F3, and the left side of the bean is the Pt electrode layer 120 and the right side is the LN0 electrode layer 124. Eight 200527651

由圖6(a)〜6(c)可知,由於電極層12〇與鐵電介電層 1 22之間仍存在有蕭基能障,因此該處仍存在有能帶彎曲 的現象。不過,在電極層124與鐵電介電層122由於其功函 數相同,因此習知原本在該處所存在之能帶彎曲的現象消 失,如此可以減少該處之功率的耗損,進而解決極化量耗 損的問題。 此外’圖7是綠示鐵電電容器其程式化脈衝寬度與正 規化(Normalized)之極化量的關係圖。其中,表示電容As can be seen from Figs. 6 (a) to 6 (c), since there is still a Schottky barrier between the electrode layer 120 and the ferroelectric dielectric layer 122, there is still a phenomenon that the band is bent there. However, since the electrode layer 124 and the ferroelectric dielectric layer 122 have the same work function, it is known that the phenomenon that the energy band bending originally existing there disappears, so that the power loss there can be reduced, and the amount of polarization can be solved. Attrition. In addition, FIG. 7 is a graph showing the relationship between the stylized pulse width and the normalized polarization of the green ferroelectric capacitor. Among them, represents the capacitance

為非對稱式之Pt電極層/PZT鐵電介電層/LN〇電極層電容 器’⑩表示電容器為對稱式之以電極層/ρζτ鐵電介電層 /Pt電極層電容器,而上半部的「實線」部分表示為正向 驅動所得之結果’下半部的r虛線」部分表示為負向驅動 所得之結果。 由圖7可知,當L N 0電極層以正向驅動時,則極化反轉 CPolarization Reversal)與程式化脈衝寬度無關。這是 因為PZT鐵電介電層與L N0電極層的界面為歐姆電極/鐵電 界面’即二者功函數相同而無蕭基能障(如圖6(a)〜6(c)所 示)存在,因此可以將該處會造成緩慢切換的因素消除。 不過,若以負向驅動,即負偏壓時,對於LN0電極層來 說’將不會受到任何的衝擊,亦即仍有極化量耗損的問 題。這是因為在Pt電極層與ρζτ鐵電介電層之間仍存在有 蕭基此障(如圖6(a)〜6(c)所示之高起處),因此在F 3區域 < 藝 仍有切換緩慢的問題。因此,在鐵電介電層的底部選擇彼 此之間具有歐姆電極/鐵電界面(或是二膜層之間的功函數It is an asymmetric Pt electrode layer / PZT ferroelectric dielectric layer / LN0 electrode layer capacitor '⑩ means that the capacitor is symmetrical and the electrode layer / ρζτ ferroelectric dielectric layer / Pt electrode layer capacitor, and the upper half of the The "solid line" part indicates the result obtained by the positive driving, and the "dotted line r in the lower half" indicates the result obtained by the negative driving. It can be seen from FIG. 7 that when the L N 0 electrode layer is driven in a forward direction, the polarization reversal (CPolarization Reversal) has nothing to do with the programmed pulse width. This is because the interface between the PZT ferroelectric dielectric layer and the L N0 electrode layer is an ohmic electrode / ferroelectric interface, that is, they have the same work function without Schottky energy barriers (as shown in Figures 6 (a) ~ 6 (c)). ) Exists, so you can eliminate the factors that cause slow switching here. However, if it is driven in the negative direction, that is, when the voltage is negatively biased, the LN0 electrode layer will not be subjected to any impact, that is, the problem of loss of polarization will still exist. This is because there is still a Xiaoji barrier between the Pt electrode layer and the ρζτ ferroelectric dielectric layer (as shown in Fig. 6 (a) ~ 6 (c)), so in the F 3 region < Art still has the problem of slow switching. Therefore, the ohmic electrode / ferroelectric interface (or the work function between the two layers) is selected at the bottom of the ferroelectric dielectric layer.

II

13095twf.ptd 第17頁 200527651 五、發明說明(π) 差異小)的電極層,可以有效改善鐵電電容器程式化的速 度,且也可以在低電壓下進行操作。 綜上所述,本發明至少具有下面的優點: 1·在本發明之鐵電電容器中,由於電極層120及電極 層124之至少其中之一與鐵電介電層122之間具有一歐姆電 極/鐵電界面,或是電極層120及電極層124之至少其中之 一具有與此鐵電介電層122相近之功函數,因此電極層120 及電極層124之至少其中之一與鐵電介電層122之間的蕭基 能障較小,甚至無蕭基能障。於是,在低電壓操作及小的 程式化脈衝寬度下時,鐵電電容器126的極化量耗損可以 降低。 、 2 ·在上述之鐵電元件中,特別是在記憶體元件的應用 上’由於鐵電電容器中的電極層與鐵電介電層之蕭基能障 較小,甚至無蕭基能障。因此,可以得到一個具有程式化 速度快、低操作電壓、低消耗功率等特性之記憶體元件。 3 ·本發明之鐵電堆疊結構,亦可應用於其他元件中, 以構成其他種類之鐵電元件。例如,可將具有本發明之 極層120、鐵電介電層122及電極層124的鐵電堆疊結 用於鐵電記憶體等非揮發性記憶體元件中,以提 二 效能。 回凡彳千之 雖然本發明已以較佳實施例揭露如上,然其並 限定本發明’任何熟習此技藝者,在不脫離本發 :範圍内,當可作些許之更動與潤飾,因此本發明::: 範圍當視後附之申請專利範圍所界定者為準。 ” ”蔓13095twf.ptd Page 17 200527651 V. Description of the invention (π) The electrode layer has a small difference, which can effectively improve the programming speed of the ferroelectric capacitor, and it can also operate at low voltage. In summary, the present invention has at least the following advantages: 1. In the ferroelectric capacitor of the present invention, since at least one of the electrode layer 120 and the electrode layer 124 has an ohmic electrode between the ferroelectric dielectric layer 122 / Ferroelectric interface, or at least one of the electrode layer 120 and the electrode layer 124 has a work function similar to that of the ferroelectric dielectric layer 122. Therefore, at least one of the electrode layer 120 and the electrode layer 124 and the ferroelectric The Schottky energy barrier between the electrical layers 122 is relatively small, even without the Schottky energy barrier. Thus, under low voltage operation and a small stylized pulse width, the polarization loss of the ferroelectric capacitor 126 can be reduced. 2. In the above-mentioned ferroelectric elements, especially in the application of memory elements', because the Schottky energy barrier of the electrode layer and the ferroelectric dielectric layer in the ferroelectric capacitor is small, there is no Schottky energy barrier. Therefore, a memory element with fast programming speed, low operating voltage, and low power consumption can be obtained. 3. The ferroelectric stack structure of the present invention can also be applied to other components to form other types of ferroelectric components. For example, a ferroelectric stacked junction having the electrode layer 120, the ferroelectric dielectric layer 122, and the electrode layer 124 of the present invention can be used in a non-volatile memory element such as a ferroelectric memory to improve performance. Although the present invention has been disclosed in the preferred embodiment as above, it does not limit the present invention. 'Any person skilled in the art can make some changes and decorations without departing from the scope of the present invention: Invention :: The scope shall be determined by the scope of the attached patent application. "" Man

13〇95twf.ptd 第18頁 200527651 圖式簡單說明 圖1是習知之鐵電電容器中的電極層與鐵電介電層結 合後所得之能階圖。 圖2(a)〜圖2(c)分別是在習知之鐵電電容器中,在不 同操作電壓下,所得之鐵電介電層其能帶與所對應之電場 (E )變化圖。 圖3是習知之鐵電電容器其程式化電壓與電流密度之 關係圖。 圖4是習知之鐵電電容器其程式化脈衝寬度與極化量 之關係圖。 圖5是依照本發明一較佳實施例的一種鐵電元件之剖 面示意圖。 <· 圖6 ( a )〜圖6 ( c )分別是在本發明之鐵電電容器中,在 不同操作電壓下,所得之鐵電介電層其能帶與所對應之電 場(E )變化圖。 圖7是本發明與習知之鐵電電容器其程式化脈衝寬度 與正規化之極化量的關係圖。 【圖式標記說明】 10、40、50、120、124 ··電極層 20、30、122 :鐵電介電層 100 :基底 1 0 2 :電晶體 1 04 :閘極介電層 · 1 0 6 :閘極導體層 1 0 8 ·源極/ >及極區13〇twf.ptd Page 18 200527651 Brief Description of Drawings Figure 1 is an energy level diagram obtained by combining an electrode layer and a ferroelectric dielectric layer in a conventional ferroelectric capacitor. Figures 2 (a) to 2 (c) are the changes in the energy band and corresponding electric field (E) of the obtained ferroelectric dielectric layer under different operating voltages in conventional ferroelectric capacitors. Figure 3 is a graph showing the relationship between the programmed voltage and current density of a conventional ferroelectric capacitor. Fig. 4 is a graph showing the relationship between the stylized pulse width and the amount of polarization of a conventional ferroelectric capacitor. Fig. 5 is a schematic sectional view of a ferroelectric device according to a preferred embodiment of the present invention. < · Figures 6 (a) ~ 6 (c) are the changes in the energy band and corresponding electric field (E) of the obtained ferroelectric dielectric layer under different operating voltages in the ferroelectric capacitor of the present invention. Illustration. Fig. 7 is a graph showing the relationship between the stylized pulse width and the normalized polarization amount of ferroelectric capacitors according to the present invention and the conventional ferroelectric capacitors. [Explanation of drawing symbols] 10, 40, 50, 120, 124 ·· Electrode layer 20, 30, 122: Ferroelectric dielectric layer 100: Substrate 1 0 2: Transistor 1 04: Gate dielectric layer · 1 0 6: Gate conductor layer 10 8 Source and electrode area

13095twf.ptd 第19頁 20052765113095twf.ptd Page 19 200527651

13095twf.ptd 第20頁13095twf.ptd Page 20

Claims (1)

200527651 六、申請專利範圍 1.二種,電(Ferroelectric)電容器, 一第一電極層; 匕祜· 一第二電極層;以及 一鐵電介電層,配置在該第— 之間, 4 θ 一 β第二電極層 其中該第一電極層及該第二電極 材質係為一導體材料,且該導體材二 =其中之一的 層及該第二電極層之至少其中之一與 =該第一電極 有一歐姆(Ohmic)電極/鐵電界面,^ ^電層之間具 該第二電極層之至少1中之一盘兮該第一電極層及 能障(Schottky Barrier)。 $电”冤層之間的蕭基 道辨t如申明專利範圍第1項所述之鐵電電容器,其中該 導體材料包括一導體氧化物。 1如申請專利範圍第2項所述之鐵電電容器,其中該 導體氧化物包括鑭鎳氧化物(LaNi〇3,ln〇)、氧化铑(Ru02 )、氧化銥(Ir〇2)以及鑭鳃鈷氧化物(Lai xSrxC〇〇3)其中之 4·如申請專利範圍第1項所述之鐵電電容器,其中該 1電介電層的材質包括鈦锆酸鉛、鈦锆酸鑭鉛、鈕鉍酸 錄、銳纽鉍酸锶、鈦酸鋇與鈦酸鋰鋇之其中之一。200527651 VI. Scope of patent application 1. Two types: Ferroelectric capacitors, a first electrode layer; dagger · a second electrode layer; and a ferroelectric dielectric layer, disposed between the first, 4 θ A β second electrode layer, wherein the material of the first electrode layer and the second electrode is a conductor material, and the conductor material is two of one layer and at least one of the second electrode layer and the first electrode layer. An electrode has an Ohmic electrode / ferroelectric interface, and the first electrode layer and the Schottky Barrier are interposed between at least one of the second electrode layers between the electrical layers. Xiao Jidao between the two layers of electric power is the ferroelectric capacitor described in item 1 of the declared patent scope, wherein the conductor material includes a conductive oxide. 1 The ferroelectric capacitor described in item 2 of the patent application scope, The conductor oxide includes lanthanum nickel oxide (LaNi〇3, ln〇), rhodium oxide (Ru02), iridium oxide (IrO2), and lanthanum gill cobalt oxide (Lai x Srx Co. 03). The ferroelectric capacitor according to item 1 of the scope of the patent application, wherein the material of the dielectric layer 1 includes lead titanate zirconate, lead titanate lanthanum zirconate, niobium acid recorder, strontium niobate, barium titanate, and titanium One of lithium barium acid. 5 ·如申請專利範圍第1項所述之鐵電電容器,其中該 第一電極層及該第二電極層之其中之一的材質係為該導1 材料’則其中之另一的材質包括鉑(pt)。 6· —種鐵電電容器,包括:5. The ferroelectric capacitor according to item 1 of the scope of the patent application, wherein the material of one of the first electrode layer and the second electrode layer is the conductive material, and the other material includes platinum (Pt). 6 · —Ferroelectric capacitors, including: 第21頁 13095twf.ptd 200527651 六、申請專利範圍 一第一電極層; 一第二電極層;以及 一鐵電介電層,配置在該第一電極層與該第二電極層 之間, 其中該第一電極層及該第二電極層之至少其中之一的 材質係為一導體材料,且該導體材料可以使得該第一電極 層及該第二電極層之至少其中之一具有與該鐵電介電層相 近之功函數,以縮小該第一電極層及該第二電極層之至少 其中之一與該鐵電介電層之間的蕭基能障。 7. 如申請專利範圍第6項所述之鐵電電容器,其中該 第一電極層及該第二電極層之至少其中之一與該鐵電介電 層之間的功函數的差係介於0 至0 . 5 e V 之間。 8. 如申請專利範圍第6項所述之鐵電電容器,其中該 導體材料包括一導體氧化物。 9. 如申請專利範圍第8項所述之鐵電電容器,其中該 導體氧化物包括鑭鎳氧化物(LaNi03,LN0)、氧化铑(Ru02 )、氧化銥(Ir02)以及鑭勰鈷氧化物(LahSrxCoOs)其中之 〇 10. 如申請專利範圍第6項所述之鐵電電容器,其中該 鐵電介電層的材質包括鈦錯酸錯、鈇錯酸鋼錯、组絲酸 錄、銳组絲酸錄、鈦酸鋇與鈦酸錄鋇之其中之一。 11. 如申請專利範圍第6項所述之鐵電電容器,其中該 第一電極層及該第二電極層之其中之一的材質係為該導體 材料,則其中之另一的材質包括鉑。Page 21 13095twf.ptd 200527651 6. Patent application scope-a first electrode layer; a second electrode layer; and a ferroelectric dielectric layer disposed between the first electrode layer and the second electrode layer, wherein the The material of at least one of the first electrode layer and the second electrode layer is a conductive material, and the conductive material can make at least one of the first electrode layer and the second electrode layer have the same properties as the ferroelectricity. The dielectric layer has a similar work function to reduce the Schottky energy barrier between at least one of the first electrode layer and the second electrode layer and the ferroelectric dielectric layer. 7. The ferroelectric capacitor according to item 6 of the scope of patent application, wherein a difference in a work function between at least one of the first electrode layer and the second electrode layer and the ferroelectric dielectric layer is between Between 0 and 0.5 e V. 8. The ferroelectric capacitor according to item 6 of the patent application scope, wherein the conductive material includes a conductive oxide. 9. The ferroelectric capacitor according to item 8 in the scope of the patent application, wherein the conductive oxide includes lanthanum nickel oxide (LaNi03, LN0), rhodium oxide (Ru02), iridium oxide (Ir02), and lanthanum samarium cobalt oxide ( LahSrxCoOs) Among them, the ferroelectric capacitor as described in item 6 of the scope of the patent application, wherein the material of the ferroelectric dielectric layer includes titanium oxide, acid oxide, steel error, group wire acid record, and sharp group wire. One of acid recording, barium titanate and barium titanate recording. 11. The ferroelectric capacitor according to item 6 of the scope of patent application, wherein the material of one of the first electrode layer and the second electrode layer is the conductor material, and the other material includes platinum. 13095twf.ptd 第22頁 20052765113095twf.ptd Page 22 200527651 六、申請專利範圍 1 2 · —種鐵電元 一基底; 一電晶體,配置於該基底上; 一絕緣層,配置於該基底上,且 一插塞,酉己置於讀絕緣層中;以J住該電晶體; 一鐵電電容器,配置於該絕緣芦上 藉由該插塞與該電晶體電性連接,4鐵電鐵電電容器 一第一電極層; 電電容器包括: 一第二電極層;以及 一鐵電介電層,配置在 極層之間·, 第一電極層與該第二電 其中該第一電極 一的材質係為一導體持且層之至少其中之 電極層及該第二電極層二至f二體材料可以使得該第一 ^ ^ ^ ^ t ^ t ^ ^ ^ ^ ^ ^ 第一電極層之至少其中 一 Μ Μ第電極層及該 障。 與該鐵電介電層之間的蕭基能 1 3 ·如申請專利範圍第i 2 導體材料包括一導體氧化第物。項所遮之鐵電元件’其中該 導體V ·几如v申明專fW圍第13項所述之鐵電元件’其中該 t物包括鑭鎳氧化物(LaNi03,LN0)、氧化铑(ru02 _。氧化銥(Ir〇2)以及鑭鳃鈷氧化物(Lai xSrxC〇〇3)其中之 15.如申請專利範圍第12項所述之鐵電元件,其中該Sixth, the scope of patent application 1 2 · a kind of ferroelectric element a substrate; a transistor disposed on the substrate; an insulating layer disposed on the substrate, and a plug, which is placed in the reading insulating layer; The transistor is held by J; a ferroelectric capacitor is disposed on the insulating lug and is electrically connected to the transistor through the plug; 4 the ferroelectric ferroelectric capacitor has a first electrode layer; the electric capacitor includes: a second An electrode layer; and a ferroelectric dielectric layer disposed between the electrode layers. The material of the first electrode layer and the second electrode is the conductor layer and at least one of the electrode layers and The second to f-body materials of the second electrode layer can make at least one of the first and second electrode layers and the barrier of the first ^ ^ ^ ^ t ^ t ^ ^ ^ ^ ^ ^ Xiao Jieneng between the ferroelectric dielectric layer and the ferroelectric dielectric layer. As described in the patent application, the conductor material includes a conductor oxide. The ferroelectric element covered by the item 'wherein the conductor V is almost the same as the ferroelectric element described in item 13 of the fW section of the v statement', wherein the substance includes lanthanum nickel oxide (LaNi03, LN0), rhodium oxide (ru02 _ 15. Of the iridium oxide (IrO2) and lanthanum gill cobalt oxide (Lai xSrxCOO3) 15. The ferroelectric device according to item 12 of the patent application scope, wherein 第23頁 200527651 六、申請專利範圍 鐵電介電層的材質包括鈦锆酸鉛、鈦锆酸鑭鉛、钽鉍酸 勰、鈮钽鉍酸鋰、鈦酸鋇與鈦酸鋰鋇之其中之一。 1 6.如申請專利範圍第1 2項所述之鐵電元件,其中該 第一電極層及該第二電極層之其中之一的材質係為一導體 材料,則其中之另一的材質包括鉑。 1 7. —種鐵電元件,包括: 一基底; 一電晶體,配置於該基底上; 一絕緣層,配置於該基底上,且覆蓋住該電晶體; 一插塞,配置於該絕緣層中;以及 一鐵電電容器,配置於該絕緣層上,且該鐵電電容器 藉由該插塞與該電晶體電性連接,該鐵電電容器包括: 一第一電極層; 一第二電極層;以及 一鐵電介電層,配置在該第一電極層與該第二電 極層之間, 其中該第一電極層及該第二電極層之至少其中之 一的材質係為一導體材料,且該導體材料可以使得該第一 電極層及該第二電極層之至少其中之一具有與該鐵電介電 層相近之功函數,以縮小該第一電極層及該第二電極層之 至少其中之一與該鐵電介電層之間的蕭基能障。 18.如申請專利範圍第17項所述之鐵電元件,其中該 第一電極層及該第二電極層之至少其中之一與該鐵電介電 層之間的功函數的差係介於0 至0 . 5 e V 之間。Page 23 200527651 VI. Patent Application Materials of ferroelectric dielectric layers include lead titanium zirconate, lead lanthanum zirconate titanate, hafnium tantalum bismuth acid, lithium niobium tantalum bismuthate, barium titanate and lithium barium titanate. One. 1 6. The ferroelectric device according to item 12 of the scope of patent application, wherein the material of one of the first electrode layer and the second electrode layer is a conductive material, and the other material includes platinum. 1 7. A ferroelectric element comprising: a substrate; a transistor disposed on the substrate; an insulating layer disposed on the substrate and covering the transistor; a plug disposed on the insulating layer And a ferroelectric capacitor disposed on the insulating layer, and the ferroelectric capacitor is electrically connected to the transistor through the plug, the ferroelectric capacitor includes: a first electrode layer; a second electrode layer And a ferroelectric dielectric layer disposed between the first electrode layer and the second electrode layer, wherein a material of at least one of the first electrode layer and the second electrode layer is a conductive material, And the conductor material can make at least one of the first electrode layer and the second electrode layer have a work function similar to that of the ferroelectric dielectric layer, so as to reduce at least one of the first electrode layer and the second electrode layer. The Schottky barrier between one of them and the ferroelectric dielectric layer. 18. The ferroelectric device according to item 17 of the scope of patent application, wherein a difference in a work function between at least one of the first electrode layer and the second electrode layer and the ferroelectric dielectric layer is between Between 0 and 0.5 e V. 13095twf.ptd 第24頁 200527651 六、申請專利範圍 1 9 ·如申請專利範圍第1 7項所述之鐵電元件,其中該 導體材料包括一導體氧化物。 2 0 ·如申請專利範圍第1 9項所述之鐵電元件,其中該 導體氧化物包括鑭鎳氧化物(LaNi03,LN0)、氧化铑(Ru02 )、氧化銥(Ir02)以及鑭勰鈷氧化物(La卜xSrxCo03)其中之 〇 2 1 .如申請專利範圍第1 7項所述之鐵電元件,其中該 鐵電介電層的材質包括鈦锆酸鉛、鈦錘酸鑭鉛、钽鉍酸 勰、鈮钽鉍酸勰、鈦酸鋇與鈦酸勰鋇之其中之一。 2 2 .如申請專利範圍第1 7項所述之鐵電元件,其中該 第一電極層及該第二電極層之其中之一的材質係為一導體 材料,且其中之另一的材質包括鉑。13095twf.ptd Page 24 200527651 VI. Scope of Patent Application 19 • The ferroelectric device described in item 17 of the scope of patent application, wherein the conductor material includes a conductor oxide. 2 0. The ferroelectric device according to item 19 of the scope of patent application, wherein the conductive oxide includes lanthanum nickel oxide (LaNi03, LN0), rhodium oxide (Ru02), iridium oxide (Ir02), and lanthanum-cobalt oxide The ferroelectric device described in item 17 of the scope of patent application, wherein the material of the ferroelectric dielectric layer includes lead zirconate titanate, lead lanthanum titanate titanate, tantalum bismuth One of rhenium acid, osmium niobium tantalum bismuth acid, barium titanate and barium osmium titanate. 2 2. The ferroelectric device according to item 17 of the scope of patent application, wherein the material of one of the first electrode layer and the second electrode layer is a conductive material, and the material of the other includes platinum. 13095twf.ptd 第25頁13095twf.ptd Page 25
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102751094A (en) * 2011-04-22 2012-10-24 中国科学院微电子研究所 Ohmic contact-based ferroelectric thin film capacitor and preparation method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102751094A (en) * 2011-04-22 2012-10-24 中国科学院微电子研究所 Ohmic contact-based ferroelectric thin film capacitor and preparation method thereof
CN102751094B (en) * 2011-04-22 2015-08-05 华进半导体封装先导技术研发中心有限公司 A kind of ferroelectric capacitor based on ohmic contact and preparation method thereof

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