TW200525272A - Fabrication of a high fill ratio reflective spatial light modulator with hidden hinge - Google Patents

Abstract

Fabrication of a micro mirror array having a hidden hinge that is useful, for example, in a reflective spatial light modulator. In one embodiment, the micro mirror array is fabricated from a substrate that is a first substrate of a single crystal material. Cavities are formed in a first side of the first substrate. Separately, electrodes and addressing and control circuitry are fabricated on a first side of a second substrate. The first side of the first substrate is bonded to the first side of the second substrate. The sides are aligned so the electrodes on the second substrate are in proper relation with the mirror plates that will be formed on the first substrate and that the electrodes will control. The first substrate is thinned to a pre-determined, desired thickness, a hinge is etched, a sacrificial material is deposited, the upper surface of the first substrate is planarized, a reflective surface is deposited to cover the hinge, a mirror is released by etching and the sacrificial layer around the hinge is removed to release the hinge so the hinge can rotate about an axis in line with the hinge.

Description

200525272 (1) 发明. Description of the invention [Technical field to which the invention belongs] The present invention relates to a spatial light modulator (SLM), and more particularly, to having a hidden hinge to maximize the pixel filling ratio, minimize scattering and diffusion, and Micromirror structure for high contrast and high image quality. [Prior art]

Spatial light modulators have different applications in the fields of optical information processing, projection displays, image and graphic monitors, televisions, and electrophotographic printing. Reflective S LM is a spatial pattern that modulates incident light to reflect an image corresponding to electrical or light input. Incident light can be modulated in phase, intensity, or inversion of polarization. Reflective SLM typically contains an area or two-dimensional array of addressable pixels (pixels) capable of reflecting incident light. The key parameters of SL Μ, especially in display applications, are the optically active area to the pixel area (also a part of the SLM surface area that reflects the entire surface area of the SLM as a measurement, also known as the charging ratio). A high charge ratio is required. The conventional SLM has different disadvantages. These disadvantages include, but are not limited to: (]) lower than the optimal optical active area, reducing optical efficiency; (2) rough reflective surface, reducing the reflectivity of the mirror; (3) diffraction and scattering, reducing the contrast of the display; (4) the materials used have long-term reliability issues; and (5) complex processes, which increase overhead and reduce device capacity. Many conventional devices include substantially non-reflective areas on their surface. This provides a low fill ratio and provides sub-optimal reflection efficiency. For example-5-200525272 (2) For example, US Patent No. 4, 2 2 9, 7 3 2 discloses a MOSFET device and a mirror that are not formed on the device surface. These MOSFET devices occupy the surface area, reducing the portion of the device area that is typically optically active and reducing reflection efficiency. A MOSFET device on the surface of the device will also diffract incident light, reducing the contrast of the display. In addition, the strong light from the impacted MOSFET device can charge the MOSFET device and overheat the circuit, thereby interfering with the proper operation of the device.

Some SLM designs have a roughened surface that scatters incident light and reduces reflectivity. For example, in some SLM designs, the reflective surface is an aluminum film deposited on a LPCVD silicon nitride layer. Since the surface of these mirrors is deposited with a thin film, their smoothness is difficult to control. Therefore, the final product has a rough surface, reducing the reflection efficiency.

Another problem with reduced reflection efficiency due to some SLM designs (especially some pendant mirror designs) is the large exposed hinge surface area. These exposed hinge surface areas will cause scattering and diffusion due to the hinge structure. Compared with other parameters, it is not easy to compare. Many conventional SLMs, such as the SLMs disclosed in U.S. Patent Nos. 4; 666, 935, and 5 have hinges made of aluminum alloy. Aluminum, and other metals are susceptible to fatigue and plastic deformation, leading to long-term reliability issues. Moreover, aluminum is susceptible to cellular "memory", in which the remaining positions begin to tilt towards their most frequently occupied positions. In addition, the mirror disclosed in the 4; 5 66 J35 patent is released by removing sacrificial material beneath the mirror surface. This technique usually causes the delicate micromirror structure to break during release. It also needs to have a large gap between the mirrors so that the etchant removes the sacrificial material under the mirrors, reducing -6- 200525272 (3) the part of the device area with low optical activity. Other conventional S LMs require multiple layers, including separation layers for the mirror, hinges, electrodes, and / or control circuits. For example, manufacturing such as multilayer SLM requires the use of multilayer thin film stacking as well as etching techniques and processes. Using these technologies and processes is expensive and results in low productivity. For example, using these techniques often involves large-scale deposition and removal of sacrificial material beneath the mirror. The deposition and stacking of multiple thin films under the surface of the mirror plate will result in a rougher mirror surface, which reduces the reflection efficiency of the mirror. In addition, since there are mirrors and hinges in different layers or substrates, translational shifts are caused when the mirrors are deflected. Due to translational offsets, the mirrors in the array must be spaced apart to avoid mechanical interference between adjacent mirrors. Since the mirrors in the array cannot be set too close to other mirrors in the array, SLM suffers from lower or lower fill ratios than the optimal optical active area. There is a need for SLMs with enhanced reflection efficiency, long-term reliability of SLM devices, and simplified manufacturing processes.

SUMMARY OF THE INVENTION The present invention is a space light modulator (SLM). In one embodiment, the SLM has a reflective selectively deflectable micromirror array made of a first substrate, the first substrate being bonded to a second substrate having individually addressable electrodes. The second substrate also has an addressing and control circuit for the micromirror array. Or the part of the address and control circuit is a circuit and electrode on a separate substrate and connected to the second substrate. The micromirror array includes a highly reflective surface to reflect incident light. 200525272 (4) Ground deflection mirror plate. This first substrate is a single material wafer ', in one example, a single crystal. The spacer support wall provides separation between the mirror plate and an electrode, which is associated with the mirror plate and controls the deflection of the mirror plate. An electrode is provided on the second substrate, and the second substrate is bonded to the micromirror array.

Since the hinge and the mirror plate are in the same base (that is, in the same layer), there is no translational movement or displacement when the mirror rotates about the longitudinal axis of the hinge. Because there is no translational displacement, the gap between the mirror and the support wall is limited only by manufacturing techniques and processes. The tight spacing of the mirror plates and the hinges are substantially hidden below the reflective surface will allow the micromirror array to have a high fill ratio, enhanced contrast, minimize light scattering and diffraction, and practically eliminate the impact of the second through the micromirror array. Light from the circuit on the substrate.

In addition, since the mirror plate and the hinge are made of single crystal silicon material in the preferred embodiment, the resulting hinge is stronger and more reliable and does not actually suffer from memory effects, fractures or fatigue along the grain boundary. Single crystal silicon substrates have significantly fewer micro-defects and fractures than other materials, especially deposited films. As a result, it is less likely to propagate grain boundary fractures (or proliferative microfractures) in the device. Moreover, the use of a single substrate in the present invention will minimize the use of multilayer film stacking and etching processes and techniques. In the present invention, the deposition and removal of the sacrificial material is limited to a local area, that is, around the hinge. Furthermore, the ' sacrifice material need not be removed from under the mirror in the present invention. Therefore, the removal of the sacrificial material is easier 'and the upper surface of the mirror plate will remain smooth, allowing the reflective surface to join a super smooth surface. SLM is manufactured in a few steps, maintaining low manufacturing costs and complexity. A hole is formed in the first side of the brother-base. In parallel, electrodes and addressable and control circuits are fabricated on the first side of the second substrate -8- 200525272 (5). The first side is bonded to the first side of the second substrate. These sides will be relative to the electrodes on the second substrate and will be in contact with the mirror plate that the electrodes will control. The first substrate will be thinned to a predetermined, desired thickness. The sacrifice sacrifice material will be deposited in the area surrounding the hinge, and the planarized deposition surface will be covered to cover the hinge by uranium stenciling and removal A sacrificial layer around the hinge. As a result, it is possible to easily manufacture high optical efficiency S L M to reliably and cost-effectively produce high-quality images. [Embodiment] A reflective spatial light modulator (SLM) 100 has a polarizable array 103. The individual mirrors 202 can be selectively deflected by biasing the mirrors 202 and the corresponding electrodes} 2 6. Each mirror 202 controls the light reflected from the light source to the video display. In this way, controlling the deflection will allow the light hitting the mirror 202 to control the appearance of pixels on the video display in the selected direction. Description of the spatial light modulator is a SLM-like architecture according to an embodiment of the present invention. The illustrated embodiment has three layers. The first layer is the mirror layer. There are multiple deflectable micromirrors 202. In a preferred embodiment, [03] is manufactured from the first substrate] 05, and upon completion of the manufacturing, the first substrate] 05 is a single material such as single crystal silicon. The alignment of the substrate is such that the hinges will be properly closed by the surface to release the deflection between the mirror and the rotating mirror 202. The mirror will shoot 20 02, and because of 1 0 1-1 03, it has a micromirror array. SL M 100200525272 (6) The second layer is an electrode array 104 having a plurality of electrodes 1 2 6 for controlling the micromirror 202. Each electrode 126 is associated with the micromirror 202 and controls the deflection of the micromirror 202. The addressing circuit allows the selection of a single electrode 126, which is used to control a particular micromirror 202 associated with it.

The third layer is the layer of the control circuit 106. This control circuit 106 has an addressing circuit which allows the control circuit 106 to control the voltage applied to the selected electrode 1 2 6. This would allow the control circuit 106 to control the deflection of the mirror 202 in the mirror array 103 via the electrodes 1226. Typically, the control circuit 1 06 also includes display control 1 08, line memory buffer 1 1 0, pulse width modulation array] 1 2 and inputs for video signals 1 2 0 and graphics signals 1 2 2 . In some embodiments, the microcontroller 1 1 4, the light control circuit 1 1 6, and the flash memory 1 1 8 may be external components connected to the control circuit 10 06, or may be included in the control circuit 1 06 in. In different embodiments, certain components of the control circuit 106 listed above may not exist, may be on separate substrates and connected to the control circuit 106, or other added components may exist as control A part of the circuit 1 06 may be connected to the control circuit 1 06. In one embodiment, the second layer 104 and the third layer 106 are fabricated on a single second substrate 107 using semiconductor manufacturing technology. That is, the second layer 104 need not be separated and above the third layer 106. However, the term "layer" helps to memorize the different components of the spatial light modulator IOO. For example, in one embodiment, the second layer 104 of the electrode 12 is fabricated on top of the third layer of the electrical circuit 106, and both are fabricated on a single second substrate] 07. That is, in the conventional embodiment, 'electrode] 2 6 and display control 108, line memory buffer Π 0, and pulse width modulation array] 12 2-10- 200525272 (7) made on a single substrate on. Compared with the display control 1 08, the line memory buffer] 1 0, and the pulse width modulation array 1 12 are conventional liquid crystal display devices made on separate substrates, the control circuit 10 has several functional elements. Integration on the same substrate provides the advantage of increased data transfer rates. In addition, the second layer of the electrode array 104 and the third layer of the control circuit 106 are fabricated on a single substrate 107, which provides the advantages of simple and inexpensive manufacturing, and a lightweight end product.

After the layers 103 and 107 are manufactured, they are joined together to form SLM 00. The first layer with the mirror array 103 covers the second and third layers 104 and 106, collectively 107. The layers below the mirror 202 in the mirror array 103 determine how much space under the first layer 103 is used for the electrodes 12 6 and the addressing and control circuit 106. There is limited space under the micromirror 2 0 2 in the mirror array 1 0 3 for the electrodes 1 2 6 and for the formation of display control] 0 8, the line memory buffer Η 〇, and the pulse width modulation array 1 1 2 of the electronic components. The manufacturing technology used in the present invention allows small feature sizes to be produced, for example, a process that allows 0.18 micron features to be manufactured, and a process that allows 0 to 3 micron or smaller features. Traditional spatial light modulators are manufactured by processes that do not allow such small features. Typically, conventional spatial light modulators are manufactured by processes that restrict feature sizes to feature sizes of about 1 micron or greater. As such, the present invention allows more circuit devices such as transistors to be manufactured in a limited area under the micromirrors of the mirror array 103. This allows items such as display control I 08, line memory buffer 1] 0, and pulse width modulation array]] 2 and electrodes] 2 6 to be integrated on the same substrate. The inclusion of this control circuit on the same substrate] 0 7 as the electrode 2 6 will improve the performance of the SL 10 100. This allows more items such as display control 108, line memory buffer 1] 0, and pulse width modulation array 1 1 2 in the limited area under the micromirror in the micromirror array 103. Integrated with the electrodes 1 2 6 on the same substrate. Including this control circuit on the same substrate 107 as the electrode 126 will improve the performance of S L M] 0 0. In other embodiments, different combinations of the electrodes 126 and the components of the control circuit can be made on different substrates and electrically connected.

In other embodiments, different combinations of the electrodes 126 and the components of the control circuit can be made on different substrates and electrically connected. mirror:

Fig. 2 is a perspective view of an embodiment of a single micromirror 202, and Fig. 2b is a more detailed perspective view of the corner 2 3 6 of the micromirror 202 shown in Fig. 2a. In a preferred embodiment, the micromirror 202 includes at least one mirror plate 204, a hinge 206, a connector 2] 6, and a reflective surface 203. In another embodiment, the 'micromirror 202' further includes a spacer support frame 21, for supporting the mirror plate, the hinge 206, the reflective surfaces 203, and 2] 6. Preferably, the hinge 204 ′ of the mirror plate 204, the connector 2′6, and the spacer support frame 2 10 are made of a single material wafer such as single crystal silicon. As such, the first substrate 105 series single crystal silicon wafer shown in FIG. 1 in this embodiment. Fabricating a micromirror 200 from a single material wafer will greatly simplify the fabrication of the mirror 200. In addition, single crystal silicon can be polished to produce a smooth mirror surface. The surface roughness of this smooth mirror surface is smoother than the surface roughness of the deposited film. The mirror 202 made of monocrystalline silicon is mechanically rigid, preventing unnecessary mirror surfaces from bending or rolling _ 12- 200525272 (9)

And hinges made of monocrystalline silicon are stronger, more reliable, and virtually unaffected by the memory effects common to hinges made of many other materials used in micromirror arrays, and fractures along grain boundaries. influences. In other embodiments, other materials may be used instead of single crystal silicon. One possibility is to use other types of silicon (such as polycrystalline silicon or amorphous silicon) in the micromirror 202, or to make the mirror 202 entirely from a metal (such as an aluminum alloy or a tungsten alloy). Moreover, the use of single crystals in the present invention can avoid the use of multilayer film stacking and etching processes and techniques. As shown in FIGS. 2a-b, 3, 4a-b, 7a, and 8 and as described above, the micromirror 202 has a mirror plate 204. The mirror plate 204 is part of the micromirror 202, which is coupled to the hinge 206 with a connector 216 and is selectively deflected by applying a bias voltage between the mirror 202 and the corresponding electrode 1 2 6. The mirror plate 204 in the embodiment shown in Fig. 3 includes triangular portions 204a4 and 204b. In Figure 12a,

In the embodiments shown in Figs. 12b and 13, the shape of the mirror plate 204 is substantially square, and for an approximate area of 25 microns square, it is almost 15 microns by 5 microns, but other shapes and sizes are also possible . The mirror plate 204 has an upper surface 205 and a lower surface 201. The upper surface 205 is preferably a highly smooth surface with an average roughness of less than 2 angstroms and preferably constitutes a large portion of the surface area of the micromirror 204. On the upper surface 205 of the mirror plate 204 and above the portion of the hinge 206, a reflective surface 203 such as aluminum or any other highly reflective material is deposited. Preferably, the reflective surface 203 has a thickness of 300 people or less. The thinness of the reflective surface or material 203 ensures that it inherits the smooth surface of the upper surface 205 of the mirror plate 204. The area of this reflecting surface 20 03 is larger than the area of the upper surface 250 of the mirror plate 04 and the deviation of the mirror plate 04 is -13- 200525272 (10)

The angle determined by the rotation 'reflects the light from the light source. Note that the torsion spring hinge 206 is formed below the upper surface of the mirror plate 204 and is substantially hidden by the reflective surface 2 0 3 deposited on the upper surface 205 and above the portion 206 of the hinge. The difference between Figs. 2a and 3 is that the mirror plate 204 shown in Fig. 2a has a reflective surface 203 added to the upper surface 2 05 and substantially conceals the hinge 206, while the mirror plate 204 shown in Fig. 3 does not have a reflective surface 203. Therefore, the hinge 206 is exposed. Since the hinge 206 and the mirror plate 204 are in the same base 105, and as shown in FIGS. 7a and 7b, the center height 796 of the hinge 206 and the center height 795 or 797 of the mirror plate 204 are substantially coplanar. When the longitudinal axis of the hinge 206 is rotated, there is no translational movement or displacement. Because there is no translational displacement, the gap between the mirror plate 20 04 and the spacer wall of the spacer support frame 210 is limited only by the manufacturing technology and process, and is typically less than 〇 · 1. The tight spacing of the mirror plate 04 and the hinge 2 06 are substantially hidden under the reflective surface 230, allowing the micromirror array 10 to have a high fill ratio, increased contrast, minimal light scattering and diffraction, and substantial Eliminate the light passing through the micromirror array 103 from impacting the circuit on the second substrate]. As shown in Figure 23-1>, 3, 43-13, 73, 8, 23], 1213, and 3], the mirror plate 204 is connected to the torsion spring hinge 206 through the connector 2] 6. The torsion spring hinge 2 0 6 is connected to the spacer support frame 2] 0, and the support frame 2 1 0 holds the torsion spring 206, the connector 2] 6 and the mirror plate 204 in place. The hinge 206 includes a first arm 206a and a second arm 206b. As shown in FIGS. 3 and 3, one end of each arm 206a and 206b is connected to the spacer support frame 2] 0, and the other end is connected to the connector 2 1 6. In another embodiment, the mirror plate -14-200525272 (11)

2 04, hinges 206, and spacer support frame 201 use other springs, hinges and connection design. As shown in FIGS. 3 and 4a, the torsional hinge 2 0 6 is preferably oriented diagonally with respect to the spacer support wall 2 1 0 (for example, a 45 degree angle) and divides the mirror plate 2 04 into two Partial or plural sides: first side 204a and second side 204b. As shown in FIG. 7b, the two electrodes 126 are associated with the mirror 202, an electrode 126a for the first side 204a, and an electrode 126b for the second side 204b. This allows the side 204a or 204b to attach under one of the electrodes 126a or 126b and pivot downwards as well as provide a wide range of angular motion. When a voltage is applied between the mirror 202 and the corresponding electrode 126 to apply a force such as an electrostatic force to the mirror plate 204, the torsion spring 206 allows the mirror plate 204 to surround the longitudinal axis of the hinge 206 with respect to the spacer The support frame 2 10 rotates. This rotation creates an angular deflection to reflect light in the selected direction. Since the hinge 206 and the mirror plate 204 are in the same base 105, and as shown in FIGS. 7a and 7b, the center height 796 of the hinge 206 and the center height 7 95 or 797 of the mirror plate 204 are substantially coplanar, so 2 0 2 will move purely around the hinge 2 6 without translational displacement. In one embodiment, as shown in Figs. 7a and 8, the torsion spring hinge 206 has a width 222, which is smaller than the depth 223 of the hinge 206 (perpendicular to the upper surface 2 05 of the mirror plate 204). The width 222 of the hinge 206 is preferably between about 0.12 micrometers and about 0.2 micrometers, and the depth is preferably between about 0.2 micrometers and about 0.3 micrometers. As shown in Figures 2 a-b, 3, 4 a-b, 6, and 7 a, the spacer support frame 2] 〇 position the plate 2 〇4 at the electrode] 2 6 and a predetermined distance above the addressing circuit, So that the mirror plate 204 can be deflected downward to a predetermined angle. As shown in Figure-15-k 200525272 (12) 2a, 4a, 2a and 13, the spacer support frame 2] 〇 Includes the spacer support wall 'The spacer support wall is preferably made of the same first substrate] 〇5 Formed and preferably orthogonally positioned. These walls help to define the height of the spacer support frame 21. According to the required separation between the mirror plate 204 and the electrode 126, and the design of the electrode web, the height of the spacer support frame 210 is selected. The larger localization allows more deflection of the mirror plate 204 and a higher deflection angle. Larger deflection angles usually provide higher contrast. In one embodiment, the deflection angle of the mirror plate 204 is 2 degrees. In the preferred embodiment, the mirror plate 204 can be rotated up to 90 degrees if it is supplied with sufficient intervals and driving voltages. The spacer support frame 2 10 also provides support for the hinge 206 and spaced the mirror plate 204 from the other mirror plate 204 of the mirror array 103. The spacer support frame 2 1 0 has a spacer wall width 2 1 2. When a gap between the mirror plate 2 0 4 and the support frame 2 1 0 is added, the spacer wall width 2] 2 is substantially equal to the adjacent micromirror. The distance between 2 0 2. _ In one embodiment, the spacer wall width 2! 2 is] micrometers or less. In a preferred embodiment, the spacer wall width 2 1 2 is 0.5 microns or less. This will set these mirror plates 204 close together to increase the fill ratio of the mirror array 103. In some embodiments, the micromirror 202 includes an element 405a or 405b, and when the mirror plate 204 is deflected downward to a predetermined angle, the element 405a or 400b stops the deflection of the mirror plate 204. Typically, these elements include a stop 405a or 405b and a landing tip 7a or 710b. As shown in Figures 4a, 6, 7a, 8, 13 and 5], when the mirror surface 204 is deflected, the stopper 4 0 5 a or 4 0 5 b on the mirror plate 204 will contact the landing tip 7 1 0 (7 ] 0 a or 7 1 Ob). When this happens, the mirror plate 204 will not be further deflected. Stopper -16-200525272 (13)

There are several possible configurations for the 405a or 405b and the land-tip 7] 0a or 7 10b. In the embodiments shown in FIGS. 4a, 6, 7a, 8,] 3 and] 5, the stopper is a cylindrical or mechanical stopper 405a or 405b 'attached to the lower side of the mirror plate 204 The surface 201 and the landing tip 710 are corresponding circular regions on the second substrate. In the embodiments shown in Figs. 7a, 7b and 8, the 'landing tips 7 1 0a and 7 1 Ob are electrically connected to the spacer support frame 2 1 0, and therefore have zero relative to the stopper 405a or 405b. Voltage difference to prevent the stopper 405a or 40b from sticking or welding to the landing tip 71a or 710b, respectively. In this way, when the mirror plate 2 04 is rotated relative to the spacer support frame 2 10 beyond a predetermined angle (determined by the length and position of the mechanical stopper 405 a or 405b), the mechanical stopper 4 0 5 a or 40 5 b will come into physical contact with the landed tip 710a or 710b, respectively, and prevent any further rotation of the mirror plate 204.

In a preferred embodiment, the stopper 405a or 405b is formed by the first base 105 and the same as the mirror plate 204, the hinge 206, the connector 2 16 and the spacer support frame 2] 0. Made of materials. The landing tip 7 1a or 7] b is also preferably made of the same material as the stopper 4a or 405b, the hinge 206, the connector 216, and the spacer support frame 2] 0. In the embodiment of the material monocrystalline silicon, the stopper 405a or 405b and the landed tip 7] 〇3 or 7] 〇b are therefore made of a hard material with a long working life, which allows a mirror array! 03 for a long time. In addition, since the single crystal sand is a hard material, the stopper 405a or 405b and the landing land 7] 0a or 7] 〇b can be made of a small area. In this small area, the stopper 4 5 0 a or 4 5 0 b will touch the landing tip 7] 0 a or 7 1 0 b, respectively, greatly reducing the adhesive force and allowing the mirror plate 2 to freely deflect -17-200525272 (14). And 'this thinking means that the stopper 4 5 a or 4 0 5 b and 7] 0 a or 7 1 0 b is maintained at the same potential, preventing the stopper 405b and the landing land tip 710a or 710b from being at different potentials Adhesion that occurs after charge injection. The invention is not limited to elements or techniques that stop the deflection of 204. You can use any of the components and techniques in this technique. Figure 4a is a perspective view showing the supporting wall 2 1 0, the mirror plate 2 4 (including the side 2 4 a and 2 0 4 b, with the surface 205 and the lower surface 201), the hinge 206, and the connector under the single micromirror 202 216 and moving parts 4 5 a and 4 5 b. Fig. 4b is a more detailed perspective view of the micromirror 2 3 7 shown in Fig. 4a. FIG. 5 is a perspective view showing the top and sides with the micromirrors 202-1 to 202 mirror array 103. Although FIG. 5 shows a micromirror array 103 having three columns for a total of nine micromirrors 202, other micromirror arrays 103 are also possible. Typically, each micromirror is a pixel on a 202 video display. As such, a column with more micromirrors 202 will provide a video display with more pixels. As shown in FIG. 5, the surface of the micromirror array] 03 has a large 塡, that is, most of the surface of the micromirror array 103 is made of the micromirror 2 02 surface 230. Micromirror array] Very small portions of the surface of the 3 are reflective. As shown in FIG. 5, the non-reflection of the surface of the micromirror array] is a region between the reflective surfaces of the micromirror 202. For example, the width of the area between 202 -1 and 2 02 -2 is supported by the spacer 2] 2 and micromirror 2 0 2 ·] and 2 02-2 mirror plate 204 and the spacer 陆 LU tip 4 0 5 a or i welding or any of the above-mentioned mirror plate 1, including the mechanical stop corner -9 of the table above and the three rows corresponding to a larger array charge ratio. The reflection part is the non-radiation part. The width of the mirror wall and the supporting wall -18-200525272 (15)

2] The total width of the gap between 〇 is determined. Note that although the single mirror 202 is described as having its own spacer support frame 210 as shown in FIGS. 2a, 2b'3, 4a, and 4b, typically, for example, in the mirrors 2 02-1 and 202-2, etc. Between the mirrors, there are no two separate adjacent spacer walls 2]. However, there will typically be a solid spacer wall of the support frame 21 between the mirrors 202-1 and 20-2. Since there is no translational displacement when the mirror plate 204 is deflected, the gap and the spacer wall width 2 1 2 can be made and the feature size supported by the manufacturing technology is generally small. Therefore, in one embodiment, the gap is 0.2 μm, and in another embodiment, the gap is 0.1 3 μm or less. Since the semiconductor manufacturing technology allows a smaller size, the size of the spacer wall 2 10 and the gap can be reduced to allow a higher charge ratio. Embodiments of the present invention allow high charge ratios. In the preferred embodiment, the charge ratio is 96% or more.

FIG. 6 is a perspective view showing the bottom and sides of the micromirror array 103 with nine micromirrors. As shown in FIG. 6, the support wall of the spacer support frame 2 10 of the micromirror 202 defines a cavity under the mirror plate 204. These cavities provide space for the mirror plate 204 to deflect downwards, and also allow a large area under the mirror plate 204 to be used to configure the second layer 1 (M) with electrodes 26 and / or for the third layer with the control circuit 106. Fig. 6 also shows the lower surface 201 of the mirror plate 204 (including the sides 2 04a and 2 04b), and the spacer support frame 210, the torsion spring hinge 206, the connector 2] 6, and the stoppers 405a and 405b. Bottom. As shown in Figures 5 and 6, very little light orthogonal to the mirror plate 2 0 4 can pass through the micro mirror array 1 0 3 and reach any electrode or control circuit below the micro mirror array 1 0 3] This is because the spacer 2 1 0 and the mirror plate -19- 200525272 (16) 2 0 4 on the upper surface 2 0 5 and above the part of the hinge 2 0 6 almost completely cover the micromirror The circuit under the array 103. And the spacer support frame 2] 0 will separate the mirror plate 04 from the path of the micromirror array 103, so go at a non-vertical angle to the mirror plate 04 and pass outside the 04 Light easily hits the wall of the spacer support frame 2 10 and under the micromirror array 103. As the light incident on the micromirror array 103 will reach Therefore, the SLM 100 can avoid the problems related to the collision of strong light. These problems include heating the circuit with incident light and charging circuit components with photons, both of which can cause circuit failure. Figure 12a is another aspect of the present invention. A view of the micromirror 202 of an embodiment, FIG. 1 2 b is a more detailed view of the corner 2 3 8 of the micromirror 2 02. The torque hinge 2 06 and the spacer support frame 2 spacer support wall in this embodiment Parallel. The bias between the mirror plate 204 and the corresponding electrode 126 causes the mirror plate 204 to selectively deflect toward the electrode. FIG. 1: The illustrated embodiment provides smaller than the 202 shown in FIGS. 2a and 2b with a diagonal hinge 206 The total range of angular motion, this range starts from the height of the phase wall. However, as in the embodiment shown in Figures 2a and 2b] the hinge 2 0 6 in the embodiment shown in 2 a and 1 2 b is at Below the upper surface of the mirror plate and concealed by the reflective surface 2 03, resulting in SL Μ with high optical efficiency, high contrast, low light diffraction and scattering, and reliable and effective performance. Figure 1 2 b is a micromirror A detailed perspective view of the corner of 2 0 2 and shows the mirror plate 2 04, the hinge 2 06, and the spacer frame 2 ] 0 of the support wall and reflective surface 2 0 3. Figure] 3 shows the lower side of the single 2 02, which includes the hinge 2 0 6, connector 2] 6 and. The radiation surface, because the lower electricity to the mirror plate will not be a small amount The impact circuit and the incident stereoscopic view I 0 are applied with the same mirror support as shown in 2a. The filling ratio of FIG. 204 and the cost of the spacer are supported by a micromirror stopper -20- 200525272 (17) 4 0 5 a. In other embodiments, the hinge 206 may be substantially parallel to one side of the mirror plate 204 and still be arranged to divide the mirror plate 204 into two sections 405a and 405b. Figures 14 and 15 provide perspective views of a micromirror array composed of multiple micromirrors 202 as shown in Figures 12a, 2b, and 13. Manufacturing of space light modulators

Fig. 9a is a flowchart showing a preferred embodiment of how to fabricate a spatial light modulator. Figures 9b to 9m show the preferred manufacturing method of the spatial light modulator 100 in more detail, and Figures 16a to 6e and Figures 9e to 9m show another preferred manufacturing method.

Referring to FIG. 9a, a mask is generated to initially fabricate the micromirror 202. The preferred embodiment of this mask 100 is shown in FIG. 10 and defines a region 9 from which a side of the first substrate 105 will be etched to form a cavity on the lower side of the micromirror array 103. 4. These caves define a spacer support frame 210 and a support wall. As shown in FIG. 10, the area 1000 of the mask 1000 is a photoresist material or other dielectric material such as silicon oxide or silicon nitride that can prevent the underlying first substrate 105 from being etched. The area 1 2 shown in the figure 0 is the area of the exposed substrate to be etched to form a cavity] 0 5. The unetched area 1004 will maintain and form the spacer support wall in the spacer support frame 2] 0. In one embodiment, the first substrate 105 is etched in a reactive ion etching chamber having SF6, HBr, and oxygen having flow rates of 100 sccm, 50 seem, and 10 sccm, respectively. The operating pressure is in the range of 0 to 50 m Torr, the bias power is 60 W, and the source power is 300 W. In another embodiment, the flow rates are -21-200525272 at 0 0 s c c m, 50 0 s c c m, and 10 s c c. M, respectively (18)

In the reactive ion etching chamber of Ch, HBr, and oxygen, the first substrate 105 and the first substrate 105 are etched. In these embodiments, the ' etch process is stopped when the cavities are approximately 34 microns deep. This depth can be measured using in-situ depth monitoring, such as in-situ optical jammer technology, or timed at the etch rate.

In another embodiment, a cavity is formed in the wafer by an anisotropic reactive ion etching process. The wafer system is placed in a reaction chamber. SF6, HBr, and oxygen were introduced into the reaction chamber at a total flow rate of 50 sccm, 50 seem, and 20 seem, respectively. Under a pressure of 50m Torr, a bias power setting of 50W and a source power of 150W are used for about 5 minutes. Next, the wafer was cooled with a helium gas flow at 20 seem on the back side of the pressure lm torr. In a preferred embodiment, the etching process is stopped when the cavities are about 3-4 microns deep. This depth is measured using in-situ depth monitoring, such as in-situ optical scrambler technology, or timed at the etch rate.

A standard technique such as lithography can be used to create a mask on the first substrate 105. As described previously, in a preferred embodiment, the micromirror 202 is formed of a single material such as single crystal silicon. As such, in a preferred embodiment, the first substrate 105 is a single crystal silicon wafer. Note that typical multiple micromirror arrays used in multiple SLM 100s are fabricated on a single wafer and later divided to produce a micromirror array 103 structure that is typically larger than CM 0 The features used in the S circuit are such that it is quite easy to form the micromirror array using a conventional technique for manufacturing a C M 0 S circuit. Fig. 9b is a cross-sectional view showing the first substrate 105 before manufacturing. The substrate 105 initially includes a device layer having a predetermined thickness] 6] 5. Insulation oxidation -22-200525272 (19) Physical layer] 6] 0 and operation substrate] 6. The device layer] 6 is located on the first side of the substrate 105 and the operation substrate 16 is located on the second side of the substrate 5. In a preferred embodiment, the device layer 16 15 is made of a single crystal silicon material and has a thickness between about 2.0 microns and about 3.0 microns. Use any standard insulator sanding (S Ο I) process known in the art to manufacture the substrate 105 as shown in Figure 9b, or to a silicon wafer supplier such as Soitec, Shinetsu, or Silicon Genesis Purchase substrate 1 05.

Referring to FIG. 9b, the shallow hole 198 will be etched into a device layer on the second side of the first substrate 105] 6 1 5. Details of the etching are described in the above paragraph. The etching depth is almost so far as the distance between the ends of the movers 4 5 a and 4 5 b (to be formed) and the second substrate (after the second substrate is bonded to the first substrate, as described below). The distance of this depth] 97 determines the length of the stoppers 405a and 405b that are finally manufactured in the subsequent etching step. As shown in FIGS. 9c and 9d, the lithography technique is preferably used to etch the stoppers 4 5 a and 4 5 b from the device layer 16] 5 of the first substrate 105. Again, the details of the etching are described in the above paragraph. Figures 16a-16e show another method of manufacturing a first substrate with holes] 05. FIG. 16a is a cross-sectional view of the first substrate before manufacturing. Similar to the first substrate 105 in FIG. 9b, the first substrate 105 in FIG. 16a initially includes a device layer 16] 5 having a predetermined thickness, an insulating oxide layer] 610, and an operation substrate 1605. The device layer] 6] 5 is located on the first side of the substrate 105, and the operation substrate 1605 is located on the second side of the substrate 105. Use any standard silicon-on-insulator (S 01) process known in the art to make this first substrate], or purchase a substrate from the above company. In the preferred-23- 200525272 (20) embodiment, the device layer] 6] 5 is made of a single crystal silicon material, and as shown in FIG. 16e, the device layer] 6] 5 has a predetermined thickness i6l5a on the top, It is preferably between 0.2 micron and 0.4 micron. The thickness of this top portion 1615a of the device layer is finally approximately the thickness of the mirror plate 204 finally made. Referring to FIG. 16b, after obtaining (manufacturing or purchasing) the first substrate 105 having layers] 6] 0 and 1615 and the substrate 1605 described in the previous paragraph, the device layer 1 of the first substrate 105 6] 5 A dielectric material such as silicon oxide 1 6 2 0 is deposited thereon. Then using the standard lithography and etching techniques known in this art, the dielectric material 1 62 0 is etched to create an opening at a predetermined position where the support wall of the spacer support frame 210 will be provided;! 6 2 5 and} 6 2 6 . As shown in Figure 6c, the mask and openings 1625 and 1626 are produced by the melted dielectric material 1620 for subsequent processing steps. In the preferred embodiment shown in FIG. 16c, the epitaxial growth process is used, and the single crystal silicon material in the coating layer 1615 is used as the “seed” dielectric material for epitaxial growth; 6 A single crystal silicon material, a polycrystalline silicon material, 162 μm and MW were grown in the openings of 20, 1625 and 1626. Typically, the materials grown in the openings M1 and M6 are the same materials as the device layer] 6 (or seeds) and have the same crystal structure as the device M1 6 1 5. Among the materials shown in Fig. Ic, the single crystal silicon materials 16'7 'and 1628's grown will eventually become micromirror arrays]. 03's spacer support frame 21o. Take 1 m to remove the dielectric material] 6 2 0, resulting in the structure shown in Fig. 6 e. O 夺 Shi Tian, purchase η ΜΠ ^ ° 6 e without the stopper 4 0 5 a or 4 0 5 b New Year's Eve f, to see it ^) has the same structure as the first substrate 105 -24-200525272 (21) shown in Figure 9d. However, given the above description, those skilled in the art will know how to add the stoppers 4 5 a and 4 5 b to the structure shown in FIG. 16 e. For example, the stoppers 4 5 a and 4 5 b can be melted and grown like the support walls of the spacer support frame 2 1 0. As such, FIGS. 16a to 6e provide another method for fabricating a cavity in the first substrate 105, and for the first substrate

The thickness of the top of the device layer 1 6 1 5 1 6 1 5 a is precisely controlled. By completing the steps shown in Figs. 9e to 9m, a hidden hinge with a high fill-to-reflection ratio reflective spatial light modulator 100 will be fabricated.

Returning to FIG. 9a, separate from the hole manufacturing in the first substrate 105, as shown in FIGS. 9a and 9e, (9 0 6) is formed on the first side 7 0 3 of the second substrate 10 7 Or all electrodes 1 2 6. Addressing and control circuit} 〇6. The second substrate 107 may be a transparent material such as quartz, or other materials. If the second substrate is quartz, the transistor may be made of polycrystalline silicon relative to crystalline silicon. (906) circuits are preferably formed using standard CMOS manufacturing techniques. For example, in one embodiment, the control circuit formed on the second substrate 107 by the manufacturing 906] includes a memory cell array, a column addressing circuit, and a row data loading circuit. There are many different ways to make circuits that perform addressing functions. The generally known DRAM, SRAM, and shackle devices all perform an addressing function. Since the mirror plate 204 is quite large on a semiconductor scale (for example, the mirror plate 204 may have an area of 225 square micrometers), a complex circuit can be manufactured under the micromirror 202. Possible circuits include, but are not limited to, a storage buffer that stores time-sequential pixel information, a circuit that compensates for possible non-uniformity of the separation distance between the mirror plate 2 04 and the electrode 1 26 by different voltage levels] 2 6 , -25-200525272 (22) Circuit for performing pulse width modulation conversion.

The control circuit 106 is covered by a passivation layer such as silicon oxide or silicon nitride. Next, a metallization layer is deposited. This metallization layer is patterned and etched to define electrodes 1 2 6 and, in one embodiment, a bias / reset bus. The electrodes 1 2 6 are arranged during manufacturing so that one or more electrodes 1 2 6 correspond to each micromirror 202. Regarding the first substrate 105, a plurality of sets of circuits to be used in a plurality of SLMs 100 are typically formed on a second substrate 107 to be separated later.

As shown in FIGS. 9a and 9e, the first substrate 105 shown in FIG. 9d or 16e is then bonded to the second substrate 107. As shown in FIG. 9f, the first substrate 105 has a top layer 95 on the side opposite to the second substrate 107. The side of the first substrate 105 having the holes and stops 4 0 5 a and 4 5 b will be joined (9 1 0) to the side of the second substrate having the electrodes 1 2 6. The substrates 105 and 107 are aligned so that the electrodes on the second substrate 107 are in a proper position to control the deflection of the micromirrors 203 in the micromirror array 103. In one embodiment, 'using a bifocal microscope, align the pattern on the first substrate 105 with the pattern on the second substrate 107 to align the two substrates] 05 and 107, and, The two substrates 105 and 107 are bonded by a low temperature bonding method such as anode or eutectic bonding. In a preferred embodiment, this joint 9 10 occurs at any temperature below 400 degrees Celsius, including room temperature. For example, 'a thermoplastic or dielectric rotating glass bonding material can be used, so that the substrate] and 5 can be bonded thermo-mechanically. Bonding 9 1 0 ensures good mechanical adhesion between the first substrate 05 and the second substrate] 07, and also ensures that this adhesion can occur at room temperature. Fig. 9e is a cross-sectional view showing the first substrate] 05 and the second substrate] 07 joined at -26-200525272 (23). There are many possible alternative embodiments of the fabrication 906 of the second substrate.

After joining (910) the first substrate 105 and the second substrate 107 together, the top layer 905 of the first substrate 105 is thinned (9 1 2) to a predetermined required thickness as shown in FIGS. 9f and 9a. First, typically by honing and / or etching to remove the operating substrate 1660 shown in FIG. 9f or FIG. 16e, and then using any conventional oxide stripping technique known in the art , Stripping the oxide layer 16 1 0. The oxide layer 1 6 1 0 is used as a stop sign of the thinning step 9 1 2 and is disposed inside the first substrate to produce a thinned first substrate 105 having a desired thickness. The thinning process involves honing and / or etching, preferably a silicon etch-back process such as wet etching or plasma etching. As a result, the upper surface 2 05 of the first substrate 105 will eventually form the upper surface 2 0 5 of the mirror plate as shown in Figs. 3, 7a, 8 and 9m. In the preferred embodiment, the final thickness of the resulting first substrate 105 is several microns. Next, using a two-step etching process, the (91 3) hinge is etched

2 06. First, as shown in FIG. 9g, the upper surface 205 of the first substrate 105 is etched to form a groove 9110. This ensures that the hinge 206 to be formed in the groove 9] 0 is substantially disposed below the upper surface 205 of the first substrate] 05. At the end of the process, this upper surface 205 will become the upper surface 205 of the mirror plate 204. Secondly, as shown in FIGS. 9 h and 9 a, the first substrate 5 is etched again to substantially release the hinge 2 06 from the mirror plate portion 9] 5 of the first substrate 5. As shown in the examples shown in FIGS. 3, 4 a, 4 b,] 2 a,] 2 b, and 1 3, the ends of the hinges 206 remain connected to the spacer support frame 2 1 0 Support wall. First substrate] 05 mirror plate portion 9] 5 will form the mirror of the micromirror 202-27- 200525272 (24) plate 204. In one embodiment, the hinges 206 are etched into the decoupling plasma source chambers of C2, 02, and & at flow rates of 100 Sccm, 20 sccm, and 50 seem respectively. The operating pressure is in the range of 4 to 10 m τ 〇 r r, the bias power is 40 W, and the source power is 15 00 W. Depth is measured using in-situ depth monitoring, such as in-situ optical scrambler technology, or timing at the etch rate.

Next, a sacrifice material 9 2 0 such as photoresist is deposited (9 1 4) on the first substrate 105, as shown in FIGS. 9i and 9a, on the hinge 206 and the gap around it, and the first substrate 105 The gap on the upper surface 2 0 5 includes the gap between the hinge 2 06 and the mirror plate portion 9 1 5 of the first base 105. Photoresist can be simply spin-coated on a substrate.

As shown in FIGS. 9 j and 9 a, the first substrate 105 having the sacrificial material 902 is then etched back using an etch-back step, chemical mechanical processing (CMP), or any other process known in the art. Flattening (915). This process ensures that the sacrificial material 9 2 0 remains only on and around the hinge, but not on the upper surface 205 of the first substrate 105. Note that in the planarization step, since the sacrificial material 9 2 0 is removed from the upper surface of the first substrate 105, the removal is quite easy. As shown in FIGS. 9k and 9a, a reflective surface is deposited on the flattened surface (including the upper surface 205 of the mirror plate 204 and the upper portion of the hinge 206 covered by the sacrificial material 920). To produce a reflective surface 2 0 3. As described above, the area of the reflective surface 203 is larger than the area of the upper surface 205 of the mirror plate 2 04. The reflective surface is preferably aluminum or any other reflective material known in the art, and preferably has a thickness of 300 A or thinner -28- 200525272 (25) degrees. The reflective surface 203 covers the upper surface 205 of the first substrate 5 and the area above the portion of the chain 206. Figure 9k is a cross-sectional view showing the deposited reflective surface 203. The thinness of the reflective surface 203 ensures that it inherits the flat, smooth features of the upper surface 205 of the mirror plate 204. As shown in FIGS. 9 1 and 9 a, the reflective surface 203 and the mirror plate portion 9 1 5 will be etched (9] 7) to release the mirror plate 20 04 from the mirror plate portion 9 1 5 of the first substrate 105. Preferably, the etching of the reflective surface 20 03 and the mirror plate portion 9 1 5 is performed in the same chamber. In a preferred embodiment, the reflective surface 203 is an aluminum material, and a decoupling plasma source of C 12 ′ BC1S and N 2 gas is introduced at a flow rate of 40 sccm, 40 scmm, and 10 scmm, respectively. In the chamber, the reflective surface is etched (9) to 7). The operating pressure is 10 m Torr, the bias power is 75 W, and the source power is 800 W. Use in-situ depth monitoring, such as in-situ optical jammer technology, or time the etch rate to measure depth. After the (9 1 7) reflective surface 2 0 3 is etched, in a preferred embodiment, Η B r, C are then introduced at a flow rate of 90 sccm, 5 5 scmm, and 5 scmm, respectively] 2. BC] In the decoupling plasma source chamber of 3, and 0 2 gas, the lower mirror plate portion 9] 5 made of silicon is etched (917). The operating pressure is 5 m Torr, the bias power is 75 W, and the source power is 500 W. Use in-situ depth monitoring, such as in-situ optical jammer technology, or timing at the etch rate to measure depth. After etching the reflective surface 20 03 and the mirror plate portion 9 15, the mirror plate 204 is released; however, the hinge 206 is still fixed in place by the sacrificial material 920. As a result, the mirror plate 204 and the micromirror as a whole cannot rotate around the hinge 206 'to ensure the viability of the device in subsequent process steps. -29- 200525272 (26)

The final step in the fabrication of the micromirror 2 0 2 is to remove (9 1 8) the remaining sacrificial material 9 2 0 on and around the hinge 2 0 6. Note that since the sacrificial material 9 2 0 is not under the mirror plate 204 or the mirror 202, it is relatively easy to remove the remaining sacrificial material 92 0 on and around the hinge 206. Due to the adhesion problems associated with wet processing, dry processing such as plasma etching is preferred. In one embodiment, the sacrificial material 920 is a photoresist material, which is removed by etching in a plasma chamber. After the sacrificial material 92 0 is removed (918), the hinge 206 is released and the mirror plate 20 04 is free to rotate about the hinge 20 6. By following the above manufacturing steps, as a result, the hinge 206 is substantially formed below the upper surface 205 of the mirror plate 204 and is reflected by the reflection on the upper surface 230 of the mirror plate 204 and above the portion of the hinge 206 The surface 2 0 3 is hidden.

In some embodiments, the micromirror array 103 is protected by a piece of glass or other transparent material. In one example, during the fabrication of the micromirror array 103, an edge is left around the periphery of each micromirror array 103 made on the first substrate 105. In order to protect the micromirror 202 in the micromirror array 103, as shown in FIG. 9a, a piece of glass or other transparent material is bonded (9] 9) to the edge. This transparent material protects the micromirror 202 from object damage. In an alternative embodiment, lithography may be used to create an edge array in a photosensitive resin layer on a glass plate. Then, epoxy is applied to the upper edge of the edge, and the glass plate is aligned and attached to the finished reflective SLM I 00. As described above, a plurality of SLMs may be fabricated from the two substrates 105 and λ. A plurality of micromirror arrays] can be fabricated in the first substrate], and a plurality of sets of circuits can be fabricated or formed in the second substrate 107. Manufacturing multiple -30- 200525272 (27) S LM 1 0 0 will increase the efficiency of the space light modulator] ο 〇 process. However, if multiple SLMs are manufactured once, they must be divided into individual SLM 100s. There are many ways to separate each spatial light modulator] and make it usable. In the first method, each spatial light modulator 100 is cut into grains and separated from the remaining SLM 100 on the bonded substrates 105 and 107 (92 0). Next, each separated spatial light modulator 100 is packaged using standard packaging techniques (922).

In a second method, wafer-level wafer-scale packaging is performed to package each SLM 100 in a separate cavity and form electrical leads before the SLM 100 is separated. This further protects the reflective deflectable element and reduces packaging costs. In one embodiment of this method as shown in FIG. 9a, the back side of the second substrate 107 is connected to the solder bumps (924). Next, the back side of the second substrate 107 is etched (926) to expose the metal connector formed during the manufacturing of the circuit on the second substrate 107. Next, a wire is deposited (92 8) between the metal connector and the solder bump to electrically connect the two. Finally, multiple SLMs are separated by grains (93 0). Fig. 1 is a perspective view of an embodiment of an electrode 1 2 6 formed on a second substrate 107. In this embodiment, each micromirror 202 has a corresponding electrode 1 2 6. In the embodiment shown here, the electrodes] 2 6 are made higher than the other parts of the circuit on the second substrate. In a preferred embodiment, the electrodes 1 2 6 are disposed at the same level as the other parts of the circuit on the second substrate. In another embodiment, the electrodes 1 2 6 extend above the circuit. In one embodiment of the present invention, the electrodes 1 2 6 are connected to individual aluminum pads under the micromirror plate. The shape of the electrodes depends on the embodiment of the micromirror 202. For example, in the embodiment shown in Figures -31-200525272 (28) 2 a, 2 b, and 3, there are preferably two electrodes. 2 6 Under the mirror 202, each electrode 126 has a structure as shown in Figure 7b. The triangle shown. In the embodiments shown in Figs. 12a, 2b and 13 there is preferably a single, square electrode 126 under the mirror 202. These electrodes 126 are formed on the surface of the second substrate 107. In this embodiment, the large surface area of the electrode 126 will cause a relatively low addressing voltage required for the pull-down mirror plate 204 to the mechanical stop, thereby causing the full pre-angle deflection of the microplate 204.

Option z In operation, the individual reflective micromirrors 202 are selectively deflected and used to spatially modulate the light incident on and reflected by the mirror 202.

7a and 8 are cross-sectional views of the micromirror 202 shown by the dotted line 250 in FIG. 2a. Note that this cross-sectional view is offset from the center diagonal of the micromirror 202 to show the outline of the hinge 206. Fig. 7c shows different cross-sectional views of the micromirror 202 shown along the dotted line 250 in Fig. 2a. Note that this section view is diagonal to the center, perpendicular to the hinge 206. 7a, 7c and 8 are micromirrors 202 above the display electrode 126. FIG. In operation, a voltage is applied to the electrode on one side of the micromirror 2 0 2] 2 6 to control the electrode] 2 6 The deflection of the corresponding portion of the mirror plate 2 04 above the side 2 2 4 a in FIG. 8) . As shown in FIG. 8, when the voltage is applied to the electrode] 26, half of the mirror plate 204a will be attached to the electrode] 26, and the other half of the mirror plate 2 (Mb will be removed from the electrode 1 due to the structure and rigidity of the mirror plate 204). 26 and the second base] 07. This will cause the mirror plate 204 to rotate around the torsion spring hinge 2 06. When the voltage is moved away from the electrode] 26, as shown in Figure 7a, 'Hinge 2 0 6 will cause the mirror -32- 200525272 (29) Plate 2 04 bounces back to its undeflected position. Alternatively, in embodiments having a diagonal chain 206 as shown in Figures 2a, 2b, and 3, a voltage may be applied to the other The electrode 126 on one side deflects the mirror 202 in the opposite direction. In this way, the light striking the mirror 202 is reflected in a direction controlled by applying a voltage to the electrode 126.

An embodiment operates as follows. Initially, the mirror 202 is undeflected as in Figures 7a and 7c. In this unshifted state, incident light that is obliquely incident from the light source to the SLM 100 is reflected by the plane mirror 202. The outgoing, reflected light is received by, for example, an optical pump. The light reflected from the undeflected mirror 202 will not be reflected to the video display. When a voltage bias is applied between the half of the mirror plate 2 0 4a and the electrode below it] 26, the mirror 202 is deflected by electrostatic attraction. In the embodiment, when the mirror plate 2 04 a is deflected downward as shown in FIG. 8, v e! Is preferably

12 volts' V b is -10 volts, and Ve 2 is 0 volts. Similarly (or vice versa), when the microplate 204b is deflected downward, Ve] is preferably 0 volts, vb is -10 volts, and ve2 is 12 volts. Due to the design of the hinge 2 0 6, one side of the mirror plate 2 0 4 a or 2 0 4 b (that is, the side located above the electrode I 2 6 with a bias voltage) is deflected downward (toward the second base 1 0). 7), and the other side of the mirror plate 2 0 4 b or 2 0 4 a will move away from the second substrate]. Note that in a preferred embodiment, substantially all of the bending occurs in the hinge 206 instead of the mirror plate 204. In one embodiment, this is achieved by making the hinge width 2 2 2 溥 'and connecting the hinge 206 to a support post located only on the two ends. As described above, the deflection of the mirror plate 204 is limited by the stopper 40 w or 40 5 b. The total deflection of the mirror plate 2 0 4 will cause the external reflected light to be diverted ~ 33- 200525272 (30) to the imaging light and video display.

When the mirror plate 204 is deflected through the "fast-moving" or "pull-down" voltage (almost 12 volts or lower in the conventional embodiment), the recovered mechanical force or torque of the hinge 206 cannot balance the electrostatic force or torque, And the half 204a or 204b of the mirror plate 204 having an electrostatic force under it will quickly move toward the electrode 1 2 6 under it to obtain complete deflection, which is limited only by the stopper 405 a or 405b when necessary. In the embodiment in which the hinge 206 shown in Figs. 12a, 12b, and 13 is parallel to the support wall of the spacer support frame 210, the voltage must be turned off in order to release the mirror plate 204 from its fully deflected position. In the embodiment where the hinges shown in Figs. 2a, 2b, and 3 are diagonal, in order to release the mirror plate 204 from its fully deflected position, the voltage must be turned off when other electrodes are being enabled, And the mirror 202 is attached to the other side.

The micromirror 202 is an electromechanical bistable device. Given a specific voltage between the release voltage and the snap-action voltage, depending on the history of deflection of the mirror 202, the mirror plate 204 can have two possible deflection angles. Therefore, the mirror 202 deflection behaves like a shackle. Since the mechanical force required for the deflection of the mirror 2 02 is approximately linear with respect to the deflection angle, these bistable and shackle characteristics will exist, while the opposite electrostatic force is with the mirror plate 2 04 and the electrode 1 2 6 The distance between them is inversely proportional. Since the electrostatic force between the mirror plate 2 04 and the electrode 126 depends on the total voltage difference between the mirror plate 2 04 and the electrode I 26, the negative voltage applied to the mirror plate 204 will reduce the positive voltage required to the electrode] 2 6 And get a given amount of deflection. In this way, applying a voltage to the mirror array 103 can reduce the amount of voltage 値 required by the electrodes 126. This is true, for example, in some applications -34-200525272 (31), because the switching capability of 5 V is more versatile and cost effective in the semiconductor industry, it is necessary to make The maximum voltage of electrodes 1 2 6 remains below 12 V.

Since the maximum deflection of the mirror 202 is fixed, if the SLM 100 is operated at a voltage exceeding the snap-action voltage, it can be operated digitally. The hinges shown in Figures 2a, 2b and 3 are parallel to the spacer support frame

In the embodiment of the supporting wall of 2 10, since the mirror plate 2 0 4 is completely deflected downward due to the voltage applied to the associated electrode] 2 6 or when no voltage is applied to the associated electrode I 2 6, it is allowed The mirror plate 2 0 4 pops up, so the operation is basically digital. In the embodiment having the diagonals of hinges 206 as shown in Figs. 12a, 1b and 13, when the other electrodes 126 on the other side of the mirror plate 204 are enabled, the mirror plate 204 is deflected down completely to the other side of the mirror plate 204 by the voltage applied to the associated electrode 1 2 6 on one side of the mirror plate 204. The voltage that causes the mirror plate 204 to be completely deflected downward until it is stopped by the solid element that stops the deflection of the mirror plate 204 is referred to as "quick action" or "pull down" voltage. In this way, in order to fully deflect the mirror plate 204 downward, a voltage equal to or greater than the snap-action voltage is applied to the corresponding electrode 1 2 6. In the video display application, when the mirror plate 204 is completely deflected downward, the incident light incident on the mirror plate 204 will be reflected to the corresponding pixels on the video display screen, and the pixels will appear bright. When the mirror plate 204 is allowed to pop up, the light will be deflected in such a way that it will not hit the video display screen, and the pixels will appear dark. During this digital operation, it is not necessary to maintain a full snap-action voltage on the electrodes 1 2 6 after the associated mirror plate 20 04 is fully deflected. During the "addressing phase", the selection of the mirror plate 2 0 4 which should be fully deflected -35- 200525272 (32)

The voltage of the electrodes 126 will be set to the required level of the deflection mirror plate 204. When the mirror plate 204 in question is deflected due to the voltage on the electrode] 26, the voltage required to hold the mirror plate 204 in the deflected position will be less than the voltage required for true deflection. This is because the gap between the deflected mirror plate 204 and the address electrode 26 is smaller than when the mirror plate 204 is deflected. Therefore, in the "holding phase" after the # addressing phase, the voltage applied to the selected electrode 1 2 6 will be reduced from its original required level, but it will not be substantial. Deflection. One of the advantages of having a lower holding stage is that nearby undeflected mirror plates 204 will experience less electrostatic attraction, and they therefore remain closer to a zero deflection position. This improves the optical contrast between the deflected mirror plate 204 and the undeflected mirror plate 204. By properly selecting the dimensions (in one embodiment, the mirror plate 204 and the electrode

Support frame between 1 2 6 2 1 0 Separation is 1 to 5 microns depending on the mirror structure and deflection angle requirements, and the thickness of the hinge 206 is 0.05 to 0.45 microns) and materials (such as monocrystalline silicon (100)) , The reflective SLM 100 can be made with an operating voltage of only a few volts. The torsion spring 2 0 6 made of monocrystalline silicon can have a shear modulus of 5 X 10 1G Newton / radius square meter. Maintaining the mirror plate 204 at an appropriate voltage (negative bias) instead of ground, allows the electrode I 2 6 to operate to fully deflect the voltage of the associated mirror plate 204. For a given voltage applied to the electrodes 1 2 6 this results in a greater deflection angle. The maximum negative bias voltage is the release voltage, so when the address voltage drops to zero, the mirror plate 04 can quickly move back to the undeflected position. It is also possible to control the deflection of the mirror plate 204 in a more "analogous" manner. Apply a voltage less than the "quick-acting voltage" to deflect and control the mirror plate 204. -36- 200525272 (33) The direction in which the incident light is reflected. Other applications In addition to video displays, the spatial light modulator 100 is also useful in other applications. One such application is maskless lithography, where the spatial light modulator 100 directs light to develop the deposited photoresist. This will enable the photoresist to be developed correctly in a desired pattern without a mask. Although the present invention has been particularly shown and described with reference to various embodiments, those skilled in the relevant arts should understand that various changes in form and details can be made without departing from the spirit and scope of the present invention. . For example, the mirror plate 204 can be deflected by means other than electrostatic attraction. Alternatively, magnetic, thermal, or piezoelectric actuation may be used to deflect the mirror plate 204. [Schematic description]

Figure] illustrates the general architecture of a spatial light modulator according to an embodiment of the present invention. FIG. 2 a is a perspective view of a single micromirror according to an embodiment of the present invention. Fig. 2b is a perspective view of a corner of the micromirror of Fig. 2a. Figure 3 is a perspective view of a single micromirror without a reflective surface, showing the top and sides of the mirror plate of the micromirror array in an embodiment. Fig. 4a shows the bottom and sides of a single micromirror according to an embodiment of the present invention. -Figure 4b is a perspective view of the corner of the micromirror of Figure 4a. FIG. 5 is a perspective view showing a top portion and a side portion of a micromirror in the embodiment of the present invention. Fig. 6 is a perspective view showing the bottom and sides of a micromirror array according to an embodiment of the present invention. Fig. 7a is a cross-sectional view of an undeflected micromirror shown in Fig. 2a along an offset diagonal section. Fig. 7b shows an electrode and a land landing tip formed under the mirror plate in the second substrate according to an embodiment of the present invention. Fig. 7c is a cross-sectional view of the undeflected micromirror shown in Fig. 2a along the central diagonal section. Fig. 8 is a sectional view of the deflected micromirror shown in Fig. 2a. Fig. 9a is a flowchart showing a preferred embodiment of how to manufacture a spatial light modulator. Figures 9b to 9m are sectional views showing the manufacture of the spatial light modulator in more detail. Fig. 0 shows a preferred embodiment of a mask for forming a cavity in a first substrate. Fig. 1 is a perspective view showing an embodiment of an electrode formed on a second substrate. Fig. 2a is a perspective view of a micromirror in another embodiment of the present invention. Fig. 2b is a perspective view of the corner of the micromirror 2a. Fig. 3 is a body view showing the bottom and sides of the micromirror in the embodiment shown in Fig. 2a. Figure 14 is a body view showing the top and sides of a micromirror array in another embodiment of the present invention. -38- 200525272 (35) Figure] A 5 series perspective view showing the bottom and sides of the micromirror array in another embodiment shown in Figure 14. Fig. 16a to Fig. 6e show another method of making a cavity in the first substrate. [Symbol description] 1 00 spatial light modulator 1 03 deflectable mirror array 1 04 electrode array 105 first substrate 106 control circuit 1 07 second substrate 1 08 display control 1 1 0 line memory buffer 112 pulse modulation Array 114 Microcontroller 116 Light control circuit 1 1 8 Flash memory 120 Video signal 122 Graphic signal] 26 electrode 1 26a electrode 12 6 b pole] 97 distance

-39- 200525272 (36) 2 0 1 down 202 micro 2 0 2 -1 to 202 203 reverse 204 mirror 2 04a first 2 04b second 205 upper 206 hinge 2 0 6a second 2 0 6b second 2 1 0 room 2 12 room 2 16 with 222 width 223 depth 236 angle 23 7 angle 23 8 angle 40 5 a to 4 0 5 b to 7 10a to 7 10b to 795 middle surface mirror -9 beam surface plate one side surface chain one arm one spacer Support frame divider wall width connector degree drop moving piece land tip land tip core height micromirror

-40- 200525272 (37) 796 Medium 797 Medium 905 Top 9 10 Concave 9 15 Mirror 920 Sacrifice 1000 Cover 1002 10 04 Area 1605 Fuck 16 10 Must 16 15 Outfit 16 15a Top 1620 Refer 1625 Open 1626 Open 162 7 Mouth early 1628 C3 Mouth early heart height heart height trough plate part of the material cover area as the base edge oxide layer placement layer electrical material □ crystalline silicon material crystal sand material

Claims (1)

200525272 (1) Pick up and apply for a patent scope 1. A method for manufacturing a spatial light modulator, comprising: forming a first * substrate defining a cavity; forming an electrode on a second substrate; bonding the first substrate to a second substrate; Forming a hinge and a mirror plate on the first substrate; and On the mirror plate and above the hinge portion, a reflecting surface is applied, the area of the reflecting surface being larger than the area of the upper surface of the mirror plate. 2. The method of claim 1 in the scope of patent application, wherein the reflective surface substantially conceals a hinge associated with the mirror plate. 3. The method according to item 1 of the scope of patent application, wherein the hinge is formed substantially under the upper surface of the mirror plate and is substantially hidden by the reflective surface. 4 The method according to item 1 of the scope of patent application, wherein the space The first substrate in the light modulator is a single piece of material. 5. The method of claim 1 in which the first substrate in the spatial light modulator is a single crystal silicon. 6. The method of claim 1 in the patent application scope further includes forming a stopper on the lower surface of the mirror plate. 7. The method according to item 6 of the patent application, further comprising forming a land tip on the second substrate at a position where the stopper is received. 8. The method according to item 1 of the patent application scope, further comprising manufacturing an addressing and control circuit on the second substrate before bonding the first substrate to the second substrate. -42-200525272 (2) 9. According to the method in the scope of the patent application], + + ^ A where the center height of the hinge and the center height of the mirror plate are substantially $ @. 10. The method according to item 1 of the scope of the patent application, wherein the acupoint is provided by a spacer supporting wall on a spacer supporting frame in the base. 11. The method of claim 1 in which the circuit is formed using CMOS technology. 12. The method according to item 1 of the patent application, wherein the first substrate forming the defined cavity includes: A first substrate having a device layer is obtained, the device layer having a predetermined thickness; a dielectric material is deposited on the device layer of the first substrate; the dielectric material is etched to create an opening in a predetermined position; growing in the opening has the same device Material of the crystal structure of the layer; and removing the dielectric layer. 13. The method according to item 12 of the scope of patent application, wherein the device layer is a single crystal silicon material, and wherein the first substrate includes an insulating oxide layer on the device layer and an operation on the insulating oxide layer. Base. 14. The method of claim 12 in the scope of patent application, wherein 'the device layer has a thickness between 0.2 micrometer and 0.4 micrometer. [5] The method according to item 12 of the scope of patent application, wherein 'the dielectric material is silicon oxide. ] 6. The method according to item 12 of the scope of patent application, wherein the material grown in the opening is grown by an epitaxial growth process. -43- 200525272 (3)] 7. The method according to item 1 of the scope of patent application, wherein forming the first substrate defining the cavity comprises: placing a mask on the first substrate, the mask having a position defining the cavity The first part and the second part defining the position of the supporting wall, the first part exposing the first substrate under the first part to be etched, the supporting wall defining the cavity, the second The portion can prevent the first substrate under the second portion from being etched; The first substrate under the first part of the mask is etched to a predetermined depth »and the mask is removed from the substrate. 18. The method of claim 1 in claim 1, wherein manufacturing and electrode on the second substrate includes: shielding the control circuit with a passivation layer; depositing a metallization layer on the passivation layer; Patterning the metallization layer; and The metallization layer is etched to leave the material constituting the electrode. 19. The method of claim 1 in claim 1, wherein bonding the first substrate to the second substrate includes: aligning the first substrate with respect to the second substrate such that the electrode on the second substrate is under control A deflected position of an associated micromirror in the first substrate; and a low temperature bonding method is used to bond the first substrate and the second substrate. 20. The method according to the scope of application for a patent, wherein a sharp key and a mirror plate are formed on the first substrate. Including -44-200525272 (4) Thinning the top layer of the first substrate to a predetermined thickness; The hinge on the first substrate below the upper surface of the first substrate; depositing a sacrificial layer on the first substrate; planarizing the first substrate to remove the sacrificial layer from the upper surface of the first substrate; Release the mirror plate by engraving the first base; and remove the sacrificial layer on and around the hinge so that the mirror plate can rotate about the axis defined by the hinge. 21. The method of claim 20, wherein thinning the top layer of the first substrate to a predetermined thickness includes: removing the operating substrate in the first substrate by honing and / or etching; and stripping An insulating oxide layer in the first substrate. 22. The method of claim 20, wherein etching the hinge on the first substrate substantially below the thinned upper surface of the first substrate comprises: etching a recess in the upper surface of the first substrate. A groove; and etching the first substrate to release the hinge from the first substrate such that an end portion of the hinge remains connected to the first substrate. 2 3. The method of claim 20, wherein depositing a sacrificial layer on the first substrate includes: filling the hinge with the sacrificial layer and the gap surrounding the hinge; and on the upper surface of the first substrate The sacrificial layer is deposited thereon. -45- 200525272 (5) 24. The method of claim 20, wherein planarizing the first substrate to remove the sacrificial layer includes using an etch-back step or a chemical mechanical processing process to remove the sacrificial layer. . 25. The method of claim 20, wherein removing the sacrificial layer on and around the hinge includes using a plasma uranium engraving process. 26. The method of claim 1 in which applying a reflective surface on the mirror plate and above the portion of the hinge includes: Depositing aluminum on the upper surface of the first substrate; and depositing aluminum over a portion of the hinge, wherein the aluminum has a thickness of 300 A or less. 2 7 · A method for manufacturing a plurality of mirrors for a spatial light modulator, comprising: forming a cavity in a first side of a first substrate; thinning a top layer on a second side of the first substrate to a predetermined thickness ; Etching the hinge substantially on the second side of the first substrate below the upper surface of the thinned first substrate; depositing a sacrificial layer on the second side of the first substrate; planarizing the second side of the first substrate Depositing a reflective surface on the second side of the first substrate; releasing the mirror by etching; removing the sacrificial layer on and around the hinge so that the mirror can rotate around an axis defined by the hinge. 2 8. The method for manufacturing a plurality of mirrors for a spatial light modulator according to item 27 of the scope of patent application, wherein the reflecting surface substantially conceals the hinge -46-200525272 (6) 2 9 · The method for manufacturing a plurality of mirrors for a spatial light modulator according to item 27 of the scope of patent application, wherein a reflective surface is deposited on the upper surface of the first substrate and above the part of the parent chain The area of the reflective surface is larger than the area of the upper surface of the mirror plate. 30. The method according to item 27 of the patent application scope, wherein forming a cavity in the first side of the first substrate includes: generating a mask 'the mask defines a layer to be etched from the first side of the first substrate Area; removing material in the area on the first side of the first substrate defined by the mask to form a cavity in the first side of the first substrate. 31. The method of claim 27, wherein forming a cavity in the first side of the first substrate includes: obtaining a first substrate having a device layer having a predetermined thickness; Depositing a dielectric material on the device layer of a substrate; etching the dielectric material to create an opening at a position where a support wall of the spacer support frame is to be created; growing a material having the same crystal structure as the device layer in the opening; and moving Remove the dielectric layer. 32. The method of claim 31, wherein the first substrate has an insulating layer on the device layer and an operating substrate on the insulating layer, and wherein the device layer has about 2 microns and about 3 microns Between -47- 200525272 (7) degrees. 33. The method of claim 30, wherein removing material from a region of the first substrate defined by the mask includes etching the first substrate. 34. The method of claim 30, wherein removing the material in the area of the first substrate defined by the mask includes performing anisotropic reactive ion etching by circulating SF6, HBr, and oxygen. 35. The method of claim 27, wherein thinning the top layer on the second side of the first substrate includes: removing the operating substrate by honing and / or etching; and stripping the oxidation Physical layer. 36. The method of claim 27, wherein thinning the top layer of the second side of the first substrate comprises a group selected from the group consisting of honing, silicon etchback, wet etching, and plasma etching. deal with. 37. The method of claim 27, wherein the etching hinge includes a first etch etched to an upper surface on the second side of the first substrate to form a groove below the upper surface, and A mirror portion of a substrate releases the second etch of the hinge. 38. The method according to item 27 of the patent application scope, further comprising etching a stopper on the lower surface of the mirror plate in the first substrate. 3 9 · A method of manufacturing a spatial light modulator, the spatial light modulator comprising an array having a plurality of mirrors, the method comprising: generating a mask 'the mask defines that it is to be removed from a first side of a first substrate Etched area; etch the area on the first side of the first substrate defined by the mask to form ~ 48-200525272 (8) a plurality of holes in the first side of the first substrate; Making electrodes on one side; bonding the first side of the first substrate to the first side of the second substrate; thinning the top layer on the second side of the first substrate to a predetermined thickness; etching the hinge in the first substrate; Depositing a sacrificial layer on the first substrate; planarizing the first substrate to remove the sacrificial layer from the upper surface on the second side of the first substrate, leaving sacrificial material on and around the hinge; on the upper surface Above the portion of the hinge, a reflective surface is deposited; the mirror is released by etching; the remaining sacrificial layer is removed from the first substrate so that the mirror can rotate about the axis defined by the hinge. 40. The method of manufacturing a spatial light modulator according to item 39 of the scope of patent application, wherein the area of the reflective surface is larger than the area of the upper surface of the mirror plate. 4]. The manufacturing method of the spatial light modulator according to item 39 of the patent application scope, wherein the reflective surface substantially conceals the hinge. 42. The method of manufacturing a spatial light modulator according to item 39 of the scope of patent application, wherein the hinge is formed substantially under the upper surface of the first substrate and is substantially hidden by the reflective surface. 4 3. The method of claim 39, wherein the area on the first side of the first substrate defined by the mask is etched to form a plurality of cavities in the first side of the first substrate, including by Anisotropic reactive ion etching is performed by circulating SF 6 'Η B r and oxygen. ~ 49-200525272 (9) 4 4. The method according to item 39 of the scope of patent application, further comprising: forming a control circuit on the first side of the second substrate before manufacturing the electrodes on the first side of the second substrate. 45. The method of claim 44, wherein forming a control circuit on the first side of the second substrate includes manufacturing a memory buffer, a display controller, and a pulse width modulation array. 4 6. The method of claim 39, wherein manufacturing the electrode on the first side of the second substrate includes: covering the manufactured control circuit with a passivation layer; depositing a metallization layer on the passivation layer; Patterning the metallization layer with a pattern defining the electrode; and etching the metallization layer to leave the material constituting the electrode. 4 7. The method according to item 39 of the patent application scope, further comprising: aligning the first substrate with the second substrate before joining the first side of the first substrate to the first side of the first substrate, so that When the first and second substrates are bonded together, the electrodes on the second substrate are arranged to control the deflection of the mirror in the first substrate. 48. The method of claim 47, wherein aligning the first substrate with the second substrate includes aligning a pattern on the first substrate with a pattern on the second substrate. 49. The method of claim 39, wherein bonding the first side of the first substrate to the first side of the second substrate includes using a low temperature bonding method performed at a temperature of less than about 400 degrees Celsius. 50. The method of claim 39, wherein the worm-carved hinge-50-200525272 do) chain includes a first etch etched to the upper surface of the first substrate to form a groove below the upper surface, and , Releasing the second etch of the hinge from the mirror plate portion of the first substrate. 51. The method of claim 39, further comprising etching a stopper on the lower surface of the mirror, and wherein, on the upper surface of the first substrate and above the portion of the hinge, depositing the stopper Reflective surface. 5 2. A method for operating a spatial light modulator, comprising: selecting a micromirror to be deflected from a micromirror array of the spatial light modulator; and selecting the micromirror and related to the selected micromirror. A voltage difference between the connected electrodes causes the micromirror to deflect. The micromirror has a reflective surface to substantially conceal the hinge and deflect light incident on the micromirror. -51-